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arch/arm/src/lpc54xx: Correct the EMC divider register definition and one typo in the SDRAM setup. SDRAM is not fully functional on this board!

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This commit is contained in:
Gregory Nutt
2017-12-12 08:24:57 -06:00
parent d51554c101
commit 0cd87be495
3 changed files with 16 additions and 32 deletions
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arch/arm/src/lpc54xx/chip/lpc54_syscon.h
+2 -2
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@@ -617,9 +617,9 @@
/* EMC clock divider */
#define SYSCON_EMCCLKDIV_DIV_SHIFT (9) /* Bits 0-7: Clock divider value */
#define SYSCON_EMCCLKDIV_DIV_SHIFT (0) /* Bits 0-7: Clock divider value */
#define SYSCON_EMCCLKDIV_DIV_MASK (0xff <<SYSCON_EMCCLKDIV_DIV_SHIFT)
# define SYSCON_EMCCLKDIV_DIV(n) ((uint32_t)((n)-1) <<SYSCON_EMCCLKDIV_DIV_SHIFT)
# define SYSCON_EMCCLKDIV_DIV(n) ((uint32_t)((n)-1) << SYSCON_EMCCLKDIV_DIV_SHIFT)
#define SYSCON_EMCCLKDIV_RESET (1 << 29) /* Bit 29: Resets the divider counter */
#define SYSCON_EMCCLKDIV_ HALT (1 << 30) /* Bit 30: Halts the divider counter */
#define SYSCON_EMCCLKDIV_REQFLAG (1 << 31) /* Bit 31: Divider status flag */
configs/lpcxpresso-lpc54628/README.txt
+13 -29
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@@ -30,35 +30,10 @@ STATUS
2017-12-10: The basic NSH configuration is functional at 220MHz with a
Serial console, timer and LED support. Added support for the external
SDRAM and for the RAM test utility -- UNTESTED!
2017-12-11: Fixed an error in board LEDs. SDRAM is marginally functional:
nsh> mw a0000000=55555555
a0000000 = 0x00000000 -> 0x55555555
nsh> mw a0000000
a0000000 = 0x55555555
But does not pass the ramtest. These tests all pass:
nsh> ramtest a0000000 16
nsh> ramtest a0000000 32
nsh> ramtest a0000000 64
nsh> ramtest a0000000 126
But this fails the marching one's test (only):
nsh> ramtest a0000000 128
RAMTest: Marching ones: a0000000 128
RAMTest: ERROR: Address a0000006 Found: 0002 Expected 0001
RAMTest: ERROR: Address a0000008 Found: 0002 Expected 0001
...
RAMTest: ERROR: Address a000007e Found: d47e Expected 0001
RAMTest: Marching zeroes: a0000000 128
RAMTest: Pattern test: a0000000 128 55555555 aaaaaaaa
RAMTest: Pattern test: a0000000 128 66666666 99999999
RAMTest: Pattern test: a0000000 128 33333333 cccccccc
RAMTest: Address-in-address test: a0000000 128
Additional test fail as the size of the test increases.
2017-12-11: Fixed an error in board LEDs. SDRAM is partially functional
but not reliable. Added framework for future I2C and SPI flexcomm
drivers (mostly empty files for now)
2017-12-12: The SDRAM is now functional passes the commplete RAM test.
Configurations
==============
@@ -156,4 +131,13 @@ Configurations
0xa0000000, the size of the memory is 128Mbits or 16Mb. So the DRAM
may be tested with this command:
NuttShell (NSH) NuttX-7.23
nsh> ramtest a0000000 16777216
RAMTest: Marching ones: a0000000 16777216
RAMTest: Marching zeroes: a0000000 16777216
RAMTest: Pattern test: a0000000 16777216 55555555 aaaaaaaa
RAMTest: Pattern test: a0000000 16777216 66666666 99999999
RAMTest: Pattern test: a0000000 16777216 33333333 cccccccc
RAMTest: Address-in-address test: a0000000 16777216
nsh>
configs/lpcxpresso-lpc54628/src/lpc54_sdram.c
+1 -1
View File
@@ -111,7 +111,7 @@ static const struct emc_dynamic_timing_config_s g_emc_dynconfig =
.rc = 60,
.rfc = 60,
.xsr = 67,
.rrd = 23,
.rrd = 12,
.mrd = 2,
};