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Fix a critical PIC32 GPIO configuration bug
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4867 42af7a65-404d-4744-a932-0658087f49c3
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@@ -2923,5 +2923,8 @@
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the Mirtoo module.
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the Mirtoo module.
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* configs/mirtoo/scripts: Move all Mirtoo linker scripts to a common
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* configs/mirtoo/scripts: Move all Mirtoo linker scripts to a common
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directory.
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directory.
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* arch/mips/src/pic32mx/pic32mx-gpio.c: All digital inputs were being
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configured as outputs. This is a *critical* bug fix and needs to be
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incorporated by any PIC32 users.
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@@ -57,7 +57,26 @@
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</p>
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</p>
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<h1>NXWidgets DOxygen Documentation</h1>
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<h1>NXWidgets DOxygen Documentation</h1>
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<p>
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<p>
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DOxygen documentation for the NxWidgets-1.0 is now available online at <a href="http://www.nx-engineering.com/nxwidgets_v1_0/">this location</a>.
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Release notes, DOxygen documentation, as well as downloads for the latest NxWidgets releases are available online:
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</p>
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<ul>
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<li>
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<b>NxWidgets-1.0</b>:
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<a href="http://www.nx-engineering.com/nxwidgets_v1_0/">Documentation</a>, and
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<a href="http://sourceforge.net/projects/nuttx/files/NxWidgets/NxWidgets-1.0/">Downloads</a>
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</li>
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<li>
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<b>NxWidgets-1.1</b>:
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<a href="http://www.nx-engineering.com/nxwidgets_v1_1/">Documentation</a>,
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<a href="http://sourceforge.net/projects/nuttx/files/NxWidgets/NxWidgets-1.1/">Release notes</a>, and
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<a href="http://sourceforge.net/projects/nuttx/files/NxWidgets/NxWidgets-1.1/">Downloads</a>
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</li>
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<li>
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<b>NxWidgets-1.2</b>:
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<a href="http://www.nx-engineering.com/nxwidgets_v1_2/">Documentation</a>,
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<a href="http://sourceforge.net/projects/nuttx/files/NxWidgets/NxWidgets-1.2/">Release notes</a>, and
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<a href="http://sourceforge.net/projects/nuttx/files/NxWidgets/NxWidgets-1.2/">Downloads</a>
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</li>
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</p>
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</p>
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<p>
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<p>
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Thanks go to Jose Pablo Carballo for contributing this!
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Thanks go to Jose Pablo Carballo for contributing this!
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@@ -160,7 +160,7 @@ int pic32mx_configgpio(uint16_t cfgset)
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sched_lock();
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sched_lock();
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if (pic32mx_output(cfgset))
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if (pic32mx_output(cfgset))
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{
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{
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/* It is an output; set the corresponding bit in the TRIS register */
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/* It is an output; clear the corresponding bit in the TRIS register */
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putreg32(1 << pin, base + PIC32MX_IOPORT_TRISCLR_OFFSET);
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putreg32(1 << pin, base + PIC32MX_IOPORT_TRISCLR_OFFSET);
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@@ -189,11 +189,9 @@ int pic32mx_configgpio(uint16_t cfgset)
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}
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}
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else
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else
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{
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{
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/* It is an input; clear the corresponding bit in the TRIS
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/* It is an input; set the corresponding bit in the TRIS register. */
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* register.
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*/
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putreg32(1 << pin, base + PIC32MX_IOPORT_TRISCLR_OFFSET);
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putreg32(1 << pin, base + PIC32MX_IOPORT_TRISSET_OFFSET);
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putreg32(1 << pin, base + PIC32MX_IOPORT_ODCCLR_OFFSET);
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putreg32(1 << pin, base + PIC32MX_IOPORT_ODCCLR_OFFSET);
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}
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}
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@@ -73,6 +73,7 @@
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# define PIC32MX_IOPORT_ODCCLR_OFFSET 0x0044 /* Open drain control clear register */
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# define PIC32MX_IOPORT_ODCCLR_OFFSET 0x0044 /* Open drain control clear register */
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# define PIC32MX_IOPORT_ODCSET_OFFSET 0x0048 /* Open drain control set register */
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# define PIC32MX_IOPORT_ODCSET_OFFSET 0x0048 /* Open drain control set register */
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# define PIC32MX_IOPORT_ODCINV_OFFSET 0x004c /* Open drain control invert register */
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# define PIC32MX_IOPORT_ODCINV_OFFSET 0x004c /* Open drain control invert register */
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# define PIC32MX_IOPORT_CNPU_OFFSET 0x0050 /* Change Notification Pull-up register */
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# define PIC32MX_IOPORT_CNPU_OFFSET 0x0050 /* Change Notification Pull-up register */
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# define PIC32MX_IOPORT_CNPUCLR_OFFSET 0x0054 /* Change Notification Pull-up clear register */
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# define PIC32MX_IOPORT_CNPUCLR_OFFSET 0x0054 /* Change Notification Pull-up clear register */
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# define PIC32MX_IOPORT_CNPUSET_OFFSET 0x0058 /* Change Notification Pull-up set register */
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# define PIC32MX_IOPORT_CNPUSET_OFFSET 0x0058 /* Change Notification Pull-up set register */
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