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xtensa/esp32s2: Add basic support to SPI
This commit is contained in:
Alan Carvalho de Assis
committed by
Petro Karashchenko
Petro Karashchenko
parent
27fe5a50c6
commit
0b4ef1406d
@@ -237,6 +237,10 @@ config ESP32S2_I2C
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bool
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default n
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config ESP32S2_SPI
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bool
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default n
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config ESP32S2_TIMER
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bool
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default n
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@@ -252,6 +256,18 @@ config ESP32S2_RNG
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---help---
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ESP32-S2 supports a RNG that passed on Dieharder test suite.
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config ESP32S2_SPI2
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bool "SPI 2"
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default n
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select ESP32S2_SPI
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select SPI
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config ESP32S2_SPI3
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bool "SPI 3"
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default n
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select ESP32S2_SPI
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select SPI
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config ESP32S2_SPIFLASH
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bool "SPI Flash"
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default n
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@@ -361,6 +377,69 @@ config ESP32S2_GPIO_IRQ
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---help---
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Enable support for interrupting GPIO pins.
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menu "SPI configuration"
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depends on ESP32S2_SPI
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config ESP32S2_SPI_SWCS
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bool "SPI software CS"
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default n
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---help---
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Use SPI software CS.
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config ESP32S2_SPI_UDCS
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bool "User defined CS"
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default n
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depends on ESP32S2_SPI_SWCS
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---help---
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Use user-defined CS.
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if ESP32S2_SPI2
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config ESP32S2_SPI2_CSPIN
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int "SPI2 CS Pin"
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default 10
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range 0 48
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config ESP32S2_SPI2_CLKPIN
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int "SPI2 CLK Pin"
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default 12
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range 0 48
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config ESP32S2_SPI2_MOSIPIN
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int "SPI2 MOSI Pin"
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default 11
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range 0 48
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config ESP32S2_SPI2_MISOPIN
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int "SPI2 MISO Pin"
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default 13
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range 0 48
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endif # ESP32S2_SPI2
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if ESP32S2_SPI3
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config ESP32S2_SPI3_CSPIN
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int "SPI3 CS Pin"
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default 10
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range 0 48
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config ESP32S2_SPI3_CLKPIN
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int "SPI3 CLK Pin"
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default 12
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range 0 48
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config ESP32S2_SPI3_MOSIPIN
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int "SPI3 MOSI Pin"
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default 11
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range 0 48
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config ESP32S2_SPI3_MISOPIN
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int "SPI3 MISO Pin"
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default 13
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range 0 48
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endif # ESP32S2_SPI3
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endmenu
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menu "UART Configuration"
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depends on ESP32S2_UART
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@@ -49,6 +49,10 @@ ifeq ($(CONFIG_ESP32S2_I2C),y)
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CHIP_CSRCS += esp32s2_i2c.c
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endif
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ifeq ($(CONFIG_ESP32S2_SPI),y)
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CHIP_CSRCS += esp32s2_spi.c
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endif
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ifeq ($(CONFIG_ESP32S2_TIMER),y)
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CHIP_CSRCS += esp32s2_tim.c
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ifeq ($(CONFIG_TIMER),y)
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,150 @@
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/****************************************************************************
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* arch/xtensa/src/esp32s2/esp32s2_spi.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_SPI_H
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#define __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_SPI_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#ifdef CONFIG_ESP32S2_SPI
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#include <nuttx/spi/spi.h>
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#ifdef CONFIG_ESP32S2_SPI2
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# define ESP32S2_SPI2 2
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#endif
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#ifdef CONFIG_ESP32S2_SPI3
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# define ESP32S2_SPI3 3
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#endif
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: esp32s2_spibus_initialize
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*
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* Description:
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* Initialize the selected SPI bus.
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*
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* Input Parameters:
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* port - Port number (for hardware that has multiple SPI interfaces)
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*
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* Returned Value:
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* Valid SPI device structure reference on success; NULL on failure
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*
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****************************************************************************/
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struct spi_dev_s *esp32s2_spibus_initialize(int port);
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/****************************************************************************
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* Name: esp32s2_spi[2|3]_select and esp32s2_spi[2|3]_status
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*
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* Description:
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* The external functions, esp32s2_spi[2|3]_select,
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* esp32s2_spi[2|3]_status, and esp32s2_spi[2|3]_cmddata must be provided
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* by board-specific logic.
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* These are implementations of the select, status, and cmddata methods of
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* the SPI interface defined by struct spi_ops_s (include/nuttx/spi/spi.h).
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* All other methods (including esp32s2_spibus_initialize()) are provided
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* by common ESP32-S2 logic. To use this common SPI logic on your board:
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*
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* 1. Provide logic in esp32s2_board_initialize() to configure SPI chip
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* select pins.
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* 2. Provide esp32s2_spi[2|3]_select() and esp32s2_spi[2|3]_status()
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* functions in your board-specific logic. These functions will perform
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* chip selection and status operations using GPIOs in the way your
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* board is configured.
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* 3. If CONFIG_SPI_CMDDATA is defined in your NuttX configuration file,
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* then provide esp32s2_spi[2|3]_cmddata() functions in your
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* board-specific logic. These functions will perform cmd/data selection
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* operations using GPIOs in the way your board is configured.
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* 4. Add a call to esp32s2_spibus_initialize() in your low level
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* application initialization logic.
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* 5. The handle returned by esp32s2_spibus_initialize() may then be used
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* to bind the SPI driver to higher level logic (e.g., calling
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* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
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* the SPI MMC/SD driver).
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*
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****************************************************************************/
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#ifdef CONFIG_ESP32S2_SPI2
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void esp32s2_spi2_select(struct spi_dev_s *dev, uint32_t devid,
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bool selected);
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uint8_t esp32s2_spi2_status(struct spi_dev_s *dev, uint32_t devid);
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int esp32s2_spi2_cmddata(struct spi_dev_s *dev,
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uint32_t devid,
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bool cmd);
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#endif
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#ifdef CONFIG_ESP32S2_SPI3
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void esp32s2_spi3_select(struct spi_dev_s *dev, uint32_t devid,
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bool selected);
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uint8_t esp32s2_spi3_status(struct spi_dev_s *dev, uint32_t devid);
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int esp32s2_spi3_cmddata(struct spi_dev_s *dev,
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uint32_t devid,
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bool cmd);
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#endif
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/****************************************************************************
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* Name: esp32s2_spibus_uninitialize
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*
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* Description:
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* Uninitialize an SPI bus.
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*
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* Input Parameters:
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* dev - Device-specific state data
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*
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* Returned Value:
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* Zero (OK) is returned on success. Otherwise -1 (ERROR).
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*
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****************************************************************************/
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int esp32s2_spibus_uninitialize(struct spi_dev_s *dev);
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#endif /* CONFIG_ESP32S2_SPI */
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#ifdef __cplusplus
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}
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#endif
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#undef EXTERN
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_SPI_H */
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@@ -0,0 +1,54 @@
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/****************************************************************************
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* arch/xtensa/src/esp32s2/hardware/esp32s2_pinmap.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_ESP32S2_HARDWARE_ESP32S2_PINMAP_H
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#define __ARCH_XTENSA_SRC_ESP32S2_HARDWARE_ESP32S2_PINMAP_H
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/**
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* Peripheral' fixed mapped pins by IOMUX, these GPIO pins can have better
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* speed performance.
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*/
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/* UART0 */
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/* UART1 */
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/* SPI2 */
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#define SPI2_IOMUX_MISOPIN (13)
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#define SPI2_IOMUX_MOSIPIN (11)
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#define SPI2_IOMUX_CLKPIN (12)
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#define SPI2_IOMUX_CSPIN (10)
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#define SPI2_IOMUX_WPPIN (14)
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#define SPI2_IOMUX_HDPIN (9)
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/* SPI3 */
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/* SPI3 have no iomux pins */
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#endif /* __ARCH_XTENSA_SRC_ESP32S2_HARDWARE_ESP32S2_PINMAP_H */
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@@ -274,6 +274,8 @@
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#define REG_SPI_MEM_BASE(i) (DR_REG_SPI0_BASE - (i) * 0x1000)
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#define REG_I2C_BASE(i) (DR_REG_I2C_EXT_BASE + (i) * 0x14000 )
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#define REG_SPI_BASE(i) (DR_REG_SPI2_BASE + (((i) > 3) ? ((((i) - 2) * 0x1000) + 0x10000) : (((i) - 2) * 0x1000)))
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/* Registers Operation */
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#define REG_UART_BASE( i ) (DR_REG_UART_BASE + (i) * 0x10000 )
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File diff suppressed because it is too large
Load Diff
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