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Merged in masayuki2009/nuttx.nuttx/lc823450 (pull request #450)

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lc823450 support

Approved-by: Gregory Nutt <gnutt@nuttx.org>
This commit is contained in:
Masayuki Ishikawa
2017-08-02 12:48:09 +00:00
committed by Gregory Nutt
parent fee6653cb4 6f94e4e9e7
commit 0a05f3a492
53 changed files with 14196 additions and 0 deletions
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arch/arm/Kconfig
+15
View File
@@ -87,6 +87,17 @@ config ARCH_CHIP_KL
---help---
Freescale Kinetis L Architectures (ARM Cortex-M0+)
config ARCH_CHIP_LC823450
bool "ON Semiconductor LC823450"
select ARCH_CORTEXM3
select ARCH_HAVE_CMNVECTOR
select ARCH_HAVE_MPU
select ARCH_HAVE_HEAPCHECK
select ARCH_HAVE_MULTICPU
select ARCH_HAVE_I2CRESET
---help---
ON Semiconductor LC823450 architectures (ARM dual Cortex-M3)
config ARCH_CHIP_LM
bool "TI/Luminary Stellaris"
select ARCH_HAVE_CMNVECTOR
@@ -435,6 +446,7 @@ config ARCH_CHIP
default "imx6" if ARCH_CHIP_IMX6
default "kinetis" if ARCH_CHIP_KINETIS
default "kl" if ARCH_CHIP_KL
default "lc823450" if ARCH_CHIP_LC823450
default "tiva" if ARCH_CHIP_LM || ARCH_CHIP_TIVA
default "lpc11xx" if ARCH_CHIP_LPC11XX
default "lpc17xx" if ARCH_CHIP_LPC17XX
@@ -656,6 +668,9 @@ endif
if ARCH_CHIP_KL
source arch/arm/src/kl/Kconfig
endif
if ARCH_CHIP_LC823450
source arch/arm/src/lc823450/Kconfig
endif
if ARCH_CHIP_LM || ARCH_CHIP_TIVA
source arch/arm/src/tiva/Kconfig
endif
arch/arm/include/lc823450/chip.h
+121
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@@ -0,0 +1,121 @@
/****************************************************************************
* arch/arm/include/lc823450/chip.h
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_LC823450_CHIP_H
#define __ARCH_ARM_INCLUDE_LC823450_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* NVIC priority levels *****************************************************/
#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits set in minimum priority */
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Four bits of interrupt priority used */
/* If CONFIG_ARMV7M_USEBASEPRI is selected, then interrupts will be disabled
* by setting the BASEPRI register to NVIC_SYSH_DISABLE_PRIORITY so that most
* interrupts will not have execution priority. SVCall must have execution
* priority in all cases.
*
* In the normal cases, interrupts are not nest-able and all interrupts run
* at an execution priority between NVIC_SYSH_PRIORITY_MIN and
* NVIC_SYSH_PRIORITY_MAX (with NVIC_SYSH_PRIORITY_MAX reserved for SVCall).
*
* If, in addition, CONFIG_ARCH_HIPRI_INTERRUPT is defined, then special
* high priority interrupts are supported. These are not "nested" in the
* normal sense of the word. These high priority interrupts can interrupt
* normal processing but execute outside of OS (although they can "get back
* into the game" via a PendSV interrupt).
*
* In the normal course of things, interrupts must occasionally be disabled
* using the irqsave() inline function to prevent contention in use of
* resources that may be shared between interrupt level and non-interrupt
* level logic. Now the question arises, if CONFIG_ARCH_HIPRI_INTERRUPT,
* do we disable all interrupts (except SVCall), or do we only disable the
* "normal" interrupts. Since the high priority interrupts cannot interact
* with the OS, you may want to permit the high priority interrupts even if
* interrupts are disabled. The setting CONFIG_ARCH_INT_DISABLEALL can be
* used to select either behavior:
*
* ----------------------------+--------------+----------------------------
* CONFIG_ARCH_HIPRI_INTERRUPT | NO | YES
* ----------------------------+--------------+--------------+-------------
* CONFIG_ARCH_INT_DISABLEALL | N/A | YES | NO
* ----------------------------+--------------+--------------+-------------
* | | | SVCall
* | SVCall | SVCall | HIGH
* Disable here and below --------> MAXNORMAL ---> HIGH --------> MAXNORMAL
* | | MAXNORMAL |
* ----------------------------+--------------+--------------+-------------
*/
#if defined(CONFIG_ARCH_HIPRI_INTERRUPT) && defined(CONFIG_ARCH_INT_DISABLEALL)
# define NVIC_SYSH_MAXNORMAL_PRIORITY (NVIC_SYSH_PRIORITY_MAX + 2*NVIC_SYSH_PRIORITY_STEP)
# define NVIC_SYSH_HIGH_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP)
# define NVIC_SYSH_DISABLE_PRIORITY NVIC_SYSH_HIGH_PRIORITY
# define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX
#else
# define NVIC_SYSH_MAXNORMAL_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP)
# define NVIC_SYSH_HIGH_PRIORITY NVIC_SYSH_PRIORITY_MAX
# define NVIC_SYSH_DISABLE_PRIORITY NVIC_SYSH_MAXNORMAL_PRIORITY
# define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX
#endif
/************************************************************************************
* Public Types
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_LC823450_CHIP_H */
arch/arm/include/lc823450/clk.h
+94
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@@ -0,0 +1,94 @@
/****************************************************************************
* arch/arm/include/lc823450/clk.h
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_LC823450_CLK_H
#define __ARCH_ARM_INCLUDE_LC823450_CLK_H
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define LC823450_CLOCKS \
{ \
{0, "dmac", MCLKCNTBASIC, MCLKCNTBASIC_DMAC_CLKEN}, \
{0, "mtm0", MCLKCNTEXT1, MCLKCNTEXT1_MTM0_CLKEN}, \
{0, "mtm0c", MCLKCNTEXT1, MCLKCNTEXT1_MTM0C_CLKEN}, \
{0, "mtm1", MCLKCNTEXT1, MCLKCNTEXT1_MTM1_CLKEN}, \
{0, "mtm1c", MCLKCNTEXT1, MCLKCNTEXT1_MTM1C_CLKEN}, \
}
/************************************************************************************
* Public Types
************************************************************************************/
struct clk_st
{
int count;
char *name;
uint32_t regaddr;
uint32_t regmask;
};
enum clock_e
{
LC823450_CLOCK_DMA = 0,
LC823450_CLOCK_MTM0,
LC823450_CLOCK_MTM0C,
LC823450_CLOCK_MTM1,
LC823450_CLOCK_MTM1C,
LC823450_CLOCK_NUM,
};
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
void up_enable_clk(enum clock_e clk);
void up_disable_clk(enum clock_e clk);
#endif /* __ARCH_ARM_INCLUDE_LC823450_CLK_H */
arch/arm/include/lc823450/irq.h
+317
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@@ -0,0 +1,317 @@
/****************************************************************************
* arch/arm/include/lc823450/irq.h
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* This file should never be included directed but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_LC823450_IRQ_H
#define __ARCH_ARM_INCLUDE_LC823450_IRQ_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
/****************************************************************************
* Definitions
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to
* bits in the NVIC. This does, however, waste several words of memory in the IRQ
* to handle mapping tables.
*/
/* Processor Exceptions (vectors 0-15) */
#define LC823450_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define LC823450_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
#define LC823450_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
#define LC823450_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */
#define LC823450_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */
#define LC823450_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */
#define LC823450_IRQ_SVCALL (11) /* Vector 11: SVC call */
#define LC823450_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */
/* Vector 13: Reserved */
#define LC823450_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define LC823450_IRQ_SYSTICK (15) /* Vector 15: System tick */
/* External interrupts (vectors >= 16). These definitions are chip-specific */
#define LC823450_IRQ_INTERRUPTS (16) /* Vector number of the first external interrupt */
/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to
* bits in the NVIC. This does, however, waste several words of memory in the IRQ
* to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions can be found
* in nuttx/arch/arm/include/lc823450/irq.h
*
* External interrupts (vectors >= 16)
*/
#define LC823450_IRQ_CTXM3_00 (LC823450_IRQ_INTERRUPTS+0) /* 16: CortexM3_00 interrupt */
#define LC823450_IRQ_CTXM3_01 (LC823450_IRQ_INTERRUPTS+1) /* 17: CortexM3_01 interrupt */
#define LC823450_IRQ_CTXM3_02 (LC823450_IRQ_INTERRUPTS+2) /* 18: CortexM3_02 interrupt */
#define LC823450_IRQ_CTXM3_03 (LC823450_IRQ_INTERRUPTS+3) /* 19: CortexM3_03 interrupt */
#define LC823450_IRQ_CTXM3_10 (LC823450_IRQ_INTERRUPTS+4) /* 20: CortexM3_00 interrupt */
#define LC823450_IRQ_CTXM3_11 (LC823450_IRQ_INTERRUPTS+5) /* 21: CortexM3_01 interrupt */
#define LC823450_IRQ_CTXM3_12 (LC823450_IRQ_INTERRUPTS+6) /* 22: CortexM3_02 interrupt */
#define LC823450_IRQ_CTXM3_13 (LC823450_IRQ_INTERRUPTS+7) /* 23: CortexM3_03 interrupt */
#define LC823450_IRQ_LPDSP0 (LC823450_IRQ_INTERRUPTS+8) /* 24: LPDSP0 interrupt */
#define LC823450_IRQ_LPDSP1 (LC823450_IRQ_INTERRUPTS+9) /* 25: LPDSP1 interrupt */
#define LC823450_IRQ_LPDSP2 (LC823450_IRQ_INTERRUPTS+10) /* 26: LPDSP2 interrupt */
#define LC823450_IRQ_LPDSP3 (LC823450_IRQ_INTERRUPTS+11) /* 27: LPDSP3 interrupt */
#define LC823450_IRQ_WDT0 (LC823450_IRQ_INTERRUPTS+12) /* 28: WatchDogTimer0 interrupt */
#define LC823450_IRQ_WDT1 (LC823450_IRQ_INTERRUPTS+13) /* 29: WatchDogTimer1 interrupt */
#define LC823450_IRQ_WDT2 (LC823450_IRQ_INTERRUPTS+14) /* 30: WatchDogTimer2 interrupt */
#define LC823450_IRQ_BTIMER0 (LC823450_IRQ_INTERRUPTS+15) /* 31: BasicTimer0 interrupt */
#define LC823450_IRQ_BTIMER1 (LC823450_IRQ_INTERRUPTS+16) /* 32: BasicTimer0 interrupt */
#define LC823450_IRQ_BTIMER2 (LC823450_IRQ_INTERRUPTS+17) /* 33: BasicTimer0 interrupt */
#define LC823450_IRQ_MTIMER00 (LC823450_IRQ_INTERRUPTS+18) /* 34: MultipleTimer00 interrupt */
#define LC823450_IRQ_MTIMER01 (LC823450_IRQ_INTERRUPTS+19) /* 35: MultipleTimer01 interrupt */
#define LC823450_IRQ_MTIMER10 (LC823450_IRQ_INTERRUPTS+20) /* 36: MultipleTimer10 interrupt */
#define LC823450_IRQ_MTIMER11 (LC823450_IRQ_INTERRUPTS+21) /* 37: MultipleTimer11 interrupt */
#define LC823450_IRQ_MTIMER20 (LC823450_IRQ_INTERRUPTS+22) /* 38: MultipleTimer20 interrupt */
#define LC823450_IRQ_MTIMER21 (LC823450_IRQ_INTERRUPTS+23) /* 39: MultipleTimer21 interrupt */
#define LC823450_IRQ_MTIMER30 (LC823450_IRQ_INTERRUPTS+24) /* 40: MultipleTimer30 interrupt */
#define LC823450_IRQ_MTIMER31 (LC823450_IRQ_INTERRUPTS+25) /* 41: MultipleTimer31 interrupt */
#define LC823450_IRQ_EHCI (LC823450_IRQ_INTERRUPTS+26) /* 42: USB HOST EHCI interrupt */
#define LC823450_IRQ_OHCI (LC823450_IRQ_INTERRUPTS+27) /* 43: USB HOST OHCI interrupt */
#define LC823450_IRQ_SERFLASH (LC823450_IRQ_INTERRUPTS+28) /* 44: USB HOST OHCI interrupt */
#define LC823450_IRQ_DMAC (LC823450_IRQ_INTERRUPTS+29) /* 45: DMA Controller interrupt */
#define LC823450_IRQ_SDCSYNC0 (LC823450_IRQ_INTERRUPTS+30) /* 46: SDCardSync0 interrupt */
#define LC823450_IRQ_SDCSYNC1 (LC823450_IRQ_INTERRUPTS+31) /* 47: SDCardSync1 interrupt */
#define LC823450_IRQ_SDCSYNC2 (LC823450_IRQ_INTERRUPTS+32) /* 48: SDCardSync2 interrupt */
#define LC823450_IRQ_SDCASYNC0 (LC823450_IRQ_INTERRUPTS+33) /* 49: SDCardAsync0 interrupt */
#define LC823450_IRQ_SDCASYNC1 (LC823450_IRQ_INTERRUPTS+34) /* 50: SDCardAsync1 interrupt */
#define LC823450_IRQ_SDCASYNC2 (LC823450_IRQ_INTERRUPTS+35) /* 51: SDCardAsync2 interrupt */
#define LC823450_IRQ_MEMSTICK (LC823450_IRQ_INTERRUPTS+36) /* 52: MemoryStick interrupt */
#define LC823450_IRQ_MEMSTICKINS (LC823450_IRQ_INTERRUPTS+37) /* 53: MemoryStick ins interrupt */
#define LC823450_IRQ_DSPCMD (LC823450_IRQ_INTERRUPTS+38) /* 54: DSP cmd interface interrupt */
#define LC823450_IRQ_ADC (LC823450_IRQ_INTERRUPTS+39) /* 55: AD Converter interrupt */
#define LC823450_IRQ_SIO (LC823450_IRQ_INTERRUPTS+40) /* 56: SIO interrupt */
#define LC823450_IRQ_I2C0 (LC823450_IRQ_INTERRUPTS+41) /* 57: I2C0 interrupt */
#define LC823450_IRQ_I2C1 (LC823450_IRQ_INTERRUPTS+42) /* 58: I2C1 interrupt */
#define LC823450_IRQ_UART0 (LC823450_IRQ_INTERRUPTS+43) /* 59: UART0 interrupt */
#define LC823450_IRQ_UART1 (LC823450_IRQ_INTERRUPTS+44) /* 60: UART1 interrupt */
#define LC823450_IRQ_UART2 (LC823450_IRQ_INTERRUPTS+45) /* 61: UART2 interrupt */
#define LC823450_IRQ_RTC (LC823450_IRQ_INTERRUPTS+46) /* 62: RTC interrupt */
#define LC823450_IRQ_RTCKEY (LC823450_IRQ_INTERRUPTS+47) /* 63: RTCKEY interrupt */
#define LC823450_IRQ_AUDIOBUF0 (LC823450_IRQ_INTERRUPTS+48) /* 64: AudioBuffer0 interrupt */
#define LC823450_IRQ_AUDIOBUF1 (LC823450_IRQ_INTERRUPTS+49) /* 65: AudioBuffer1 interrupt */
#define LC823450_IRQ_AUDIOBUF2 (LC823450_IRQ_INTERRUPTS+50) /* 66: AudioBuffer2 interrupt */
#define LC823450_IRQ_AUDIOBUF3 (LC823450_IRQ_INTERRUPTS+51) /* 67: AudioBuffer3 interrupt */
#define LC823450_IRQ_AUDIOSTAT0 (LC823450_IRQ_INTERRUPTS+52) /* 68: AudioStatus0 interrupt */
#define LC823450_IRQ_AUDIOSTAT1 (LC823450_IRQ_INTERRUPTS+53) /* 69: AudioStatus1 interrupt */
#define LC823450_IRQ_AUDIOSTAT2 (LC823450_IRQ_INTERRUPTS+54) /* 70: AudioStatus2 interrupt */
#define LC823450_IRQ_AUDIOSTAT3 (LC823450_IRQ_INTERRUPTS+55) /* 71: AudioStatus3 interrupt */
#define LC823450_IRQ_AUDIOTM0 (LC823450_IRQ_INTERRUPTS+56) /* 72: AudioTimer0 interrupt */
#define LC823450_IRQ_AUDIOTM1 (LC823450_IRQ_INTERRUPTS+57) /* 73: AudioTimer1 interrupt */
#define LC823450_IRQ_USBDEV (LC823450_IRQ_INTERRUPTS+58) /* 74: USB Device interrupt */
#define LC823450_IRQ_EXTINT0 (LC823450_IRQ_INTERRUPTS+59) /* 75: ExternalINT0 interrupt */
#define LC823450_IRQ_EXTINT1 (LC823450_IRQ_INTERRUPTS+60) /* 76: ExternalINT1 interrupt */
#define LC823450_IRQ_EXTINT2 (LC823450_IRQ_INTERRUPTS+61) /* 77: ExternalINT2 interrupt */
#define LC823450_IRQ_EXTINT3 (LC823450_IRQ_INTERRUPTS+62) /* 78: ExternalINT3 interrupt */
#define LC823450_IRQ_EXTINT4 (LC823450_IRQ_INTERRUPTS+63) /* 79: ExternalINT4 interrupt */
#define LC823450_IRQ_EXTINT5 (LC823450_IRQ_INTERRUPTS+64) /* 80: ExternalINT5 interrupt */
#define LC823450_IRQ_NIRQS (LC823450_IRQ_EXTINT5 + 1)
#define LC823450_IRQ_GPIO00 (LC823450_IRQ_NIRQS + 0) /* 81: GPIO00 */
#define LC823450_IRQ_GPIO01 (LC823450_IRQ_NIRQS + 1) /* 82: GPIO01 */
#define LC823450_IRQ_GPIO02 (LC823450_IRQ_NIRQS + 2) /* 83: GPIO02 */
#define LC823450_IRQ_GPIO03 (LC823450_IRQ_NIRQS + 3) /* 84: GPIO03 */
#define LC823450_IRQ_GPIO04 (LC823450_IRQ_NIRQS + 4) /* 85: GPIO04 */
#define LC823450_IRQ_GPIO05 (LC823450_IRQ_NIRQS + 5) /* 86: GPIO05 */
#define LC823450_IRQ_GPIO06 (LC823450_IRQ_NIRQS + 6) /* 87: GPIO06 */
#define LC823450_IRQ_GPIO07 (LC823450_IRQ_NIRQS + 7) /* 88: GPIO07 */
#define LC823450_IRQ_GPIO08 (LC823450_IRQ_NIRQS + 8) /* 89: GPIO08 */
#define LC823450_IRQ_GPIO09 (LC823450_IRQ_NIRQS + 9) /* 90: GPIO09 */
#define LC823450_IRQ_GPIO0A (LC823450_IRQ_NIRQS + 10) /* 91: GPIO0A */
#define LC823450_IRQ_GPIO0B (LC823450_IRQ_NIRQS + 11) /* 92: GPIO0B */
#define LC823450_IRQ_GPIO0C (LC823450_IRQ_NIRQS + 12) /* 93: GPIO0C */
#define LC823450_IRQ_GPIO0D (LC823450_IRQ_NIRQS + 13) /* 94: GPIO0D */
#define LC823450_IRQ_GPIO0E (LC823450_IRQ_NIRQS + 14) /* 95: GPIO0E */
#define LC823450_IRQ_GPIO0F (LC823450_IRQ_NIRQS + 15) /* 96: GPIO0F */
#define LC823450_IRQ_GPIO10 (LC823450_IRQ_NIRQS + 16) /* 97: GPIO10 */
#define LC823450_IRQ_GPIO11 (LC823450_IRQ_NIRQS + 17) /* 98: GPIO11 */
#define LC823450_IRQ_GPIO12 (LC823450_IRQ_NIRQS + 18) /* 99: GPIO12 */
#define LC823450_IRQ_GPIO13 (LC823450_IRQ_NIRQS + 19) /* 100: GPIO13 */
#define LC823450_IRQ_GPIO14 (LC823450_IRQ_NIRQS + 20) /* 101: GPIO14 */
#define LC823450_IRQ_GPIO15 (LC823450_IRQ_NIRQS + 21) /* 102: GPIO15 */
#define LC823450_IRQ_GPIO16 (LC823450_IRQ_NIRQS + 22) /* 103: GPIO16 */
#define LC823450_IRQ_GPIO17 (LC823450_IRQ_NIRQS + 23) /* 104: GPIO17 */
#define LC823450_IRQ_GPIO18 (LC823450_IRQ_NIRQS + 24) /* 105: GPIO18 */
#define LC823450_IRQ_GPIO19 (LC823450_IRQ_NIRQS + 25) /* 106: GPIO19 */
#define LC823450_IRQ_GPIO1A (LC823450_IRQ_NIRQS + 26) /* 107: GPIO1A */
#define LC823450_IRQ_GPIO1B (LC823450_IRQ_NIRQS + 27) /* 108: GPIO1B */
#define LC823450_IRQ_GPIO1C (LC823450_IRQ_NIRQS + 28) /* 109: GPIO1C */
#define LC823450_IRQ_GPIO1D (LC823450_IRQ_NIRQS + 29) /* 110: GPIO1D */
#define LC823450_IRQ_GPIO1E (LC823450_IRQ_NIRQS + 30) /* 111: GPIO1E */
#define LC823450_IRQ_GPIO1F (LC823450_IRQ_NIRQS + 31) /* 112: GPIO1F */
#define LC823450_IRQ_GPIO20 (LC823450_IRQ_NIRQS + 32) /* 113: GPIO20 */
#define LC823450_IRQ_GPIO21 (LC823450_IRQ_NIRQS + 33) /* 114: GPIO21 */
#define LC823450_IRQ_GPIO22 (LC823450_IRQ_NIRQS + 34) /* 115: GPIO22 */
#define LC823450_IRQ_GPIO23 (LC823450_IRQ_NIRQS + 35) /* 116: GPIO23 */
#define LC823450_IRQ_GPIO24 (LC823450_IRQ_NIRQS + 36) /* 117: GPIO24 */
#define LC823450_IRQ_GPIO25 (LC823450_IRQ_NIRQS + 37) /* 118: GPIO25 */
#define LC823450_IRQ_GPIO26 (LC823450_IRQ_NIRQS + 38) /* 119: GPIO26 */
#define LC823450_IRQ_GPIO27 (LC823450_IRQ_NIRQS + 39) /* 120: GPIO27 */
#define LC823450_IRQ_GPIO28 (LC823450_IRQ_NIRQS + 40) /* 121: GPIO28 */
#define LC823450_IRQ_GPIO29 (LC823450_IRQ_NIRQS + 41) /* 122: GPIO29 */
#define LC823450_IRQ_GPIO2A (LC823450_IRQ_NIRQS + 42) /* 123: GPIO2A */
#define LC823450_IRQ_GPIO2B (LC823450_IRQ_NIRQS + 43) /* 124: GPIO2B */
#define LC823450_IRQ_GPIO2C (LC823450_IRQ_NIRQS + 44) /* 125: GPIO2C */
#define LC823450_IRQ_GPIO2D (LC823450_IRQ_NIRQS + 45) /* 126: GPIO2D */
#define LC823450_IRQ_GPIO2E (LC823450_IRQ_NIRQS + 46) /* 127: GPIO2E */
#define LC823450_IRQ_GPIO2F (LC823450_IRQ_NIRQS + 47) /* 128: GPIO2F */
#define LC823450_IRQ_GPIO30 (LC823450_IRQ_NIRQS + 48) /* 129: GPIO30 */
#define LC823450_IRQ_GPIO31 (LC823450_IRQ_NIRQS + 49) /* 130: GPIO31 */
#define LC823450_IRQ_GPIO32 (LC823450_IRQ_NIRQS + 50) /* 131: GPIO32 */
#define LC823450_IRQ_GPIO33 (LC823450_IRQ_NIRQS + 51) /* 132: GPIO33 */
#define LC823450_IRQ_GPIO34 (LC823450_IRQ_NIRQS + 52) /* 133: GPIO34 */
#define LC823450_IRQ_GPIO35 (LC823450_IRQ_NIRQS + 53) /* 134: GPIO35 */
#define LC823450_IRQ_GPIO36 (LC823450_IRQ_NIRQS + 54) /* 135: GPIO36 */
#define LC823450_IRQ_GPIO37 (LC823450_IRQ_NIRQS + 55) /* 136: GPIO37 */
#define LC823450_IRQ_GPIO38 (LC823450_IRQ_NIRQS + 56) /* 137: GPIO38 */
#define LC823450_IRQ_GPIO39 (LC823450_IRQ_NIRQS + 57) /* 138: GPIO39 */
#define LC823450_IRQ_GPIO3A (LC823450_IRQ_NIRQS + 58) /* 139: GPIO3A */
#define LC823450_IRQ_GPIO3B (LC823450_IRQ_NIRQS + 59) /* 140: GPIO3B */
#define LC823450_IRQ_GPIO3C (LC823450_IRQ_NIRQS + 60) /* 141: GPIO3C */
#define LC823450_IRQ_GPIO3D (LC823450_IRQ_NIRQS + 61) /* 142: GPIO3D */
#define LC823450_IRQ_GPIO3E (LC823450_IRQ_NIRQS + 62) /* 143: GPIO3E */
#define LC823450_IRQ_GPIO3F (LC823450_IRQ_NIRQS + 63) /* 144: GPIO3F */
#define LC823450_IRQ_GPIO40 (LC823450_IRQ_NIRQS + 64) /* 145: GPIO40 */
#define LC823450_IRQ_GPIO41 (LC823450_IRQ_NIRQS + 65) /* 146: GPIO41 */
#define LC823450_IRQ_GPIO42 (LC823450_IRQ_NIRQS + 66) /* 147: GPIO42 */
#define LC823450_IRQ_GPIO43 (LC823450_IRQ_NIRQS + 67) /* 148: GPIO43 */
#define LC823450_IRQ_GPIO44 (LC823450_IRQ_NIRQS + 68) /* 149: GPIO44 */
#define LC823450_IRQ_GPIO45 (LC823450_IRQ_NIRQS + 69) /* 150: GPIO45 */
#define LC823450_IRQ_GPIO46 (LC823450_IRQ_NIRQS + 70) /* 151: GPIO46 */
#define LC823450_IRQ_GPIO47 (LC823450_IRQ_NIRQS + 71) /* 152: GPIO47 */
#define LC823450_IRQ_GPIO48 (LC823450_IRQ_NIRQS + 72) /* 153: GPIO48 */
#define LC823450_IRQ_GPIO49 (LC823450_IRQ_NIRQS + 73) /* 154: GPIO49 */
#define LC823450_IRQ_GPIO4A (LC823450_IRQ_NIRQS + 74) /* 155: GPIO4A */
#define LC823450_IRQ_GPIO4B (LC823450_IRQ_NIRQS + 75) /* 156: GPIO4B */
#define LC823450_IRQ_GPIO4C (LC823450_IRQ_NIRQS + 76) /* 157: GPIO4C */
#define LC823450_IRQ_GPIO4D (LC823450_IRQ_NIRQS + 77) /* 158: GPIO4D */
#define LC823450_IRQ_GPIO4E (LC823450_IRQ_NIRQS + 78) /* 159: GPIO4E */
#define LC823450_IRQ_GPIO4F (LC823450_IRQ_NIRQS + 79) /* 160: GPIO4F */
#define LC823450_IRQ_GPIO50 (LC823450_IRQ_NIRQS + 80) /* 161: GPIO50 */
#define LC823450_IRQ_GPIO51 (LC823450_IRQ_NIRQS + 81) /* 162: GPIO51 */
#define LC823450_IRQ_GPIO52 (LC823450_IRQ_NIRQS + 82) /* 163: GPIO52 */
#define LC823450_IRQ_GPIO53 (LC823450_IRQ_NIRQS + 83) /* 164: GPIO53 */
#define LC823450_IRQ_GPIO54 (LC823450_IRQ_NIRQS + 84) /* 165: GPIO54 */
#define LC823450_IRQ_GPIO55 (LC823450_IRQ_NIRQS + 85) /* 166: GPIO55 */
#define LC823450_IRQ_GPIO56 (LC823450_IRQ_NIRQS + 86) /* 167: GPIO56 */
#define LC823450_IRQ_GPIO57 (LC823450_IRQ_NIRQS + 87) /* 168: GPIO57 */
#define LC823450_IRQ_GPIO58 (LC823450_IRQ_NIRQS + 88) /* 169: GPIO58 */
#define LC823450_IRQ_GPIO59 (LC823450_IRQ_NIRQS + 89) /* 170: GPIO59 */
#define LC823450_IRQ_NGPIOIRQS (90)
#ifdef CONFIG_LC823450_VIRQ
#define LC823450_IRQ_VIRTUAL (LC823450_IRQ_NIRQS + LC823450_IRQ_NGPIOIRQS)
#define LC823450_IRQ_V00 (LC823450_IRQ_VIRTUAL + 0) /* 171: V00 */
#define LC823450_IRQ_NVIRTUALIRQS (1)
#else /* CONFIG_LC823450_VIRQ */
#define LC823450_IRQ_NVIRTUALIRQS (0)
#endif /* CONFIG_LC823450_VIRQ */
#define NR_VECTORS (LC823450_IRQ_NIRQS)
#define NR_IRQS (LC823450_IRQ_NIRQS + LC823450_IRQ_NGPIOIRQS + LC823450_IRQ_NVIRTUALIRQS)
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
enum lc823450_srctype_e
{
SRCTYPE_FALLING = 0, /* Falling edge */
SRCTYPE_LOW, /* Low level */
SRCTYPE_RISING, /* Rigsing edge */
SRCTYPE_HIGH, /* High level */
SRCTYPE_MAX,
};
#ifdef CONFIG_LC823450_VIRQ
struct lc823450_irq_ops {
void (*enable)(int irq);
void (*disable)(int irq);
int (*srctype)(int irq, enum lc823450_srctype_e type);
};
#endif /* CONFIG_LC823450_VIRQ */
#endif
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
EXTERN int lc823450_irq_srctype(int irq, enum lc823450_srctype_e srctype);
#ifdef CONFIG_LC823450_VIRQ
EXTERN int lc823450_irq_register(int irq, struct lc823450_irq_ops *ops);
#endif /* CONFIG_LC823450_VIRQ */
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_LC823450_IRQ_H */
arch/arm/src/lc823450/Kconfig
+174
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#
# For a description of the syntax of this configuration file,
# see misc/tools/kconfig-language.txt.
#
comment "LC823450 Configuration Options"
menu "LC823450 Peripheral Support"
config SERIAL_TERMIOS
bool "Serial driver TERMIOS supported"
default n
---help---
Serial driver supports termios.h interfaces (tcsetattr, tcflush, etc.).
If this is not defined, then the terminal settings (baud, parity, etc).
are not configurable at runtime; serial streams cannot be flushed, etc..
config LC823450_UART0
bool "UART0"
select UART0_SERIALDRIVER
default n
config LC823450_UART1
bool "UART1"
select UART1_SERIALDRIVER
default n
config LC823450_UART2
bool "UART2"
select UART2_SERIALDRIVER
default n
config LC823450_WDT
bool "Watchdog"
default n
select WATCHDOG
config LC823450_SPIFI
bool "SPI Flash Interface (SPIFI)"
default n
depends on MTD
if LC823450_SPIFI
config LC823450_SPIFI_DEVNO
int "number in /dev/mtdblk?"
default 0
config LC823450_SPIFI_SIZE
int "SPI FLASH size (byte)"
default 4194304
config LC823450_SPIFI_QUADIO
bool "SPIFI 4bit access"
default n
config LC823450_SPIFI_RAMFAT
bool "SPIFI with SRAM FAT"
default n
config LC823450_SPIFI_RAMFAT_VOLUMELABEL
string "volume label for SRAM FAT"
depends on LC823450_SPIFI_RAMFAT
config LC823450_SPIFI_BACKUP
bool "power dwon tolerance I/O"
default n
config LC823450_SPIFI_BACKUP_HEAD_OFFSET
hex "backup header offset"
depends on LC823450_SPIFI_BACKUP
config LC823450_SPIFI_BACKUP_VAL_OFFSET
hex "backup area offset"
depends on LC823450_SPIFI_BACKUP
endif
config LC823450_SDIF
bool "SD/eMMC driver"
default y
if LC823450_SDIF
config LC823450_SDIF_SDC
bool "SD card support"
default n
config LC823450_SDC_DMA
bool "DMA support for eMMC/SD"
default y
select ARCH_DMA
endif
config LC823450_I2C_TIMEOSEC
int "I2C timeout (sec)"
default 1
range 0 2
depends on I2C
config LC823450_I2C_TIMEOMS
int "I2C timeout (msec)"
default 500
range 0 999
depends on I2C
config LC823450_I2C0
bool "I2C0"
default n
depends on I2C
config LC823450_I2C1
bool "I2C1"
default n
depends on I2C
config LC823450_SPI_DMA
bool "DMA for SPI"
default n
select ARCH_DMA
if PWM
config LC823450_PWM0_CH0
bool "MTM0-Ch0 PWM device"
default n
config LC823450_PWM0_CH1
bool "MTM0-Ch1 PWM device"
default n
config LC823450_PWM1_CH0
bool "MTM1-Ch0 PWM device"
default y
config LC823450_PWM1_CH1
bool "MTM1-Ch1 PWM device"
default n
endif
choice
prompt "HS driver current boost"
config LC823450_USBDEV_CUSTOM_HSDSEL_0
bool "normal"
config LC823450_USBDEV_CUSTOM_HSDSEL_5
bool "5% boost"
config LC823450_USBDEV_CUSTOM_HSDSEL_10
bool "10% boost"
endchoice
config LC823450_LSISTBY
bool "LIS Standby"
default n
config LC823450_MTM0_TICK
bool "use MTM0 for tick"
default n
config LC823450_SLEEP_MODE
bool "sleep mode"
default n
config HRT_TIMER
bool "High resolution timer"
default n
endmenu
arch/arm/src/lc823450/Make.defs
+179
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############################################################################
# arch/arm/src/lc823450/Make.defs
#
# Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
# Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
# Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
# Author: Yasuhiro Osaki <Yasuhiro.Osaki@jp.sony.com>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
HEAD_ASRC =
else
HEAD_ASRC = lc823450_vectors.S
endif
CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS += vfork.S
CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c
CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_systemreset.c
CMN_CSRCS += up_unblocktask.c up_usestack.c up_doirq.c up_hardfault.c
CMN_CSRCS += up_svcall.c up_vfork.c
CMN_CSRCS += up_allocateheap.c
# CMN_CSRCS += up_dwt.c
CMN_CSRCS += up_stackframe.c
ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
CMN_ASRCS += up_exception.S
CMN_CSRCS += up_vectors.c
endif
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
endif
ifeq ($(CONFIG_ARCH_MEMCPY),y)
CMN_ASRCS += memcpy-armv7m.S
endif
ifeq ($(CONFIG_ARCH_MEMMOVE),y)
CMN_CSRCS += up_memmove.c
endif
ifeq ($(CONFIG_DEBUG_STACK),y)
CMN_CSRCS += up_checkstack.c
endif
CHIP_ASRCS =
CHIP_CSRCS = lc823450_start.c lc823450_irq.c lc823450_idle.c
CHIP_CSRCS += lc823450_timerisr.c lc823450_lowputc.c
CHIP_CSRCS += lc823450_serial.c lc823450_clockconfig.c lc823450_syscontrol.c
CHIP_CSRCS += lc823450_gpio.c
ifeq ($(CONFIG_WATCHDOG),y)
CHIP_CSRCS += lc823450_wdt.c
endif
ifeq ($(CONFIG_LC823450_SPIFI), y)
CHIP_CSRCS += lc823450_spifi.c
endif
ifeq ($(CONFIG_LC823450_SDIF), y)
CHIP_CSRCS += lc823450_sdc.c
CHIP_CSRCS += lc823450_sddrv_dep.c
endif
ifeq ($(CONFIG_PWM), y)
CHIP_CSRCS += lc823450_pwm.c
endif
ifeq ($(CONFIG_I2C), y)
CHIP_CSRCS += lc823450_i2c.c
endif
ifeq ($(CONFIG_SPI), y)
CHIP_CSRCS += lc823450_spi.c
endif
ifeq ($(CONFIG_ARMV7M_MPU),y)
CMN_CSRCS += up_mpu.c lc823450_mpuinit.c
endif
ifeq ($(CONFIG_ARCH_DMA), y)
CMN_CSRCS += lc823450_dma.c
endif
ifeq ($(CONFIG_RTC),y)
CHIP_CSRCS += lc823450_rtc.c
endif
ifeq ($(CONFIG_FS_EVFAT),y)
CHIP_CSRCS += lc823450_evfat.c
endif
ifeq ($(CONFIG_USBDEV),y)
CHIP_CSRCS += lc823450_usbdev.c
endif
ifeq ($(CONFIG_ADC),y)
CHIP_CSRCS += lc823450_adc.c
endif
ifeq ($(CONFIG_IPL2),y)
ifeq ($(CONFIG_SPIFLASH_BOOT),y)
CHIP_CSRCS += lc823450_spif_ipl2.c
else
CHIP_CSRCS += lc823450_ipl2.c
endif
endif
ifeq ($(CONFIG_DVFS),y)
CHIP_CSRCS += lc823450_dvfs.c
endif
ifeq ($(CONFIG_PM),y)
CHIP_CSRCS += lc823450_pminitialize.c
CHIP_CSRCS += lc823450_sleep.c
endif
#CHIP_CSRCS += lc823450_allocateheap.c
ifeq ($(CONFIG_MM_MULTIHEAP), y)
CHIP_CSRCS += lc823450_mm.c
CHIP_CSRCS += lc823450_sram.c
endif
ifeq ($(CONFIG_LC823450_SPIFI_RAMFAT), y)
CHIP_CSRCS += lc823450_ramfat.c
endif
ifeq ($(CONFIG_SMP), y)
CHIP_CSRCS += lc823450_cpuidlestack.c
CHIP_CSRCS += lc823450_cpuindex.c
CHIP_CSRCS += lc823450_cpupause.c
CHIP_CSRCS += lc823450_cpustart.c
CHIP_CSRCS += lc823450_testset.c
endif
ifeq ($(CONFIG_LC823450_SDRAM), y)
CHIP_CSRCS += lc823450_sdram.c
endif
arch/arm/src/lc823450/chip.h
+86
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@@ -0,0 +1,86 @@
/****************************************************************************
* arch/arm/src/lc823450/chip.h
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef _ARCH_ARM_SRC_LC823450_CHIP_H
#define _ARCH_ARM_SRC_LC823450_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <sys/types.h>
#include <arch/lc823450/chip.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/****************************************************************************
* Inline Functions
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#if defined(__cplusplus)
}
#endif
#undef EXTERN
#endif /* __ASSEMBLY__ */
#endif /* _ARCH_ARM_SRC_LC823450_CHIP_H */
arch/arm/src/lc823450/lc823450_clockconfig.c
+238
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@@ -0,0 +1,238 @@
/****************************************************************************
* arch/arm/src/lc823450/lc823450_clockconfig.c
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* Author: Nobutaka Toyoshima <Nobutaka.Toyoshima@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "lc823450_clockconfig.h"
#include "lc823450_syscontrol.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_MAX_CPU_CLOCK_150
# define SYSCLK 150 /* MHz */
#else
# define SYSCLK 160 /* MHz */
#endif
#ifdef CONFIG_AHB_CLOCK_IS_CPU_CLOCK
# define HCLKDIV 0 /* AHB = system / (HCLKIDV + 1) */
#else
# define HCLKDIV 3 /* AHB = system / (HCLKIDV + 1) */
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
unsigned int XT1OSC_CLK;
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: lc823450_get_systemfreq
****************************************************************************/
uint32_t lc823450_get_systemfreq(void)
{
return SYSCLK * 1000000;
}
/****************************************************************************
* Name: lc823450_get_apb
****************************************************************************/
#ifndef CONFIG_DVFS
uint32_t lc823450_get_apb(void)
{
return SYSCLK * 1000000;
}
#endif
/****************************************************************************
* Name: lc823450_get_ahb
****************************************************************************/
uint32_t lc823450_get_ahb(void)
{
return (SYSCLK * 1000000) / (HCLKDIV + 1);
}
/****************************************************************************
* Name: lc823450_clockconfig
****************************************************************************/
void lc823450_clockconfig()
{
uint32_t val;
val = getreg32(BMODE_DT) & BMODE_DT_XTALINFO_MASK;
if (val == BMODE_DT_XTALINFO_20)
{
XT1OSC_CLK = (20 * 1000 * 1000);
}
else
{
XT1OSC_CLK = (24 * 1000 * 1000);
}
/* XT1 enable */
modifyreg32(OSCCNT, 0, OSCCNT_XT1EN);
/* Clear MAINDIV */
modifyreg32(OSCCNT, OSCCNT_MAINDIV_MASK, 0);
/* Select system clock source from MAIN(XT1) */
val = getreg32(OSCCNT);
val &= ~OSCCNT_SCKSEL_MASK;
val |= OSCCNT_SCKSEL_MAIN;
putreg32(val, OSCCNT);
#ifdef CONFIG_IPL2
/* set the common PLL values */
/* XTAL / XT1OSC_CLK = 1MHz */
putreg32((XT1OSC_CLK / 1000000) - 1, PLL1MDIV);
/* 1MHz * SYSCLK = system clock */
putreg32(SYSCLK * 2 - 1, PLL1NDIV);
#else
if (SYSCLK == 150 && XT1OSC_CLK == 24000000)
{
putreg32(0x01, PLL1MDIV);
putreg32(0x18, PLL1NDIV);
}
else if (SYSCLK == 160 && XT1OSC_CLK == 24000000)
{
putreg32(0x02, PLL1MDIV);
putreg32(0x27, PLL1NDIV);
}
else if (SYSCLK == 160 && XT1OSC_CLK == 20000000)
{
putreg32(0x00, PLL1MDIV);
putreg32(0x0f, PLL1NDIV);
}
else
{
ASSERT(false);
}
#endif
/* enable PLL */
val = getreg32(PLL1CNT);
val |= PLL1CNT_STYB;
val |= PLL1CNT_RSTB;
putreg32(val, PLL1CNT);
/* wait for lock */
up_udelay(10000);
#if 0
/* To check basic clock by PHI pin.
* Don't forget to change GPIO09 pinmux.
*/
val = getreg32(FCLKCNT);
val |= (1 << 26);
putreg32(val, FCLKCNT);
#endif
/* S-Flash fclock = sysclk / 4 */
val = getreg32(FCLKCNT);
val |= FCLKCNT_SFDIV4;
putreg32(val, FCLKCNT);
/* set AHB with HCLKDIV */
modifyreg32(PERICLKDIV,
PERICLKDIV_HCLKDIV_MASK,
HCLKDIV);
/* EXT4 = sysclk / 3 (53.3MHz=18.8n) */
val = getreg32(PERICLKDIV);
val |= (3 - 1) << 16;
putreg32(val, PERICLKDIV);
/* MAIN clock source = PLL */
val = getreg32(OSCCNT);
val |= OSCCNT_MCSEL;
putreg32(val, OSCCNT);
/* Set ROM wait cycle (DSP=1wait, CPU=1wait) */
modifyreg32(MEMEN4, 0, MEMEN4_DWAIT | MEMEN4_HWAIT);
/* Select system clock source from MAIN(PLL) */
val = getreg32(OSCCNT);
val &= ~OSCCNT_SCKSEL_MASK;
val |= OSCCNT_SCKSEL_MAIN;
putreg32(val, OSCCNT);
}
arch/arm/src/lc823450/lc823450_clockconfig.h
+124
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@@ -0,0 +1,124 @@
/****************************************************************************
* arch/arm/src/lc823450/lc823450_clockconfig.h
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* Author: Nobutaka Toyoshima <Nobutaka.Toyoshima@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_LC823450_LC823450_CLOCKCONFIG_H
#define __ARCH_ARM_SRC_LC823450_LC823450_CLOCKCONFIG_H
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define LC823450_OSCSYS_REGBASE 0x40040000
#define OSCCNT (LC823450_OSCSYS_REGBASE + 0x00)
#define OSCCNT_SCKSEL_MASK (3 << 0)
#define OSCCNT_SCKSEL_RC (0 << 0)
#define OSCCNT_SCKSEL_MAIN (1 << 0)
#define OSCCNT_SCKSEL_RTC (2 << 0)
#define OSCCNT_MCSEL (1 << 2)
#define OSCCNT_XT1EN (1 << 7)
#define OSCCNT_MAINDIV_MASK (7 << 8)
#define OSCCNT_MAINDIV_1 (0 << 8)
#define OSCCNT_MAINDIV_2 (1 << 8)
#define OSCCNT_MAINDIV_4 (2 << 8)
#define OSCCNT_MAINDIV_8 (3 << 8)
#define OSCCNT_MAINDIV_16 (4 << 8)
#define PLLREFCNT (LC823450_OSCSYS_REGBASE + 0x04)
#define PERICLKDIV (LC823450_OSCSYS_REGBASE + 0x08)
#define PERICLKDIV_HCLKDIV_MASK (0x3f << 0)
#define FCLKCNT (LC823450_OSCSYS_REGBASE + 0x0c)
#define FCLKCNT_SFDIV1 (0 << 24)
#define FCLKCNT_SFDIV2 (1 << 24)
#define FCLKCNT_SFDIV4 (2 << 24)
#define FCLKCNT_SFDIV8 (3 << 24)
#define AUDCLKCNT (LC823450_OSCSYS_REGBASE + 0x14)
#define IMCNT (LC823450_OSCSYS_REGBASE + 0x20)
#define CORESTS (LC823450_OSCSYS_REGBASE + 0x40)
#define LC823450_SYSTEMPLL_BASE 0x40041000
#define PLL1CNT (LC823450_SYSTEMPLL_BASE + 0x00)
#define PLL1CNT_STYB (1 << 1)
#define PLL1CNT_RSTB (1 << 0)
#define PLL1MDIV (LC823450_SYSTEMPLL_BASE + 0x04)
#define PLL1NDIV (LC823450_SYSTEMPLL_BASE + 0x08)
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
EXTERN uint32_t lc823450_get_systemfreq(void);
#ifndef CONFIG_DVFS
EXTERN uint32_t lc823450_get_apb(void);
#endif
EXTERN uint32_t lc823450_get_ahb(void);
EXTERN void lc823450_clockconfig(void);
#if defined(__cplusplus)
}
#endif
#undef EXTERN
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_LC823450_LC823450_CLOCKCONFIG_H */
arch/arm/src/lc823450/lc823450_cpuidlestack.c
+118
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@@ -0,0 +1,118 @@
/****************************************************************************
* arch/arm/src/lc823450/lc823450_cpuidlestack.c
*
* Copyright (C) 2016-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/sched.h>
#include "up_arch.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_cpu_idlestack
*
* Description:
* Allocate a stack for the CPU[n] IDLE task (n > 0) if appropriate and
* setup up stack-related information in the IDLE task's TCB. This
* function is always called before up_cpu_start(). This function is
* only called for the CPU's initial IDLE task; up_create_task is used for
* all normal tasks, pthreads, and kernel threads for all CPUs.
*
* The initial IDLE task is a special case because the CPUs can be started
* in different wans in different environments:
*
* 1. The CPU may already have been started and waiting in a low power
* state for up_cpu_start(). In this case, the IDLE thread's stack
* has already been allocated and is already in use. Here
* up_cpu_idlestack() only has to provide information about the
* already allocated stack.
*
* 2. The CPU may be disabled but started when up_cpu_start() is called.
* In this case, a new stack will need to be created for the IDLE
* thread and this function is then equivalent to:
*
* return up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
*
* The following TCB fields must be initialized by this function:
*
* - adj_stack_size: Stack size after adjustment for hardware, processor,
* etc. This value is retained only for debug purposes.
* - stack_alloc_ptr: Pointer to allocated stack
* - adj_stack_ptr: Adjusted stack_alloc_ptr for HW. The initial value of
* the stack pointer.
*
* Inputs:
* - cpu: CPU index that indicates which CPU the IDLE task is
* being created for.
* - tcb: The TCB of new CPU IDLE task
* - stack_size: The requested stack size for the IDLE task. At least
* this much must be allocated. This should be
* CONFIG_SMP_STACK_SIZE.
*
****************************************************************************/
int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size)
{
#if CONFIG_SMP_NCPUS > 1
(void)up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
#endif
return OK;
}
arch/arm/src/lc823450/lc823450_cpuindex.c
+90
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@@ -0,0 +1,90 @@
/****************************************************************************
* arch/arm/src/lc823450/lc823450_cpuindex.c
*
* Copyright (C) 2016-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <nuttx/arch.h>
#include "up_arch.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define LC823450_CORE_BASE 0xe00fe000
#define CORE_COREID (LC823450_CORE_BASE + 0x0)
#define CORE_COREID_ID (0x1 << 0)
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_cpu_index
*
* Description:
* Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
* corresponds to the currently executing CPU.
*
* Input Parameters:
* None
*
* Returned Value:
* An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
* corresponds to the currently executing CPU.
*
****************************************************************************/
int up_cpu_index(void)
{
return getreg32(CORE_COREID) & CORE_COREID_ID;
}
arch/arm/src/lc823450/lc823450_cpupause.c
+364
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@@ -0,0 +1,364 @@
/****************************************************************************
* arch/arm/src/lc823450/lc823450_cpupause.c
*
* Copyright (C) 2016-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <assert.h>
#include <debug.h>
#include <string.h>
#include <stdio.h>
#include <nuttx/arch.h>
#include <nuttx/spinlock.h>
#include <nuttx/sched_note.h>
#include "up_arch.h"
#include "sched/sched.h"
#include "up_internal.h"
#include "lc823450_intc.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if 0
#define DPRINTF(fmt, args...) llinfo(fmt, ##args)
#else
#define DPRINTF(fmt, args...) do {} while (0)
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/* These spinlocks are used in the SMP configuration in order to implement
* up_cpu_pause(). The protocol for CPUn to pause CPUm is as follows
*
* 1. The up_cpu_pause() implementation on CPUn locks both g_cpu_wait[m]
* and g_cpu_paused[m]. CPUn then waits spinning on g_cpu_paused[m].
* 2. CPUm receives the interrupt it (1) unlocks g_cpu_paused[m] and
* (2) locks g_cpu_wait[m]. The first unblocks CPUn and the second
* blocks CPUm in the interrupt handler.
*
* When CPUm resumes, CPUn unlocks g_cpu_wait[m] and the interrupt handler
* on CPUm continues. CPUm must, of course, also then unlock g_cpu_wait[m]
* so that it will be ready for the next pause operation.
*/
volatile spinlock_t g_cpu_wait[CONFIG_SMP_NCPUS];
volatile spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS];
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_cpu_pausereq
*
* Description:
* Return true if a pause request is pending for this CPU.
*
* Input Parameters:
* cpu - The index of the CPU to be queried
*
* Returned Value:
* true = a pause request is pending.
* false = no pasue request is pending.
*
****************************************************************************/
bool up_cpu_pausereq(int cpu)
{
return spin_islocked(&g_cpu_paused[cpu]);
}
/****************************************************************************
* Name: up_cpu_paused
*
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
* However, it is sometimes necessary necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
* This function performs the following operations:
*
* 1. It saves the current task state at the head of the current assigned
* task list.
* 2. It waits on a spinlock, then
* 3. Returns from interrupt, restoring the state of the new task at the
* head of the ready to run list.
*
* Input Parameters:
* cpu - The index of the CPU to be paused
*
* Returned Value:
* On success, OK is returned. Otherwise, a negated errno value indicating
* the nature of the failure is returned.
*
****************************************************************************/
int up_cpu_paused(int cpu)
{
FAR struct tcb_s *tcb = this_task();
/* Update scheduler parameters */
sched_suspend_scheduler(tcb);
#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify that we are paused */
sched_note_cpu_paused(tcb);
#endif
/* Save the current context at CURRENT_REGS into the TCB at the head
* of the assigned task list for this CPU.
*/
up_savestate(tcb->xcp.regs);
/* Wait for the spinlock to be released */
spin_unlock(&g_cpu_paused[cpu]);
spin_lock(&g_cpu_wait[cpu]);
/* Restore the exception context of the tcb at the (new) head of the
* assigned task list.
*/
tcb = this_task();
#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify that we have resumed */
sched_note_cpu_resumed(tcb);
#endif
/* Reset scheduler parameters */
sched_resume_scheduler(tcb);
/* Then switch contexts. Any necessary address environment changes
* will be made when the interrupt returns.
*/
up_restorestate(tcb->xcp.regs);
/* FIXME */
up_udelay(500);
spin_unlock(&g_cpu_wait[cpu]);
return OK;
}
/****************************************************************************
* Name: lc823450_pause_handler
*
* Description:
* Inter-CPU interrupt handler
*
* Input Parameters:
* Standard interrupt handler inputs
*
* Returned Value:
* Should always return OK
*
****************************************************************************/
int lc823450_pause_handler(int irq, void *c, FAR void *arg)
{
int cpu = up_cpu_index();
/* Clear : Pause IRQ */
if (irq == LC823450_IRQ_CTXM3_01)
{
DPRINTF("CPU0 -> CPU1\n");
putreg32(IPICLR_INTISR0_CLR_1, IPICLR);
}
else
{
DPRINTF("CPU1 -> CPU0\n");
putreg32(IPICLR_INTISR1_CLR_1, IPICLR);
}
/* Check for false alarms. Such false could occur as a consequence of
* some deadlock breaking logic that might have already serviced the SG2
* interrupt by calling up_cpu_paused.
*/
if (spin_islocked(&g_cpu_paused[cpu]))
{
return up_cpu_paused(cpu);
}
return OK;
}
/****************************************************************************
* Name: up_cpu_pause
*
* Description:
* Save the state of the current task at the head of the
* g_assignedtasks[cpu] task list and then pause task execution on the
* CPU.
*
* This function is called by the OS when the logic executing on one CPU
* needs to modify the state of the g_assignedtasks[cpu] list for another
* CPU.
*
* Input Parameters:
* cpu - The index of the CPU to be stopped/
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
int up_cpu_pause(int cpu)
{
DPRINTF("cpu=%d\n", cpu);
#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify of the pause event */
sched_note_cpu_pause(this_task(), cpu);
#endif
DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
/* Take the both spinlocks. The g_cpu_wait spinlock will prevent the SGI2
* handler from returning until up_cpu_resume() is called; g_cpu_paused
* is a handshake that will prefent this function from returning until
* the CPU is actually paused.
*/
DEBUGASSERT(!spin_islocked(&g_cpu_wait[cpu]) &&
!spin_islocked(&g_cpu_paused[cpu]));
spin_lock(&g_cpu_wait[cpu]);
spin_lock(&g_cpu_paused[cpu]);
/* Execute Pause IRQ to CPU(cpu) */
if (cpu == 1)
{
putreg32(IPIREG_INTISR0_1, IPIREG);
}
else
{
putreg32(IPIREG_INTISR1_1, IPIREG);
}
/* Wait for the other CPU to unlock g_cpu_paused meaning that
* it is fully paused and ready for up_cpu_resume();
*/
spin_lock(&g_cpu_paused[cpu]);
spin_unlock(&g_cpu_paused[cpu]);
/* On successful return g_cpu_wait will be locked, the other CPU will be
* spinninf on g_cpu_wait and will not continue until g_cpu_resume() is
* called. g_cpu_paused will be unlocked in any case.
*/
return 0;
}
/****************************************************************************
* Name: up_cpu_resume
*
* Description:
* Restart the cpu after it was paused via up_cpu_pause(), restoring the
* state of the task at the head of the g_assignedtasks[cpu] list, and
* resume normal tasking.
*
* This function is called after up_cpu_pause in order resume operation of
* the CPU after modifying its g_assignedtasks[cpu] list.
*
* Input Parameters:
* cpu - The index of the CPU being re-started.
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
int up_cpu_resume(int cpu)
{
DPRINTF("cpu=%d\n", cpu);
#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify of the resume event */
sched_note_cpu_resume(this_task(), cpu);
#endif
DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
/* Release the spinlock. Releasing the spinlock will cause the SGI2
* handler on 'cpu' to continue and return from interrupt to the newly
* established thread.
*/
DEBUGASSERT(spin_islocked(&g_cpu_wait[cpu]) &&
!spin_islocked(&g_cpu_paused[cpu]));
spin_unlock(&g_cpu_wait[cpu]);
return 0;
}
arch/arm/src/lc823450/lc823450_cpustart.c
+229
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@@ -0,0 +1,229 @@
/****************************************************************************
* arch/arm/src/lc823450/lc823450_cpustart.c
*
* Copyright (C) 2016-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#pragma GCC optimize ("O0")
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <assert.h>
#include <debug.h>
#include <string.h>
#include <stdio.h>
#include <nuttx/arch.h>
#include <nuttx/spinlock.h>
#include <nuttx/sched_note.h>
#include "up_arch.h"
#include "nvic.h"
#include "sched/sched.h"
#include "init/init.h"
#include "up_internal.h"
#include "lc823450_syscontrol.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if 0
#define DPRINTF(fmt, args...) llinfo(fmt, ##args)
#else
#define DPRINTF(fmt, args...) do {} while (0)
#endif
#define CPU1_VECTOR_RESETV 0x00000000
#define CPU1_VECTOR_ISTACK 0x00000004
/****************************************************************************
* Private Data
****************************************************************************/
static uint32_t cpu1_vector_table[];
/****************************************************************************
* Public Data
****************************************************************************/
extern volatile spinlock_t g_cpu_wait[CONFIG_SMP_NCPUS];
/****************************************************************************
* Private Functions
****************************************************************************/
extern int lc823450_pause_handler(int irq, void *c, FAR void *arg);
/****************************************************************************
* Name: cpu1_boot
*
* Description:
* This is the boot vector for Cortex-M3 #1
*
* Input Parameters:
*
* Returned Value:
*
****************************************************************************/
static void cpu1_boot(void)
{
int cpu = up_cpu_index();
DPRINTF("cpu = %d\n", cpu);
if (cpu == 1)
{
putreg32((uint32_t)&_stext, NVIC_VECTAB); /* use CPU0 vectors */
irq_attach(LC823450_IRQ_CTXM3_01, lc823450_pause_handler, NULL);
up_enable_irq(LC823450_IRQ_CTXM3_01);
}
spin_unlock(&g_cpu_wait[0]);
#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify that this CPU has started */
sched_note_cpu_started(this_task());
#endif
/* Then transfer control to the IDLE task */
(void)os_idle_task(0, NULL);
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_cpu_start
*
* Description:
* In an SMP configution, only one CPU is initially active (CPU 0). System
* initialization occurs on that single thread. At the completion of the
* initialization of the OS, just before beginning normal multitasking,
* the additional CPUs would be started by calling this function.
*
* Each CPU is provided the entry point to is IDLE task when started. A
* TCB for each CPU's IDLE task has been initialized and placed in the
* CPU's g_assignedtasks[cpu] list. Not stack has been alloced or
* initialized.
*
* The OS initialization logic calls this function repeatedly until each
* CPU has been started, 1 through (CONFIG_SMP_NCPUS-1).
*
* Input Parameters:
* cpu - The index of the CPU being started. This will be a numeric
* value in the range of from one to (CONFIG_SMP_NCPUS-1). (CPU
* 0 is already active)
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
int up_cpu_start(int cpu)
{
struct tcb_s *tcb = current_task(cpu);
uint32_t backup[2];
DPRINTF("cpu=%d\n", cpu);
if (cpu != 1)
{
return -1;
}
/* create initial vectors for CPU1 */
putreg32(0x1, REMAP); /* remap enable */
backup[0] = getreg32(CPU1_VECTOR_RESETV);
backup[1] = getreg32(CPU1_VECTOR_ISTACK);
putreg32((uint32_t)tcb->adj_stack_ptr, CPU1_VECTOR_RESETV);
putreg32((uint32_t)cpu1_boot, CPU1_VECTOR_ISTACK);
spin_lock(&g_cpu_wait[0]);
#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify of the start event */
sched_note_cpu_start(this_task(), cpu);
#endif
/* enable clock core #1 */
modifyreg32(CORECNT, 0, CORECNT_C1CLKEN);
/* unreset core #1 */
modifyreg32(CORECNT, 0, CORECNT_C1RSTN);
/* IRQ setup CPU1->CPU0 */
irq_attach(LC823450_IRQ_CTXM3_11, lc823450_pause_handler, NULL);
up_enable_irq(LC823450_IRQ_CTXM3_11);
spin_lock(&g_cpu_wait[0]);
/* CPU1 boot done */
/* restore : after CPU1 boot, CPU1 use normal vectors table. */
putreg32(backup[0], CPU1_VECTOR_RESETV);
putreg32(backup[1], CPU1_VECTOR_ISTACK);
putreg32(0x0, REMAP); /* remap disable */
spin_unlock(&g_cpu_wait[0]);
return 0;
}
arch/arm/src/lc823450/lc823450_dma.c
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arch/arm/src/lc823450/lc823450_dma.h
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/****************************************************************************
* arch/arm/src/lc823450/lc823450_dma.h
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_LC823450_LC823450_DMA_H
#define __ARCH_ARM_SRC_LC823450_LC823450_DMA_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <arch/irq.h>
#include "chip.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define LC823450_DMA_ITC (1 << 31)
#define LC823450_DMA_SRCWIDTH_BYTE (0 << 18)
#define LC823450_DMA_SRCWIDTH_HWORD (1 << 18)
#define LC823450_DMA_SRCWIDTH_WORD (2 << 18)
#define LC823450_DMA_DSTWIDTH_BYTE (0 << 21)
#define LC823450_DMA_DSTWIDTH_HWORD (1 << 21)
#define LC823450_DMA_DSTWIDTH_WORD (2 << 21)
#define LC823450_DMA_SRCINC (1 << 26)
#define LC823450_DMA_DSTINC (1 << 27)
#define LC823450_DMA_SBS_SHIFT 12
#define LC823450_DMA_DBS_SHIFT 15
#define LC823450_DMA_BS_1 0
#define LC823450_DMA_BS_4 1
#define LC823450_DMA_BS_8 2
#define LC823450_DMA_BS_16 3
#define LC823450_DMA_BS_32 4
#define LC823450_DMA_BS_64 5
#define LC823450_DMA_BS_128 6
#define LC823450_DMA_BS_256 7
#define LC823450_DMA_TRANSSIZE_MASK (0xfff << 0)
#define LC823450_DMA_MAX_TRANSSIZE 0xff0
/* HighPriority */
#define DMA_CHANNEL_SIOTX 0
#define DMA_CHANNEL_UART1RX 1
#define DMA_CHANNEL_UART1TX 2
#define DMA_CHANNEL_USBDEV 3
#define DMA_CHANNEL_AUDIOWR 4
#define DMA_CHANNEL_AUDIORD 5
#if 0
#define DMA_CHANNEL_??? 6
#endif
#define DMA_CHANNEL_VIRTUAL 7
#define DMA_CHANNEL_NUM 8
#define DMA_REQUEST_UART0RX 0
#define DMA_REQUEST_UART0TX 1
#define DMA_REQUEST_UART1RX 2
#define DMA_REQUEST_UART1TX 3
#define DMA_REQUEST_UART2RX 4
#define DMA_REQUEST_UART2TX 5
#define DMA_REQUEST_SIORX 6
#define DMA_REQUEST_SIOTX 7
#define DMA_REQUEST_AUDIOBUF0 8
#define DMA_REQUEST_AUDIOBUF1 9
#define DMA_REQUEST_AUDIOBUF2 10
#define DMA_REQUEST_AUDIOBUF3 11
#define DMA_REQUEST_AUDIOBUF4 12
#define DMA_REQUEST_AUDIOBUF5 13
#define DMA_REQUEST_AUDIOBUF6 14
#define DMA_REQUEST_AUDIOBUF7 15
#define DMA_REQUEST_USBDEV 22
/****************************************************************************
* Public Types
****************************************************************************/
struct lc823450_dma_llist
{
uint32_t srcaddr;
uint32_t dstaddr;
uint32_t nextlli;
uint32_t ctrl;
};
typedef void *DMA_HANDLE;
typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
EXTERN void lc823450_dmaconfigure(uint8_t dmarequest, bool alternate);
EXTERN DMA_HANDLE lc823450_dmachannel(int ch);
EXTERN void lc823450_dmafree(DMA_HANDLE handle);
EXTERN void lc823450_dmarequest(DMA_HANDLE handle, uint8_t dmarequest);
EXTERN int lc823450_dmasetup(DMA_HANDLE handle, uint32_t control,
uint32_t srcaddr, uint32_t destaddr, size_t nxfrs);
EXTERN int lc823450_dmallsetup(DMA_HANDLE handle, uint32_t control,
uint32_t srcaddr, uint32_t destaddr,
size_t nxfrs, uint32_t llist);
EXTERN void lc823450_dmareauest_dir(DMA_HANDLE handle, uint8_t dmarequest,
int m2p);
EXTERN int lc823450_dmastart(DMA_HANDLE handle, dma_callback_t callback,
void *arg);
EXTERN void lc823450_dmastop(DMA_HANDLE handle);
EXTERN int lc823450_dmaremain(DMA_HANDLE handle);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ARCH_ARM_SRC_LC823450_LC823450_DMA_H */
arch/arm/src/lc823450/lc823450_gpio.c
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arch/arm/src/lc823450/lc823450_gpio.h
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/****************************************************************************
* arch/arm/src/lc823450/lc823450_gpio.h
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* Author: Nobutaka Toyoshima <Nobutaka.Toyoshima@jp.sony.com>
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_LC823450_LC823450_GPIO_H
#define __ARCH_ARM_SRC_LC823450_LC823450_GPIO_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Max number of GPIO ports and the maximum number of pins per port */
#ifdef CONFIG_IOEX
# define NUM_GPIO_PORTS 7
# define NUM_GPIOEX_PINS CONFIG_IOEX_NPINS
#else
# define NUM_GPIO_PORTS 6
#endif
#define NUM_GPIO_PINS 16
/* Input/Output mode
*
* 1111 1100 0000 0000
* 5432 1098 7654 3210
* ---- ---- ---- ----
* MM.. .... .... ....
*/
#define GPIO_MODE_SHIFT (14) /* Bits 14-15: Mode of the GPIO pin */
#define GPIO_MODE_MASK (3 << GPIO_MODE_SHIFT)
# define GPIO_MODE_INPUT (0 << GPIO_MODE_SHIFT) /* GPIO input */
# define GPIO_MODE_OUTPUT (1 << GPIO_MODE_SHIFT) /* GPIO output */
# define GPIO_MODE_PININTR (2 << GPIO_MODE_SHIFT) /* GPIO pin interrupt */
#define GPIO_IS_OUTPUT(p) (((p) & GPIO_MODE_MASK) == GPIO_MODE_OUTPUT)
#define GPIO_IS_INPUT(p) (((p) & GPIO_MODE_MASK) == GPIO_MODE_INPUT)
#define GPIO_IS_PININT(p) (((p) & GPIO_MODE_MASK) == GPIO_MODE_PININTR)
/* Initial value (for GPIO outputs only)
*
* 1111 1100 0000 0000
* 5432 1098 7654 3210
* ---- ---- ---- ----
* ..V. .... .... ....
*/
#define GPIO_VALUE_ONE (1 << 13) /* Bit 13: 1=High */
#define GPIO_VALUE_ZERO (0) /* Bit 13: 0=Low */
#define GPIO_IS_ONE(p) (((p) & GPIO_VALUE_ONE) != 0)
#define GPIO_IS_ZERO(p) (((p) & GPIO_VALUE_ONE) == 0)
/* GPIO pinmux
*
* 1111 1100 0000 0000
* 5432 1098 7654 3210
* ---- ---- ---- ----
* .... XX.. .... ....
*/
#define GPIO_MUX_SHIFT (10) /* Bits 10-11: pinmux */
#define GPIO_MUX_MASK (3 << GPIO_MUX_SHIFT)
# define GPIO_MUX0 (0 << GPIO_MUX_SHIFT) /* mux mode 0 */
# define GPIO_MUX1 (1 << GPIO_MUX_SHIFT) /* mux mode 1 */
# define GPIO_MUX2 (2 << GPIO_MUX_SHIFT) /* mux mode 2 */
# define GPIO_MUX3 (3 << GPIO_MUX_SHIFT) /* mux mode 3 */
/* GPIO pull-ups/downs
*
* 1111 1100 0000 0000
* 5432 1098 7654 3210
* ---- ---- ---- ----
* .... ..UU .... ....
*/
#define GPIO_PUPD_SHIFT (8) /* Bits 8-9: Pull-up/pull down */
#define GPIO_PUPD_MASK (3 << GPIO_PUPD_SHIFT)
# define GPIO_DEFAULT (0 << GPIO_PUPD_SHIFT) /* H/W default */
# define GPIO_PULLUP (1 << GPIO_PUPD_SHIFT) /* Pull-up */
# define GPIO_PULLDOWN (2 << GPIO_PUPD_SHIFT) /* Pull-down */
# define GPIO_FLOAT (3 << GPIO_PUPD_SHIFT) /* No pull-up, pull-down */
/* GPIO Port Number:
*
* 1111 1100 0000 0000
* 5432 1098 7654 3210
* ---- ---- ---- ----
* .... .... PPP. ....
*/
#define GPIO_PORT_SHIFT (5) /* Bits 5-7: Port number */
#define GPIO_PORT_MASK (7 << GPIO_PORT_SHIFT)
# define GPIO_PORT0 (0 << GPIO_PORT_SHIFT)
# define GPIO_PORT1 (1 << GPIO_PORT_SHIFT)
# define GPIO_PORT2 (2 << GPIO_PORT_SHIFT)
# define GPIO_PORT3 (3 << GPIO_PORT_SHIFT)
# define GPIO_PORT4 (4 << GPIO_PORT_SHIFT)
# define GPIO_PORT5 (5 << GPIO_PORT_SHIFT)
#ifdef CONFIG_IOEX
# define GPIO_PORTEX (6 << GPIO_PORT_SHIFT)
#endif
#ifdef CONFIG_LC823450_VGPIO
# define GPIO_PORTV (7 << GPIO_PORT_SHIFT)
#endif /* CONFIG_LC823450_VGPIO */
/* GPIO Pin Number:
*
* 1111 1100 0000 0000
* 5432 1098 7654 3210
* ---- ---- ---- ----
* .... .... ...B BBBB
*/
#define GPIO_PIN_SHIFT (0) /* Bits 0-4: Pin number */
#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT)
# define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
# define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
# define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
# define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
# define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
# define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
# define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
# define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
# define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
# define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
# define GPIO_PINA (10 << GPIO_PIN_SHIFT)
# define GPIO_PINB (11 << GPIO_PIN_SHIFT)
# define GPIO_PINC (12 << GPIO_PIN_SHIFT)
# define GPIO_PIND (13 << GPIO_PIN_SHIFT)
# define GPIO_PINE (14 << GPIO_PIN_SHIFT)
# define GPIO_PINF (15 << GPIO_PIN_SHIFT)
#ifdef CONFIG_IOEX
# define GPIO_PIN10 (16 << GPIO_PIN_SHIFT)
# define GPIO_PIN11 (17 << GPIO_PIN_SHIFT)
# define GPIO_PIN12 (18 << GPIO_PIN_SHIFT)
# define GPIO_PIN13 (19 << GPIO_PIN_SHIFT)
#endif
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef CONFIG_LC823450_VGPIO
struct vgpio_ops_s
{
void (*write)(uint32_t pin, bool value);
bool (*read)(uint32_t pin);
};
#endif
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: lc823450_gpio_mux
*
* Description:
* Configure pin mux for a GPIO
*
****************************************************************************/
int lc823450_gpio_mux(uint16_t gpiocfg);
/****************************************************************************
* Name: lc823450_gpio_config
*
* Description:
* Configure a GPIO pin based on encoded pin attributes.
*
****************************************************************************/
int lc823450_gpio_config(uint16_t gpiocfg);
/****************************************************************************
* Name: lc823450_gpio_write
*
* Description:
* Write one or zero to the selected GPIO pin
*
****************************************************************************/
void lc823450_gpio_write(uint16_t gpiocfg, bool value);
/****************************************************************************
* Name: lc823450_gpio_read
*
* Description:
* Read one or zero from the selected GPIO pin
*
****************************************************************************/
bool lc823450_gpio_read(uint16_t gpiocfg);
/****************************************************************************
* Function: lc823450_gpio_dump
*
* Description:
* Dump all pin configuration registers
*
****************************************************************************/
#ifdef CONFIG_DEBUG
int lc823450_gpio_dump(uint16_t gpiocfg, FAR const char *msg);
#else
# define lc823450_gpio_dump(p,m)
#endif
/****************************************************************************
* Name: lc823450_vgpio_register
*
* Description:
* Register Virtual GPIO driver
*
****************************************************************************/
#ifdef CONFIG_LC823450_VGPIO
int lc823450_vgpio_register(unsigned int pin, FAR struct vgpio_ops_s *ops);
#endif /* CONFIG_LC823450_VGPIO */
#if defined(__cplusplus)
}
#endif
#undef EXTERN
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_LC823450_LC823450_GPIO_H */
arch/arm/src/lc823450/lc823450_i2c.c
+1235
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arch/arm/src/lc823450/lc823450_i2c.h
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/****************************************************************************
* arch/arm/src/lc823450/lc823450_i2c.h
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Nobutaka Toyoshima <Nobutaka.Toyoshima@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_LC823450_LC823450_I2C_H
#define __ARCH_ARM_SRC_LC823450_LC823450_I2C_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/i2c/i2c_master.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Register Addresses *******************************************************/
#define LC823450_I2C0_REGBASE 0x40089000
#define LC823450_I2C1_REGBASE 0x4008A000
#define I2CCTL (0x0)
#define I2CSTR (0x4)
#define I2CTXD (0x8)
#define I2CRXD (0xC)
#define I2CCKS (0x10)
/* Register Bitfield Definitions ********************************************/
/* Control register */
#define I2C_CTL_SDAD (1 << 0) /* Bit 0: SDA data output */
#define I2C_CTL_SCLD (1 << 1) /* Bit 1: SCL data output */
#define I2C_CTL_BC (1 << 2) /* Bit 2: Control I2C Bus forcely */
#define I2C_CTL_SCLR (1 << 3) /* Bit 3: Clear internal state */
#define I2C_CTL_IREQEN (1 << 4) /* Bit 4: Interrupt enable */
#define I2C_CTL_ACK (1 << 5) /* Bit 5: ACK bit output enable */
#define I2C_CTL_ST (1 << 6) /* Bit 6: Generate Start/Stop condition */
#define I2C_CTL_TRX (1 << 7) /* Bit 7: TX or RX enable */
#define I2C_CTL_SRST (1 << 8) /* Bit 8: Reset all registers */
#define I2C_CTL_BTRIG (1 << 12) /* Bit 12: Trigger starting byte transfer/receive */
#define I2C_CTL_FMODE (1 << 15) /* Bit 15: Fast or Standard mode enable */
/* Status register */
#define I2C_STR_SDAB (1 << 0) /* Bit 0: Monitor SDA pin */
#define I2C_STR_SCLB (1 << 1) /* Bit 1: Monitor SCL pin */
#define I2C_STR_ACKD (1 << 5) /* Bit 5: ACK detection */
#define I2C_STR_IREQ (1 << 6) /* Bit 6: Interrupt status */
#define I2C_STR_BBSY (1 << 7) /* Bit 7: Bus busy */
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
FAR struct i2c_master_s *lc823450_i2cbus_initialize(int port);
int lc823450_i2cbus_uninitialize(FAR struct i2c_master_s *dev);
void lc823450_i2cbus_changetimeout(FAR struct i2c_master_s *dev, uint32_t timeoms);
#if defined(__cplusplus)
}
#endif
#undef EXTERN
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_LC823450_LC823450_I2C_H */
arch/arm/src/lc823450/lc823450_idle.c
+164
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@@ -0,0 +1,164 @@
/****************************************************************************
* arch/arm/src/lc823450/lc823450_idle.c
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/clock.h>
#include "nvic.h"
#include "up_internal.h"
#include "up_arch.h"
#ifdef CONFIG_DVFS
# include "lc823450_dvfs.h"
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_LC823450_SLEEP_MODE
static int32_t g_in_sleep;
static uint64_t g_sleep_t0;
#endif /* CONFIG_LC823450_SLEEP_MODE */
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: up_get_current_time()
****************************************************************************/
#ifdef CONFIG_LC823450_SLEEP_MODE
static uint64_t up_get_current_time(void)
{
struct timespec ts;
#ifdef CONFIG_CLOCK_MONOTONIC
clock_gettime(CLOCK_MONOTONIC, &ts);
#else
clock_gettime(CLOCK_REALTIME, &ts);
#endif
return (uint64_t)ts.tv_sec * NSEC_PER_SEC + (uint64_t)ts.tv_nsec;
}
#endif /* CONFIG_LC823450_SLEEP_MODE */
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_idle
*
* Description:
* up_idle() is the logic that will be executed when their is no other
* ready-to-run task. This is processor idle time and will continue until
* some interrupt occurs to cause a context switch from the idle task.
*
* Processing in this state may be processor-specific. e.g., this is where
* power management operations might be performed.
*
****************************************************************************/
void up_idle(void)
{
#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS)
/* If the system is idle and there are no timer interrupts, then process
* "fake" timer interrupts. Hopefully, something will wake up.
*/
sched_process_timer();
#else
#ifdef CONFIG_LC823450_SLEEP_MODE
irqstate_t flags;
flags = enter_critical_section();
g_sleep_t0 = up_get_current_time();
g_in_sleep = 1;
/* Clear SLEEPDEEP flag */
uint32_t regval = getreg32(NVIC_SYSCON);
regval &= ~NVIC_SYSCON_SLEEPDEEP;
putreg32(regval, NVIC_SYSCON);
#ifdef CONFIG_DVFS
lc823450_dvfs_enter_idle();
#endif
leave_critical_section(flags);
#endif /* CONFIG_LC823450_SLEEP_MODE */
/* Sleep until an interrupt occurs to save power */
asm("WFI");
#endif
}
/****************************************************************************
* Name: up_update_idle_time()
*
* Description:
* up_update_idle_time() is the logic that will update idle time
*
****************************************************************************/
#ifdef CONFIG_LC823450_SLEEP_MODE
void up_update_idle_time(void)
{
if (g_in_sleep)
{
g_in_sleep = 0;
uint64_t t1 = up_get_current_time();
sched_add_idl_tm(t1 - g_sleep_t0);
}
}
#endif /* CONFIG_LC823450_SLEEP_MODE */
arch/arm/src/lc823450/lc823450_intc.h
+119
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/****************************************************************************
* arch/arm/src/lc823450/lc823450_intc.h
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Nobutaka Toyoshima <Nobutaka.Toyoshima@jp.sony.com>
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_LC823450_LC823450_INTC_H
#define __ARCH_ARM_SRC_LC823450_LC823450_INTC_H
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define LC823450_INTC_REGBASE 0x40003000
#define IPIREG (LC823450_INTC_REGBASE + 0x000)
#define IPIREG_INTISR0_0 (0x1 << 0)
#define IPIREG_INTISR0_1 (0x1 << 1)
#define IPIREG_INTISR0_2 (0x1 << 2)
#define IPIREG_INTISR0_3 (0x1 << 3)
#define IPIREG_INTISR1_0 (0x1 << 8)
#define IPIREG_INTISR1_1 (0x1 << 9)
#define IPIREG_INTISR1_2 (0x1 << 10)
#define IPIREG_INTISR1_3 (0x1 << 11)
#define IPICLR (LC823450_INTC_REGBASE + 0x004)
#define IPICLR_INTISR0_CLR_0 (0x1 << 0)
#define IPICLR_INTISR0_CLR_1 (0x1 << 1)
#define IPICLR_INTISR0_CLR_2 (0x1 << 2)
#define IPICLR_INTISR0_CLR_3 (0x1 << 3)
#define IPICLR_INTISR1_CLR_0 (0x1 << 8)
#define IPICLR_INTISR1_CLR_1 (0x1 << 9)
#define IPICLR_INTISR1_CLR_2 (0x1 << 10)
#define IPICLR_INTISR1_CLR_3 (0x1 << 11)
#define EXTINTn_BASE (LC823450_INTC_REGBASE + 0x400)
#define EXTINTnS_BASE (LC823450_INTC_REGBASE + 0x418)
#define EXTINTnM_BASE (LC823450_INTC_REGBASE + 0x430)
#define EXTINTnC0_BASE (LC823450_INTC_REGBASE + 0x448)
#define EXTINTnC1_BASE (LC823450_INTC_REGBASE + 0x460)
#define EXTINTnCND_BASE (LC823450_INTC_REGBASE + 0x478)
#define EXTINTnCLR_BASE (LC823450_INTC_REGBASE + 0x490)
#define EXTINTnFEN_BASE (LC823450_INTC_REGBASE + 0x4A8)
#define EXTINTnSET_BASE (LC823450_INTC_REGBASE + 0x4C0)
#define INTC_REG(base,port) ((base) + 4 * (port))
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/****************************************************************************
* Inline Functions
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#if defined(__cplusplus)
}
#endif
#undef EXTERN
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_LC823450_LC823450_INTC_H */
arch/arm/src/lc823450/lc823450_irq.c
+832
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arch/arm/src/lc823450/lc823450_lowputc.c
+227
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@@ -0,0 +1,227 @@
/****************************************************************************
* arch/arm/src/lc823450/lc823450_lowputc.c
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/**************************************************************************
* Included Files
**************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include "up_internal.h"
#include "up_arch.h"
#include "chip.h"
#include "lc823450_serial.h"
#include "lc823450_syscontrol.h"
#include <arch/board/board.h>
/**************************************************************************
* Pre-processor Definitions
**************************************************************************/
/* Configuration **********************************************************/
/* Select UART parameters for the selected console */
#define CTL_CLK XT1OSC_CLK
#if defined(CONFIG_UART0_SERIAL_CONSOLE)
# define LC823450_CONSOLE_BASE LC823450_UART0_REGBASE
# define LC823450_CONSOLE_BAUD CONFIG_UART0_BAUD
# define LC823450_CONSOLE_PARITY CONFIG_UART0_PARITY
# define LC823450_CONSOLE_BITS CONFIG_UART0_BITS
# define LC823450_CONSOLE_2STOP CONFIG_UART0_2STOP
# define LC823450_UARTCLK_VALUE (MCLKCNTAPB_UART0_CLKEN | \
MCLKCNTAPB_UART0IF_CLKEN)
# define LC823450_UARTRST_VALUE MRSTCNTAPB_UART0_RSTB
#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
# define LC823450_CONSOLE_BASE LC823450_UART1_REGBASE
# define LC823450_CONSOLE_BAUD CONFIG_UART1_BAUD
# define LC823450_CONSOLE_PARITY CONFIG_UART1_PARITY
# define LC823450_CONSOLE_BITS CONFIG_UART1_BITS
# define LC823450_CONSOLE_2STOP CONFIG_UART1_2STOP
# define LC823450_UARTCLK_VALUE (MCLKCNTAPB_UART1_CLKEN | \
MCLKCNTAPB_UART1IF_CLKEN)
# define LC823450_UARTRST_VALUE MRSTCNTAPB_UART1_RSTB
#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
# define LC823450_CONSOLE_BASE LC823450_UART2_REGBASE
# define LC823450_CONSOLE_BAUD CONFIG_UART2_BAUD
# define LC823450_CONSOLE_PARITY CONFIG_UART2_PARITY
# define LC823450_CONSOLE_BITS CONFIG_UART2_BITS
# define LC823450_CONSOLE_2STOP CONFIG_UART2_2STOP
# define LC823450_UARTCLK_VALUE (MCLKCNTAPB_UART2_CLKEN | \
MCLKCNTAPB_UART2IF_CLKEN)
# define LC823450_UARTRST_VALUE MRSTCNTAPB_UART2_RSTB
#else
# error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
#endif
/* UDIV settings */
#define UART_UDIV_N 16
#define UART_UDIV_VALUE ((UART_UDIV_N - 1) << 0)
/* UBR settings */
#define UART_UBR_VALUE \
(65536 - (CTL_CLK / (UART_UDIV_N * LC823450_CONSOLE_BAUD)))
/* UMD settings */
#if LC823450_CONSOLE_BITS == 8
# define UART_UMD_BIT_VALUE UART_UMD_CL
#else
# define UART_UMD_BIT_VALUE 0
#endif
#if LC823450_CONSOLE_2STOP != 0
# define UART_UMD_2STOP_VALUE UART_UMD_STL
#else
# define UART_UMD_2STOP_VALUE 0
#endif
#if LC823450_CONSOLE_PARITY == 1
# define UART_UMD_PARITY_VALUE UART_UMD_PS0
#elif LC823450_CONSOLE_PARITY == 2
# define UART_UMD_PARITY_VALUE UART_UMD_PS1
#else
# define UART_UMD_PARITY_VALUE 0
#endif
#define UART_UMD_VALUE \
(UART_UMD_BIT_VALUE | UART_UMD_2STOP_VALUE | UART_UMD_PARITY_VALUE)
/**************************************************************************
* Private Types
**************************************************************************/
/**************************************************************************
* Private Function Prototypes
**************************************************************************/
/**************************************************************************
* Public Data
**************************************************************************/
/**************************************************************************
* Private Data
**************************************************************************/
/**************************************************************************
* Private Functions
**************************************************************************/
/**************************************************************************
* Public Functions
**************************************************************************/
/**************************************************************************
* Name: up_lowputc
*
* Description:
* Output one byte on the serial console
*
**************************************************************************/
void up_lowputc(char ch)
{
#ifdef CONFIG_DEV_CONSOLE_SWITCH
if (g_console_disable)
return;
#endif
/* Wait until the TX FIFO is empty */
while (!(getreg32(LC823450_CONSOLE_BASE + UART_USR) & UART_USR_TXEMP))
;
/* Wait until the TX Register is not full */
while (getreg32(LC823450_CONSOLE_BASE + UART_USR) & UART_USR_TFF)
;
/* Clear SendDone status */
putreg32(UART_UINT_UARTTF_INT, LC823450_CONSOLE_BASE + UART_UISR);
/* Then send the character */
putreg32((uint32_t)ch, LC823450_CONSOLE_BASE + UART_USTF);
/* Wait SendDone */
while (!(getreg32(LC823450_CONSOLE_BASE + UART_UISR) & UART_UINT_UARTTF_INT))
;
}
/**************************************************************************
* Name: up_lowsetup
*
* Description:
* This performs basic initialization of the UART used for the serial
* console. Its purpose is to get the console output availabe as soon
* as possible.
*
**************************************************************************/
void lc823450_lowsetup(void)
{
/* Clock & Reset */
modifyreg32(MCLKCNTAPB, 0, LC823450_UARTCLK_VALUE);
modifyreg32(MRSTCNTAPB, 0, LC823450_UARTRST_VALUE);
/* INTC enable */
modifyreg32(MRSTCNTBASIC, 0, MRSTCNTBASIC_IRQCNT_RSTB);
/* baud */
putreg32(UART_UBR_VALUE, LC823450_CONSOLE_BASE + UART_UBR);
/* parity : bits : 2stop */
putreg32(UART_UMD_VALUE, LC823450_CONSOLE_BASE + UART_UMD);
/* Tx FIFO Enable */
putreg32(UART_USFC_TXFF_EN, LC823450_CONSOLE_BASE + UART_USFC);
/* Tx Enable */
putreg32(UART_UCM_TE, LC823450_CONSOLE_BASE + UART_UCM);
}
arch/arm/src/lc823450/lc823450_lowputc.h
+76
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/****************************************************************************
* arch/arm/src/lc823450/lc823450_lowputc.h
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_LC823450_LC823450_LOWPUTC_H
#define __ARCH_ARM_SRC_LC823450_LC823450_LOWPUTC_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/************************************************************************************
* Name: lc823450_lowsetup
*
* Description:
* Called at the very beginning of _start. Performs low level initialization.
*
************************************************************************************/
EXTERN void lc823450_lowsetup(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_LC823450_LC823450_LOWPUTC_H */
arch/arm/src/lc823450/lc823450_rtc.c
+758
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arch/arm/src/lc823450/lc823450_serial.c
+1442
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arch/arm/src/lc823450/lc823450_serial.h
+102
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/****************************************************************************
* arch/arm/src/lc823450/lc823450_serial.h
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_LC823450_LC823450_SERIAL_H
#define __ARCH_ARM_SRC_LC823450_LC823450_SERIAL_H
#define LC823450_UART0_REGBASE 0x4008b000
#define LC823450_UART1_REGBASE 0x4008c000
#define LC823450_UART2_REGBASE 0x4008d000
#define UART_UTR 0x00
#define UART_URR 0x04
#define UART_UMD 0x08
#define UART_UMD_CL (1 << 0)
#define UART_UMD_PS0 (1 << 1)
#define UART_UMD_PS1 (1 << 2)
#define UART_UMD_STL (1 << 3)
#define UART_UMD_RTSEN (1 << 5)
#define UART_UMD_CTSEN (1 << 6)
#define UART_UCM 0x0c
#define UART_UCM_RE (1 << 0)
#define UART_UCM_TE (1 << 1)
#define UART_USR 0x10
#define UART_USR_TFF (1 << 0)
#define UART_USR_RRF (1 << 1)
#define UART_USR_TXFULL (1 << 8)
#define UART_USR_TXEMP (1 << 9)
#define UART_USR_RXEMP (1 << 13)
#define UART_UBR 0x14
#define UART_UISR 0x18
#define UART_UISR_UARTRF (1 << 0)
#define UART_UISR_UARTTF (1 << 1)
#define UART_UISR_PE (1 << 2)
#define UART_UISR_ROWE (1 << 3)
#define UART_UISR_FE (1 << 4)
#define UART_UISR_RXOWE (1 << 12)
#define UART_UDIV 0x1c
#define UART_UIEN 0x20
#define UART_UIEN_UARTRF_IEN (1 << 0)
#define UART_UIEN_UARTTF_IEN (1 << 1)
#define UART_UIEN_PE_IEN (1 << 2)
#define UART_UIEN_ROWE_IEN (1 << 3)
#define UART_UIEN_FE_IEN (1 << 4)
#define UART_UIEN_RXOWE_IEN (1 << 12)
#define UART_UINT 0x24
#define UART_UINT_UARTRF_INT (1 << 0)
#define UART_UINT_UARTTF_INT (1 << 1)
#define UART_USTF 0x28
#define UART_USRF 0x2c
#define UART_USFC 0x30
#define UART_USFC_RXFF_EN (1 << 3)
#define UART_USFC_TXFF_EN (1 << 7)
#define UART_UDMA 0x34
#define UART_UDMA_RREQ_EN (1 << 0)
#define UART_UDMA_TREQ_EN (1 << 1)
#define UART_USFS 0x38
#define UART_USFS_TXFF_LV(v) (((v) >> 8 ) & 0x1f)
#define UART_USFS_RXFF_LV(v) (((v) >> 0 ) & 0x1f)
#ifdef CONFIG_DEV_CONSOLE_SWITCH
void up_console_disable(int disable);
extern int g_console_disable;
#endif
#ifdef CONFIG_HSUART
void hsuart_wdtimer(void);
#endif
#endif /* __ARCH_ARM_SRC_LC823450_LC823450_SERIAL_H */
arch/arm/src/lc823450/lc823450_spi.c
+576
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arch/arm/src/lc823450/lc823450_spi.h
+188
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/****************************************************************************
* arch/arm/src/lc823450/lc823450_spi.h
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Nobutaka Toyoshima <Nobutaka.Toyoshima@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_LC823450_LC823450_SPI_H
#define __ARCH_ARM_SRC_LC823450_LC823450_SPI_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/spi/spi.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Register Addresses *******************************************************/
#define LC823450_SPI_REGBASE 0x40088000
#define LC823450_SPI_STR (LC823450_SPI_REGBASE + 0x00) /* Transfer */
#define LC823450_SPI_SRR (LC823450_SPI_REGBASE + 0x04) /* Receive */
#define LC823450_SPI_SMD (LC823450_SPI_REGBASE + 0x08) /* Mode */
#define LC823450_SPI_SSR (LC823450_SPI_REGBASE + 0x0C) /* Status */
#define LC823450_SPI_BRG (LC823450_SPI_REGBASE + 0x10) /* Baudrate Generator */
#define LC823450_SPI_ISR (LC823450_SPI_REGBASE + 0x14) /* Interrupt Factor */
#define LC823450_SPI_DREQ (LC823450_SPI_REGBASE + 0x18) /* DMA Request */
#define LC823450_SPI_TxFF (LC823450_SPI_REGBASE + 0x1C) /* Transfer FIFO */
#define LC823450_SPI_RxFF (LC823450_SPI_REGBASE + 0x20) /* Receive FIFO */
#define LC823450_SPI_FFCTL (LC823450_SPI_REGBASE + 0x24) /* FIFO Control */
#define LC823450_SPI_MSK (LC823450_SPI_REGBASE + 0x28) /* Interrupt Mask */
#define LC823450_SPI_INT (LC823450_SPI_REGBASE + 0x2C) /* Interrupt Status */
#define LC823450_SPI_CSHT (LC823450_SPI_REGBASE + 0x30) /* CS Setup/Hold time (not supported) */
#define LC823450_SPI_CSMD (LC823450_SPI_REGBASE + 0x34) /* CS Mode (not supported) */
/* Register Bitfield Definitions ********************************************/
/* SPI Mode Register */
#define SPI_SMD_DMS_SHIFT (8)
#define SPI_SMD_DMS_MASK (3 << SPI_SMD_DMS_SHIFT) /* Bits 9:8: Baud Rate Control */
# define SPI_SMD_DMS_MANU (0 << SPI_SMD_DMS_SHIFT)
# define SPI_SMD_DMS_2TCYC (1 << SPI_SMD_DMS_SHIFT)
# define SPI_SMD_DMS_4TCYC (2 << SPI_SMD_DMS_SHIFT)
#define SPI_SMD_REGCLR (1 << 6) /* Bit 6: Tx/Rx data register clear */
#define SPI_SMD_WTR (1 << 5) /* Bit 5; Burst transfer enable */
#define SPI_SMD_CHL (1 << 4) /* Bit 4: Transfer bit length */
#define SPI_SMD_PO (1 << 3) /* Bit 3: SCK Polarity */
#define SPI_SMD_LM (1 << 2) /* Bit 2: MSB first selection */
#define SPI_SMD_BGE (1 << 1) /* Bit 1: Baudrate generator enable */
#define SPI_SMD_SSTR (1 << 0) /* Bit 0: Frame transfer enable */
/* SPI Status Register */
#define SPI_SSR_TFF (1 << 2) /* Bit 2: STR register full */
#define SPI_SSR_SHRF (1 << 1) /* Bit 1: Shift register full */
#define SPI_SSR_RRF (1 << 0) /* Bit 0: SRR register full */
/* SPI Interrupt Factor Register */
#define SPI_ISR_CS_END (1 << 14) /* Bit 14: CS completion (not supported) */
#define SPI_ISR_BURST_END (1 << 13) /* Bit 13: Burst transfer completion */
#define SPI_ISR_RxORE (1 << 12) /* Bit 12: Rx FIFO overread */
#define SPI_ISR_TxORE (1 << 11) /* Bit 11: Tx FIFO overread */
#define SPI_ISR_RxOWE (1 << 10) /* Bit 10: Rx FIFO overwrite */
#define SPI_ISR_TxOWE (1 << 9) /* Bit 9: Tx FIFO overwrite */
#define SPI_ISR_RxFULL (1 << 8) /* Bit 8: Rx FIFO full */
#define SPI_ISR_TxFULL (1 << 7) /* Bit 7: Tx FIFO full */
#define SPI_ISR_RxEMP (1 << 6) /* Bit 6: Rx FIFO empty */
#define SPI_ISR_TxEMP (1 << 5) /* Bit 5: Tx FIFO empty */
#define SPI_ISR_RxWLM (1 << 4) /* Bit 4: Rx FIFO water level match */
#define SPI_ISR_TxWLM (1 << 3) /* Bit 3: Tx FIFO water level match */
#define SPI_ISR_ROWE (1 << 2) /* Bit 2: SRR register overwrite */
#define SPI_ISR_OVE (1 << 1) /* Bit 1: overrun */
#define SPI_ISR_SPIF (1 << 0) /* Bit 0: Frame transfer completion */
/* SPI FIFO contorl Register */
#define SPI_TxFF_EN (1 << 0)
#define SPI_TxFF_WL2 (0 << 4)
#define SPI_TxFF_WL4 (1 << 4)
#define SPI_TxFF_WL8 (2 << 4)
#define SPI_TxFF_WL12 (3 << 4)
#define SPI_TxFF_WL14 (4 << 4)
/* SPI Interrupt Mask Register */
#define SPI_MSK_M_CS_END (1 << 14)
#define SPI_MSK_M_BURST_END (1 << 13)
#define SPI_MSK_M_RxORE (1 << 12)
#define SPI_MSK_M_TxORE (1 << 11)
#define SPI_MSK_M_RxOWE (1 << 10)
#define SPI_MSK_M_TxOWE (1 << 9)
#define SPI_MSK_M_RxFULL (1 << 8)
#define SPI_MSK_M_TxFULL (1 << 7)
#define SPI_MSK_M_RxEMP (1 << 6)
#define SPI_MSK_M_TxEMP (1 << 5)
#define SPI_MSK_M_RxWLM (1 << 4)
#define SPI_MSK_M_TxWLM (1 << 3)
#define SPI_MSK_M_ROWE (1 << 2)
#define SPI_MSK_M_OVE (1 << 1)
#define SPI_MSK_M_SPIF (1 << 0)
/* SPI DMA Request */
#define SPI_DREQ_DREQ_RX (3 << 0)
#define SPI_DREQ_DREQ_TX (2 << 0)
/* SPI Interrupt Status Register */
#define SPI_INT_I_CS_END (1 << 14)
#define SPI_INT_I_BURST_END (1 << 13)
#define SPI_INT_I_RxORE (1 << 12)
#define SPI_INT_I_TxORE (1 << 11)
#define SPI_INT_I_RxOWE (1 << 10)
#define SPI_INT_I_TxOWE (1 << 9)
#define SPI_INT_I_RxFULL (1 << 8)
#define SPI_INT_I_TxFULL (1 << 7)
#define SPI_INT_I_RxEMP (1 << 6)
#define SPI_INT_I_TxEMP (1 << 5)
#define SPI_INT_I_RxWLM (1 << 4)
#define SPI_INT_I_TxWLM (1 << 3)
#define SPI_INT_I_ROWE (1 << 2)
#define SPI_INT_I_OVE (1 << 1)
#define SPI_INT_I_SPIF (1 << 0)
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
EXTERN FAR struct spi_dev_s *lc823450_spibus_initialize(int bus);
EXTERN void lc823450_spiinitialize(void);
EXTERN void lc823450_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
EXTERN uint8_t lc823450_spistatus(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
EXTERN int lc823450_spicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_LC823450_LC823450_SPI_H */
arch/arm/src/lc823450/lc823450_start.c
+425
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@@ -0,0 +1,425 @@
/****************************************************************************
* arch/arm/src/lc823450/lc823450_start.c
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* Author: Yasuhiro Osaki <Yasuhiro.Osaki@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <assert.h>
#include <debug.h>
#include <string.h>
#include <stdio.h>
#include <nuttx/init.h>
#ifdef CONFIG_LASTKMSG
# include <nuttx/lastkmsg.h>
#endif /* CONFIG_LASTKMSG */
#include <nuttx/arch.h>
#include <nuttx/mtd/mtd.h>
#include "up_arch.h"
#include "up_internal.h"
#include "nvic.h"
#include <arch/board/board.h>
#ifdef CONFIG_LC823450_SPIFI
# include "lc823450_spifi.h"
#endif
#include "lc823450_lowputc.h"
#include "lc823450_clockconfig.h"
#include "lc823450_syscontrol.h"
#ifdef CONFIG_ARMV7M_MPU
# include "lc823450_mpuinit.h"
#endif
#include "lc823450_gpio.h"
#ifdef CONFIG_MM_MULTIHEAP
# include "lc823450_sram.h"
#endif
#ifdef CONFIG_LC823450_SDRAM
# include "lc823450_sdram.h"
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
int icx_boot_reason;
/****************************************************************************
* Private Function prototypes
****************************************************************************/
#ifdef CONFIG_DEBUG_STACK
static void go_os_start(void *pv, unsigned int nbytes)
__attribute__ ((naked, no_instrument_function, noreturn));
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: showprogress
*
* Description:
* Print a character on the UART to show boot status.
*
****************************************************************************/
#ifdef CONFIG_DEBUG
# define showprogress(c) up_lowputc(c)
#else
# define showprogress(c)
#endif
/****************************************************************************
* Name: go_os_start
*
* Description:
* Set the IDLE stack to the
*
****************************************************************************/
#ifdef CONFIG_DEBUG_STACK
static void go_os_start(void *pv, unsigned int nbytes)
{
/* Set the IDLE stack to the stack coloration value then jump to
* os_start(). We take extreme care here because were currently
* executing on this stack.
*
* We want to avoid sneak stack access generated by the compiler.
*/
__asm__ __volatile__
(
"\tmov r1, r1, lsr #2\n" /* R1 = nwords = nbytes >> 2 */
"\tbeq 2f\n" /* (should not happen) */
"\tbic r0, r0, #3\n" /* R0 = Aligned stackptr */
"\tmovw r2, #0xbeef\n" /* R2 = STACK_COLOR = 0xdeadbeef */
"\tmovt r2, #0xdead\n"
"1:\n" /* Top of the loop */
"\tsub r1, r1, #1\n" /* R1 nwords-- */
"\tcmp r1, #0\n" /* Check (nwords == 0) */
"\tstr r2, [r0], #4\n" /* Save stack color word, increment stackptr */
"\tbne 1b\n" /* Bottom of the loop */
"2:\n"
"\tmov r14, #0\n" /* LR = return address (none) */
"\tb os_start\n" /* Branch to os_start */
);
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: _start
*
* Description:
* This is the reset entry point.
*
****************************************************************************/
#ifdef CONFIG_SPIFLASH_BOOT
__attribute__((section (".start_text"))) void __start_main(void)
#else /* CONFIG_SPIFLASH_BOOT */
void __start(void)
#endif /* CONFIG_SPIFLASH_BOOT */
{
const uint32_t *src;
uint32_t *dest;
/* Clear .bss. We'll do this inline (vs. calling memset) just to be
* certain that there are no issues with the state of global variables.
*/
#ifdef CONFIG_FS_EVFAT
/* clear the work area in seg0 */
dest = (uint32_t *)0x02000000;
int i;
for (i = 0; i < 0xe00 / sizeof(uint32_t); i++)
{
*dest++ = 0;
}
#endif
for (dest = &_sbss; dest < &_ebss; )
{
*dest++ = 0;
}
/* Move the initialized data section from his temporary holding spot in
* FLASH into the correct place in SRAM. The correct place in SRAM is
* give by _sdata and _edata. The temporary location is in FLASH at the
* end of all of the other read-only data (.text, .rodata) at _eronly.
*/
for (src = &_eronly, dest = &_sdata; dest < &_edata; )
{
*dest++ = *src++;
}
/* run as interrupt context, before scheduler running */
CURRENT_REGS = (uint32_t *)1;
#ifdef CONFIG_LASTKMSG_LOWOUTS
if (g_lastksg_buf.sig == LASTKMSG_SIG_REBOOT)
{
icx_boot_reason |= ICX_BOOT_REASON_REBOOT;
}
/* clrear kmsg buffer */
memset(&g_lastksg_buf, 0, sizeof(g_lastksg_buf));
/* set lastkmsg signature */
g_lastksg_buf.sig = LASTKMSG_SIG;
#endif /* CONFIG_LASTKMSG */
#ifdef CONFIG_SPIFLASH_BOOT
/* Copy any necessary code sections from FLASH to RAM. The correct
* destination in SRAM is geive by _sramfuncs and _eramfuncs. The
* temporary location is in flash after the data initalization code
* at _framfuncs.
*/
extern uint32_t _stext_sram, _etext_sram, _ftext, _svect;
/* copt text & vectors */
for (src = &_ftext, dest = &_stext_sram; dest < &_etext_sram; )
{
*dest++ = *src++;
}
/* vector offset */
putreg32((uint32_t)&_svect, NVIC_VECTAB);
#else /* CONFIG_SPIFLASH_BOOT */
/* vector offset */
#ifdef CONFIG_IPL2
putreg32(0x02000e00, 0xe000ed08);
putreg32(0x0, 0x40080008); /* XXX: remap disable */
#else /* CONFIG_IPL2 */
putreg32(0x02040000, 0xe000ed08);
#endif /* CONFIG_IPL2 */
#endif /* CONFIG_SPIFLASH_BOOT */
/* Mutex enable */
modifyreg32(MRSTCNTBASIC, 0, MRSTCNTBASIC_MUTEX_RSTB);
/* Configure the uart so that we can get debug output as soon as possible */
lc823450_clockconfig();
lc823450_lowsetup();
showprogress('A');
/* IPL2 don't change mux */
#ifdef CONFIG_IPL2
/* GPIO2F out High in IPL2 */
modifyreg32(MCLKCNTAPB, 0, MCLKCNTAPB_PORT2_CLKEN);
modifyreg32(MRSTCNTAPB, 0, MRSTCNTAPB_PORT2_RSTB);
modifyreg32(rP2DT, 0, 1 << 15 /* GPIO2F */);
modifyreg32(rP2DRC, 0, 1 << 15 /* GPIO2F */);
#ifdef CONFIG_DEBUG
/* enable TXD0 for debug */
modifyreg32(PMDCNT5, 0, 3 << 14);
#endif /* CONFIG_DEBUG */
#else /* CONFIG_IPL2 */
up_init_default_mux();
#endif /* CONFIG_IPL2 */
showprogress('B');
#if defined(CONFIG_LC823450_SPIFI) && !defined(CONFIG_SPIFLASH_BOOT)
lc823450_spiflash_earlyinit();
#endif /* CONFIG_LC823450_SPIFI */
#ifdef CONFIG_LC823450_SDRAM
lc823450_sdram_init();
#endif /* CONFIG_LC823450_SDRAM */
showprogress('C');
/* Perform early serial initialization */
#ifdef USE_EARLYSERIALINIT
up_earlyserialinit();
#endif
showprogress('D');
/* For the case of the separate user-/kernel-space build, perform whatever
* platform specific initialization of the user memory is required.
* Normally this just means initializing the user space .data and .bss
* segments.
*/
#ifdef CONFIG_ARMV7M_MPU
lc823450_mpuinitialize();
showprogress('E');
#endif
#ifdef CONFIG_MM_MULTIHEAP
lc823450_sram_initialize();
#endif
showprogress('F');
#ifndef CONFIG_IPL2
_info("icx_boot_reason = 0x%x\n", icx_boot_reason);
#endif /* CONFIG_IPL2 */
#ifdef CONFIG_POWERBUTTON_LDOWN
if (icx_boot_reason & ICX_BOOT_REASON_POWERBUTTON)
{
int t = 1000;
while (--t && up_board_powerkey())
{
up_udelay(10 * 1000);
}
_info("t = %d\n", t);
if (t)
{
up_board_poweren(0);
up_udelay(1000 * 1000);
_info("VBUS connected ?\n");
/* VBUS is connected after powerup by key.
* Resume PowerOn sequence. (cancel shutdown)
*/
up_board_poweren(1);
}
}
#endif /* CONFIG_POWERBUTTON_LDOWN */
/* Then start NuttX */
showprogress('\r');
showprogress('\n');
(void)get_cpu_ver();
/* run as interrupt context, before scheduler running */
CURRENT_REGS = NULL;
#ifdef CONFIG_DEBUG_STACK
/* Set the IDLE stack to the coloration value and jump into os_start() */
go_os_start((FAR void *)&_ebss, CONFIG_IDLETHREAD_STACKSIZE);
#else
/* Call os_start() */
os_start();
/* Shoulnd't get here */
for (;;);
#endif
}
#if defined(CONFIG_SPIFLASH_BOOT)
__attribute__((section (".start_gdb"))) void __start(void)
{
/* XXX: Don't use stack in this function */
/* SPIF/CACHE clock */
putreg32(0x0402, 0x40080100);
/* SPIF/CACHE reset */
putreg32(0x0402, 0x40080114);
/* PinMux for QSPI */
putreg32(0x540000c0, 0x40080400);
putreg32(0x00000017, 0x40080404);
/* BusAcc enable */
putreg32(0x00000303, 0x40001028);
/* Stack initialize: */
__asm__ __volatile__
(
"ldr r0, =_vectors\n"
"bic r0, r0, #1\n"
"ldr sp, [r0, #0]\n"
);
__start_main();
/* not reached */
}
#endif /* defined(CONFIG_SPIFLASH_BOOT) */
arch/arm/src/lc823450/lc823450_syscontrol.c
+211
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@@ -0,0 +1,211 @@
/****************************************************************************
* arch/arm/src/lc823450/lc823450_syscontrol.c
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* Author: Nobutaka Toyoshima <Nobutaka.Toyoshima@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <stdint.h>
#include <debug.h>
#include <arch/board/board.h>
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "lc823450_gpio.h"
#include "lc823450_syscontrol.h"
#include <arch/chip/clk.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
static struct clk_st lc823450_clocks[] = LC823450_CLOCKS;
/****************************************************************************
* Public Data
****************************************************************************/
uint8_t cpu_ver;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: get_cpu_ver
****************************************************************************/
uint32_t get_cpu_ver(void)
{
uint32_t ret = 0;
uint32_t reg = getreg32(MODEM) & MODEM_MAV_MASK;
switch (reg)
{
case MODEM_MAV_ES1:
_info("ES1 \n");
break;
case MODEM_MAV_ES2:
_info("ES2 \n");
ret = 1;
break;
default:
_info("??? \n");
break;
}
cpu_ver = ret;
return ret;
}
/****************************************************************************
* Name: mod_stby_regs
*
* Input parameters:
* enabits : specify regions to be enabled
* disbits : specify regions to be disabled
*
****************************************************************************/
#ifdef CONFIG_LC823450_LSISTBY
void mod_stby_regs(uint32_t enabits, uint32_t disbits)
{
/* TODO : need to lock */
/* isolate first if needed */
modifyreg32(ISOCNT, disbits, 0);
/* then modify LSTSTBY register */
modifyreg32(LSISTBY, enabits, disbits);
if (enabits)
{
/* stand-by to active case */
/* assumption: the specified blocks are already isolated */
up_udelay(100); /* need to wait 100us */
/* then disable isolation for the region */
modifyreg32(ISOCNT, 0, enabits);
}
/* _info("ISOCNT=0x%x, LSISTBY=0x%x \n", getreg32(ISOCNT), getreg32(LSISTBY)); */
}
#endif /* CONFIG_LC823450_LSISTBY */
/****************************************************************************
* Name: up_enable_clk
****************************************************************************/
void up_enable_clk(enum clock_e clk)
{
irqstate_t flags;
flags = enter_critical_section();
ASSERT(clk < LC823450_CLOCK_NUM);
if (lc823450_clocks[clk].count++ == 0)
{
modifyreg32(lc823450_clocks[clk].regaddr,
0, lc823450_clocks[clk].regmask);
}
leave_critical_section(flags);
}
/****************************************************************************
* Name: up_disable_clk
****************************************************************************/
void up_disable_clk(enum clock_e clk)
{
irqstate_t flags;
flags = enter_critical_section();
ASSERT(clk < LC823450_CLOCK_NUM);
if (--lc823450_clocks[clk].count == 0)
{
modifyreg32(lc823450_clocks[clk].regaddr,
lc823450_clocks[clk].regmask, 0);
}
/* ASSERT(lc823450_clocks[clk].count >= 0); */
if (lc823450_clocks[clk].count < 0)
{
lc823450_clocks[clk].count = 0;
}
leave_critical_section(flags);
}
/****************************************************************************
* Name: lc823450_clock_dump
****************************************************************************/
void lc823450_clock_dump(void)
{
int i;
for (i = 0; i < LC823450_CLOCK_NUM; i++)
{
_info("%s:%d\n", lc823450_clocks[i].name,
lc823450_clocks[i].count);
}
}
arch/arm/src/lc823450/lc823450_syscontrol.h
+310
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@@ -0,0 +1,310 @@
/****************************************************************************
* arch/arm/src/lc823450/lc823450_syscontrol.h
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* Author: Nobutaka Toyoshima <Nobutaka.Toyoshima@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_LC823450_LC823450_SYSCONTROL_H
#define __ARCH_ARM_SRC_LC823450_LC823450_SYSCONTROL_H
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define LC823450_SYSCONTROL_REGBASE 0x40080000
#define CORECNT (LC823450_SYSCONTROL_REGBASE + 0x0000)
#define CORECNT_C1CLKEN (1 << 0)
#define CORECNT_C1RSTN (1 << 1)
#define REMAP (LC823450_SYSCONTROL_REGBASE + 0x0008)
#define MEMEN4 (LC823450_SYSCONTROL_REGBASE + 0x0024)
#define MEMEN4_HWAIT (1 << 0)
#define MEMEN4_DWAIT (1 << 1)
#define LSISTBY (LC823450_SYSCONTROL_REGBASE + 0x0028)
#define LSISTBY_STBYA (1 << 0) /* Audio */
#define LSISTBY_STBYB (1 << 1) /* SRAM */
#define LSISTBY_STBYC (1 << 2) /* SRAM */
#define LSISTBY_STBYD (1 << 3) /* SRAM + ROM (DSP) */
#define LSISTBY_STBYE (1 << 4) /* USB */
#define LSISTBY_STBYG (1 << 6) /* S-Flash cache */
#define LSISTBY_STBYH (1 << 7) /* SD/MS */
#define LSISTBY_STBYI (1 << 8) /* Internal ROM */
#define ISOCNT (LC823450_SYSCONTROL_REGBASE + 0x002c)
#define LOCKUPR (LC823450_SYSCONTROL_REGBASE + 0x0044)
#define LOCKUPR_LOCKUPR0 (1 << 0)
#define LOCKUPR_LOCKUPR1 (1 << 1)
#define MODEM (LC823450_SYSCONTROL_REGBASE + 0x00FC)
#define MODEM_MAV_MASK (15 << 24)
#define MODEM_MAV_ES1 (1 << 24)
#define MODEM_MAV_ES2 (2 << 24)
#define MCLKCNTBASIC (LC823450_SYSCONTROL_REGBASE + 0x0100)
#define MCLKCNTBASIC_EXTMEMC_CLKEN (1 << 0)
#define MCLKCNTBASIC_SFIF_CLKEN (1 << 1)
#define MCLKCNTBASIC_USBHOST_CLKEN (1 << 2)
#define MCLKCNTBASIC_DMAC_CLKEN (1 << 4)
#define MCLKCNTBASIC_CACHE_CLKEN (1 << 10)
#define MCLKCNTBASIC_USBDEV_CLKEN (1 << 11)
#define MCLKCNTEXT1 (LC823450_SYSCONTROL_REGBASE + 0x0104)
#define MCLKCNTEXT1_MTM0_CLKEN (1 << 0)
#define MCLKCNTEXT1_MTM1_CLKEN (1 << 1)
#define MCLKCNTEXT1_MTM2_CLKEN (1 << 2)
#define MCLKCNTEXT1_MTM3_CLKEN (1 << 3)
#define MCLKCNTEXT1_PTM0_CLKEN (1 << 4)
#define MCLKCNTEXT1_PTM1_CLKEN (1 << 5)
#define MCLKCNTEXT1_PTM2_CLKEN (1 << 6)
#define MCLKCNTEXT1_SDIF0_CLKEN (1 << 8)
#define MCLKCNTEXT1_SDIF1_CLKEN (1 << 9)
#define MCLKCNTEXT1_SDIF2_CLKEN (1 << 10)
#define MCLKCNTEXT1_MSHOST_CLKEN (1 << 11)
#define MCLKCNTEXT1_MSPB_CLKEN (1 << 12)
#define MCLKCNTEXT1_MTM0C_CLKEN (1 << 24)
#define MCLKCNTEXT1_MTM1C_CLKEN (1 << 25)
#define MCLKCNTEXT1_MTM2C_CLKEN (1 << 26)
#define MCLKCNTEXT1_MTM3C_CLKEN (1 << 27)
#define MCLKCNTEXT1_PTM0C_CLKEN (1 << 28)
#define MCLKCNTEXT1_PTM1C_CLKEN (1 << 29)
#define MCLKCNTEXT1_PTM2C_CLKEN (1 << 30)
#define MCLKCNTEXT4 (LC823450_SYSCONTROL_REGBASE + 0x010c)
#define MCLKCNTEXT4_SDRAMC_CLKEN0 (1 << 0)
#define MCLKCNTEXT4_SDRAMC_CLKEN1 (1 << 1)
#define MCLKCNTAPB (LC823450_SYSCONTROL_REGBASE + 0x0110)
#define MCLKCNTAPB_PORT0_CLKEN (1 << 0)
#define MCLKCNTAPB_PORT1_CLKEN (1 << 1)
#define MCLKCNTAPB_PORT2_CLKEN (1 << 2)
#define MCLKCNTAPB_PORT3_CLKEN (1 << 3)
#define MCLKCNTAPB_PORT4_CLKEN (1 << 4)
#define MCLKCNTAPB_PORT5_CLKEN (1 << 5)
#define MCLKCNTAPB_ADC_CLKEN (1 << 6)
#define MCLKCNTAPB_SPI_CLKEN (1 << 7)
#define MCLKCNTAPB_I2C0_CLKEN (1 << 8)
#define MCLKCNTAPB_I2C1_CLKEN (1 << 9)
#define MCLKCNTAPB_UART0_CLKEN (1 << 10)
#define MCLKCNTAPB_UART1_CLKEN (1 << 11)
#define MCLKCNTAPB_UART2_CLKEN (1 << 12)
#define MCLKCNTAPB_RTC_CLKEN (1 << 13)
#define MCLKCNTAPB_GPO_CLKEN (1 << 14)
#define MCLKCNTAPB_UART0IF_CLKEN (1 << 24)
#define MCLKCNTAPB_UART1IF_CLKEN (1 << 25)
#define MCLKCNTAPB_UART2IF_CLKEN (1 << 26)
#define MRSTCNTBASIC (LC823450_SYSCONTROL_REGBASE + 0x0114)
#define MRSTCNTBASIC_EXTMEMC_RSTB (1 << 0)
#define MRSTCNTBASIC_SFIF_RSTB (1 << 1)
#define MRSTCNTBASIC_USB_RSTB (1 << 2)
#define MRSTCNTBASIC_IRQCNT_RSTB (1 << 3)
#define MRSTCNTBASIC_DMAC_RSTB (1 << 4)
#define MRSTCNTBASIC_MUTEX_RSTB (1 << 8)
#define MRSTCNTBASIC_DSPCMD_RSTB (1 << 9)
#define MRSTCNTBASIC_CACHE_RSTB (1 << 10)
#define MRSTCNTBASIC_USBDEV_RSTB (1 << 11)
#define MRSTCNTEXT1 (LC823450_SYSCONTROL_REGBASE + 0x0118)
#define MRSTCNTEXT1_MTM0_RSTB (1 << 0)
#define MRSTCNTEXT1_MTM1_RSTB (1 << 1)
#define MRSTCNTEXT1_MTM2_RSTB (1 << 2)
#define MRSTCNTEXT1_MTM3_RSTB (1 << 3)
#define MRSTCNTEXT1_PTM0_RSTB (1 << 4)
#define MRSTCNTEXT1_PTM1_RSTB (1 << 5)
#define MRSTCNTEXT1_PTM2_RSTB (1 << 6)
#define MRSTCNTEXT1_SDIF0_RSTB (1 << 8)
#define MRSTCNTEXT1_SDIF1_RSTB (1 << 9)
#define MRSTCNTEXT1_SDIF2_RSTB (1 << 10)
#define MRSTCNTEXT1_MSIF_RSTB (1 << 11)
#define MRSTCNTEXT4 (LC823450_SYSCONTROL_REGBASE + 0x0120)
#define MRSTCNTEXT4_SDRAMC_RSTB (1 << 0)
#define MRSTCNTAPB (LC823450_SYSCONTROL_REGBASE + 0x0124)
#define MRSTCNTAPB_PORT0_RSTB (1 << 0)
#define MRSTCNTAPB_PORT1_RSTB (1 << 1)
#define MRSTCNTAPB_PORT2_RSTB (1 << 2)
#define MRSTCNTAPB_PORT3_RSTB (1 << 3)
#define MRSTCNTAPB_PORT4_RSTB (1 << 4)
#define MRSTCNTAPB_PORT5_RSTB (1 << 5)
#define MRSTCNTAPB_ADC_RSTB (1 << 6)
#define MRSTCNTAPB_SPI_RSTB (1 << 7)
#define MRSTCNTAPB_I2C0_RSTB (1 << 8)
#define MRSTCNTAPB_I2C1_RSTB (1 << 9)
#define MRSTCNTAPB_UART0_RSTB (1 << 10)
#define MRSTCNTAPB_UART1_RSTB (1 << 11)
#define MRSTCNTAPB_UART2_RSTB (1 << 12)
#define MRSTCNTAPB_RTC_RSTB (1 << 13)
#define PMDCNT0 (LC823450_SYSCONTROL_REGBASE + 0x0400)
#define PMDCNT1 (LC823450_SYSCONTROL_REGBASE + 0x0404)
#define PMDCNT2 (LC823450_SYSCONTROL_REGBASE + 0x0408)
#define PMDCNT3 (LC823450_SYSCONTROL_REGBASE + 0x040c)
#define PMDCNT4 (LC823450_SYSCONTROL_REGBASE + 0x0410)
#define PMDCNT5 (LC823450_SYSCONTROL_REGBASE + 0x0414)
#define PUDCNT0 (LC823450_SYSCONTROL_REGBASE + 0x044c)
#define PUDCNT1 (LC823450_SYSCONTROL_REGBASE + 0x0450)
#define PUDCNT2 (LC823450_SYSCONTROL_REGBASE + 0x0454)
#define PUDCNT3 (LC823450_SYSCONTROL_REGBASE + 0x0458)
#define PUDCNT4 (LC823450_SYSCONTROL_REGBASE + 0x045c)
#define PUDCNT5 (LC823450_SYSCONTROL_REGBASE + 0x0460)
#define PUDCNT6 (LC823450_SYSCONTROL_REGBASE + 0x0464)
#define PTDRVCNT0 (LC823450_SYSCONTROL_REGBASE + 0x0430)
#define PTDRVCNT1 (LC823450_SYSCONTROL_REGBASE + 0x0434)
#define PTDRVCNT2 (LC823450_SYSCONTROL_REGBASE + 0x0438)
#define PTDRVCNT3 (LC823450_SYSCONTROL_REGBASE + 0x043c)
#define PTDRVCNT4 (LC823450_SYSCONTROL_REGBASE + 0x0440)
#define PTDRVCNT5 (LC823450_SYSCONTROL_REGBASE + 0x0444)
#define PTDRVCNT6 (LC823450_SYSCONTROL_REGBASE + 0x0448)
#define SDCTL (LC823450_SYSCONTROL_REGBASE + 0x0800)
#define SDCTL_COREVLT (1 << 31)
#define SDCTL_MMCVLT0_18V (1 << 4)
#define SDCTL_ACSMODE0_MASK (7 << 1)
#define SDCTL_ACSMODE0_HS (2 << 1)
#define SDCTL_ACSMODE0_MMCDDR (4 << 1)
#define SDCTL_SDMMC0_MMC (1 << 0)
#define DREQ0_3 (LC823450_SYSCONTROL_REGBASE + 0x808)
#define DREQ4_7 (LC823450_SYSCONTROL_REGBASE + 0x80c)
#define DREQ8_C (LC823450_SYSCONTROL_REGBASE + 0x810)
#define DREQD_F (LC823450_SYSCONTROL_REGBASE + 0x814)
#define CACHE_CTL (LC823450_SYSCONTROL_REGBASE + 0x0818)
#define CACHE_CTL_USE (1 << 0)
#define BMODE_CNT (LC823450_SYSCONTROL_REGBASE + 0x81c)
#define BMODE_CNT_BMODE0EN (1 << 0)
#define BMODE_DT (LC823450_SYSCONTROL_REGBASE + 0x820)
#define BMODE_DT_BMODE0DT (1 << 0)
#define BMODE_DT_XTALINFO_MASK (3 << 4)
#define BMODE_DT_XTALINFO_20 (2 << 4)
#define BMODE_DT_XTALINFO_24 (0 << 4)
#define USBCNT (LC823450_SYSCONTROL_REGBASE + 0x834)
#define USBCNT_ANPD (1 << 1)
#define USBCNT_CLK24MHZ (1 << 2)
#define USBCNT_CLK20MHZ (6 << 2)
#define USBCNT_CLK_MASK (7 << 2)
#define USBCNT_CRYCNTSW24MHZ (1 << 5)
#define USBCNT_CRYCNTSW20MHZ (1 << 5)
#define USBCNT_CRYCNTSW_MASK (7 << 5)
#define USBCNT_VBUS_VALID (1 << 8)
#define USBCNT_RSM_CONT (1 << 11)
#define USBSTAT (LC823450_SYSCONTROL_REGBASE + 0x838)
#define USBSTAT_LINESTE_MASK (3 << 0)
#define USBSTAT_LINESTE_0 (1 << 0)
#define USBSTAT_LINESTE_1 (1 << 1)
#define SFIFSEL (LC823450_SYSCONTROL_REGBASE + 0x83c)
#define SDRAMIFSEL (LC823450_SYSCONTROL_REGBASE + 0x840)
#define I2CMODE (LC823450_SYSCONTROL_REGBASE + 0x844)
#define I2CMODE0 (1 << 0)
#define I2CMODE1 (1 << 1)
/* GPIO */
#define PORT0_BASE 0x40081000
#define rP0DT (PORT0_BASE + 0x0000 + 0x04)
#define rP1DT (PORT0_BASE + 0x1000 + 0x04)
#define rP2DT (PORT0_BASE + 0x2000 + 0x04)
#define rP3DT (PORT0_BASE + 0x3000 + 0x04)
#define rP4DT (PORT0_BASE + 0x4000 + 0x04)
#define rP5DT (PORT0_BASE + 0x5000 + 0x04)
#define rP0DRC (PORT0_BASE + 0x0000 + 0x00)
#define rP1DRC (PORT0_BASE + 0x1000 + 0x00)
#define rP2DRC (PORT0_BASE + 0x2000 + 0x00)
#define rP3DRC (PORT0_BASE + 0x3000 + 0x00)
#define rP4DRC (PORT0_BASE + 0x4000 + 0x00)
#define rP5DRC (PORT0_BASE + 0x5000 + 0x00)
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/****************************************************************************
* Inline Functions
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
uint32_t get_cpu_ver(void);
void init_default_mux(void);
void lc823450_clock_dump(void);
#ifdef CONFIG_LC823450_LSISTBY
void mod_stby_regs(uint32_t clearbits, uint32_t setbits);
void lc823450_mod_stby_regs(uint32_t clearbits, uint32_t setbits);
#else
# define mod_stby_regs(...)
# define lc823450_mod_stby_regs(...)
#endif
#if defined(__cplusplus)
}
#endif
#undef EXTERN
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_LC823450_LC823450_SYSCONTROL_H */
arch/arm/src/lc823450/lc823450_testset.c
+124
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@@ -0,0 +1,124 @@
/****************************************************************************
* arch/arm/src/lc823450/lc823450_testset.c
*
* Copyright (C) 2016-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/spinlock.h>
#include "up_arch.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define LC823450_MUTEX_REG_BASE 0x40005000
#define MUTEX_REG_MUTEX0 (LC823450_MUTEX_REG_BASE + 0x00)
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_testset
*
* Description:
* Perform and atomic test and set operation on the provided spinlock.
*
* This function must be provided via the architecture-specific logic.
*
* Note:
* LC823450 does not support ldrex/strex. Instead, MUTEX is provided.
*
* Input Parameters:
* lock - The address of spinlock object.
*
* Returned Value:
* The spinlock is always locked upon return. The value of previous value
* of the spinlock variable is returned, either SP_LOCKED if the spinlock
* as previously locked (meaning that the test-and-set operation failed to
* obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked
* (meaning that we successfully obtained the lock)
*
****************************************************************************/
spinlock_t up_testset(volatile FAR spinlock_t *lock)
{
uint32_t val;
spinlock_t ret;
irqstate_t flags;
flags = up_irq_save();
val = (up_cpu_index() << 16) | 0x1;
do
{
putreg32(val, MUTEX_REG_MUTEX0);
}
while (getreg32(MUTEX_REG_MUTEX0) != val);
ret = *lock;
if (ret == SP_UNLOCKED)
{
*lock = SP_LOCKED;
}
val = (up_cpu_index() << 16) | 0x0;
putreg32(val, MUTEX_REG_MUTEX0);
up_irq_restore(flags);
return ret;
}
arch/arm/src/lc823450/lc823450_timerisr.c
+619
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File diff suppressed because it is too large Load Diff
arch/arm/src/lc823450/lc823450_vectors.S
+486
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@@ -0,0 +1,486 @@
/****************************************************************************
* arch/arm/src/lc823450/lc823450_vectors.S
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/*****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
#include "chip.h"
#include "exc_return.h"
/*****************************************************************************
* Configuration
****************************************************************************/
/*****************************************************************************
* Preprocessor Definitions
****************************************************************************/
/* Configuration ********************************************************************/
#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
/* In kernel mode without an interrupt stack, this interrupt handler will set the
* MSP to the stack pointer of the interrupted thread. If the interrupted thread
* was a privileged thread, that will be the MSP otherwise it will be the PSP. If
* the PSP is used, then the value of the MSP will be invalid when the interrupt
* handler returns because it will be a pointer to an old position in the
* unprivileged stack. Then when the high priority interrupt occurs and uses this
* stale MSP, there will most likely be a system failure.
*
* If the interrupt stack is selected, on the other hand, then the interrupt
* handler will always set the the MSP to the interrupt stack. So when the high
* priority interrupt occurs, it will either use the MSP of the last privileged
* thread to run or, in the case of the nested interrupt, the interrupt stack if
* no privileged task has run.
*/
# if defined(CONFIG_BUILD_PROTECTED) && CONFIG_ARCH_INTERRUPTSTACK < 4
# error Interrupt stack must be used with high priority interrupts in kernel mode
# endif
/* Use the the BASEPRI to control interrupts is required if nested, high
* priority interrupts are supported.
*/
# ifndef CONFIG_ARMV7M_USEBASEPRI
# error CONFIG_ARMV7M_USEBASEPRI must be used with CONFIG_ARCH_HIPRI_INTERRUPT
# endif
#endif
/* Memory Map ***********************************************************************/
/*
* 0x0800:0000 - Beginning of FLASH. Address of vectors (if not using bootloader)
* Mapped to address 0x0000:0000 at boot time.
* 0x0800:3000 - Address of vectors if using bootloader
* 0x0803:ffff - End of flash
* 0x2000:0000 - Start of SRAM and start of .data (_sdata)
* - End of .data (_edata) abd start of .bss (_sbss)
* - End of .bss (_ebss) and bottom of idle stack
* - _ebss + CONFIG_IDLETHREAD_STACKSIZE = end of idle stack, start of heap
* 0x2000:ffff - End of SRAM and end of heap
*/
#define IDLE_STACK (_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE)
/*****************************************************************************
* Global Symbols
****************************************************************************/
.syntax unified
.thumb
.file "lc823450_vectors.S"
/* Check if common ARMv7 interrupt vectoring is used (see arch/arm/src/armv7-m/up_vectors.S) */
#ifndef CONFIG_ARMV7M_CMNVECTOR
.globl __start
/*****************************************************************************
* Macros
****************************************************************************/
/* On entry into an IRQ, the hardware automatically saves the xPSR, PC, LR, R12, R0-R3
* registers on the stack, then branches to an instantantiation of the following
* macro. This macro simply loads the IRQ number into R0, then jumps to the common
* IRQ handling logic.
*/
.macro HANDLER, label, irqno
.thumb_func
\label:
mov r0, #\irqno
b exception_common
.endm
/*****************************************************************************
* Vectors
****************************************************************************/
.section .vectors, "ax"
.code 16
.align 2
.globl _vectors
.type _vectors, function
_vectors:
/* Processor Exceptions */
.word IDLE_STACK /* Vector 0: Reset stack pointer */
#ifdef CONFIG_SPIFLASH_BOOT
.word __start_main /* Vector 1: Reset vector */
#else /* CONFIG_SPIFLASH_BOOT */
.word __start /* Vector 1: Reset vector */
#endif /* CONFIG_SPIFLASH_BOOT */
.word lc823450_nmi /* Vector 2: Non-Maskable Interrupt (NMI) */
.word lc823450_hardfault /* Vector 3: Hard fault */
.word lc823450_mpu /* Vector 4: Memory management (MPU) */
.word lc823450_busfault /* Vector 5: Bus fault */
.word lc823450_usagefault /* Vector 6: Usage fault */
.word lc823450_reserved /* Vector 7: Reserved */
.word lc823450_reserved /* Vector 8: Reserved */
.word lc823450_reserved /* Vector 9: Reserved */
.word lc823450_reserved /* Vector 10: Reserved */
.word lc823450_svcall /* Vector 11: SVC call */
.word lc823450_dbgmonitor /* Vector 12: Debug monitor */
.word lc823450_reserved /* Vector 13: Reserved */
.word lc823450_pendsv /* Vector 14: Pendable system service request */
.word lc823450_systick /* Vector 15: System tick */
/* External Interrupts */
#undef VECTOR
#define VECTOR(l,i) .word l
#undef UNUSED
#define UNUSED(i) .word lc823450_reserved
#include "lc823450_vectors.h"
.size _vectors, .-_vectors
/*****************************************************************************
* .text
****************************************************************************/
.text
.type handlers, function
.thumb_func
handlers:
HANDLER lc823450_reserved, LC823450_IRQ_RESERVED /* Unexpected/reserved vector */
HANDLER lc823450_nmi, LC823450_IRQ_NMI /* Vector 2: Non-Maskable Interrupt (NMI) */
HANDLER lc823450_hardfault, LC823450_IRQ_HARDFAULT /* Vector 3: Hard fault */
HANDLER lc823450_mpu, LC823450_IRQ_MEMFAULT /* Vector 4: Memory management (MPU) */
HANDLER lc823450_busfault, LC823450_IRQ_BUSFAULT /* Vector 5: Bus fault */
HANDLER lc823450_usagefault, LC823450_IRQ_USAGEFAULT /* Vector 6: Usage fault */
HANDLER lc823450_svcall, LC823450_IRQ_SVCALL /* Vector 11: SVC call */
HANDLER lc823450_dbgmonitor, LC823450_IRQ_DBGMONITOR /* Vector 12: Debug Monitor */
HANDLER lc823450_pendsv, LC823450_IRQ_PENDSV /* Vector 14: Penable system service request */
HANDLER lc823450_systick, LC823450_IRQ_SYSTICK /* Vector 15: System tick */
#undef VECTOR
#define VECTOR(l,i) HANDLER l, i
#undef UNUSED
#define UNUSED(i)
#include "lc823450_vectors.h"
/* Common IRQ handling logic. On entry here, the return stack is on either
* the PSP or the MSP and looks like the following:
*
* REG_XPSR
* REG_R15
* REG_R14
* REG_R12
* REG_R3
* REG_R2
* REG_R1
* MSP->REG_R0
*
* And
* R0 contains the IRQ number
* R14 Contains the EXC_RETURN value
* We are in handler mode and the current SP is the MSP
*/
.globl exception_common
.type exception_common, function
exception_common:
/* Complete the context save */
#ifdef CONFIG_BUILD_PROTECTED
/* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1
* (handler mode) if the stack is on the MSP. It can only be on the PSP if
* EXC_RETURN is 0xfffffffd (unprivileged thread)
*/
tst r14, #EXC_RETURN_PROCESS_STACK /* nonzero if context on process stack */
beq 1f /* Branch if context already on the MSP */
mrs r1, psp /* R1=The process stack pointer (PSP) */
mov sp, r1 /* Set the MSP to the PSP */
1:
#endif
/* r1 holds the value of the stack pointer AFTER the exception handling logic
* pushed the various registers onto the stack. Get r2 = the value of the
* stack pointer BEFORE the interrupt modified it.
*/
mov r2, sp /* R2=Copy of the main/process stack pointer */
add r2, #HW_XCPT_SIZE /* R2=MSP/PSP before the interrupt was taken */
#ifdef CONFIG_ARMV7M_USEBASEPRI
mrs r3, basepri /* R3=Current BASEPRI setting */
#else
mrs r3, primask /* R3=Current PRIMASK setting */
#endif
/* Save the remaining registers on the stack after the registers pushed
* by the exception handling logic. r2=SP and r3=primask or basepri, r4-r11,
* r14=register values.
*/
#ifdef CONFIG_BUILD_PROTECTED
stmdb sp!, {r2-r11,r14} /* Save the remaining registers plus the SP value */
#else
stmdb sp!, {r2-r11} /* Save the remaining registers plus the SP value */
#endif
#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
/* Disable interrupts, select the stack to use for interrupt handling
* and call up_doirq to handle the interrupt
*/
cpsid i /* Disable further interrupts */
#else
/* Set the BASEPRI register so that further normal interrupts will be
* masked. Nested, high priority may still occur, however.
*/
mov r2, #NVIC_SYSH_DISABLE_PRIORITY
msr basepri, r2 /* Set the BASEPRI */
#endif
/* There are two arguments to up_doirq:
*
* R0 = The IRQ number
* R1 = The top of the stack points to the saved state
*/
mov r1, sp
/* Also save the top of the stack in a preserved register */
mov r4, sp
#if CONFIG_ARCH_INTERRUPTSTACK > 7
/* If CONFIG_ARCH_INTERRUPTSTACK is defined, we will set the MSP to use
* a special special interrupt stack pointer. The way that this is done
* here prohibits nested interrupts without some additional logic!
*/
ldr sp, =g_intstackbase
#ifdef CONFIG_SMP
ldr r2, coreid_reg
ldr r2, [r2, 0] /* r2 = getreg32(coreid_reg) */
and r2, r2, 1 /* r2 = COREID */
cmp r2, #0
beq after_setstack
ldr sp, =g_intstackbase2
after_setstack:
#endif /* CONFIG_SMP */
#else
/* Otherwise, we will re-use the interrupted thread's stack. That may
* mean using either MSP or PSP stack for interrupt level processing (in
* kernel mode).
*/
bic r2, r4, #7 /* Get the stack pointer with 8-byte alignment */
mov sp, r2 /* Instantiate the aligned stack */
#endif
bl up_doirq /* R0=IRQ, R1=register save (msp) */
mov r1, r4 /* Recover R1=main stack pointer */
/* On return from up_doirq, R0 will hold a pointer to register context
* array to use for the interrupt return. If that return value is the same
* as current stack pointer, then things are relatively easy.
*/
cmp r0, r1 /* Context switch? */
beq 2f /* Branch if no context switch */
/* We are returning with a pending context switch. This case is different
* because in this case, the register save structure does not lie in the
* stack but, rather, within a TCB structure. We'll have to copy some
* values to the stack.
*/
add r1, r0, #SW_XCPT_SIZE /* R1=Address of HW save area in reg array */
ldmia r1, {r4-r11} /* Fetch eight registers in HW save area */
ldr r1, [r0, #(4*REG_SP)] /* R1=Value of SP before interrupt */
stmdb r1!, {r4-r11} /* Store eight registers in HW save area */
#ifdef CONFIG_BUILD_PROTECTED
ldmia r0, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */
#else
ldmia r0, {r2-r11} /* Recover R4-R11 + 2 temp values */
#endif
b 3f /* Re-join common logic */
/* We are returning with no context switch. We simply need to "unwind"
* the same stack frame that we created
*
* Here:
* r1 = Address of the return stack (same as r0)
*/
2:
#ifdef CONFIG_BUILD_PROTECTED
ldmia r1!, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */
#else
ldmia r1!, {r2-r11} /* Recover R4-R11 + 2 temp values */
#endif
/* Set up to return from the exception
*
* Here:
* r1 = Address on the target thread's stack position at the start of
* the registers saved by hardware
* r3 = primask or basepri
* r4-r11 = restored register values
*/
3:
#ifdef CONFIG_BUILD_PROTECTED
/* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1
* (handler mode) if the stack is on the MSP. It can only be on the PSP if
* EXC_RETURN is 0xfffffffd (unprivileged thread)
*/
mrs r2, control /* R2=Contents of the control register */
tst r14, #EXC_RETURN_PROCESS_STACK /* nonzero if context on process stack */
beq 4f /* Branch if privileged */
orr r2, r2, #1 /* Unprivileged mode */
msr psp, r1 /* R1=The process stack pointer */
b 5f
4:
bic r2, r2, #1 /* Privileged mode */
msr msp, r1 /* R1=The main stack pointer */
5:
msr control, r2 /* Save the updated control register */
#else
msr msp, r1 /* Recover the return MSP value */
/* Preload r14 with the special return value first (so that the return
* actually occurs with interrupts still disabled).
*/
ldr r14, =EXC_RETURN_PRIVTHR /* Load the special value */
#endif
/* Restore the interrupt state */
#ifdef CONFIG_ARMV7M_USEBASEPRI
msr basepri, r3 /* Restore interrupts priority masking */
#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
cpsie i /* Re-enable interrupts */
#endif
#else
msr primask, r3 /* Restore interrupts */
#endif
/* Always return with R14 containing the special value that will: (1)
* return to thread mode, and (2) continue to use the MSP
*/
bx r14 /* And return */
#ifdef CONFIG_SMP
coreid_reg:
.word 0xe00fe000
#endif /* CONFIG_SMP */
.size handlers, .-handlers
/*****************************************************************************
* Name: g_intstackalloc/g_intstackbase
*
* Description:
* Shouldn't happen
*
****************************************************************************/
#if CONFIG_ARCH_INTERRUPTSTACK > 7
.bss
.global g_intstackalloc
.global g_intstackbase
.align 8
g_intstackalloc:
.skip (CONFIG_ARCH_INTERRUPTSTACK & ~7)
g_intstackbase:
.size g_intstackalloc, .-g_intstackalloc
#ifdef CONFIG_SMP
.bss
.global g_intstackalloc2
.global g_intstackbase2
.align 8
g_intstackalloc2:
.skip (CONFIG_ARCH_INTERRUPTSTACK & ~7)
g_intstackbase2:
.size g_intstackalloc2, .-g_intstackalloc2
#endif /* CONFIG_SMP */
#endif /* CONFIG_ARCH_INTERRUPTSTACK */
#endif /* CONFIG_ARMV7M_CMNVECTOR */
/*****************************************************************************
* .rodata
****************************************************************************/
.section .rodata, "a"
/* Variables: _sbss is the start of the BSS region (see ld.script) _ebss is the end
* of the BSS regsion (see ld.script). The idle task stack starts at the end of BSS
* and is of size CONFIG_IDLETHREAD_STACKSIZE. The IDLE thread is the thread that
* the system boots on and, eventually, becomes the idle, do nothing task that runs
* only when there is nothing else to run. The heap continues from there until the
* end of memory. See g_idle_topstack below.
*/
.globl g_idle_topstack
.type g_idle_topstack, object
g_idle_topstack:
.word HEAP_BASE
.size g_idle_topstack, .-g_idle_topstack
.end
arch/arm/src/lc823450/lc823450_vectors.h
+129
View File
@@ -0,0 +1,129 @@
/****************************************************************************
* arch/arm/src/lc823450/chip/lc823450_vectors.h
*
* Copyright (C) 2014-2017 Sony Corporation. All rights reserved.
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Pre-processor definitions
****************************************************************************/
/* This file is included by lc823450_vectors.S. It provides the macro VECTOR that
* supplies a LC823450 vector in terms of a (lower-case) ISR label and an
* (upper-case) IRQ number as defined in arch/arm/include/lc823450/irq.h.
* lc823450_vectors.S will defined the VECTOR in different ways in order to generate
* the interrupt vectors and handlers in their final form.
*/
/* If the common ARMv7-M vector handling is used, then all it needs is the following
* definition that provides the number of supported vectors.
*/
#ifdef CONFIG_ARMV7M_CMNVECTOR
/* Reserve interrupt table entries for I/O interrupts. */
# define ARMV7M_PERIPHERAL_INTERRUPTS 82
#else
VECTOR(lc823450_ctxm3_00, LC823450_IRQ_CTXM3_00) /* Vector 16+0: CortexM3_00 interrupt */
VECTOR(lc823450_ctxm3_01, LC823450_IRQ_CTXM3_01) /* Vector 16+1: CortexM3_01 interrupt */
VECTOR(lc823450_ctxm3_02, LC823450_IRQ_CTXM3_02) /* Vector 16+2: CortexM3_02 interrupt */
VECTOR(lc823450_ctxm3_03, LC823450_IRQ_CTXM3_03) /* Vector 16+3: CortexM3_03 interrupt */
VECTOR(lc823450_ctxm3_10, LC823450_IRQ_CTXM3_10) /* Vector 16+4: CortexM3_00 interrupt */
VECTOR(lc823450_ctxm3_11, LC823450_IRQ_CTXM3_11) /* Vector 16+5: CortexM3_01 interrupt */
VECTOR(lc823450_ctxm3_12, LC823450_IRQ_CTXM3_12) /* Vector 16+6: CortexM3_02 interrupt */
VECTOR(lc823450_ctxm3_13, LC823450_IRQ_CTXM3_13) /* Vector 16+7: CortexM3_03 interrupt */
VECTOR(lc823450_lpdsp0, LC823450_IRQ_LPDSP0) /* Vector 16+8: LPDSP0 interrupt */
VECTOR(lc823450_lpdsp1, LC823450_IRQ_LPDSP1) /* Vector 16+9: LPDSP1 interrupt */
VECTOR(lc823450_lpdsp2, LC823450_IRQ_LPDSP2) /* Vector 16+10: LPDSP2 interrupt */
VECTOR(lc823450_lpdsp3, LC823450_IRQ_LPDSP3) /* Vector 16+11: LPDSP3 interrupt */
VECTOR(lc823450_wdt0, LC823450_IRQ_WDT0) /* Vector 16+12: WatchDogTimer0 interrupt */
VECTOR(lc823450_wdt1, LC823450_IRQ_WDT1) /* Vector 16+13: WatchDogTimer1 interrupt */
VECTOR(lc823450_wdt2, LC823450_IRQ_WDT2) /* Vector 16+14: WatchDogTimer2 interrupt */
VECTOR(lc823450_btimer0, LC823450_IRQ_BTIMER0) /* Vector 16+15: BasicTimer0 interrupt */
VECTOR(lc823450_btimer1, LC823450_IRQ_BTIMER1) /* Vector 16+16: BasicTimer0 interrupt */
VECTOR(lc823450_btimer2, LC823450_IRQ_BTIMER2) /* Vector 16+17: BasicTimer0 interrupt */
VECTOR(lc823450_mtimer00, LC823450_IRQ_MTIMER00) /* Vector 16+18: MultipleTimer00 interrupt */
VECTOR(lc823450_mtimer01, LC823450_IRQ_MTIMER01) /* Vector 16+19: MultipleTimer01 interrupt */
VECTOR(lc823450_mtimer10, LC823450_IRQ_MTIMER10) /* Vector 16+20: MultipleTimer10 interrupt */
VECTOR(lc823450_mtimer11, LC823450_IRQ_MTIMER11) /* Vector 16+21: MultipleTimer11 interrupt */
VECTOR(lc823450_mtimer20, LC823450_IRQ_MTIMER20) /* Vector 16+22: MultipleTimer20 interrupt */
VECTOR(lc823450_mtimer21, LC823450_IRQ_MTIMER21) /* Vector 16+23: MultipleTimer21 interrupt */
VECTOR(lc823450_mtimer30, LC823450_IRQ_MTIMER30) /* Vector 16+24: MultipleTimer30 interrupt */
VECTOR(lc823450_mtimer31, LC823450_IRQ_MTIMER31) /* Vector 16+25: MultipleTimer31 interrupt */
VECTOR(lc823450_ehci, LC823450_IRQ_EHCI) /* Vector 16+26: USB HOST EHCI interrupt */
VECTOR(lc823450_ohci, LC823450_IRQ_OHCI) /* Vector 16+27: USB HOST OHCI interrupt */
VECTOR(lc823450_serflash, LC823450_IRQ_SERFLASH) /* Vector 16+28: USB HOST OHCI interrupt */
VECTOR(lc823450_dmac, LC823450_IRQ_DMAC) /* Vector 16+29: DMA Controller interrupt */
VECTOR(lc823450_sdcsync0, LC823450_IRQ_SDCSYNC0) /* Vector 16+30: SDCardSync0 interrupt */
VECTOR(lc823450_sdcsync1, LC823450_IRQ_SDCSYNC1) /* Vector 16+31: SDCardSync1 interrupt */
VECTOR(lc823450_sdcsync2, LC823450_IRQ_SDCSYNC2) /* Vector 16+32: SDCardSync2 interrupt */
VECTOR(lc823450_sdcasync0, LC823450_IRQ_SDCASYNC0) /* Vector 16+33: SDCardAsync0 interrupt */
VECTOR(lc823450_sdcasync1, LC823450_IRQ_SDCASYNC1) /* Vector 16+34: SDCardAsync1 interrupt */
VECTOR(lc823450_sdcasync2, LC823450_IRQ_SDCASYNC2) /* Vector 16+35: SDCardAsync2 interrupt */
VECTOR(lc823450_memstick, LC823450_IRQ_MEMSTICK) /* Vector 16+36: MemoryStick interrupt */
VECTOR(lc823450_memstickins, LC823450_IRQ_MEMSTICKINS) /* Vector 16+37: MemoryStick ins interrupt */
VECTOR(lc823450_dspcmd, LC823450_IRQ_DSPCMD) /* Vector 16+38: DSP cmd interface interrupt */
VECTOR(lc823450_adc, LC823450_IRQ_ADC) /* Vector 16+39: AD Converter interrupt */
VECTOR(lc823450_sio, LC823450_IRQ_SIO) /* Vector 16+40: SIO interrupt */
VECTOR(lc823450_i2c0, LC823450_IRQ_I2C0) /* Vector 16+41: I2C0 interrupt */
VECTOR(lc823450_i2c1, LC823450_IRQ_I2C1) /* Vector 16+42: I2C1 interrupt */
VECTOR(lc823450_uart0, LC823450_IRQ_UART0) /* Vector 16+43: UART0 interrupt */
VECTOR(lc823450_uart1, LC823450_IRQ_UART1) /* Vector 16+44: UART1 interrupt */
VECTOR(lc823450_uart2, LC823450_IRQ_UART2) /* Vector 16+45: UART2 interrupt */
VECTOR(lc823450_rtc, LC823450_IRQ_RTC) /* Vector 16+46: RTC interrupt */
VECTOR(lc823450_rtckey, LC823450_IRQ_RTCKEY) /* Vector 16+47: RTCKEY interrupt */
VECTOR(lc823450_audiobuf0, LC823450_IRQ_AUDIOBUF0) /* Vector 16+48: AudioBuffer0 interrupt */
VECTOR(lc823450_audiobuf1, LC823450_IRQ_AUDIOBUF1) /* Vector 16+49: AudioBuffer1 interrupt */
VECTOR(lc823450_audiobuf2, LC823450_IRQ_AUDIOBUF2) /* Vector 16+50: AudioBuffer2 interrupt */
VECTOR(lc823450_audiobuf3, LC823450_IRQ_AUDIOBUF3) /* Vector 16+51: AudioBuffer3 interrupt */
VECTOR(lc823450_audiostat0, LC823450_IRQ_AUDIOSTAT0) /* Vector 16+52: AudioStatus0 interrupt */
VECTOR(lc823450_audiostat1, LC823450_IRQ_AUDIOSTAT1) /* Vector 16+53: AudioStatus1 interrupt */
VECTOR(lc823450_audiostat2, LC823450_IRQ_AUDIOSTAT2) /* Vector 16+54: AudioStatus2 interrupt */
VECTOR(lc823450_audiostat3, LC823450_IRQ_AUDIOSTAT3) /* Vector 16+55: AudioStatus3 interrupt */
VECTOR(lc823450_audiotm0, LC823450_IRQ_AUDIOTM0) /* Vector 16+56: AudioTimer0 interrupt */
VECTOR(lc823450_audiotm1, LC823450_IRQ_AUDIOTM1) /* Vector 16+57: AudioTimer1 interrupt */
VECTOR(lc823450_usbdev, LC823450_IRQ_USBDEV) /* Vector 16+58: USB Device interrupt */
VECTOR(lc823450_extint0, LC823450_IRQ_EXTINT0) /* Vector 16+59: ExternalINT0 interrupt */
VECTOR(lc823450_extint1, LC823450_IRQ_EXTINT1) /* Vector 16+60: ExternalINT1 interrupt */
VECTOR(lc823450_extint2, LC823450_IRQ_EXTINT2) /* Vector 16+61: ExternalINT2 interrupt */
VECTOR(lc823450_extint3, LC823450_IRQ_EXTINT3) /* Vector 16+62: ExternalINT3 interrupt */
VECTOR(lc823450_extint4, LC823450_IRQ_EXTINT4) /* Vector 16+63: ExternalINT4 interrupt */
VECTOR(lc823450_extint5, LC823450_IRQ_EXTINT5) /* Vector 16+64: ExternalINT5 interrupt */
#endif /* CONFIG_ARMV7M_CMNVECTOR */
configs/Kconfig
+10
View File
@@ -244,6 +244,12 @@ config ARCH_BOARD_HYMINI_STM32V
A configuration for the HY-Mini STM32v board. This board is based on the
STM32F103VCT6 chip.
config ARCH_BOARD_LC823450_XGEVK
bool "ON Semiconductor LC823450-XGEVK development board"
depends on ARCH_CHIP_LC823450
---help---
This port uses the ON Semiconductor LC823450-XGEVK development board.
config ARCH_BOARD_LINCOLN60
bool "Micromint Lincoln 60 board"
depends on ARCH_CHIP_LPC1769
@@ -1557,6 +1563,7 @@ config ARCH_BOARD
default "hymini-stm32v" if ARCH_BOARD_HYMINI_STM32V
default "kwikstik-k40" if ARCH_BOARD_KWIKSTIK_K40
default "launchxl-tms57004" if ARCH_BOARD_LAUNCHXL_TMS57004
default "lc823450-xgevk" if ARCH_BOARD_LC823450_XGEVK
default "lincoln60" if ARCH_BOARD_LINCOLN60
default "lm3s6432-s2e" if ARCH_BOARD_LM3S6432S2E
default "lm3s6965-ek" if ARCH_BOARD_LM3S6965EK
@@ -1790,6 +1797,9 @@ endif
if ARCH_BOARD_LAUNCHXL_TMS57004
source "configs/launchxl-tms57004/Kconfig"
endif
if ARCH_BOARD_LC823450_XGEVK
source "configs/lc823450-xgevk/Kconfig"
endif
if ARCH_BOARD_LINCOLN60
source "configs/lincoln60/Kconfig"
endif
configs/lc823450-xgevk/Kconfig
+7
View File
@@ -0,0 +1,7 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_LC823450_XGEVK
endif
configs/lc823450-xgevk/README.txt
+84
View File
@@ -0,0 +1,84 @@
README
^^^^^^
README for NuttX port to the LC823450XGEVK board.
The board information is available at
http://www.onsemi.com/PowerSolutions/evalBoard.do?id=LC823450XGEVK
LC823450 related documents are available at
http://www.onsemi.com/PowerSolutions/supportDoc.do?type=AppNotes&rpn=LC823450
This port is intended to test LC823450 features including SMP.
Supported peripherals are UART, TIMER, RTC, GPIO, DMA, I2C, SPI, LCD.
Settings
^^^^^^^^
1. Currently only SRAM boot via ICE is supported.
2. If SWD connection is lost, please specify lower adaptor clock.
3. Both CPUs are running at 160MHz.
4. Internal SRAMs (seg0 to seg5) are used.
5. Serial console can be used via external USB-UART (115200/8/N/1).
6. Interrupt handlers except for inter-cpu are handled on CPU0.
SMP related Status
^^^^^^^^^^^^^^^^^^
Currently SMP feature works on the board but might not be stable.
In addition, console output might be corrupted if the both CPUs
output into the console because UART operates in FIFO mode.
1. "nsh> smp" works but the result will be corrupted.
2. "nsh> ostest" works but might cause a deadlock or assertion.
Other Status
^^^^^^^^^^^^
1. nsh built-in commands such as ps, free are available.
NuttShell (NSH)
nsh> ps
PID GROUP CPU PRI POLICY TYPE NPX STATE EVENT SIGMASK STACK COMMAND
0 0 0 0 FIFO Kthread N-- Assigned 00000000 000000 CPU0 IDLE
1 0 1 0 FIFO Kthread N-- Running 00000000 002044 CPU1 IDLE
3 1 0 100 FIFO Task --- Running 00000000 003052 init
nsh> free
total used free largest
Mem: 1027024 13136 1013888 1013888
2. date command can be used to get/set RTC date and time.
nsh> date
Oct 03 00:00:55 2013
nsh> date -s "Mar 31 12:34:56 2017"
nsh> date
Mar 31 12:34:56 2017
3. i2c app can be used to test I2C buses.
nsh> i2c get -b 1 -a 18 -r 0
READ Bus: 1 Addr: 18 Subaddr: 00 Value: f9
4. nxhello app can be used to test LCD via SPI.
nsh> nxhello
nxhello_initialize: Initializing LCD
nxhello_initialize: Open NX
nxhello_main: NX handle=20096f0
nxhello_main: Set background color=0
nxhello_main: Screen resolution (128,48)
nxhello_hello: Position (31,20)
nxhello_main: Close NX
TODO
^^^^
The following peripherals will be supported.
eMMC, uSD, USB, ADC, Audio, etc.
configs/lc823450-xgevk/include/board.h
+69
View File
@@ -0,0 +1,69 @@
/****************************************************************************
* configs/lc823450-xgevk/include/board.h
*
* Copyright (C) 2017 Sony Corporation. All rights reserved.
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __CONFIGS_LC823450_XGEVK_INCLUDE_BOARD_H
#define __CONFIGS_LC823450_XGEVK_INCLUDE_BOARD_H
#include <stdint.h>
/************************************************************************************
* Public Data
************************************************************************************/
#ifndef __ASSEMBLY__
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
extern unsigned int XT1OSC_CLK;
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
void up_init_default_mux(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_LC823450_XGEVK_INCLUDE_BOARD_H */
configs/lc823450-xgevk/nsh/defconfig
+119
View File
@@ -0,0 +1,119 @@
CONFIG_AQM_1248A=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="lc823450-xgevk"
CONFIG_ARCH_BOARD_LC823450_XGEVK=y
CONFIG_ARCH_CHIP_LC823450=y
CONFIG_ARCH_FLOAT_H=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_STDARG_H=y
CONFIG_BOARD_LOOPSPERMSEC=12061
CONFIG_BUILTIN=y
CONFIG_C99_BOOL8=y
CONFIG_CODECS_HASH_MD5=y
CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_ERROR=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEBUG_WARN=y
CONFIG_DEV_ZERO=y
CONFIG_DISABLE_MQUEUE=y
CONFIG_DISABLE_POSIX_TIMERS=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXAMPLES_NSH=y
CONFIG_EXAMPLES_NXHELLO_BPP=1
CONFIG_EXAMPLES_NXHELLO=y
CONFIG_EXAMPLES_OSTEST=y
CONFIG_EXAMPLES_PIPE=y
CONFIG_EXAMPLES_SMP=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_FS_WRITABLE=y
CONFIG_I2C_RESET=y
CONFIG_I2CTOOL_MAXBUS=1
CONFIG_I2C=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LC823450_I2C0=y
CONFIG_LC823450_I2C1=y
# CONFIG_LC823450_SDIF is not set
CONFIG_LC823450_SPI_DMA=y
CONFIG_LC823450_UART0=y
CONFIG_LCD_ST7565=y
CONFIG_LCD=y
CONFIG_LIB_KBDCODEC=y
CONFIG_LIBM=y
CONFIG_MAX_TASKS=64
CONFIG_MAX_WDOGPARMS=2
CONFIG_MEMSET_OPTSPEED=y
CONFIG_NAME_MAX=765
CONFIG_NETUTILS_CODECS=y
CONFIG_NFILE_DESCRIPTORS=45
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y
# CONFIG_NSH_ARGCAT is not set
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_BASENAME=y
CONFIG_NSH_DISABLE_CP=y
CONFIG_NSH_DISABLE_DD=y
CONFIG_NSH_DISABLE_DELROUTE=y
CONFIG_NSH_DISABLE_DIRNAME=y
CONFIG_NSH_DISABLE_EXEC=y
CONFIG_NSH_DISABLE_GET=y
CONFIG_NSH_DISABLE_HEXDUMP=y
CONFIG_NSH_DISABLE_IFCONFIG=y
CONFIG_NSH_DISABLE_LOSETUP=y
CONFIG_NSH_DISABLE_MB=y
CONFIG_NSH_DISABLE_MD5=y
CONFIG_NSH_DISABLE_MH=y
CONFIG_NSH_DISABLE_MKDIR=y
CONFIG_NSH_DISABLE_MKFIFO=y
CONFIG_NSH_DISABLE_MKRD=y
CONFIG_NSH_DISABLE_MV=y
CONFIG_NSH_DISABLE_PUT=y
CONFIG_NSH_DISABLE_RMDIR=y
CONFIG_NSH_DISABLE_RM=y
CONFIG_NSH_DISABLE_SH=y
CONFIG_NSH_DISABLE_WGET=y
CONFIG_NSH_DISABLE_XD=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_MAXARGUMENTS=10
CONFIG_NSH_READLINE=y
# CONFIG_NX_DISABLE_1BPP is not set
CONFIG_NXFONT_MONO5X8=y
CONFIG_NX=y
CONFIG_PIPES=y
CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=2048
CONFIG_PREALLOC_TIMERS=4
CONFIG_PREALLOC_WDOGS=16
CONFIG_PTHREAD_MUTEX_TYPES=y
CONFIG_PTHREAD_STACK_DEFAULT=3072
CONFIG_RAM_SIZE=1044480
CONFIG_RAM_START=0x02001000
CONFIG_RAW_BINARY=y
CONFIG_RTC_DATETIME=y
CONFIG_RTC=y
CONFIG_SCHED_ATEXIT=y
CONFIG_SCHED_CHILD_STATUS=y
CONFIG_SCHED_HAVE_PARENT=y
CONFIG_SCHED_INSTRUMENTATION_BUFFER=y
CONFIG_SCHED_INSTRUMENTATION=y
CONFIG_SCHED_ONEXIT_MAX=32
CONFIG_SCHED_ONEXIT=y
CONFIG_SCHED_STARTHOOK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SERIAL_TERMIOS=y
CONFIG_SMP_NCPUS=2
CONFIG_SMP=y
# CONFIG_SPI_EXCHANGE is not set
CONFIG_SPI=y
CONFIG_START_DAY=3
CONFIG_START_MONTH=10
CONFIG_START_YEAR=2013
CONFIG_SYSTEM_I2CTOOL=y
CONFIG_TASK_NAME_SIZE=24
CONFIG_UART0_RXBUFSIZE=512
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_UART0_TXBUFSIZE=2048
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_USERMAIN_STACKSIZE=3072
configs/lc823450-xgevk/scripts/Make.defs
+126
View File
@@ -0,0 +1,126 @@
############################################################################
# configs/lc823450-xgevk/scripts/Make.defs
#
# Copyright (C) 2017 Sony Corporation. All rights reserved.
# Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
ifeq ($(WINTOOL),y)
# Windows-native toolchains
DIRLINK = $(TOPDIR)/tools/copydir.sh
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
MKDEP = $(TOPDIR)/tools/mkwindeps.sh
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}"
else
# Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
AR = $(CROSSDEV)ar rcs
NM = $(CROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin -ffunction-sections -fdata-sections -nostdinc
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti -nostdinc++
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ASMEXT = .S
OBJEXT = .o
LIBEXT = .a
EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
LDFLAGS += --gc-sections
HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
HOSTLDFLAGS =
ifeq ($(CONFIG_MTD_LC823450),y)
ARCH_LIBS += -lSdDr_patch_es2
ARCH_LIBPATHS += -L"$(TOPDIR)/arch/arm/src/lc823450"
ARCH_LIBS += $(ARCH_LIBS_OPT)--just-symbols=$(TOPDIR)/arch/arm/src/lc823450/rom_symbols.txt
LDFLAGS +=--no-wchar-size-warning
endif
# NEVER use 'override' variables
# NUTTX_EXTRA_LIBS and NUTTX_EXTRA_LIBPATHS are defined by out-of-repository
EXTRA_LIBS := $(NUTTX_EXTRA_LIBS) $(ARCH_LIBS)
EXTRA_LIBPATHS := $(NUTTX_EXTRA_LIBPATHS) $(ARCH_LIBPATHS)
configs/lc823450-xgevk/scripts/gnu-elf.ld
+139
View File
@@ -0,0 +1,139 @@
/****************************************************************************
* configs/lc823450-xgevk/scripts/gnu-elf.ld
*
* Copyright (C) 2017 Sony Corporation. All rights reserved.
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
SECTIONS
{
.text 0x00000000 :
{
_stext = . ;
*(.text)
*(.text.*)
*(.gnu.warning)
*(.stub)
*(.glue_7)
*(.glue_7t)
*(.jcr)
/* C++ support: The .init and .fini sections contain specific logic
* to manage static constructors and destructors.
*/
*(.gnu.linkonce.t.*)
*(.init) /* Old ABI */
*(.fini) /* Old ABI */
_etext = . ;
}
.ARM.extab :
{
*(.ARM.extab*)
}
.ARM.exidx :
{
*(.ARM.exidx*)
}
.rodata :
{
_srodata = . ;
*(.rodata)
*(.rodata1)
*(.rodata.*)
*(.gnu.linkonce.r*)
_erodata = . ;
}
.data :
{
_sdata = . ;
*(.data)
*(.data1)
*(.data.*)
*(.gnu.linkonce.d*)
_edata = . ;
}
/* C++ support. For each global and static local C++ object,
* GCC creates a small subroutine to construct the object. Pointers
* to these routines (not the routines themselves) are stored as
* simple, linear arrays in the .ctors section of the object file.
* Similarly, pointers to global/static destructor routines are
* stored in .dtors.
*/
.ctors :
{
_sctors = . ;
*(.ctors) /* Old ABI: Unallocated */
*(.init_array) /* New ABI: Allocated */
_edtors = . ;
}
.dtors :
{
_sdtors = . ;
*(.dtors) /* Old ABI: Unallocated */
*(.fini_array) /* New ABI: Allocated */
_edtors = . ;
}
.bss :
{
_sbss = . ;
*(.bss)
*(.bss.*)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.b*)
*(COMMON)
_ebss = . ;
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
configs/lc823450-xgevk/scripts/ld.script
+124
View File
@@ -0,0 +1,124 @@
/****************************************************************************
* configs/lc823450-xgevk/scripts/ld.script
*
* Copyright (C) 2017 Sony Corporation. All rights reserved.
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
MEMORY
{
progmem (rx) : ORIGIN = 0x02040000, LENGTH = 480K
flash (rx) : ORIGIN = 0x05008000, LENGTH = 2016K
sram (rwx) : ORIGIN = 0x02001000, LENGTH = 124K
}
OUTPUT_ARCH(arm)
ENTRY(_stext)
SECTIONS
{
.text_spif :
{
_sspif = ABSOLUTE(.);
_espif = ABSOLUTE(.);
} > flash
.text :
{
_stext = ABSOLUTE(.);
KEEP(*(.vectors))
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > progmem
.init_section :
{
_sinit = ABSOLUTE(.);
KEEP(*(.init_array .init_array.*))
_einit = ABSOLUTE(.);
} > progmem
.ARM.extab :
{
*(.ARM.extab*)
} > progmem
__exidx_start = ABSOLUTE(.);
.ARM.exidx :
{
*(.ARM.exidx*)
} > progmem
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(LOADADDR(.data));
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram AT > progmem
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
configs/lc823450-xgevk/src/Makefile
+71
View File
@@ -0,0 +1,71 @@
############################################################################
# configs/lc823450-xgevk/src/Makefile
#
# Copyright (C) 2017 Sony Corporation. All rights reserved.
# Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
-include $(TOPDIR)/Make.defs
ASRCS =
CSRCS = lc823450_boot.c lc823450_mux.c
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += lc823450_appinit.c lc823450_bringup.c
else ifeq ($(CONFIG_BOARD_INITIALIZE),y)
CSRCS += lc823450_bringup.c
endif
ifeq ($(CONFIG_LC823450_SDIF),y)
CSRCS += lc823450_sdif.c
endif
ifeq ($(CONFIG_USBMSC),y)
CSRCS += lc823450_usbmsc.c
endif
ifeq ($(CONFIG_SPI),y)
CSRCS += lc823450_spi.c
endif
ifeq ($(CONFIG_LCD_ST7565),y)
CSRCS += lc823450_st7565.c
endif
ifeq ($(CONFIG_BMA250),y)
CSRCS += lc823450_bma250.c
endif
ifeq ($(CONFIG_NETDEVICES),y)
CSRCS += lc823450_netinit.c
endif
include $(TOPDIR)/configs/Board.mk
configs/lc823450-xgevk/src/lc823450-xgevk.h
+96
View File
@@ -0,0 +1,96 @@
/****************************************************************************
* configs/lc823450-xgevk/src/lc823450-xgevk.h
*
* Copyright (C) 2017 Sony Corporation. All rights reserved.
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __CONFIGS_LC823450_XGEVK_SRC_LC823450_XGEVK_H
#define __CONFIGS_LC823450_XGEVK_SRC_LC823450_XGEVK_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Do we need to register I2C drivers on behalf of the I2C tool? */
#define HAVE_I2CTOOL 1
#if !defined(CONFIG_SYSTEM_I2CTOOL) || !defined(CONFIG_I2C_DRIVER)
# undef HAVE_I2CTOOL
#endif
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public data
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: lc823450_bringup
*
* Description:
* Bring up board features
*
****************************************************************************/
#if defined(CONFIG_LIB_BOARDCTL) || defined(CONFIG_BOARD_INITIALIZE)
int lc823450_bringup(void);
#endif
/************************************************************************************
* Name: lc823450_bma250initialize
************************************************************************************/
#ifdef CONFIG_BMA250
int lc823450_bma250initialize(FAR const char *devpath);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_LC823450_XGEVK_SRC_LC823450_XGEVK_H */
configs/lc823450-xgevk/src/lc823450-xgevk_mux.h
+629
View File
File diff suppressed because it is too large Load Diff
configs/lc823450-xgevk/src/lc823450_appinit.c
+179
View File
@@ -0,0 +1,179 @@
/****************************************************************************
* configs/lc823450-xgevk/src/lc823450_appinit.c
*
* Copyright (C) 2017 Sony Corporation. All rights reserved.
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <nuttx/board.h>
#include <nuttx/i2c/i2c_master.h>
#include "lc823450_i2c.h"
#include "lc823450-xgevk.h"
#ifdef CONFIG_LIB_BOARDCTL
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: lc823450_i2c_register
*
* Description:
* Register one I2C drivers for the I2C tool.
*
****************************************************************************/
#ifdef HAVE_I2CTOOL
static void lc823450_i2c_register(int bus)
{
FAR struct i2c_master_s *i2c;
int ret;
i2c = lc823450_i2cbus_initialize(bus);
if (i2c == NULL)
{
_err("ERROR: Failed to get I2C%d interface\n", bus);
}
else
{
ret = i2c_register(i2c, bus);
if (ret < 0)
{
_err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
lc823450_i2cbus_uninitialize(i2c);
}
}
}
#endif
/****************************************************************************
* Name: lc823450_i2ctool
*
* Description:
* Register I2C drivers for the I2C tool.
*
****************************************************************************/
#ifdef HAVE_I2CTOOL
static void lc823450_i2ctool(void)
{
#ifdef CONFIG_LC823450_I2C0
lc823450_i2c_register(0);
#endif
#ifdef CONFIG_LC823450_I2C1
lc823450_i2c_register(1);
#endif
}
#else
# define lc823450_i2ctool()
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initalization logic and the the
* matching application logic. The value cold be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
/* Register I2C drivers on behalf of the I2C tool */
lc823450_i2ctool();
#ifdef CONFIG_MTD_LC823450
/* Initialize eMMC */
int ret = lc823450_mtd_initialize(CONFIG_MTD_DEVNO_EMMC);
if (ret != OK)
{
_err("Failed to initialize eMMC: ret=%d\n", ret);
}
#ifdef CONFIG_LC823450_SDIF_SDC
/* Initialize uSD */
ret = lc823450_mtd_initialize(CONFIG_MTD_DEVNO_SDC);
if (ret != OK)
{
_err("Failed to initialize uSD: ret=%d\n", ret);
}
#endif /* CONFIG_LC823450_SDIF_SDC */
#endif /* CONFIG_MTD_LC823450 */
#ifndef CONFIG_BOARD_INITIALIZE
/* Perform board initialization */
return lc823450_bringup();
#else
return OK;
#endif
}
#endif /* CONFIG_LIB_BOARDCTL */
configs/lc823450-xgevk/src/lc823450_boot.c
+79
View File
@@ -0,0 +1,79 @@
/****************************************************************************
* configs/lc823450-xgevk/src/lc823450_boot.c
*
* Copyright (C) 2017 Sony Corporation. All rights reserved.
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_initialize
*
* Description:
* If CONFIG_BOARD_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_initialize(). board_initialize() will be
* called immediately after up_intitialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_INITIALIZE
void board_initialize(void)
{
/* Perform board initialization */
(void)lc823450_bringup();
}
#endif /* CONFIG_BOARD_INITIALIZE */
configs/lc823450-xgevk/src/lc823450_bringup.c
+95
View File
@@ -0,0 +1,95 @@
/****************************************************************************
* configs/lc823450-xgevk/src/lc823450_bringup.c
*
* Copyright (C) 2017 Sony Corporation. All rights reserved.
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <sys/mount.h>
#include <stdbool.h>
#include <syslog.h>
#include "lc823450-xgevk.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: lc823450_bringup
*
* Description:
* Bring up board features
*
****************************************************************************/
int lc823450_bringup(void)
{
int ret;
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = mount(NULL, "/proc", "procfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret);
}
#endif
#ifdef CONFIG_BMA250
lc823450_bma250initialize("/dev/accel");
#endif
/* If we got here then perhaps not all initialization was successful, but
* at least enough succeeded to bring-up NSH with perhaps reduced
* capabilities.
*/
UNUSED(ret);
return OK;
}

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