STM32 F7: Port the STM32 F7

arch/arm/src/stm32f7/Kconfig

@@ -90,6 +90,10 @@ config STM32F7_DAC
 	bool
 	default n
 
+config STM32F7_DMA
+	bool
+	default n
+
 config STM32F7_I2C
 	bool
 	default n
@@ -155,11 +159,13 @@ config STM32F7_CRYP
 config STM32F7_DMA1
 	bool "DMA1"
 	default n
+	select STM32F7_DMA
 	select ARCH_DMA
 
 config STM32F7_DMA2
 	bool "DMA2"
 	default n
+	select STM32F7_DMA
 	select ARCH_DMA
 
 config STM32F7_DAC1

arch/arm/src/stm32f7/Make.defs

@@ -118,6 +118,10 @@ CHIP_CSRCS += stm32_procfs_dtcm.c
 endif
 endif
 
+ifeq ($(CONFIG_STM32F7_DMA),y)
+CHIP_CSRCS += stm32_dma.c
+endif
+
 ifeq ($(CONFIG_STM32_PWR),y)
 CHIP_CSRCS += stm32_exti_pwr.c
 endif

arch/arm/src/stm32f7/stm32_dma.h

@@ -70,7 +70,9 @@ typedef FAR void *DMA_HANDLE;
 
 /* Description:
  *   This is the type of the callback that is used to inform the user of the the
- *   completion of the DMA.
+ *   completion of the DMA.  NOTE:  The DMA module does *NOT* perform any cache
+ *   operations.  It is the responsibility of the DMA client to invalidate DMA
+ *   buffers after completion of the DMA RX operations.
  *
  * Input Parameters:
  *   handle - Refers tot he DMA channel or stream
@@ -190,7 +192,9 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
  * Name: stm32_dmastart
  *
  * Description:
- *   Start the DMA transfer
+ *   Start the DMA transfer.  NOTE:  The DMA module does *NOT* perform any
+ *   cache operations.  It is the responsibility of the DMA client to clean
+ *   DMA buffers after staring of the DMA TX operations.
  *
  * Assumptions:
  *   - DMA handle allocated by stm32_dmachannel()

arch/arm/src/stm32f7/stm32_ethernet.c

@@ -77,7 +77,7 @@
 
 /* STM32F7_NETHERNET determines the number of physical interfaces that can
  * be supported by the hardware.  CONFIG_STM32F7_ETHMAC will defined if
- * any STM32F7 Ethernet support is enabled in the configuratino.
+ * any STM32F7 Ethernet support is enabled in the configuration.
  */
 
 #if STM32F7_NETHERNET > 0 && defined(CONFIG_STM32F7_ETHMAC)