mirror of
https://github.com/apache/nuttx.git
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Add support for SAMV7 DACC module
This commit is contained in:
Piotr Mienkowski
committed by
Gregory Nutt
Gregory Nutt
parent
32ebeb15b4
commit
053aea552f
@@ -214,3 +214,7 @@ endif
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ifeq ($(CONFIG_SAMV7_PROGMEM),y)
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CHIP_CSRCS += sam_progmem.c
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endif
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ifneq (,$(findstring y,$(CONFIG_SAMV7_DAC0) $(CONFIG_SAMV7_DAC1)))
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CHIP_CSRCS += sam_dac.c
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endif
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@@ -0,0 +1,226 @@
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/****************************************************************************************
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* arch/arm/src/samv7/chip/sam_dacc.h
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* Digital-to-Analog Converter Controller (DACC) for the SAMV7
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAMV7_CHIP_SAM_DACC_H
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#define __ARCH_ARM_SRC_SAMV7_CHIP_SAM_DACC_H
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/****************************************************************************************
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* Included Files
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****************************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#include "chip/sam_memorymap.h"
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/****************************************************************************************
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* Pre-processor Definitions
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****************************************************************************************/
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/* DACC register offsets *****************************************************************/
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#define SAM_DACC_CR_OFFSET 0x0000 /* Control Register */
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#define SAM_DACC_MR_OFFSET 0x0004 /* Mode Register */
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#define SAM_DACC_TRIGR_OFFSET 0x0008 /* Trigger Register */
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#define SAM_DACC_CHER_OFFSET 0x0010 /* Channel Enable Register */
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#define SAM_DACC_CHDR_OFFSET 0x0014 /* Channel Disable Register */
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#define SAM_DACC_CHSR_OFFSET 0x0018 /* Channel Status Register */
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#define SAM_DACC_CDR0_OFFSET 0x001c /* Conversion Data Register 0 */
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#define SAM_DACC_CDR1_OFFSET 0x0020 /* Conversion Data Register 1 */
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#define SAM_DACC_IER_OFFSET 0x0024 /* Interrupt Enable Register */
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#define SAM_DACC_IDR_OFFSET 0x0028 /* Interrupt Disable Register */
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#define SAM_DACC_IMR_OFFSET 0x002c /* Interrupt Mask Register */
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#define SAM_DACC_ISR_OFFSET 0x0030 /* Interrupt Status Register */
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#define SAM_DACC_ACR_OFFSET 0x0094 /* Analog Current Register */
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#define SAM_DACC_WPMR_OFFSET 0x00e4 /* Write Protect Mode register */
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#define SAM_DACC_WPSR_OFFSET 0x00e8 /* Write Protect Status register */
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/* DACC register addresses **************************************************************/
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#define SAM_DACC_CR (SAM_DACC_BASE+SAM_DACC_CR_OFFSET)
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#define SAM_DACC_MR (SAM_DACC_BASE+SAM_DACC_MR_OFFSET)
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#define SAM_DACC_TRIGR (SAM_DACC_BASE+SAM_DACC_TRIGR_OFFSET)
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#define SAM_DACC_CHER (SAM_DACC_BASE+SAM_DACC_CHER_OFFSET)
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#define SAM_DACC_CHDR (SAM_DACC_BASE+SAM_DACC_CHDR_OFFSET)
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#define SAM_DACC_CHSR (SAM_DACC_BASE+SAM_DACC_CHSR_OFFSET)
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#define SAM_DACC_CDR0 (SAM_DACC_BASE+SAM_DACC_CDR0_OFFSET)
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#define SAM_DACC_CDR1 (SAM_DACC_BASE+SAM_DACC_CDR1_OFFSET)
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#define SAM_DACC_IER (SAM_DACC_BASE+SAM_DACC_IER_OFFSET)
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#define SAM_DACC_IDR (SAM_DACC_BASE+SAM_DACC_IDR_OFFSET)
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#define SAM_DACC_IMR (SAM_DACC_BASE+SAM_DACC_IMR_OFFSET)
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#define SAM_DACC_ISR (SAM_DACC_BASE+SAM_DACC_ISR_OFFSET)
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#define SAM_DACC_ACR (SAM_DACC_BASE+SAM_DACC_ACR_OFFSET)
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#define SAM_DACC_WPMR (SAM_DACC_BASE+SAM_DACC_WPMR_OFFSET)
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#define SAM_DACC_WPSR (SAM_DACC_BASE+SAM_DACC_WPSR_OFFSET)
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/* DACC register bit definitions ********************************************************/
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/* Control Register */
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#define DACC_CR_SWRST (1 << 0) /* Bit 0: Software reset */
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/* Mode Register */
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#define DACC_MR_MAXS0 (1 << 0) /* Max Speed Mode for Channel 0 */
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# define DACC_MR_MAXS0_TRIG_EVENT (0 << 0) /* External trigger mode or Free-running mode enabled */
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# define DACC_MR_MAXS0_MAXIMUM (1 << 0) /* Max speed mode enabled */
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#define DACC_MR_MAXS1 (1 << 1) /* Max Speed Mode for Channel 1 */
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# define DACC_MR_MAXS1_TRIG_EVENT (0 << 1) /* External trigger mode or Free-running mode enabled */
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# define DACC_MR_MAXS1_MAXIMUM (1 << 1) /* Max speed mode enabled */
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#define DACC_MR_WORD (1 << 4) /* Word Transfer Mode */
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# define DACC_MR_WORD_DISABLED (0 << 4) /* One data to convert is written to the FIFO per access to DACC */
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# define DACC_MR_WORD_ENABLED (1 << 4) /* Two data to convert are written to the FIFO per access to DACC */
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#define DACC_MR_ZERO (1 << 5) /* Must always be written to 0 */
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#define DACC_MR_DIFF (1 << 23) /* Differential Mode */
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# define DACC_MR_DIFF_DISABLED (0 << 23) /* DAC0 and DAC1 are single-ended outputs */
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# define DACC_MR_DIFF_ENABLED (1 << 23) /* DACP and DACN are differential outputs. The differential level is configured by the channel 0 value. */
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#define DACC_MR_PRESCALER_SHIFT (24)
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#define DACC_MR_PRESCALER_MASK (0xfu << DACC_MR_PRESCALER_SHIFT) /* Peripheral Clock to DAC Clock Ratio */
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#define DACC_MR_PRESCALER(value) ((DACC_MR_PRESCALER_MASK & ((value) << DACC_MR_PRESCALER_SHIFT)))
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# define DACC_MR_PRESCALER_2 (0 << DACC_MR_PRESCALER_SHIFT) /* 2 periods of DAC Clock */
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# define DACC_MR_PRESCALER_3 (1 << DACC_MR_PRESCALER_SHIFT) /* 3 periods of DAC Clock */
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# define DACC_MR_PRESCALER_4 (2 << DACC_MR_PRESCALER_SHIFT) /* 4 periods of DAC Clock */
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# define DACC_MR_PRESCALER_5 (3 << DACC_MR_PRESCALER_SHIFT) /* 5 periods of DAC Clock */
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# define DACC_MR_PRESCALER_6 (4 << DACC_MR_PRESCALER_SHIFT) /* 6 periods of DAC Clock */
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# define DACC_MR_PRESCALER_7 (5 << DACC_MR_PRESCALER_SHIFT) /* 7 periods of DAC Clock */
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# define DACC_MR_PRESCALER_8 (6 << DACC_MR_PRESCALER_SHIFT) /* 8 periods of DAC Clock */
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# define DACC_MR_PRESCALER_9 (7 << DACC_MR_PRESCALER_SHIFT) /* 9 periods of DAC Clock */
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# define DACC_MR_PRESCALER_10 (8 << DACC_MR_PRESCALER_SHIFT) /* 10 periods of DAC Clock */
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# define DACC_MR_PRESCALER_11 (9 << DACC_MR_PRESCALER_SHIFT) /* 11 periods of DAC Clock */
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# define DACC_MR_PRESCALER_12 (10 << DACC_MR_PRESCALER_SHIFT) /* 12 periods of DAC Clock */
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# define DACC_MR_PRESCALER_13 (11 << DACC_MR_PRESCALER_SHIFT) /* 13 periods of DAC Clock */
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# define DACC_MR_PRESCALER_14 (12 << DACC_MR_PRESCALER_SHIFT) /* 14 periods of DAC Clock */
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# define DACC_MR_PRESCALER_15 (13 << DACC_MR_PRESCALER_SHIFT) /* 15 periods of DAC Clock */
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# define DACC_MR_PRESCALER_16 (14 << DACC_MR_PRESCALER_SHIFT) /* 16 periods of DAC Clock */
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# define DACC_MR_PRESCALER_17 (15 << DACC_MR_PRESCALER_SHIFT) /* 17 periods of DAC Clock */
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/* Trigger Register */
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#define DACC_TRIGR_TRGEN0 (1 << 0) /* Trigger Enable of Channel 0 */
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# define DACC_TRIGR_TRGEN0_DIS (0 << 0) /* External trigger mode disabled. DACC is in Free-running mode or Max speed mode. */
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# define DACC_TRIGR_TRGEN0_EN (1 << 0) /* External trigger mode enabled. */
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#define DACC_TRIGR_TRGEN1 (1 << 1) /* Trigger Enable of Channel 1 */
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# define DACC_TRIGR_TRGEN1_DIS (0 << 1) /* External trigger mode disabled. DACC is in Free-running mode or Max speed mode. */
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# define DACC_TRIGR_TRGEN1_EN (1 << 1) /* External trigger mode enabled. */
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#define DACC_TRIGR_TRGSEL0_SHIFT (4)
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#define DACC_TRIGR_TRGSEL0_MASK (0x7u << DACC_TRIGR_TRGSEL0_SHIFT) /* Trigger Selection of Channel 0 */
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#define DACC_TRIGR_TRGSEL0(value) ((DACC_TRIGR_TRGSEL0_MASK & ((value) << DACC_TRIGR_TRGSEL0_SHIFT)))
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# define DACC_TRIGR_TRGSEL0_DATRG (0 << 4) /* DATRG output */
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# define DACC_TRIGR_TRGSEL0_TC0 (1 << 4) /* TC0 output */
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# define DACC_TRIGR_TRGSEL0_TC1 (2 << 4) /* TC1 output */
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# define DACC_TRIGR_TRGSEL0_TC2 (3 << 4) /* TC2 output */
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# define DACC_TRIGR_TRGSEL0_PWM0EV0 (4 << 4) /* PWM0 event 0 */
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# define DACC_TRIGR_TRGSEL0_PWM0EV1 (5 << 4) /* PWM0 event 1 */
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# define DACC_TRIGR_TRGSEL0_PWM1EV0 (6 << 4) /* PWM1 event 0 */
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# define DACC_TRIGR_TRGSEL0_PWM1EV1 (7 << 4) /* PWM1 event 1 */
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#define DACC_TRIGR_TRGSEL1_SHIFT (8)
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#define DACC_TRIGR_TRGSEL1_MASK (0x7u << DACC_TRIGR_TRGSEL1_SHIFT) /* Trigger Selection of Channel 1 */
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#define DACC_TRIGR_TRGSEL1(value) ((DACC_TRIGR_TRGSEL1_MASK & ((value) << DACC_TRIGR_TRGSEL1_SHIFT)))
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# define DACC_TRIGR_TRGSEL1_DATRG (0 << 8) /* DATRG output */
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# define DACC_TRIGR_TRGSEL1_TC0 (1 << 8) /* TC0 output */
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# define DACC_TRIGR_TRGSEL1_TC1 (2 << 8) /* TC1 output */
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# define DACC_TRIGR_TRGSEL1_TC2 (3 << 8) /* TC2 output */
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# define DACC_TRIGR_TRGSEL1_PWM0EV0 (4 << 8) /* PWM0 event 0 */
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# define DACC_TRIGR_TRGSEL1_PWM0EV1 (5 << 8) /* PWM0 event 1 */
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# define DACC_TRIGR_TRGSEL1_PWM1EV0 (6 << 8) /* PWM1 event 0 */
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# define DACC_TRIGR_TRGSEL1_PWM1EV1 (7 << 8) /* PWM1 event 1 */
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#define DACC_TRIGR_OSR0_SHIFT (16)
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#define DACC_TRIGR_OSR0_MASK (0x7u << DACC_TRIGR_OSR0_SHIFT) /* Over Sampling Ratio of Channel 0 */
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#define DACC_TRIGR_OSR0(value) ((DACC_TRIGR_OSR0_MASK & ((value) << DACC_TRIGR_OSR0_SHIFT)))
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# define DACC_TRIGR_OSR0_OSR_1 (0 << 16) /* OSR = 1 */
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# define DACC_TRIGR_OSR0_OSR_2 (1 << 16) /* OSR = 2 */
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# define DACC_TRIGR_OSR0_OSR_4 (2 << 16) /* OSR = 4 */
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# define DACC_TRIGR_OSR0_OSR_8 (3 << 16) /* OSR = 8 */
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# define DACC_TRIGR_OSR0_OSR_16 (4 << 16) /* OSR = 16 */
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# define DACC_TRIGR_OSR0_OSR_32 (5 << 16) /* OSR = 32 */
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#define DACC_TRIGR_OSR1_SHIFT (20)
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#define DACC_TRIGR_OSR1_MASK (0x7u << DACC_TRIGR_OSR1_SHIFT) /* Over Sampling Ratio of Channel 1 */
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#define DACC_TRIGR_OSR1(value) ((DACC_TRIGR_OSR1_MASK & ((value) << DACC_TRIGR_OSR1_SHIFT)))
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# define DACC_TRIGR_OSR1_OSR_1 (0 << 20) /* OSR = 1 */
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# define DACC_TRIGR_OSR1_OSR_2 (1 << 20) /* OSR = 2 */
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# define DACC_TRIGR_OSR1_OSR_4 (2 << 20) /* OSR = 4 */
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# define DACC_TRIGR_OSR1_OSR_8 (3 << 20) /* OSR = 8 */
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# define DACC_TRIGR_OSR1_OSR_16 (4 << 20) /* OSR = 16 */
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# define DACC_TRIGR_OSR1_OSR_32 (5 << 20) /* OSR = 32 */
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/* Channel Enable, Channel Disable, and Channel Status Registers */
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#define DACC_CH0 (1 << 0) /* Channel 0 */
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#define DACC_CH1 (1 << 1) /* Channel 1 */
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#define DACC_CHSR_DACRDY0 (1 << 8) /* DAC Ready Flag */
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#define DACC_CHSR_DACRDY1 (1 << 9) /* DAC Ready Flag */
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/* Conversion Data Register -- 32-bit data */
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#define DACC_CDR_DATA0_SHIFT (0)
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#define DACC_CDR_DATA0_MASK (0xffffu << DACC_CDR_DATA0_SHIFT) /* Data to Convert for channel 0 */
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#define DACC_CDR_DATA0(value) ((DACC_CDR_DATA0_MASK & ((value) << DACC_CDR_DATA0_SHIFT)))
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#define DACC_CDR_DATA1_SHIFT (16)
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#define DACC_CDR_DATA1_MASK (0xffffu << DACC_CDR_DATA1_SHIFT) /* Data to Convert for channel 1 */
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#define DACC_CDR_DATA1(value) ((DACC_CDR_DATA1_MASK & ((value) << DACC_CDR_DATA1_SHIFT)))
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/* Interrupt Enable, Interrupt Disable, Interrupt Mask, and Interrupt Status Register */
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#define DACC_INT_TXRDY0 (1 << 0) /* Transmit Ready Interrupt of channel 0 */
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#define DACC_INT_TXRDY1 (1 << 1) /* Transmit Ready Interrupt of channel 1 */
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#define DACC_INT_EOC0 (1 << 4) /* End of Conversion Interrupt of channel 0 */
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#define DACC_INT_EOC1 (1 << 5) /* End of Conversion Interrupt of channel 1 */
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#define DACC_INT_ALL (0xffffffffu) /* All interrupts */
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/* Analog Current Register */
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#define DACC_ACR_IBCTLCH0_SHIFT (0)
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#define DACC_ACR_IBCTLCH0_MASK (0x3u << DACC_ACR_IBCTLCH0_SHIFT) /* Analog Output Current Control */
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#define DACC_ACR_IBCTLCH0(value) ((DACC_ACR_IBCTLCH0_MASK & ((value) << DACC_ACR_IBCTLCH0_SHIFT)))
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#define DACC_ACR_IBCTLCH1_SHIFT (2)
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#define DACC_ACR_IBCTLCH1_MASK (0x3u << DACC_ACR_IBCTLCH1_SHIFT) /* Analog Output Current Control */
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#define DACC_ACR_IBCTLCH1(value) ((DACC_ACR_IBCTLCH1_MASK & ((value) << DACC_ACR_IBCTLCH1_SHIFT)))
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/* Write Protect Mode register */
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#define DACC_WPMR_WPEN (1 << 0) /* Write Protection Enable */
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#define DACC_WPMR_WPKEY_SHIFT (8)
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#define DACC_WPMR_WPKEY_MASK (0xffffffu << DACC_WPMR_WPKEY_SHIFT) /* Write Protect Key */
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#define DACC_WPMR_WPKEY(value) ((DACC_WPMR_WPKEY_MASK & ((value) << DACC_WPMR_WPKEY_SHIFT)))
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# define DACC_WPMR_WPKEY_PASSWD (0x444143u << 8) /* Writing any other value in this field aborts the write operation of bit WPEN. Always reads as 0. */
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/* Write Protect Status register */
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#define DACC_WPSR_WPVS (1 << 0) /* Write Protection Violation Status */
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#define DACC_WPSR_WPVSRC_SHIFT (8)
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#define DACC_WPSR_WPVSRC_MASK (0xffu << DACC_WPSR_WPVSRC_SHIFT) /* Write Protection Violation Source */
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#endif /* __ARCH_ARM_SRC_SAMV7_CHIP_SAM_DACC_H */
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,129 @@
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/****************************************************************************
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* arch/arm/src/samv7/sam_dac.h
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAMV7_SAM_DAC_H
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#define __ARCH_ARM_SRC_SAMV7_SAM_DAC_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/analog/dac.h>
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#include "chip/sam_dacc.h"
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#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1)
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/****************************************************************************
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* Pre-processor definitions
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****************************************************************************/
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/* Default configuration settings may be overridden in the board configuration
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* file.
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*/
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#if !defined(CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE)
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# define CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE 8
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#elif CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE > 65535
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# warning "CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE value does not fit into uint16_t, limiting it to 65535"
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# undef CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE
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# define CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE (65535)
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#endif
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#if !defined(CONFIG_SAMV7_DAC_TRIGGER_FREQUENCY)
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# define CONFIG_SAMV7_DAC_TRIGGER_FREQUENCY 8000
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#endif
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/* PRESCAL = (MCK / DACClock) - 2
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*
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* Given:
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* MCK = 150MHz
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* DACClock = 16MHz
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* Then:
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* PRESCAL = 7
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*/
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#if !defined(CONFIG_SAMV7_DAC_PRESCAL)
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#define CONFIG_SAMV7_DAC_PRESCAL (7)
|
||||
#elif CONFIG_SAMV7_DAC_PRESCAL > 15
|
||||
# warning "Maximum valid CONFIG_SAMV7_DAC_PRESCAL value is 15"
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_SAMV7_DAC_TRIGGER_SELECT)
|
||||
#define CONFIG_SAMV7_DAC_TRIGGER_SELECT (3)
|
||||
#elif CONFIG_SAMV7_DAC_TRIGGER_SELECT < 1 || CONFIG_SAMV7_DAC_TRIGGER_SELECT > 3
|
||||
# warning "Only CONFIG_SAMV7_DAC_TRIGGER_SELECT == [1-3] is supported"
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_dac_initialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the DAC
|
||||
*
|
||||
* Input Parameters:
|
||||
* intf - The DAC interface number.
|
||||
*
|
||||
* Returned Value:
|
||||
* Valid DAC device structure reference on success; a NULL on failure
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
struct dac_dev_s;
|
||||
FAR struct dac_dev_s *sam_dac_initialize(int intf);
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_SAMV7_DAC0 || CONFIG_SAMV7_DAC1 */
|
||||
#endif /* __ARCH_ARM_SRC_SAMV7_SAM_DAC_H */
|
||||
@@ -90,4 +90,8 @@ endif
|
||||
endif
|
||||
endif
|
||||
|
||||
ifneq (,$(findstring y,$(CONFIG_SAMV7_DAC0) $(CONFIG_SAMV7_DAC1)))
|
||||
CSRCS += sam_dac.c
|
||||
endif
|
||||
|
||||
include $(TOPDIR)/configs/Board.mk
|
||||
|
||||
@@ -329,6 +329,14 @@ int sam_bringup(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1)
|
||||
ret = sam_dacdev_initialize();
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Initialization of the DAC module failed: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* If we got here then perhaps not all initialization was successful, but
|
||||
* at least enough succeeded to bring-up NSH with perhaps reduced
|
||||
* capabilities.
|
||||
|
||||
@@ -0,0 +1,123 @@
|
||||
/************************************************************************************
|
||||
* configs/same70-xplained/src/sam_dac.c
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "up_arch.h"
|
||||
#include "chip.h"
|
||||
#include "sam_dac.h"
|
||||
#include "same70-xplained.h"
|
||||
|
||||
#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1)
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: sam_dacdev_initialize
|
||||
*
|
||||
* Description:
|
||||
* Called to configure DAC peripheral module and register DAC device driver
|
||||
************************************************************************************/
|
||||
|
||||
int sam_dacdev_initialize(void)
|
||||
{
|
||||
static bool initialized = false;
|
||||
struct dac_dev_s *dac;
|
||||
int ret;
|
||||
|
||||
/* Check if we have already initialized */
|
||||
|
||||
if (!initialized)
|
||||
{
|
||||
#ifdef CONFIG_SAMV7_DAC0
|
||||
/* Get an instance of the DAC0 interface */
|
||||
|
||||
dac = sam_dac_initialize(0);
|
||||
if (dac == NULL)
|
||||
{
|
||||
aerr("ERROR: Failed to get DAC0 interface\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Register the DAC driver at "/dev/dac0" */
|
||||
|
||||
ret = dac_register("/dev/dac0", dac);
|
||||
if (ret < 0)
|
||||
{
|
||||
aerr("ERROR: dac_register failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SAMV7_DAC1
|
||||
/* Get an instance of the DAC1 interface */
|
||||
|
||||
dac = sam_dac_initialize(1);
|
||||
if (dac == NULL)
|
||||
{
|
||||
aerr("ERROR: Failed to get DAC1 interface\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Register the DAC driver at "/dev/dac1" */
|
||||
|
||||
ret = dac_register("/dev/dac1", dac);
|
||||
if (ret < 0)
|
||||
{
|
||||
aerr("ERROR: dac_register failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
/* Now we are initialized */
|
||||
|
||||
initialized = true;
|
||||
}
|
||||
return OK;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SAMV7_DAC0 || CONFIG_SAMV7_DAC1 */
|
||||
@@ -349,6 +349,18 @@ void sam_sdram_config(void);
|
||||
int sam_bringup(void);
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Name: sam_dacdev_initialize
|
||||
*
|
||||
* Description:
|
||||
* Called to configure DAC peripheral module
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1)
|
||||
int sam_dacdev_initialize(void);
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Name: sam_spidev_initialize
|
||||
*
|
||||
|
||||
@@ -478,6 +478,7 @@ static int dac_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
||||
int dac_txdone(FAR struct dac_dev_s *dev)
|
||||
{
|
||||
int ret = -ENOENT;
|
||||
int sval;
|
||||
|
||||
/* Verify that the xmit FIFO is not empty */
|
||||
|
||||
@@ -497,7 +498,11 @@ int dac_txdone(FAR struct dac_dev_s *dev)
|
||||
{
|
||||
/* Inform any waiting threads that new xmit space is available */
|
||||
|
||||
ret = sem_post(&dev->ad_xmit.af_sem);
|
||||
ret = sem_getvalue(&dev->ad_xmit.af_sem, &sval);
|
||||
if (ret == OK && sval <= 0)
|
||||
{
|
||||
ret = sem_post(&dev->ad_xmit.af_sem);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user