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drivers/eeprom: Set the bus frequency
Add EEPIOC_SETSPEED ioctl acting like the MTDIOC_SETSPEED ioctl. The default frequency is settable in the Kconfig. Add xx25xx SPI delay control configurations. Signed-off-by: Antoine Juckler <6445757+ajuckler@users.noreply.github.com>
This commit is contained in:
committed by
Xiang Xiao
parent
df3fe0e16f
commit
02db473e97
@@ -155,7 +155,15 @@ IOCTL Commands
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The full list of ``ioctl()`` commands can be found in
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``include/nuttx/eeprom/eeprom.h``.
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- ``EEPIOC_GEOMETRY``: Get the EEPROM geometry
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- ``EEPIOC_GEOMETRY``
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*Argument:* ``struct eeprom_geometry_s *``
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Get the EEPROM geometry
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- ``EEPIOC_SETSPEED``
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*Argument:* ``uint32_t``
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Set the SPI/I2C bus frequency
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File Systems
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============
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+38
-4
@@ -24,12 +24,45 @@ if SPI_EE_25XX
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config EE25XX_SPIMODE
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int "SPI mode (0-3)"
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default 0
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depends on SPI_EE_25XX
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config EE25XX_FREQUENCY
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int "SPI EEPROM SCK frequency"
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default 10000000
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depends on SPI_EE_25XX
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---help---
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Default SPI bus frequency, it can be overwritten at runtime using the
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EEPIOC_SETSPEED ioctl. See eeprom/eeprom.h.
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config EE25XX_START_DELAY
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int "SPI start delay"
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depends on SPI_DELAY_CONTROL
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range 0 1000000
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default 5000
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---help---
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The delay between CS active and first CLK. In ns.
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config EE25XX_STOP_DELAY
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int "SPI stop delay"
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depends on SPI_DELAY_CONTROL
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range 0 1000000
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default 5000
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---help---
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The delay between last CLK and CS inactive. In ns.
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config EE25XX_CS_DELAY
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int "SPI CS delay"
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depends on SPI_DELAY_CONTROL
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range 0 1000000
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default 5000
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---help---
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The delay between CS inactive and CS active again. In ns.
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config EE25XX_IFDELAY
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int "SPI interface delay"
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depends on SPI_DELAY_CONTROL
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range 0 1000000
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default 5000
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---help---
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The delay between frames. In ns.
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endif # SPI_EE_25XX
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@@ -46,12 +79,13 @@ if I2C_EE_24XX
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config EE24XX_FREQUENCY
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int "I2C EEPROM frequency (100000 or 400000)"
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default 100000
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depends on I2C_EE_24XX
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---help---
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Default I2C bus frequency, it can be overwritten at runtime using the
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EEPIOC_SETSPEED ioctl. See eeprom/eeprom.h.
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config AT24CS_UUID
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bool "Device driver support for Atmel AT24CSxx UUID"
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default n
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depends on I2C_EE_24XX
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---help---
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The Atmel AT24CSxx family have a 128-bit UUID which appears as
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another I2C slave whose address is offset from the EEPROM by +8.
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+22
-15
@@ -96,10 +96,6 @@
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* Pre-processor Definitions
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****************************************************************************/
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#ifndef CONFIG_EE24XX_FREQUENCY
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# define CONFIG_EE24XX_FREQUENCY 100000
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#endif
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#define UUID_SIZE 16
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/****************************************************************************
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@@ -124,23 +120,23 @@ struct ee24xx_dev_s
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{
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/* Bus management */
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FAR struct i2c_master_s *i2c; /* I2C device where the EEPROM is attached */
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uint32_t freq; /* I2C bus speed */
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uint8_t addr; /* 7-bit unshifted I2C device address */
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FAR struct i2c_master_s *i2c; /* I2C device where the EEPROM is attached */
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uint32_t freq; /* I2C bus speed */
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uint8_t addr; /* 7-bit unshifted I2C device address */
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/* Driver management */
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mutex_t lock; /* file write access serialization */
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uint8_t refs; /* Nr of times the device has been opened */
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bool readonly; /* Flags */
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mutex_t lock; /* file write access serialization */
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uint8_t refs; /* Nr of times the device has been opened */
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bool readonly; /* Flags */
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/* Expanded from geometry */
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uint32_t size; /* total bytes in device */
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uint16_t pgsize; /* write block size, in bytes */
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uint16_t addrlen; /* number of bytes in data addresses */
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uint16_t haddrbits; /* Number of bits in high address part */
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uint16_t haddrshift; /* bit-shift of high address part */
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uint32_t size; /* total bytes in device */
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uint16_t pgsize; /* write block size, in bytes */
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uint16_t addrlen; /* number of bytes in data addresses */
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uint16_t haddrbits; /* Number of bits in high address part */
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uint16_t haddrshift; /* bit-shift of high address part */
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};
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/****************************************************************************
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@@ -807,6 +803,17 @@ static int ee24xx_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
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}
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break;
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case EEPIOC_SETSPEED:
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{
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ret = nxmutex_lock(&eedev->lock);
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if (ret == OK)
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{
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eedev->freq = (uint32_t)arg;
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nxmutex_unlock(&eedev->lock);
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}
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}
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break;
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default:
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ret = -ENOTTY;
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}
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+59
-29
@@ -120,10 +120,6 @@
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* Pre-processor Definitions
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****************************************************************************/
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#ifndef CONFIG_EE25XX_SPIMODE
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# define CONFIG_EE25XX_SPIMODE 0
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#endif
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/* EEPROM commands
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* High bit of low nibble used for A8 in 25xx040/at25040 products
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*/
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@@ -176,15 +172,18 @@ struct ee25xx_geom_s
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struct ee25xx_dev_s
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{
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struct spi_dev_s *spi; /* SPI device where the EEPROM is attached */
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uint16_t devid; /* SPI device ID to manage CS lines in board */
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uint32_t size; /* in bytes, expanded from geometry */
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uint16_t pgsize; /* write block size, in bytes, expanded from geometry */
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uint32_t secsize; /* write sector size, in bytes, expanded from geometry */
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uint16_t addrlen; /* number of BITS in data addresses */
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mutex_t lock; /* file access serialization */
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uint8_t refs; /* The number of times the device has been opened */
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uint8_t readonly; /* Flags */
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FAR struct spi_dev_s *spi; /* SPI device where the EEPROM is attached */
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uint16_t devid; /* SPI device ID to manage CS lines in board */
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uint32_t freq; /* SPI bus frequency in Hz */
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uint32_t size; /* in bytes, expanded from geometry */
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uint16_t pgsize; /* write block size, in bytes, expanded from geometry */
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uint32_t secsize; /* write sector size, in bytes, expanded from geometry */
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uint16_t addrlen; /* number of BITS in data addresses */
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mutex_t lock; /* file access serialization */
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uint8_t refs; /* The number of times the device has been opened */
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uint8_t readonly; /* Flags */
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};
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/****************************************************************************
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@@ -297,9 +296,16 @@ static const struct file_operations g_ee25xx_fops =
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/****************************************************************************
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* Name: ee25xx_lock
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*
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* Description:
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* Lock the SPI bus associated with the driver, set its mode and frequency
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*
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* Input Parameters
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* priv - Device structure
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*
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****************************************************************************/
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static void ee25xx_lock(FAR struct spi_dev_s *dev)
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static void ee25xx_lock(FAR struct ee25xx_dev_s *priv)
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{
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/* On SPI buses where there are multiple devices, it will be necessary to
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* lock SPI to have exclusive access to the buses for a sequence of
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@@ -310,7 +316,7 @@ static void ee25xx_lock(FAR struct spi_dev_s *dev)
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* bus is unlocked.
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*/
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SPI_LOCK(dev, true);
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SPI_LOCK(priv->spi, true);
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/* After locking the SPI bus, the we also need call the setfrequency,
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* setbits, and setmode methods to make sure that the SPI is properly
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@@ -318,19 +324,31 @@ static void ee25xx_lock(FAR struct spi_dev_s *dev)
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* have been left in an incompatible state.
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*/
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SPI_SETMODE(dev, CONFIG_EE25XX_SPIMODE);
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SPI_SETBITS(dev, 8);
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SPI_HWFEATURES(dev, 0);
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SPI_SETFREQUENCY(dev, CONFIG_EE25XX_FREQUENCY);
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SPI_SETMODE(priv->spi, CONFIG_EE25XX_SPIMODE);
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SPI_SETBITS(priv->spi, 8);
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SPI_HWFEATURES(priv->spi, 0);
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SPI_SETFREQUENCY(priv->spi, priv->freq);
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#ifdef CONFIG_SPI_DELAY_CONTROL
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SPI_SETDELAY(priv->spi, CONFIG_EE25XX_START_DELAY,
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CONFIG_EE25XX_STOP_DELAY, CONFIG_EE25XX_CS_DELAY,
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CONFIG_EE25XX_IFDELAY);
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#endif
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}
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/****************************************************************************
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* Name: ee25xx_unlock
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*
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* Description:
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* Unlock the SPI bus associated with the driver
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*
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* Input Parameters:
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* priv - Device structure
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*
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****************************************************************************/
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static inline void ee25xx_unlock(FAR struct spi_dev_s *dev)
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static inline void ee25xx_unlock(FAR struct ee25xx_dev_s *priv)
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{
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SPI_LOCK(dev, false);
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SPI_LOCK(priv->spi, false);
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}
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/****************************************************************************
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@@ -390,7 +408,7 @@ static void ee25xx_waitwritecomplete(struct ee25xx_dev_s *priv)
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{
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/* Select this FLASH part */
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ee25xx_lock(priv->spi);
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ee25xx_lock(priv);
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SPI_SELECT(priv->spi, SPIDEV_EEPROM(priv->devid), true);
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/* Send "Read Status Register (RDSR)" command */
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@@ -406,7 +424,7 @@ static void ee25xx_waitwritecomplete(struct ee25xx_dev_s *priv)
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/* Deselect the FLASH */
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SPI_SELECT(priv->spi, SPIDEV_EEPROM(priv->devid), false);
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ee25xx_unlock(priv->spi);
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ee25xx_unlock(priv);
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/* Given that writing could take up to a few milliseconds,
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* the following short delay in the "busy" case will allow
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@@ -432,13 +450,13 @@ static void ee25xx_waitwritecomplete(struct ee25xx_dev_s *priv)
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static void ee25xx_writeenable(FAR struct ee25xx_dev_s *eedev, int enable)
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{
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ee25xx_lock(eedev->spi);
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ee25xx_lock(eedev);
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SPI_SELECT(eedev->spi, SPIDEV_EEPROM(eedev->devid), true);
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SPI_SEND(eedev->spi, enable ? EE25XX_CMD_WREN : EE25XX_CMD_WRDIS);
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SPI_SELECT(eedev->spi, SPIDEV_EEPROM(eedev->devid), false);
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ee25xx_unlock(eedev->spi);
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ee25xx_unlock(eedev);
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}
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/****************************************************************************
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@@ -453,14 +471,14 @@ static void ee25xx_writepage(FAR struct ee25xx_dev_s *eedev,
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FAR const char *data,
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size_t len)
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{
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ee25xx_lock(eedev->spi);
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ee25xx_lock(eedev);
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SPI_SELECT(eedev->spi, SPIDEV_EEPROM(eedev->devid), true);
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ee25xx_sendcmd(eedev->spi, EE25XX_CMD_WRITE, eedev->addrlen, devaddr);
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SPI_SNDBLOCK(eedev->spi, data, len);
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SPI_SELECT(eedev->spi, SPIDEV_EEPROM(eedev->devid), false);
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ee25xx_unlock(eedev->spi);
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ee25xx_unlock(eedev);
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}
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/****************************************************************************
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@@ -645,7 +663,7 @@ static ssize_t ee25xx_read(FAR struct file *filep, FAR char *buffer,
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len = eedev->size - filep->f_pos;
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}
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ee25xx_lock(eedev->spi);
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ee25xx_lock(eedev);
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SPI_SELECT(eedev->spi, SPIDEV_EEPROM(eedev->devid), true);
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/* STM32F4Disco: There is a 25 us delay here */
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@@ -659,7 +677,7 @@ static ssize_t ee25xx_read(FAR struct file *filep, FAR char *buffer,
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/* STM32F4Disco: There is a 20 us delay here */
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SPI_SELECT(eedev->spi, SPIDEV_EEPROM(eedev->devid), false);
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ee25xx_unlock(eedev->spi);
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ee25xx_unlock(eedev);
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/* Update the file position */
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@@ -803,6 +821,17 @@ static int ee25xx_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
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}
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break;
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case EEPIOC_SETSPEED:
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{
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ret = nxmutex_lock(&eedev->lock);
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if (ret == OK)
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{
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eedev->freq = (uint32_t)arg;
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nxmutex_unlock(&eedev->lock);
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}
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}
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break;
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default:
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ret = -ENOTTY;
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}
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@@ -858,6 +887,7 @@ int ee25xx_initialize(FAR struct spi_dev_s *dev, uint16_t spi_devid,
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eedev->spi = dev;
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eedev->devid = spi_devid;
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eedev->freq = CONFIG_EE25XX_FREQUENCY;
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eedev->size = 128 << g_ee25xx_devices[devtype].bytes;
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eedev->pgsize = 8 << g_ee25xx_devices[devtype].pagesize;
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eedev->secsize = eedev->pgsize << g_ee25xx_devices[devtype].secsize;
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@@ -47,13 +47,20 @@
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/* EEPROM IOCTL Commands ************************************************************/
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#define EEPIOC_GEOMETRY _EEPIOC(0x000) /* Similar to BIOC_GEOMETRY:
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* Return the geometry of the EEPROM
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* device.
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* IN: Pointer to writable instance of
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* struct eeprom_geometry_s in which
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* to return the geometry.
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* OUT: Data return in user-provided
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* buffer. */
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* Return the geometry of the
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* EEPROM device.
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* IN: Pointer to writable
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* instance of struct
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* eeprom_geometry_s to be
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* populated
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* OUT: Data return in user-
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* provided buffer. */
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#define EEPIOC_SETSPEED _EEPIOC(0x001) /* Overwrite the SPI/I2C bus speed
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* IN: Bus speed in Hz
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* OUT: None (ioctl return value
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* provides success/failure
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* indication). */
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/************************************************************************************
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* Type Definitions
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