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Fix some early z180 compile errors

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5430 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2012-12-11 22:51:20 +00:00
parent 73bf4026c6
commit 016220bf7a
6 changed files with 40 additions and 23 deletions
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arch/z80/include/z180/chip.h
+1 -1
View File
@@ -402,7 +402,7 @@
defined(CONFIG_ARCH_CHIP_Z8S18010PSG) || /* 64-pin DIP 10MHz 5V */ \
defined(CONFIG_ARCH_CHIP_Z8S18020FEG) || \
defined(CONFIG_ARCH_CHIP_Z8S18010PEG) || \
defined(CONFIG_ARCH_CHIP_Z8S18010FEG
defined(CONFIG_ARCH_CHIP_Z8S18010FEG)
# define HAVE_Z8S180 1 /* Uses Z8S180 (5V) or Z8L180 (3.3V) core */
# define HAVE ROM 0 /* No on-chip ROM */
arch/z80/src/z180/switch.h
+8 -5
View File
@@ -42,7 +42,9 @@
************************************************************************************/
#include <nuttx/sched.h>
#include <nuttx/arch.h>
#include <arch/io.h>
#include "z180_iomap.h"
#include "up_internal.h"
@@ -112,13 +114,14 @@
current_regs = savestate; \
if (current_regs) \
{ \
current_cbr = savecbr; \
current_cbr = savecbr; \
} \
else \
{ \
outp(Z180_MMU_CBR, savecbr); \
} \
}
} \
while (0)
/* The following macro is used to sample the interrupt state (as a opaque handle) */
@@ -135,9 +138,9 @@
#define SET_IRQCONTEXT(tcb) \
do \
{ \
if ((tcb)->xcp.cbr.cbr) \
if ((tcb)->xcp.cbr) \
{ \
current_cbr = (tcb)->xcp.cbr->cbr); \
current_cbr = (tcb)->xcp.cbr->cbr; \
} \
z180_copystate((FAR chipreg_t*)current_regs, (tcb)->xcp.regs); \
} \
@@ -157,7 +160,7 @@
#define RESTORE_USERCONTEXT(tcb) \
do \
{ \
if ((tcb)->xcp.cbr.cbr) \
if ((tcb)->xcp.cbr) \
{ \
outp(Z180_MMU_CBR, (tcb)->xcp.cbr->cbr); \
} \
arch/z80/src/z180/z180_head.asm
+2 -2
View File
@@ -62,7 +62,7 @@
.globl _os_start ; OS entry point
.globl _up_doirq ; Interrupt decoding logic
.globl z180_mmu_lowinit ; MMU initialization logic
.globl _z180_mmu_lowinit ; MMU initialization logic
;**************************************************************************
; Reset entry point
@@ -172,7 +172,7 @@ _up_reset:
; Configure the MMU so that things will lie at the addresses that we
; expect them to
call z180_mmu_lowinit ; Initialize the MMU
call _z180_mmu_lowinit ; Initialize the MMU
; Performed initialization unique to the SDCC toolchain
arch/z80/src/z180/z180_irq.c
+8
View File
@@ -58,6 +58,14 @@
volatile chipreg_t *current_regs;
/* This holds the value of the MMU's CBR register. This value is set to the
* interrupted tasks's CBR on interrupt entry, changed to the new task's CBR if
* an interrrupt level context switch occurs, and restored on interrupt exit. In
* this way, the CBR is always correct on interrupt exit.
*/
uint8_t current_cbr;
/****************************************************************************
* Private Data
****************************************************************************/
arch/z80/src/z180/z180_mmu.c
+14 -6
View File
@@ -41,8 +41,15 @@
#include <nuttx/config.h>
#include <nuttx/gram.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/gran.h>
#include <arch/irq.h>
#include <arch/io.h>
#include "up_internal.h"
#include "z180_mmu.h"
/****************************************************************************
@@ -223,7 +230,7 @@ int up_addrenv_create(FAR _TCB *tcb, size_t envsize)
{
sdbg("ERROR: No free CBR structures\n");
ret = -ENOMEM;
goto errout_with_irq
goto errout_with_irq;
}
/* Now allocate the physical memory to back up the address environment */
@@ -297,7 +304,7 @@ int up_addrenv_share(FAR const _TCB *ptcb, FAR _TCB *ctcb)
* copy in the child thread's TCB.
*/
ptcb->xcp.cbr.crefs++;
ptcb->xcp.cbr->crefs++;
ctcb->xcp.cbr = ptcb->xcp.cbr;
}
@@ -333,7 +340,7 @@ FAR void *up_addrenv_instantiate(FAR _TCB *tcb)
/* Get the current CBR value from the CBR register */
flags = irqsave();
cbr = inp(Z180_MMU_CBR);
oldcbr = inp(Z180_MMU_CBR);
/* Check if the task has an address environment. */
@@ -341,11 +348,11 @@ FAR void *up_addrenv_instantiate(FAR _TCB *tcb)
{
/* Yes.. Write the new CBR value into CBR register */
outp(Z180_MMU_CBR, tcb->xcp.cbr.cbr);
outp(Z180_MMU_CBR, tcb->xcp.cbr->cbr);
}
irqrestore(flags);
return (FAR void *)cbr;
return (FAR void *)oldcbr;
}
/****************************************************************************
@@ -368,6 +375,7 @@ int up_addrenv_restore(FAR void *handle)
/* Restore the CBR value */
outp(Z180_MMU_CBR, (uint8_t)handle);
return OK;
}
/****************************************************************************
arch/z80/src/z180/z180_mmu.h
+7 -9
View File
@@ -109,12 +109,10 @@
/* MMU register values */
#define Z180_CBAR_VALUE \
((((CONFIG_Z180_BANKAREA_VIRTBASE >> 12) & 0x0f) << CBAR_BA_SHIFT) \
(((CONFIG_Z180_COMMON1AREA_VIRTBASE >> 12) & 0x0f) << CBAR_CA_SHIFT))
#define Z180_BBR_VALUE \
((CONFIG_Z180_BANKAREA_PHYSBASE >> 12) & 0xff)
#define Z180_CBAR_BA_VALUE (((CONFIG_Z180_BANKAREA_VIRTBASE >> 12) & 0x0f) << CBAR_BA_SHIFT)
#define Z180_CBAR_CA_VALUE (((CONFIG_Z180_COMMON1AREA_VIRTBASE >> 12) & 0x0f) << CBAR_CA_SHIFT)
#define Z180_CBAR_VALUE (Z180_CBAR_BA_VALUE | Z180_CBAR_CA_VALUE)
#define Z180_BBR_VALUE ((CONFIG_Z180_BANKAREA_PHYSBASE >> 12) & 0xff)
/****************************************************************************
* Public Functions
@@ -139,11 +137,11 @@ void z180_mmu_lowinit(void) __naked;
* Name: up_mmuinit
*
* Description:
* Perform higher level initializatin of the MMU and physical memory
* memory management logic.
* Perform higher level initialization of the MMU and physical memory
* memory management logic. More correctly prototypes in up_internal.h.
*
****************************************************************************/
void up_mmuinit(void);
int up_mmuinit(void);
#endif /* __ARCH_Z80_SRC_Z180_Z180_MMU_H */