mirror of
https://github.com/apache/nuttx.git
synced 2026-06-07 09:18:00 +08:00
More compliance to the naming standard.
1) Rename all up_*.S file to arm_*.S 2) Rename all functions used only by armv8_m logic from up_* to arm_*
This commit is contained in:
Gregory Nutt
committed by
Alan Carvalho de Assis
Alan Carvalho de Assis
parent
15f003d01c
commit
010603329b
@@ -52,7 +52,7 @@
|
||||
/* If CONFIG_ARCH_RAMVECTORS is defined, then the ARM logic must provide
|
||||
* ARM-specific implementations of irq_initialize(), irq_attach(), and
|
||||
* irq_dispatch. In this case, it is also assumed that the ARM vector
|
||||
* table resides in RAM, has the name up_ram_vectors, and has been
|
||||
* table resides in RAM, has the name g_ram_vectors, and has been
|
||||
* properly positioned and aligned in memory by the linker script.
|
||||
*
|
||||
* REVISIT: Can this alignment requirement vary from core-to-core? Yes, it
|
||||
|
||||
@@ -88,7 +88,7 @@
|
||||
/* If CONFIG_ARCH_RAMVECTORS is defined, then the ARM logic must provide
|
||||
* ARM-specific implementations of up_ramvec_initialize(), irq_attach(), and
|
||||
* irq_dispatch. In this case, it is also assumed that the ARM vector
|
||||
* table resides in RAM, has the name up_ram_vectors, and has been
|
||||
* table resides in RAM, has the name g_ram_vectors, and has been
|
||||
* properly positioned and aligned in memory by the linker script.
|
||||
*
|
||||
* REVISIT: Can this alignment requirement vary from core-to-core? Yes, it
|
||||
|
||||
@@ -159,7 +159,7 @@ static inline void up_registerdump(void)
|
||||
{
|
||||
/* No.. capture user registers by hand */
|
||||
|
||||
up_saveusercontext(s_last_regs);
|
||||
arm_saveusercontext(s_last_regs);
|
||||
regs = s_last_regs;
|
||||
}
|
||||
|
||||
|
||||
@@ -135,9 +135,9 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
|
||||
* ready to run list.
|
||||
*/
|
||||
|
||||
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
|
||||
arm_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
|
||||
|
||||
/* up_switchcontext forces a context switch to the task at the
|
||||
/* arm_switchcontext forces a context switch to the task at the
|
||||
* head of the ready-to-run list. It does not 'return' in the
|
||||
* normal sense. When it does return, it is because the blocked
|
||||
* task is again ready to run and has execution priority.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/armv8-m/gnu/up_exception.S
|
||||
* arch/arm/src/armv8-m/gnu/arm_exception.S
|
||||
*
|
||||
* Copyright (C) 2009-2013, 2015-2016, 2018 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2012 Michael Smith. All rights reserved.
|
||||
@@ -88,7 +88,7 @@
|
||||
|
||||
.syntax unified
|
||||
.thumb
|
||||
.file "up_exception.S"
|
||||
.file "arm_exception.S"
|
||||
|
||||
/************************************************************************************
|
||||
* Macro Definitions
|
||||
@@ -1,5 +1,5 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/armv8-m/gnu/up_fetchadd.S
|
||||
* arch/arm/src/armv8-m/gnu/arm_fetchadd.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
@@ -26,7 +26,7 @@
|
||||
|
||||
.syntax unified
|
||||
.thumb
|
||||
.file "up_fetchadd.S"
|
||||
.file "arm_fetchadd.S"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
@@ -1,5 +1,5 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/armv8-m/gnu/up_fpu.S
|
||||
* arch/arm/src/armv8-m/gnu/arm_fpu.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
@@ -46,7 +46,7 @@
|
||||
|
||||
.syntax unified
|
||||
.thumb
|
||||
.file "up_fpu.S"
|
||||
.file "arm_fpu.S"
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
+8
-8
@@ -1,5 +1,5 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/armv8-m/gnu/up_fullcontextrestore.S
|
||||
* arch/arm/src/armv8-m/gnu/arm_fullcontextrestore.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
@@ -38,7 +38,7 @@
|
||||
|
||||
.syntax unified
|
||||
.thumb
|
||||
.file "up_fullcontextrestore.S"
|
||||
.file "arm_fullcontextrestore.S"
|
||||
|
||||
/************************************************************************************
|
||||
* Macros
|
||||
@@ -49,12 +49,12 @@
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: up_fullcontextrestore
|
||||
* Name: arm_fullcontextrestore
|
||||
*
|
||||
* Description:
|
||||
* Restore the current thread context. Full prototype is:
|
||||
*
|
||||
* void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
|
||||
* void arm_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
@@ -62,9 +62,9 @@
|
||||
************************************************************************************/
|
||||
|
||||
.thumb_func
|
||||
.globl up_fullcontextrestore
|
||||
.type up_fullcontextrestore, function
|
||||
up_fullcontextrestore:
|
||||
.globl arm_fullcontextrestore
|
||||
.type arm_fullcontextrestore, function
|
||||
arm_fullcontextrestore:
|
||||
|
||||
/* Perform the System call with R0=1 and R1=regs */
|
||||
|
||||
@@ -75,5 +75,5 @@ up_fullcontextrestore:
|
||||
/* This call should not return */
|
||||
|
||||
bx lr /* Unnecessary ... will not return */
|
||||
.size up_fullcontextrestore, .-up_fullcontextrestore
|
||||
.size arm_fullcontextrestore, .-arm_fullcontextrestore
|
||||
.end
|
||||
@@ -71,7 +71,7 @@
|
||||
|
||||
.syntax unified
|
||||
.thumb
|
||||
.file "up_lazyexception.S"
|
||||
.file "arm_lazyexception.S"
|
||||
|
||||
/************************************************************************************************
|
||||
* Macro Definitions
|
||||
@@ -43,7 +43,7 @@
|
||||
void exception_common(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_ramvec_attach
|
||||
* Name: arm_ramvec_attach
|
||||
*
|
||||
* Description:
|
||||
* Configure the ram vector table so that IRQ number 'irq' will be
|
||||
@@ -51,7 +51,7 @@ void exception_common(void);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int up_ramvec_attach(int irq, up_vector_t vector)
|
||||
int arm_ramvec_attach(int irq, up_vector_t vector)
|
||||
{
|
||||
int ret = -EINVAL;
|
||||
|
||||
|
||||
@@ -86,9 +86,9 @@
|
||||
****************************************************************************/
|
||||
|
||||
/* If CONFIG_ARCH_RAMVECTORS is defined, then the ARM logic must provide
|
||||
* ARM-specific implementations of up_ramvec_initialize(), irq_attach(), and
|
||||
* ARM-specific implementations of arm_ramvec_initialize(), irq_attach(), and
|
||||
* irq_dispatch. In this case, it is also assumed that the ARM vector
|
||||
* table resides in RAM, has the name up_ram_vectors, and has been
|
||||
* table resides in RAM, has the name g_ram_vectors, and has been
|
||||
* properly positioned and aligned in memory by the linker script.
|
||||
*
|
||||
* REVISIT: Can this alignment requirement vary from core-to-core? Yes, it
|
||||
@@ -105,14 +105,14 @@ up_vector_t g_ram_vectors[ARMV8M_VECTAB_SIZE]
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_ramvec_initialize
|
||||
* Name: arm_ramvec_initialize
|
||||
*
|
||||
* Description:
|
||||
* Copy vectors to RAM an configure the NVIC to use the RAM vectors.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_ramvec_initialize(void)
|
||||
void arm_ramvec_initialize(void)
|
||||
{
|
||||
const up_vector_t *src;
|
||||
up_vector_t *dest;
|
||||
|
||||
@@ -108,9 +108,9 @@ void up_release_pending(void)
|
||||
* ready to run list.
|
||||
*/
|
||||
|
||||
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
|
||||
arm_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
|
||||
|
||||
/* up_switchcontext forces a context switch to the task at the
|
||||
/* arm_switchcontext forces a context switch to the task at the
|
||||
* head of the ready-to-run list. It does not 'return' in the
|
||||
* normal sense. When it does return, it is because the blocked
|
||||
* task is again ready to run and has execution priority.
|
||||
|
||||
@@ -160,9 +160,9 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
|
||||
* ready to run list.
|
||||
*/
|
||||
|
||||
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
|
||||
arm_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
|
||||
|
||||
/* up_switchcontext forces a context switch to the task at the
|
||||
/* arm_switchcontext forces a context switch to the task at the
|
||||
* head of the ready-to-run list. It does not 'return' in the
|
||||
* normal sense. When it does return, it is because the
|
||||
* blocked task is again ready to run and has execution
|
||||
|
||||
+8
-8
@@ -1,5 +1,5 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/armv8-m/gnu/up_saveusercontext.S
|
||||
* arch/arm/src/armv8-m/gnu/arm_saveusercontext.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
@@ -38,7 +38,7 @@
|
||||
|
||||
.syntax unified
|
||||
.thumb
|
||||
.file "up_saveusercontext.S"
|
||||
.file "arm_saveusercontext.S"
|
||||
|
||||
/************************************************************************************
|
||||
* Macros
|
||||
@@ -49,12 +49,12 @@
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: up_saveusercontext
|
||||
* Name: arm_saveusercontext
|
||||
*
|
||||
* Description:
|
||||
* Save the current thread context. Full prototype is:
|
||||
*
|
||||
* int up_saveusercontext(uint32_t *saveregs);
|
||||
* int arm_saveusercontext(uint32_t *saveregs);
|
||||
*
|
||||
* Returned Value:
|
||||
* 0: Normal return
|
||||
@@ -64,9 +64,9 @@
|
||||
|
||||
.text
|
||||
.thumb_func
|
||||
.globl up_saveusercontext
|
||||
.type up_saveusercontext, function
|
||||
up_saveusercontext:
|
||||
.globl arm_saveusercontext
|
||||
.type arm_saveusercontext, function
|
||||
arm_saveusercontext:
|
||||
|
||||
/* Perform the System call with R0=0 and R1=regs */
|
||||
|
||||
@@ -84,5 +84,5 @@ up_saveusercontext:
|
||||
str r3, [r2, #0]
|
||||
bx lr /* "normal" return with r0=0 or
|
||||
* context switch with r0=1 */
|
||||
.size up_saveusercontext, .-up_saveusercontext
|
||||
.size arm_saveusercontext, .-arm_saveusercontext
|
||||
.end
|
||||
@@ -1,5 +1,5 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/armv8-m/gnu/up_setjmp.S
|
||||
* arch/arm/src/armv8-m/gnu/arm_setjmp.S
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Author: David S. Alessio <David@DSA.Consulting>
|
||||
@@ -123,7 +123,7 @@ void up_sigdeliver(void)
|
||||
* errno that is needed by the user logic (it is probably EINTR).
|
||||
*
|
||||
* I would prefer that all interrupts are disabled when
|
||||
* up_fullcontextrestore() is called, but that may not be necessary.
|
||||
* arm_fullcontextrestore() is called, but that may not be necessary.
|
||||
*/
|
||||
|
||||
sinfo("Resuming\n");
|
||||
@@ -192,5 +192,5 @@ void up_sigdeliver(void)
|
||||
*/
|
||||
|
||||
board_autoled_off(LED_SIGNAL);
|
||||
up_fullcontextrestore(regs);
|
||||
arm_fullcontextrestore(regs);
|
||||
}
|
||||
|
||||
+2
-2
@@ -1,5 +1,5 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/armv8-m/gnu/up_signal_handler.S
|
||||
* arch/arm/src/armv8-m/gnu/arm_signal_handler.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
@@ -35,7 +35,7 @@
|
||||
.syntax unified
|
||||
.thumb
|
||||
.cpu cortex-m3
|
||||
.file "up_signal_handler.S"
|
||||
.file "arm_signal_handler.S"
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
@@ -163,7 +163,7 @@ int up_svcall(int irq, FAR void *context, FAR void *arg)
|
||||
{
|
||||
/* R0=SYS_save_context: This is a save context command:
|
||||
*
|
||||
* int up_saveusercontext(uint32_t *saveregs);
|
||||
* int arm_saveusercontext(uint32_t *saveregs);
|
||||
*
|
||||
* At this point, the following values are saved in context:
|
||||
*
|
||||
@@ -186,7 +186,7 @@ int up_svcall(int irq, FAR void *context, FAR void *arg)
|
||||
|
||||
/* R0=SYS_restore_context: This a restore context command:
|
||||
*
|
||||
* void up_fullcontextrestore(uint32_t *restoreregs)
|
||||
* void arm_fullcontextrestore(uint32_t *restoreregs)
|
||||
* noreturn_function;
|
||||
*
|
||||
* At this point, the following values are saved in context:
|
||||
@@ -210,7 +210,7 @@ int up_svcall(int irq, FAR void *context, FAR void *arg)
|
||||
|
||||
/* R0=SYS_switch_context: This a switch context command:
|
||||
*
|
||||
* void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
|
||||
* void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
|
||||
*
|
||||
* At this point, the following values are saved in context:
|
||||
*
|
||||
@@ -237,7 +237,7 @@ int up_svcall(int irq, FAR void *context, FAR void *arg)
|
||||
|
||||
/* R0=SYS_syscall_return: This a syscall return command:
|
||||
*
|
||||
* void up_syscall_return(void);
|
||||
* void arm_syscall_return(void);
|
||||
*
|
||||
* At this point, the following values are saved in context:
|
||||
*
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/armv8-m/gnu/up_switchcontext.S
|
||||
* arch/arm/src/armv8-m/gnu/arm_switchcontext.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
@@ -38,7 +38,7 @@
|
||||
|
||||
.syntax unified
|
||||
.thumb
|
||||
.file "up_switchcontext.S"
|
||||
.file "arm_switchcontext.S"
|
||||
|
||||
/************************************************************************************
|
||||
* Macros
|
||||
@@ -49,13 +49,13 @@
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: up_switchcontext
|
||||
* Name: arm_switchcontext
|
||||
*
|
||||
* Description:
|
||||
* Save the current thread context and restore the specified context.
|
||||
* Full prototype is:
|
||||
*
|
||||
* void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
|
||||
* void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
@@ -63,9 +63,9 @@
|
||||
************************************************************************************/
|
||||
|
||||
.thumb_func
|
||||
.globl up_switchcontext
|
||||
.type up_switchcontext, function
|
||||
up_switchcontext:
|
||||
.globl arm_switchcontext
|
||||
.type arm_switchcontext, function
|
||||
arm_switchcontext:
|
||||
|
||||
/* Perform the System call with R0=1, R1=saveregs, R2=restoreregs */
|
||||
|
||||
@@ -77,5 +77,5 @@ up_switchcontext:
|
||||
/* We will get here only after the rerturn from the context switch */
|
||||
|
||||
bx lr
|
||||
.size up_switchcontext, .-up_switchcontext
|
||||
.size arm_switchcontext, .-arm_switchcontext
|
||||
.end
|
||||
@@ -1,5 +1,5 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/armv8-m/gnu/up_testset.S
|
||||
* arch/arm/src/armv8-m/gnu/arm_testset.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
@@ -27,7 +27,7 @@
|
||||
|
||||
.syntax unified
|
||||
.thumb
|
||||
.file "up_testset.S"
|
||||
.file "arm_testset.S"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
@@ -119,9 +119,9 @@ void up_unblock_task(struct tcb_s *tcb)
|
||||
* ready to run list.
|
||||
*/
|
||||
|
||||
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
|
||||
arm_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
|
||||
|
||||
/* up_switchcontext forces a context switch to the task at the
|
||||
/* arm_switchcontext forces a context switch to the task at the
|
||||
* head of the ready-to-run list. It does not 'return' in the
|
||||
* normal sense. When it does return, it is because the blocked
|
||||
* task is again ready to run and has execution priority.
|
||||
|
||||
@@ -52,7 +52,7 @@
|
||||
/* If CONFIG_ARCH_RAMVECTORS is defined, then the ARM logic must provide
|
||||
* ARM-specific implementations of irq_initialize(), irq_attach(), and
|
||||
* irq_dispatch. In this case, it is also assumed that the ARM vector
|
||||
* table resides in RAM, has the name up_ram_vectors, and has been
|
||||
* table resides in RAM, has the name g_ram_vectors, and has been
|
||||
* properly positioned and aligned in memory by the linker script.
|
||||
*
|
||||
* REVISIT: Can this alignment requirement vary from core-to-core? Yes, it
|
||||
@@ -69,14 +69,14 @@ extern up_vector_t g_ram_vectors[ARMV8M_VECTAB_SIZE]
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_ramvec_initialize
|
||||
* Name: arm_ramvec_initialize
|
||||
*
|
||||
* Description:
|
||||
* Copy vectors to RAM an configure the NVIC to use the RAM vectors.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_ramvec_initialize(void);
|
||||
void arm_ramvec_initialize(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: exception_common
|
||||
@@ -89,7 +89,7 @@ void up_ramvec_initialize(void);
|
||||
void exception_common(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_ramvec_attach
|
||||
* Name: arm_ramvec_attach
|
||||
*
|
||||
* Description:
|
||||
* Configure the ram vector table so that IRQ number 'irq' will be
|
||||
@@ -97,7 +97,7 @@ void exception_common(void);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int up_ramvec_attach(int irq, up_vector_t vector);
|
||||
int arm_ramvec_attach(int irq, up_vector_t vector);
|
||||
|
||||
#endif /* CONFIG_ARCH_RAMVECTORS */
|
||||
#endif /* __ARCH_ARM_SRC_COMMON_ARMV8_M_RAM_VECTORS_H */
|
||||
|
||||
@@ -62,21 +62,21 @@
|
||||
|
||||
/* SYS call 0:
|
||||
*
|
||||
* int up_saveusercontext(uint32_t *saveregs);
|
||||
* int arm_saveusercontext(uint32_t *saveregs);
|
||||
*/
|
||||
|
||||
#define SYS_save_context (0)
|
||||
|
||||
/* SYS call 1:
|
||||
*
|
||||
* void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
|
||||
* void arm_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
|
||||
*/
|
||||
|
||||
#define SYS_restore_context (1)
|
||||
|
||||
/* SYS call 2:
|
||||
*
|
||||
* void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
|
||||
* void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
|
||||
*/
|
||||
|
||||
#define SYS_switch_context (2)
|
||||
@@ -84,7 +84,7 @@
|
||||
#ifdef CONFIG_LIB_SYSCALL
|
||||
/* SYS call 3:
|
||||
*
|
||||
* void up_syscall_return(void);
|
||||
* void arm_syscall_return(void);
|
||||
*/
|
||||
|
||||
#define SYS_syscall_return (3)
|
||||
|
||||
Reference in New Issue
Block a user