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Updated some pointer casts to get warning free compilation for 64-bit targets.

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A few tweaks to get rid of warnings for some driver/board/configuration combinations.
This commit is contained in:
Terje Io
2025-10-20 08:10:58 +02:00
parent ed2a392dd7
commit b5b236ca3f
6 changed files with 24 additions and 12 deletions
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changelog.md
+15 -1
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@@ -1,5 +1,19 @@
## grblHAL changelog
<a name="20251020">20251020
Core:
* Updated some pointer casts to get warning free compilation for 64-bit targets.
* A few tweaks to get rid of warnings for some driver/board/configuration combinations.
Drivers:
* STM32F4xx: added support for U and V axes, untested. Ref. issue [#260](https://github.com/grblHAL/STM32F4xx/issues/260).
---
<a name="20251018">Build 20251018
Core:
@@ -12,7 +26,7 @@ Core:
Drivers:
* ESP32: Changed SPI and SD card pin symbols to "standard" naming convention.
* ESP32: changed SPI and SD card pin symbols to "standard" naming convention.
* RP2040: fix for analog out auxiliary I/O not working. Ref. issue [#154](https://github.com/grblHAL/RP2040/issues/154).
nvs_buffer.c
+1 -1
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@@ -313,7 +313,7 @@ nvs_address_t nvs_alloc (size_t size)
size += NVS_CRC_BYTES; // add room for checksum.
if(hal.nvs.driver_area.size + size < (nvs_size_max - GRBL_NVS_SIZE)) {
mem_address = (uint8_t *)((uint32_t)(mem_address - 1) | 0x03) + 1; // Align to word boundary
mem_address = (uint8_t *)((uintptr_t)(mem_address - 1) | 0x03) + 1; // Align to word boundary
addr = mem_address - nvsbuffer;
mem_address += size;
hal.nvs.driver_area.size = mem_address - hal.nvs.driver_area.mem_address;
pin_bits_masks.h
+2 -4
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@@ -242,12 +242,10 @@ static inline xbar_t *aux_ctrl_claim_port (aux_ctrl_t *aux_ctrl)
static inline aux_ctrl_t *aux_ctrl_remap_explicit (aux_gpio_t gpio, uint8_t port, void *input)
{
int_fast8_t idx;
aux_ctrl_t *ctrl_pin = NULL;
if(sizeof(aux_ctrl) / sizeof(aux_ctrl_t)) {
uint_fast8_t idx;
for(idx = 0; ctrl_pin == NULL && idx < sizeof(aux_ctrl) / sizeof(aux_ctrl_t) && aux_ctrl[idx].gpio.pin != 0xFF; idx++) {
if(aux_ctrl[idx].gpio.pin == gpio.pin && aux_ctrl[idx].gpio.port == gpio.port) {
ctrl_pin = &aux_ctrl[idx];
@@ -359,7 +357,7 @@ static inline control_signals_t aux_ctrl_scan_status (control_signals_t signals)
if(aux_ctrl[idx].port != IOPORT_UNASSIGNED) {
#ifdef GRBL_ESP32 // Snowflake guru workaround
if(hal.port.wait_on_input(Port_Digital, aux_ctrl[idx].port, WaitMode_Immediate, FZERO) == 1)
signals.mask |= aux_ctrl[idx].cap.mask;
signals.mask |= aux_ctrl[idx].signal.mask;
#else
if(hal.port.wait_on_input(Port_Digital, aux_ctrl[idx].port, WaitMode_Immediate, 0.0f) == 1)
signals.mask |= aux_ctrl[idx].signal.mask;
platform.h
+3 -3
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@@ -3,7 +3,7 @@
Part of grblHAL
Copyright (c) 2021-2024 Terje Io
Copyright (c) 2021-2025 Terje Io
grblHAL is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@@ -30,7 +30,7 @@
#endif
#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F407xx) || defined(STM32F411xE) || \
defined(STM32F412Vx) || defined(STM32F446xx)
defined(STM32F412Vx) || defined(STM32F429xx) || defined(STM32F446xx)
#define STM32_F4_PLATFORM
#endif
@@ -46,7 +46,7 @@
#define STM32_PLATFORM
#endif
#if defined(STM32_PLATFORM) || defined(__LPC17XX__) || defined(__IMXRT1062__)
#if defined(STM32_PLATFORM) || defined(__LPC17XX__) || defined(__IMXRT1062__) || defined(__SAM3X8E__)
#define UINT32FMT "%lu"
#define UINT32SFMT "lu"
#else
probe.c
+1 -1
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@@ -215,7 +215,7 @@ bool probe_add (probe_id_t probe_id, uint8_t port, pin_irq_mode_t irq_mode, void
void probe_connected_event (void *data)
{
if(hal.probe.connected_toggle) {
if((uint32_t)data == 2)
if((uintptr_t)data == 2)
hal.probe.connected_toggle();
else {
probe_state_t state = hal.probe.get_state();
stream.c
+2 -2
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@@ -549,7 +549,7 @@ bool stream_mpg_register (const io_stream_t *stream, bool rx_only, stream_write_
static void report_mpg_mode (void *data)
{
protocol_enqueue_realtime_command((char)((uint32_t)data));
protocol_enqueue_realtime_command((char)((uintptr_t)data));
}
bool stream_mpg_enable (bool on)
@@ -602,7 +602,7 @@ bool stream_mpg_enable (bool on)
system_add_rt_report(Report_MPGMode);
// Force a realtime status report, all reports when MPG mode active
task_add_delayed(report_mpg_mode, (void *)(on ? CMD_STATUS_REPORT_ALL : CMD_STATUS_REPORT), 5);
task_add_delayed(report_mpg_mode, (void *)((uintptr_t)(on ? CMD_STATUS_REPORT_ALL : CMD_STATUS_REPORT)), 5);
return true;
}