2042 Commits
Author SHA1 Message Date
Ryan Kurtz 1e641d0c6e Merge remote-tracking branch
'origin/GP-7052_ghidorahrex_PR-6553_Sleigh-InSPECtor_x86_pcrel_addr32'
into patch (Closes #6553)
2026-08-19 12:56:22 -04:00
Ryan Kurtz 0f55c28581 Merge remote-tracking branch
'origin/GP-6620_ghidorahrex_PR-6468_Sleigh-InSPECtor_aa64_stlrb_stlrh_size'
into patch (Closes #9043, Closes #6468)
2026-08-12 08:50:43 -04:00
Ryan Kurtz 97f8ebd726 Merge remote-tracking branch
'origin/GP-7017_ghidorahrex_pinsrw_count_mask_fix--SQUASHED' into patch
(Closes #9328)
2026-08-12 08:44:25 -04:00
ghidorahrex 90015f129c GP-7017: Upped x86 version number 2026-08-12 08:36:10 -04:00
ghidorahrex 31ffc98d3b GP-7017: Fixed masking for several PEXT* and PINS* instructions 2026-08-12 08:32:45 -04:00
Ryan Kurtz 52e06667d0 Merge remote-tracking branch
'origin/GP-7133_ghidorahrex_MIPS_16e_ldefs_fix' into patch
(Closes #9432)
2026-08-12 08:27:28 -04:00
Ryan Kurtz 5174cc7ab4 Merge remote-tracking branch
'origin/GP-6767_ghidorahrex_x86_shift_rotate_flag_fix--SQUASHED' into
patch (Closes #9330)
2026-08-12 08:24:23 -04:00
Ryan Kurtz 23c874c647 Merge remote-tracking branch
'origin/GP-7018_ghidorahrex_x86_mov_sreg_opsize_fix' into patch
(Closes #9326)
2026-08-12 07:27:47 -04:00
ghidorahrex d1200f8b23 GP_6767: Corrected OF flag for x86 shift/rotate instructions 2026-08-10 16:56:11 -04:00
ghidorahrex acf4fc7c78 GP-7133: Fixed MIPS 16e variant ldef entries 2026-08-10 14:59:01 -04:00
Sleigh-InSPECtor d0650fa0ef AA64: fix stlrb and stlrh store sizes 2026-08-10 14:16:57 -04:00
Ryan Kurtz 0bffbabbbb Merge remote-tracking branch
'origin/GP-7019_ghidorahrex_x86_pslld_count_fix--SQUASHED' into patch
(Closes #9329)
2026-07-23 05:16:16 -04:00
Ryan Kurtz 7c27822441 Merge remote-tracking branch 'origin/GP-6818_ghidorahrex_x86_gfni_instructions' into patch 2026-07-23 05:10:12 -04:00
ghidorahrex 10b2f530c6 GP-7019: Fixed pslld count operand 2026-07-22 17:14:15 -04:00
Meow 3101600853 fix: missing implementation for IMAGE_REL_ARM64_ADDR64 2026-07-22 05:05:56 -04:00
Ryan Kurtz 052eaddf41 Merge remote-tracking branch 'origin/GP-7016_ghidorahrex_vpextrw_fix'
into patch (Closes #9323)
2026-07-21 13:01:25 -04:00
Ryan Kurtz 48997fd7d9 Merge remote-tracking branch 'origin/GP-7015_ghidorahrex_xchg_nop_fix'
into patch (Closes #9327)
2026-07-21 12:59:02 -04:00
Ryan Kurtz cd8eda1d6d Merge remote-tracking branch 'origin/GP-6770_ghidorahrex_mcs96_cmpl_carry_fix' into patch 2026-07-21 12:56:14 -04:00
p-mikeg f18269b0eb Fix sev.w arm encoding.
Unlike the other hints, sev.w op0 missed the 0x in the beginning which led to incorrect parsing.
The encoding should be 0xf3af8004 (https://developer.arm.com/documentation/ddi0403/latest/,
sev encoding T2).
2026-07-14 09:53:13 -04:00
Sleigh-InSPECtor 3b135cc802 x86: PC-relative addressing with 32-bit addressing should mask upper bits. 2026-07-09 12:33:34 -04:00
ghidorahrex adf16957cf GP-G770: Corrected MCS-96 CMPL carry flag 2026-07-06 11:03:47 -04:00
ghidorahrex 817a3ac54d GP-7040: Comment formatting for consistency 2026-07-06 10:48:49 -04:00
valium007 59c854e0e9 AARCH64: zero-extend dest on FMADD/FMSUB scalar forms
The scalar FMADD and FMSUB constructors (FPR16/FPR32/FPR64) wrote only
the result element and left the upper bits of the destination SIMD&FP
register unchanged, violating the architectural zero-extension-on-write
semantics. The sibling FNMADD/FNMSUB already do this correctly.

Add the size-correct zero-extension after each:
  - FPR16 -> zext_zh
  - FPR32 -> zext_zs
  - FPR64 -> zext_zd
2026-07-06 10:41:12 -04:00
valium007 b4c3c95490 AARCH64: zero-extend dest on ADDV/SMAXV/SMINV/UMAXV/UMINV
Across-lane reductions wrote only the result element and left the upper
   bits of the destination SIMD&FP register stale, violating the ARM
   zero-extension-on-write semantics. Add zext_z{b,h,s} per element size,
   and fix ADDV.8B/.16B which used zext_zq (16-byte clear) for an 8-bit
   result.
2026-07-06 10:41:10 -04:00
Ryan Kurtz 24e2a6eb62 Merge remote-tracking branch 'origin/GP-6876_ghidorahrex_riscv_w_operands_fix--SQUASHED' into patch 2026-07-01 09:47:26 -04:00
ghidorahrex 43d043e941 GP-6876: Corrected operands for RISC-V floating point .w instructions 2026-06-30 14:40:20 -04:00
Ryan Kurtz 0e8ad9072b Merge remote-tracking branch 'origin/GP-6699_ghidorahrex_superh4_bsr_fix' into patch 2026-06-30 11:35:18 -04:00
Ryan Kurtz 4d90198e23 Merge remote-tracking branch 'origin/GP-6914_ghidorahrex_powerpc_v3.0_inst_add--SQUASHED' into patch 2026-06-30 11:33:49 -04:00
ghidorahrex 720b1a5f91 GP-6914: Added missing PowerPC v3.0 and v3.0B/C instructions. 2026-06-30 11:27:49 -04:00
ghidorahrex 154f9fb0ca GP-6699: Fixed SuperH4 bsr instruction return address 2026-06-30 11:06:06 -04:00
ghidorahrex f9ed6f4170 GP-7018: Fixed register opsize for mov to/from segment registers 2026-06-29 12:35:55 -04:00
ghidorahrex 6c1352fc90 GP-7016: Corrected VPEXTRW to ignore the VEX.W1 bit 2026-06-29 10:24:13 -04:00
ghidorahrex 02f9ae67d9 GP-7015: Corrected rex xchg to nop 2026-06-29 10:09:09 -04:00
Ryan Kurtz ebce35d1f4 Merge remote-tracking branch
'origin/GP-6937_ghidorahrex_x86_xmmreg2_rex_fix' into patch
(Closes #9256)
2026-06-24 15:54:28 -04:00
Ryan Kurtz 4f02c88d55 Merge remote-tracking branch 'origin/GP-941_ghidorahrex_sparcv9_reg_display_fix' into patch 2026-06-24 12:05:37 -04:00
ghidorahrex bab81cb679 GP-941: Correct SparcV9 register operand display to be consistent 2026-06-24 14:14:44 +00:00
Ryan Kurtz 6b682c9d49 Merge remote-tracking branch
'origin/GP-6983_ghidorahrex_PR-8824_jibee_m68000_movemw_fix' into patch
(Closes #8824)
2026-06-23 18:10:48 -04:00
Ryan Kurtz 38b5c1979b Merge remote-tracking branch
'origin/GP-6909_ghidorahrex_PR-6508_Sleigh-InSPECtor_riscv_divrem_divbyzero_fix'
into patch (Closes #6508, Closes #9235, Closes #9225)
2026-06-23 18:07:53 -04:00
Ryan Kurtz c16c4c6545 Merge remote-tracking branch 'origin/GP-2907_ghidorahrex_v850e3_update'
into patch (Closes #4788)
2026-06-22 12:30:53 -04:00
ghidorahrex 6f5fa3192c GP-2907: Added v850e3 language variant instructions 2026-06-22 16:24:44 +00:00
jibee 891826dbc9 68000: movem.w always uses 2 increments
movem exists in 2 symmetrical variants, register to memory (save to stack) and memory to register (pull from stack).
Per 68000 manual, when in word mode, increment (respectively decrement) is 2, and 4 in long mode.
For word mode, the various registers masks are handled by m2rfw0, r2mbw0, and r2mfw0. 

This patch corrects the pointer increment for r2mbw0 to 2, aligning it to  m2rfw0 and r2mfw0.
2026-06-22 15:49:40 +00:00
Ryan Kurtz 75f4965eef Merge remote-tracking branch 'origin/GP-6968_emteere_e500mcStackOffset'
into patch (Closes #9089)
2026-06-17 10:42:20 -04:00
Ryan Kurtz 3ab53dbfa5 Merge remote-tracking branch
'origin/GP-6964_ghidorahrex_PR-9278_joshualmashburn_superh_index_file'
into patch (Closes #9278)
2026-06-16 15:21:53 -04:00
ghidorahrex 4170459fdd GP-6964: Added index entries for 1dc/lds/stc/sts.l instructions 2026-06-16 14:01:12 +00:00
Ryan Kurtz 4bc4218768 Merge remote-tracking branch 'origin/GP-6769_ghidorahrex_tricore_fix_carry_flag--SQUASHED' into patch 2026-06-16 05:03:32 -04:00
emteere 8cdec9bbf6 GP-6989 e500mc stack offset adjustment 2026-06-15 20:08:40 +00:00
Sleigh-InSPECtor edb05a43b9 riscv: handle divideby0 2026-06-15 16:53:24 +00:00
ghidorahrex 333674114e GP-6769: Corrected tricore carry flag calculations 2026-06-15 11:02:21 -04:00
ghidorahrex 82c4d30b38 GP-6964: Added index file to SH2-A language variant 2026-06-15 14:45:06 +00:00
Joshua Mashburn 4f593bd8d4 Added SH-1 and SH-2 manual name and index 2026-06-15 14:43:01 +00:00