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GP-6766: Corrected operand ordering for MIPS16e movz and movn

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ghidorahrex
2026-04-29 20:15:19 +00:00
parent 491bfe15c6
commit d29a605572
1 changed files with 2 additions and 2 deletions
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Ghidra/Processors/MIPS/data/languages/mips16.sinc
+2 -2
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@@ -1028,7 +1028,7 @@ m16_RD0: m16_rd0_7 is m16_rd0_7 & ext_imm_2123=7 { export m16_rd0_7; }
setCopReg(0:1, m16_RD0, m16_ry);
}
:movz m16_rx, m16_ry, ext_rb is ISA_MODE=1 & RELP=1 & ext_isjal=0 & ext_is_ext=1 & ext_imm_2226=0 & ext_imm_21=1 & ext_imm_1920=0 & ext_rb & m16_op=0b00110 & m16_rx & m16_ry & m16_shft_sa=1 & m16_shft_f=0b10 {
:movz m16_rx, ext_rb, m16_ry is ISA_MODE=1 & RELP=1 & ext_isjal=0 & ext_is_ext=1 & ext_imm_2226=0 & ext_imm_21=1 & ext_imm_1920=0 & ext_rb & m16_op=0b00110 & m16_rx & m16_ry & m16_shft_sa=1 & m16_shft_f=0b10 {
if(m16_ry != 0) goto inst_next;
m16_rx = ext_rb;
}
@@ -1038,7 +1038,7 @@ m16_RD0: m16_rd0_7 is m16_rd0_7 & ext_imm_2123=7 { export m16_rd0_7; }
m16_rx = 0;
}
:movn m16_rx, m16_ry, ext_rb is ISA_MODE=1 & RELP=1 & ext_isjal=0 & ext_is_ext=1 & ext_imm_2226=0 & ext_imm_21=1 & ext_imm_1920=0 & ext_rb & m16_op=0b00110 & m16_rx & m16_ry & m16_shft_sa=2 & m16_shft_f=0b10 {
:movn m16_rx, ext_rb, m16_ry is ISA_MODE=1 & RELP=1 & ext_isjal=0 & ext_is_ext=1 & ext_imm_2226=0 & ext_imm_21=1 & ext_imm_1920=0 & ext_rb & m16_op=0b00110 & m16_rx & m16_ry & m16_shft_sa=2 & m16_shft_f=0b10 {
if(m16_ry == 0) goto inst_next;
m16_rx = ext_rb;
}