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Merge remote-tracking branch 'origin/GP-1234_ghidorahrex_update_processor_manuals--SQUASHED'

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Ryan Kurtz
2021-09-16 07:54:32 -04:00
parent d590f10238 3cbe4ee78d
commit b0a223e17b
2 changed files with 699 additions and 688 deletions
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Ghidra/Processors/AARCH64/data/manuals/AARCH64.idx
+584 -578
View File
File diff suppressed because it is too large Load Diff
Ghidra/Processors/x86/data/manuals/x86.idx
+115 -110
View File
@@ -1578,120 +1578,123 @@ XSAVES64, 2040
XSETBV, 2043 XSETBV, 2043
XTEST, 2045 XTEST, 2045
@24594.pdf [AMD64 Architecture Programmer's Manual Volume 3: General-Purpose and System Instructions, Rev 3.28 September 2019 (24594)] @24594.pdf [AMD64 Architecture Programmer's Manual Volume 3: General-Purpose and System Instructions, Rev 3.32 March 2021 (24594)]
BLCFILL, 129 BLCFILL, 135
BLCI, 131 BLCI, 137
BLCIC, 133 BLCIC, 139
BLCMSK, 135 BLCMSK, 141
BLCS, 137 BLCS, 143
BLSIC, 143 BLSFILL, 145
CLZERO, 183 BLSIC, 149
LLWPCB, 247 CLZERO, 190
LOOPNZ, 252 LLWPCB, 255
LOOPZ, 252 LOOPNZ, 260
LWPINS, 254 LOOPZ, 260
LWPVAL, 256 LWPINS, 262
MONITORX, 263 LWPVAL, 264
MWAITX, 289 MONITORX, 271
PREFETCH, 314 MWAITX, 297
SLWPCB, 369 PREFETCH, 323
T1MSKC, 377 SLWPCB, 380
TZMSK, 383 T1MSKC, 388
UD0, 385 TZMSK, 394
UD1, 385 UD0, 396
UD2, 385 UD1, 396
CLGI, 400 UD2, 396
INVLPGA, 410 CLGI, 414
SKINIT, 449 INVLPGA, 428
STGI, 457 SKINIT, 496
VMLOAD, 476 STGI, 504
VMMCALL, 478 VMLOAD, 524
VMRUN, 479 VMMCALL, 526
VMSAVE, 484 VMRUN, 527
@26568.pdf [AMD64 Architecture Programmer's Manual Volume 4: 128-Bit and 256-Bit Media Instructions, Rev 3.23 Feb 2019 (26568)] VMSAVE, 532
@26568.pdf [AMD64 Architecture Programmer's Manual Volume 4: 128-Bit and 256-Bit Media Instructions, Rev 3.24 May 2020 (26568)]
EXTRQ, 181 EXTRQ, 181
INSERTQ, 196 INSERTQ, 196
MOVNTSD, 260 MOVNTSD, 260
MOVNTSS, 262 MOVNTSS, 262
VPHSUBD, 387 VPHSUBD, 388
VPOR, 473 VPOR, 474
VSTMXCSR, 614 VSTMXCSR, 615
VBROADCASTI128, 638 VBROADCASTI128, 639
VFMADDPD, 655 VFMADDPD, 656
VFMADDPS, 658 VFMADDPS, 659
VFMADDSD, 661 VFMADDSD, 662
VFMADDSS, 664 VFMADDSS, 665
VFMADDSUBPD, 667 VFMADDSUBPD, 668
VFMADDSUBPS, 670 VFMADDSUBPS, 671
VFMADDPD, 673 VFMADDPD, 674
VFMADDPS, 676 VFMADDPS, 677
VFMSUBPD, 679 VFMSUBPD, 680
VFMSUBPS, 682 VFMSUBPS, 683
VFMSUBSD, 685 VFMSUBSD, 686
VFMSUBSS, 688 VFMSUBSS, 689
VFNMADDPD, 691 VFNMADDPD, 692
VFNMADDPS, 694 VFNMADDPS, 695
VFNMADDSD, 697 VFNMADDSD, 698
VFNMADDSS, 700 VFNMADDSS, 701
VFNMSUBPD, 703 VFNMSUBPD, 704
VFNMSUBPS, 706 VFNMSUBPS, 707
VFNMSUBSD, 709 VFNMSUBSD, 710
VFNMSUBSS, 712 VFNMSUBSS, 713
VFRCZPD, 715 VFRCZPD, 716
VFRCZPS, 717 VFRCZPS, 718
VFRCZSD, 719 VFRCZSD, 720
VFRCZSS, 721 VFRCZSS, 722
VPCMOV, 749 VPCMOV, 750
VPCOMB, 751 VPCOMB, 752
VPCOMD, 753 VPCOMD, 754
VPCOMQ, 755 VPCOMQ, 756
VPCOMUB, 757 VPCOMUB, 758
VPCOMUD, 759 VPCOMUD, 760
VPCOMUQ, 761 VPCOMUQ, 762
VPCOMUW, 763 VPCOMUW, 764
VPCOMW, 765 VPCOMW, 766
VPERMIL2PD, 773 VPERMIL2PD, 774
VPERMIL2PS, 777 VPERMIL2PS, 778
VPHADDBD, 802 VPHADDBD, 803
VPHADDBQ, 804 VPHADDBQ, 805
VPHADDBW, 806 VPHADDBW, 807
VPHADDDQ, 808 VPHADDDQ, 809
VPHADDUBD, 810 VPHADDUBD, 811
VPHADDUBQ, 812 VPHADDUBQ, 813
VPHADDUBW, 814 VPHADDUBW, 815
VPHADDUDQ, 816 VPHADDUDQ, 817
VPHADDUWD, 818 VPHADDUWD, 819
VPHADDUWQ, 820 VPHADDUWQ, 821
VPHADDWD, 822 VPHADDWD, 823
VPHADDWQ, 824 VPHADDWQ, 825
VPHSUBBW, 826 VPHSUBBW, 827
VPHSUBDQ, 828 VPHSUBDQ, 829
VPHSUBWD, 830 VPHSUBWD, 831
VPMACSDD, 832 VPMACSDD, 833
VPMACSDQH, 834 VPMACSDQH, 835
VPMACSDQL, 836 VPMACSDQL, 837
VPMACSSDD, 838 VPMACSSDD, 839
VPMACSSDQH, 840 VPMACSSDQH, 841
VPMACSSDQL, 842 VPMACSSDQL, 843
VPMACSSWD, 844 VPMACSSWD, 845
VPMACSSWW, 846 VPMACSSWW, 847
VPMACSWD, 848 VPMACSWD, 849
VPMACSWW, 850 VPMACSWW, 851
VPMADCSSWD, 852 VPMADCSSWD, 853
VPMADCSWD, 854 VPMADCSWD, 855
VPPERM, 860 VPPERM, 861
VPROTB, 862 VPROTB, 863
VPROTD, 864 VPROTD, 865
VPROTQ, 866 VPROTQ, 867
VPROTW, 868 VPROTW, 869
VPSHAB, 870 VPSHAB, 871
VPSHAD, 872 VPSHAD, 873
VPSHAQ, 874 VPSHAQ, 875
VPSHAW, 876 VPSHAW, 877
VPSHLB, 878 VPSHLB, 879
VPSHLD, 880 VPSHLD, 881
VPSHLQ, 882 VPSHLQ, 883
VPSHLW, 884 VPSHLW, 885
@26569_APM_V5.pdf [AMD64 Architecture Programmer's Manual Volume 5: 64-Bit Media and x87 Floating-Point Instructions, Rev 3.15 May 2018 (26569)] @26569_APM_V5.pdf [AMD64 Architecture Programmer's Manual Volume 5: 64-Bit Media and x87 Floating-Point Instructions, Rev 3.15 May 2018 (26569)]
FEMMS, 48 FEMMS, 48
PAVGUSB, 100 PAVGUSB, 100
@@ -1718,6 +1721,7 @@ PI2FD, 164
PI2FW, 166 PI2FW, 166
PMULHRW, 182 PMULHRW, 182
PSWAPD, 231 PSWAPD, 231
@AMD64_128-bit_SSE5_Instructions.pdf [AMD64 Technology 128-Bit SSE5 Instruction Set, Rev 3.01 August 2007 (43479)] @AMD64_128-bit_SSE5_Instructions.pdf [AMD64 Technology 128-Bit SSE5 Instruction Set, Rev 3.01 August 2007 (43479)]
COMPD, 32 COMPD, 32
COMPS, 35 COMPS, 35
@@ -1796,6 +1800,7 @@ PSHLB, 231
PSHLD, 233 PSHLD, 233
PSHLQ, 236 PSHLQ, 236
PSHLW, 238 PSHLW, 238
@326019-074.pdf [Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3C: System Programming Guide, Part 3, 326019-074US April 2021] @326019-074.pdf [Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3C: System Programming Guide, Part 3, 326019-074US April 2021]
INVEPT, 157 INVEPT, 157
INVVPID, 160 INVVPID, 160