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Moved M8C for release.

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ghidorahrex
2019-08-08 12:52:43 -04:00
parent 70b5c0478c
commit a22c168878
8 changed files with 1169 additions and 0 deletions
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Ghidra/Processors/M8C/Module.manifest
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Ghidra/Processors/M8C/build.gradle
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apply from: "$rootProject.projectDir/gradle/distributableGhidraModule.gradle"
apply from: "$rootProject.projectDir/gradle/processorProject.gradle"
apply plugin: 'eclipse'
eclipse.project.name = 'Processors M8C'
Ghidra/Processors/M8C/certification.manifest
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##VERSION: 2.0
.project||GHIDRA||||END|
Module.manifest||GHIDRA||||END|
build.gradle||GHIDRA||||END|
data/build.xml||GHIDRA||||END|
data/languages/m8c.cspec||GHIDRA||||END|
data/languages/m8c.ldefs||GHIDRA||||END|
data/languages/m8c.opinion||GHIDRA||||END|
data/languages/m8c.pspec||GHIDRA||||END|
data/languages/m8c.slaspec||GHIDRA||||END|
Ghidra/Processors/M8C/data/languages/m8c.cspec
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<?xml version="1.0" encoding="UTF-8"?>
<compiler_spec>
<global>
<range space="CODE" />
<range space="RAM" />
<range space="BANK0" />
<range space="BANK1" />
</global>
<stackpointer register="SP" space="RAM" growth="positive"/>
<returnaddress>
<varnode space="stack" offset="-2" size="2"/>
</returnaddress>
<default_proto>
<prototype name="__fastcall" extrapop="-2" stackshift="-2" strategy="register">
<input>
<pentry minsize="1" maxsize="1">
<register name="A"/>
</pentry>
<pentry minsize="1" maxsize="1">
<register name="X"/>
</pentry>
</input>
<output>
<pentry minsize="1" maxsize="1">
<register name="A"/>
</pentry>
</output>
<unaffected>
<register name="SP"/>
</unaffected>
<localrange>
<range space="stack" first="0x0" last="0xf"/>
</localrange>
<killedbycall>
<register name="X" />
</killedbycall>
</prototype>
</default_proto>
<prototype name="stdcall" extrapop="-2" stackshift="-2" >
<input>
<pentry minsize="1" maxsize="16" align="1">
<addr space="stack" offset="0xee" />
</pentry>
</input>
<output>
<pentry minsize="1" maxsize="1">
<register name="A"/>
</pentry>
</output>
<unaffected>
<register name="SP"/>
<register name="X" />
</unaffected>
<localrange>
<range space="stack" first="0x0" last="0xf"/>
</localrange>
</prototype>
</compiler_spec>
Ghidra/Processors/M8C/data/languages/m8c.ldefs
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<?xml version="1.0" encoding="UTF-8"?>
<language_definitions>
<language processor="M8C"
endian="big"
size="16"
variant="default"
version="1.0"
slafile="m8c.sla"
processorspec="m8c.pspec"
id="M8C:BE:16:default">
<description>Cypress M8C Microcontroller Family</description>
<compiler name="default" spec="m8c.cspec" id="default"/>
</language>
</language_definitions>
Ghidra/Processors/M8C/data/languages/m8c.opinion
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<opinions>
<constraint loader="XML" compilerSpecID="default">
<constraint primary="0" processor="M8C" endian="big" size="16" />
</constraint>
</opinions>
Ghidra/Processors/M8C/data/languages/m8c.pspec
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<?xml version="1.0" encoding="UTF-8"?>
<!--
This is the processor specification for the Cypress M8C family.
-->
<processor_spec>
<programcounter register="PC"/>
<!-- TODO
<volatile outputop="write_volatile" inputop="read_volatile">
<range space="RAM" first="0x0" last="0xFF"/>
</volatile>
<default_symbols>
<symbol name="VECTOR_Reset" address="FFFE" entry="true" type="code_ptr"/>
<symbol name="VECTOR_ClockMonitorFailReset" address="FFFC" entry="true" type="code_ptr"/>
<symbol name="VECTOR_COPFailureReset" address="FFFA" entry="true" type="code_ptr"/>
<symbol name="VECTOR_UnimplementedInstructionTrap" address="FFF8" entry="true" type="code_ptr"/>
<symbol name="VECTOR_SWI" address="FFF6" entry="true" type="code_ptr"/>
<symbol name="VECTOR_XIRQ" address="FFF4" entry="true" type="code_ptr"/>
<symbol name="VECTOR_IRQ" address="FFF2" entry="true" type="code_ptr"/>
<symbol name="VECTOR_RealTimeInterrupt" address="FFF0" entry="true" type="code_ptr"/>
<symbol name="VECTOR_StandardTimerChannel0" address="FFEE" entry="true" type="code_ptr"/>
<symbol name="VECTOR_StandardTimerChannel1" address="FFEC" entry="true" type="code_ptr"/>
<symbol name="VECTOR_StandardTimerChannel2" address="FFEA" entry="true" type="code_ptr"/>
<symbol name="VECTOR_StandardTimerChannel3" address="FFE8" entry="true" type="code_ptr"/>
<symbol name="VECTOR_StandardTimerChannel4" address="FFE6" entry="true" type="code_ptr"/>
<symbol name="VECTOR_StandardTimerChannel5" address="FFE4" entry="true" type="code_ptr"/>
<symbol name="VECTOR_StandardTimerChannel6" address="FFE2" entry="true" type="code_ptr"/>
<symbol name="VECTOR_StandardTimerChannel7" address="FFE0" entry="true" type="code_ptr"/>
<symbol name="VECTOR_StandardTimerOverflow" address="FFDE" entry="true" type="code_ptr"/>
<symbol name="VECTOR_PulseAccumulatorAOverflow" address="FFDC" entry="true" type="code_ptr"/>
<symbol name="VECTOR_PulseAccumulatorInputEdge" address="FFDA" entry="true" type="code_ptr"/>
<symbol name="VECTOR_SPI" address="FFD8" entry="true" type="code_ptr"/>
<symbol name="VECTOR_SCI" address="FFD6" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFD4" address="FFD4" entry="true" type="code_ptr"/>
<symbol name="VECTOR_ATD" address="FFD2" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFD0" address="FFD0" entry="true" type="code_ptr"/>
<symbol name="VECTOR_PortJ" address="FFCE" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFCC" address="FFCC" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFCA" address="FFCA" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFC8" address="FFC8" entry="true" type="code_ptr"/>
<symbol name="VECTOR_CRG_PLL_Lock" address="FFC6" entry="true" type="code_ptr"/>
<symbol name="VECTOR_CRGSelfClockMode" address="FFC4" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFC2" address="FFC2" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFC0" address="FFC0" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFBE" address="FFBE" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFBC" address="FFBC" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFBA" address="FFBA" entry="true" type="code_ptr"/>
<symbol name="VECTOR_FLASH" address="FFB8" entry="true" type="code_ptr"/>
<symbol name="VECTOR_CANwake-up" address="FFB6" entry="true" type="code_ptr"/>
<symbol name="VECTOR_CANerrors" address="FFB4" entry="true" type="code_ptr"/>
<symbol name="VECTOR_CANreceive" address="FFB2" entry="true" type="code_ptr"/>
<symbol name="VECTOR_CANtransmit" address="FFB0" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFAE" address="FFAE" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFAC" address="FFAC" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFAA" address="FFAA" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFA8" address="FFA8" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFA6" address="FFA6" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFA4" address="FFA4" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFA2" address="FFA2" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FFA0" address="FFA0" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FF9E" address="FF9E" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FF9C" address="FF9C" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FF9A" address="FF9A" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FF98" address="FF98" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FF96" address="FF96" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FF94" address="FF94" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FF92" address="FF92" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FF90" address="FF90" entry="true" type="code_ptr"/>
<symbol name="VECTOR_PortP" address="FF8E" entry="true" type="code_ptr"/>
<symbol name="VECTOR_PWM_EmergencyShutdown" address="FF8C" entry="true" type="code_ptr"/>
<symbol name="VECTOR_VREG_LVI" address="FF8A" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FF88" address="FF88" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FF86" address="FF86" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FF84" address="FF84" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FF82" address="FF82" entry="true" type="code_ptr"/>
<symbol name="VECTOR_Reserved_FF80" address="FF80" entry="true" type="code_ptr"/>
</default_symbols>
-->
<default_memory_blocks>
<memory_block name="RAM" start_address="RAM:0" length="0x100" initialized="false"/>
<memory_block name="BANK0" start_address="BANK0:0" length="0x100" initialized="false"/>
<memory_block name="BANK1" start_address="BANK1:0" length="0x100" initialized="false"/>
<!-- <memory_block name="STACK" start_address="STACK:0" length="0x100" initialized="false"/>
-->
</default_memory_blocks>
</processor_spec>
Ghidra/Processors/M8C/data/languages/m8c.slaspec
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