mirror of
https://github.com/NationalSecurityAgency/ghidra.git
synced 2026-05-25 13:55:32 +08:00
Merge remote-tracking branch 'origin/GT-3050_ghidorahrex_HCS08'
This commit is contained in:
ghidra1
@@ -0,0 +1,5 @@
|
||||
apply from: "$rootProject.projectDir/gradle/distributableGhidraModule.gradle"
|
||||
apply from: "$rootProject.projectDir/gradle/processorProject.gradle"
|
||||
apply plugin: 'eclipse'
|
||||
eclipse.project.name = 'Processors HCS08'
|
||||
|
||||
@@ -0,0 +1,25 @@
|
||||
##VERSION: 2.0
|
||||
.project||GHIDRA||||END|
|
||||
Module.manifest||GHIDRA||||END|
|
||||
build.gradle||GHIDRA||||END|
|
||||
data/languages/HC05-M68HC05TB.pspec||GHIDRA||||END|
|
||||
data/languages/HC05.ldefs||GHIDRA||||END|
|
||||
data/languages/HC05.pspec||GHIDRA||||END|
|
||||
data/languages/HC05.slaspec||GHIDRA||||END|
|
||||
data/languages/HC08-MC68HC908QY4.pspec||GHIDRA||||END|
|
||||
data/languages/HC08.ldefs||GHIDRA||||END|
|
||||
data/languages/HC08.pspec||GHIDRA||||END|
|
||||
data/languages/HC08.slaspec||GHIDRA||||END|
|
||||
data/languages/HCS08-MC9S08GB60.pspec||GHIDRA||||END|
|
||||
data/languages/HCS08.cspec||GHIDRA||||END|
|
||||
data/languages/HCS08.ldefs||GHIDRA||||END|
|
||||
data/languages/HCS08.opinion||GHIDRA||||END|
|
||||
data/languages/HCS08.pspec||GHIDRA||||END|
|
||||
data/languages/HCS08.slaspec||GHIDRA||||END|
|
||||
data/languages/HCS_HC.sinc||GHIDRA||||END|
|
||||
data/manuals/HC05.idx||GHIDRA||||END|
|
||||
data/manuals/HC08.idx||GHIDRA||||END|
|
||||
data/manuals/HCS08.idx||GHIDRA||||END|
|
||||
data/test-vectors/HC05_tv.s||GHIDRA|exclude|||END|
|
||||
data/test-vectors/HC08_tv.s||GHIDRA|exclude|||END|
|
||||
data/test-vectors/HCS08_tv.s||GHIDRA|exclude|||END|
|
||||
@@ -0,0 +1,60 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!--
|
||||
This is the processor specification for the HC05 (6805) MC68HC05TB variant.
|
||||
-->
|
||||
<processor_spec>
|
||||
<programcounter register="PC"/>
|
||||
<volatile outputop="write_volatile" inputop="read_volatile">
|
||||
<range space="RAM" first="0x0" last="0x1F"/>
|
||||
</volatile>
|
||||
<default_symbols>
|
||||
<symbol name="PORTA" address="0"/>
|
||||
<symbol name="PORTB" address="1"/>
|
||||
<symbol name="PORTC" address="2"/>
|
||||
<symbol name="PORTD" address="3"/>
|
||||
<symbol name="DDRA" address="4"/>
|
||||
<symbol name="DDRB" address="5"/>
|
||||
<symbol name="DDRC" address="6"/>
|
||||
<symbol name="DDRD" address="7"/>
|
||||
<symbol name="TSC" address="8"/>
|
||||
<symbol name="TCR" address="9"/>
|
||||
<symbol name="SPCR" address="A"/>
|
||||
<symbol name="SPSR" address="B"/>
|
||||
<symbol name="SPDR" address="C"/>
|
||||
<symbol name="BAUD" address="D"/>
|
||||
<symbol name="SCCR1" address="E"/>
|
||||
<symbol name="SCCR2" address="F"/>
|
||||
<symbol name="SCSR" address="10"/>
|
||||
<symbol name="SCDAT" address="11"/>
|
||||
<symbol name="TCR" address="12"/>
|
||||
<symbol name="TSR" address="13"/>
|
||||
<symbol name="ICHR" address="14"/>
|
||||
<symbol name="ICLR" address="15"/>
|
||||
<symbol name="OCHR" address="16"/>
|
||||
<symbol name="OCLR" address="17"/>
|
||||
<symbol name="CHR" address="18"/>
|
||||
<symbol name="CLR" address="19"/>
|
||||
<symbol name="ACHR" address="1A"/>
|
||||
<symbol name="Reserved_1B" address="1B"/>
|
||||
<symbol name="Reserved_1C" address="1C"/>
|
||||
<symbol name="Reserved_1D" address="1D"/>
|
||||
<symbol name="Reserved_1E" address="1E"/>
|
||||
<symbol name="Reserved_1F" address="1F"/>
|
||||
<symbol name="COP_Register" address="1FF0" entry="true" type="code_ptr"/>
|
||||
<symbol name="MaskOption" address="1FF1" entry="true" type="code_ptr"/>
|
||||
<symbol name="Reserved_1FF2" address="1FF2" entry="true" type="code_ptr"/>
|
||||
<symbol name="Reserved_1FF3" address="1FF3" entry="true" type="code_ptr"/>
|
||||
<symbol name="Reserved_1FF4" address="1FF4" entry="true" type="code_ptr"/>
|
||||
<symbol name="Reserved_1FF5" address="1FF5" entry="true" type="code_ptr"/>
|
||||
<symbol name="Reserved_1FF6" address="1FF6" entry="true" type="code_ptr"/>
|
||||
<symbol name="Reserved_1FF7" address="1FF7" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_On-Chip_Timer" address="1FF8" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_IRQ" address="1FFA" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_SWI" address="1FFC" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Reset" address="1FFE" entry="true" type="code_ptr"/>
|
||||
</default_symbols>
|
||||
<default_memory_blocks>
|
||||
<memory_block name="IO" start_address="0" length="0x20" initialized="false"/>
|
||||
<memory_block name="LOW_RAM" start_address="0xC0" length="0x40" initialized="false"/>
|
||||
</default_memory_blocks>
|
||||
</processor_spec>
|
||||
@@ -0,0 +1,28 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
|
||||
<language_definitions>
|
||||
<language processor="HC05"
|
||||
endian="big"
|
||||
size="16"
|
||||
variant="default"
|
||||
version="1.0"
|
||||
slafile="HC08.sla"
|
||||
processorspec="HC05.pspec"
|
||||
manualindexfile="../manuals/HC05.idx"
|
||||
id="HC05:BE:16:default">
|
||||
<description>HC05 (6805) Microcontroller Family</description>
|
||||
<compiler name="default" spec="HCS08.cspec" id="default"/>
|
||||
</language>
|
||||
<language processor="HC05"
|
||||
endian="big"
|
||||
size="16"
|
||||
variant="M68HC05TB"
|
||||
version="1.0"
|
||||
slafile="HC08.sla"
|
||||
processorspec="HC05-M68HC05TB.pspec"
|
||||
manualindexfile="../manuals/HC05.idx"
|
||||
id="HC05:BE:16:M68HC05TB">
|
||||
<description>HC05 (6805) Microcontroller Family - M68HC05TB</description>
|
||||
<compiler name="default" spec="HCS08.cspec" id="default"/>
|
||||
</language>
|
||||
</language_definitions>
|
||||
@@ -0,0 +1,33 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!--
|
||||
This is the processor specification for the HC05 (6805).
|
||||
-->
|
||||
<processor_spec>
|
||||
<programcounter register="PC"/>
|
||||
<volatile outputop="write_volatile" inputop="read_volatile">
|
||||
<range space="RAM" first="0x0" last="0x1F"/>
|
||||
</volatile>
|
||||
<default_symbols>
|
||||
<symbol name="PORTA" address="0"/>
|
||||
<symbol name="PORTB" address="1"/>
|
||||
<symbol name="PORTC" address="2"/>
|
||||
<symbol name="DDRA" address="4"/>
|
||||
<symbol name="DDRB" address="5"/>
|
||||
<symbol name="DDRC" address="6"/>
|
||||
<symbol name="TSC" address="8"/>
|
||||
<symbol name="TCR" address="9"/>
|
||||
<symbol name="SPCR" address="A"/>
|
||||
<symbol name="SPSR" address="B"/>
|
||||
<symbol name="SPDR" address="C"/>
|
||||
<symbol name="COP_Register" address="1FF0" entry="true" type="code_ptr"/>
|
||||
<symbol name="MaskOption" address="1FF1" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_On-Chip_Timer" address="1FF8" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_IRQ" address="1FFA" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_SWI" address="1FFC" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Reset" address="1FFE" entry="true" type="code_ptr"/>
|
||||
</default_symbols>
|
||||
<default_memory_blocks>
|
||||
<memory_block name="IO" start_address="0" length="0x20" initialized="false"/>
|
||||
<memory_block name="LOW_RAM" start_address="0xC0" length="0x40" initialized="false"/>
|
||||
</default_memory_blocks>
|
||||
</processor_spec>
|
||||
@@ -0,0 +1,5 @@
|
||||
# sleigh specification file for Freescale HC05 (6805, 68HC05)
|
||||
|
||||
@define HC05 "1"
|
||||
|
||||
@include "HCS_HC.sinc"
|
||||
@@ -0,0 +1,127 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!--
|
||||
This is the processor specification for the HC08 (68HC08) MC68HC908QY4 variant.
|
||||
-->
|
||||
<processor_spec>
|
||||
<programcounter register="PC"/>
|
||||
<volatile outputop="write_volatile" inputop="read_volatile">
|
||||
<range space="RAM" first="0x0" last="0x3F"/>
|
||||
<range space="RAM" first="0xFE00" last="0xFE0F"/>
|
||||
</volatile>
|
||||
<default_symbols>
|
||||
<symbol name="PTA" address="0"/>
|
||||
<symbol name="PTB" address="1"/>
|
||||
<symbol name="Reserved_02" address="2"/>
|
||||
<symbol name="Reserved_03" address="3"/>
|
||||
<symbol name="DDRA" address="4"/>
|
||||
<symbol name="DDRB" address="5"/>
|
||||
<symbol name="Reserved_06" address="6"/>
|
||||
<symbol name="Reserved_07" address="7"/>
|
||||
<symbol name="Reserved_08" address="8"/>
|
||||
<symbol name="Reserved_09" address="9"/>
|
||||
<symbol name="Reserved_0A" address="A"/>
|
||||
<symbol name="PTAPUE" address="B"/>
|
||||
<symbol name="PTBPUE" address="C"/>
|
||||
<symbol name="Reserved_0D" address="D"/>
|
||||
<symbol name="Reserved_0E" address="E"/>
|
||||
<symbol name="Reserved_0F" address="F"/>
|
||||
<symbol name="Reserved_10" address="10"/>
|
||||
<symbol name="Reserved_11" address="11"/>
|
||||
<symbol name="Reserved_12" address="12"/>
|
||||
<symbol name="Reserved_13" address="13"/>
|
||||
<symbol name="Reserved_14" address="14"/>
|
||||
<symbol name="Reserved_15" address="15"/>
|
||||
<symbol name="Reserved_16" address="16"/>
|
||||
<symbol name="Reserved_17" address="17"/>
|
||||
<symbol name="Reserved_18" address="18"/>
|
||||
<symbol name="Reserved_19" address="19"/>
|
||||
<symbol name="KBSCR" address="1A"/>
|
||||
<symbol name="KBIER" address="1B"/>
|
||||
<symbol name="Reserved_1C" address="1C"/>
|
||||
<symbol name="INTSCR" address="1D"/>
|
||||
<symbol name="CONFIG2" address="1E"/>
|
||||
<symbol name="CONFIG1" address="1F"/>
|
||||
<symbol name="TSC" address="20"/>
|
||||
<symbol name="TCNTH" address="21"/>
|
||||
<symbol name="TCNTL" address="22"/>
|
||||
<symbol name="TMODH" address="23"/>
|
||||
<symbol name="TMODL" address="24"/>
|
||||
<symbol name="TSC0" address="25"/>
|
||||
<symbol name="TCH0H" address="26"/>
|
||||
<symbol name="TCH0L" address="27"/>
|
||||
<symbol name="TSC1" address="28"/>
|
||||
<symbol name="TCH1H" address="29"/>
|
||||
<symbol name="TCH1L" address="2A"/>
|
||||
<symbol name="Reserved_2B" address="2B"/>
|
||||
<symbol name="Reserved_2C" address="2C"/>
|
||||
<symbol name="Reserved_2D" address="2D"/>
|
||||
<symbol name="Reserved_2E" address="2E"/>
|
||||
<symbol name="Reserved_2F" address="2F"/>
|
||||
<symbol name="Reserved_30" address="30"/>
|
||||
<symbol name="Reserved_31" address="31"/>
|
||||
<symbol name="Reserved_32" address="32"/>
|
||||
<symbol name="Reserved_33" address="33"/>
|
||||
<symbol name="Reserved_34" address="34"/>
|
||||
<symbol name="Reserved_35" address="35"/>
|
||||
<symbol name="OSCSTAT" address="36"/>
|
||||
<symbol name="Reserved_37" address="37"/>
|
||||
<symbol name="OSCTRIM" address="38"/>
|
||||
<symbol name="Reserved_39" address="39"/>
|
||||
<symbol name="Reserved_3A" address="3A"/>
|
||||
<symbol name="Reserved_3B" address="3B"/>
|
||||
<symbol name="ADSCR" address="3C"/>
|
||||
<symbol name="Reserved_3D" address="3D"/>
|
||||
<symbol name="ADR" address="3E"/>
|
||||
<symbol name="ADICLK" address="3F"/>
|
||||
<symbol name="BSR" address="FE00"/>
|
||||
<symbol name="SRSR" address="FE01"/>
|
||||
<symbol name="BRKAR" address="FE02"/>
|
||||
<symbol name="BFCR" address="FE03"/>
|
||||
<symbol name="INT1" address="FE04"/>
|
||||
<symbol name="INT2" address="FE05"/>
|
||||
<symbol name="INT3" address="FE06"/>
|
||||
<symbol name="Reserved_FE07" address="FE07"/>
|
||||
<symbol name="FLCR" address="FE08"/>
|
||||
<symbol name="BRKH" address="FE09"/>
|
||||
<symbol name="BRKL" address="FE0A"/>
|
||||
<symbol name="BRKSCR" address="FE0B"/>
|
||||
<symbol name="LVISR" address="FE0C"/>
|
||||
<symbol name="Reserved_FE0D" address="FE0D"/>
|
||||
<symbol name="Reserved_FE0E" address="FE0E"/>
|
||||
<symbol name="Reserved_FE0F" address="FE0F"/>
|
||||
<symbol name="FLBPR" address="FFBE"/>
|
||||
<symbol name="Reserved_FFBF" address="FFBF"/>
|
||||
<symbol name="IOSCTV_5V" address="FFC0"/>
|
||||
<symbol name="IOSCTV_3V" address="FFC1"/>
|
||||
<symbol name="COPCTL" address="FFFF"/>
|
||||
<symbol name="VECTOR_ADC_Conversion_Complete" address="FFDE" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Keyboard" address="FFE0" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Not_Used_FFE2" address="FFE2" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Not_Used_FFE4" address="FFE4" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Not_Used_FFE6" address="FFE6" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Not_Used_FFE8" address="FFE8" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Not_Used_FFEA" address="FFEA" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Not_Used_FFEC" address="FFEC" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Not_Used_FFEE" address="FFEE" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Not_Used_FFF0" address="FFF0" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_TIM_overflow" address="FFF2" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_TIM_Channel_1" address="FFF4" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_TIM_Channel_0" address="FFF6" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Not_Used_FFF8" address="FFF8" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_IRQ" address="FFFA" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_SWI" address="FFFC" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Reset" address="FFFE" entry="true" type="code_ptr"/>
|
||||
</default_symbols>
|
||||
<default_memory_blocks>
|
||||
<memory_block name="DIRECT_PAGE_REGISTERS" start_address="0x0000" length="0x0040" initialized="false"/>
|
||||
<memory_block name="LOW_RAM" start_address="0x0080" length="0x0080" initialized="false"/>
|
||||
<memory_block name="HIGH_PAGE_REGISTERS" start_address="0xFE00" length="0x0200" initialized="false"/>
|
||||
<!--
|
||||
<memory_block name="ROM1" start_address="0x2800" length="0x0600" initialized="false"/>
|
||||
<memory_block name="FLASH1" start_address="0xEE00" length="0x1000" initialized="false"/>
|
||||
<memory_block name="ROM2" start_address="0xFE10" length="0x01A0" initialized="false"/>
|
||||
<memory_block name="FLASH2" start_address="0xFFB0" length="0x000D" initialized="false"/>
|
||||
<memory_block name="FLASH3" start_address="0xFFC2" length="0x000D" initialized="false"/>
|
||||
-->
|
||||
</default_memory_blocks>
|
||||
</processor_spec>
|
||||
@@ -0,0 +1,28 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
|
||||
<language_definitions>
|
||||
<language processor="HC08"
|
||||
endian="big"
|
||||
size="16"
|
||||
variant="default"
|
||||
version="1.0"
|
||||
slafile="HC08.sla"
|
||||
processorspec="HC08.pspec"
|
||||
manualindexfile="../manuals/HC08.idx"
|
||||
id="HC08:BE:16:default">
|
||||
<description>HC08 Microcontroller Family</description>
|
||||
<compiler name="default" spec="HCS08.cspec" id="default"/>
|
||||
</language>
|
||||
<language processor="HC08"
|
||||
endian="big"
|
||||
size="16"
|
||||
variant="MC68HC908QY4"
|
||||
version="1.0"
|
||||
slafile="HC08.sla"
|
||||
processorspec="HC08-MC68HC908QY4.pspec"
|
||||
manualindexfile="../manuals/HC08.idx"
|
||||
id="HC08:BE:16:MC68HC908QY4">
|
||||
<description>HC08 Microcontroller Family - MC68HC908QY4</description>
|
||||
<compiler name="default" spec="HCS08.cspec" id="default"/>
|
||||
</language>
|
||||
</language_definitions>
|
||||
@@ -0,0 +1,17 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!--
|
||||
This is the processor specification for the HC08 (68HC08) processor family.
|
||||
-->
|
||||
<processor_spec>
|
||||
<programcounter register="PC"/>
|
||||
<default_symbols>
|
||||
<symbol name="BRKAR" address="FE02"/>
|
||||
<symbol name="BFCR" address="FE03"/>
|
||||
<symbol name="INT1" address="FE04"/>
|
||||
<symbol name="INT2" address="FE05"/>
|
||||
<symbol name="COPCTL" address="FFFF"/>
|
||||
<symbol name="VECTOR_IRQ" address="FFFA" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_SWI" address="FFFC" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Reset" address="FFFE" entry="true" type="code_ptr"/>
|
||||
</default_symbols>
|
||||
</processor_spec>
|
||||
@@ -0,0 +1,5 @@
|
||||
# sleigh specification file for Freescale HC08 (68HC08)
|
||||
|
||||
@define HC08 "1"
|
||||
|
||||
@include "HCS_HC.sinc"
|
||||
@@ -0,0 +1,244 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!--
|
||||
This is the processor specification for the HCS08 (68HCS08) MC9S08GB60 variant.
|
||||
-->
|
||||
<processor_spec>
|
||||
<programcounter register="PC"/>
|
||||
<volatile outputop="write_volatile" inputop="read_volatile">
|
||||
<range space="RAM" first="0x0" last="0x7F"/>
|
||||
<range space="RAM" first="0x1800" last="0x182B"/>
|
||||
</volatile>
|
||||
<default_symbols>
|
||||
<symbol name="PTAD" address="0"/>
|
||||
<symbol name="PTAPE" address="1"/>
|
||||
<symbol name="PTASE" address="2"/>
|
||||
<symbol name="PTADD" address="3"/>
|
||||
<symbol name="PTBD" address="4"/>
|
||||
<symbol name="PTBPE" address="5"/>
|
||||
<symbol name="PTBSE" address="6"/>
|
||||
<symbol name="PTBDD" address="7"/>
|
||||
<symbol name="PTCD" address="8"/>
|
||||
<symbol name="PTCPE" address="9"/>
|
||||
<symbol name="PTCSE" address="A"/>
|
||||
<symbol name="PTCDD" address="B"/>
|
||||
<symbol name="PTDD" address="C"/>
|
||||
<symbol name="PTDPE" address="D"/>
|
||||
<symbol name="PTDSE" address="E"/>
|
||||
<symbol name="PTDDD" address="F"/>
|
||||
<symbol name="PTED" address="10"/>
|
||||
<symbol name="PTEPE" address="11"/>
|
||||
<symbol name="PTESE" address="12"/>
|
||||
<symbol name="PTEDD" address="13"/>
|
||||
<symbol name="IRQSC" address="14"/>
|
||||
<symbol name="Reserved_15" address="15"/>
|
||||
<symbol name="KBI1SC" address="16"/>
|
||||
<symbol name="KBI1PE" address="17"/>
|
||||
<symbol name="SCI1BDH" address="18"/>
|
||||
<symbol name="SCI1BDL" address="19"/>
|
||||
<symbol name="SCI1C1" address="1A"/>
|
||||
<symbol name="SCI1C2" address="1B"/>
|
||||
<symbol name="SCI1S1" address="1C"/>
|
||||
<symbol name="SCI1S2" address="1D"/>
|
||||
<symbol name="SCI1C3" address="1E"/>
|
||||
<symbol name="SCI1D" address="1F"/>
|
||||
<symbol name="SCI2BDH" address="20"/>
|
||||
<symbol name="SCI2BDL" address="21"/>
|
||||
<symbol name="SCI2C1" address="22"/>
|
||||
<symbol name="SCI2C2" address="23"/>
|
||||
<symbol name="SCI2S1" address="24"/>
|
||||
<symbol name="SCI2S2" address="25"/>
|
||||
<symbol name="SCI2C3" address="26"/>
|
||||
<symbol name="SCI2D" address="27"/>
|
||||
<symbol name="SPI1C1" address="28"/>
|
||||
<symbol name="SPI1C2" address="29"/>
|
||||
<symbol name="SPI1BR" address="2A"/>
|
||||
<symbol name="SPI1S" address="2B"/>
|
||||
<symbol name="Reserved_2C" address="2C"/>
|
||||
<symbol name="SPI1D" address="2D"/>
|
||||
<symbol name="Reserved_2E" address="2E"/>
|
||||
<symbol name="Reserved_2F" address="2F"/>
|
||||
<symbol name="TPM1SC" address="30"/>
|
||||
<symbol name="TPM1CNTH" address="31"/>
|
||||
<symbol name="TPM1CNTL" address="32"/>
|
||||
<symbol name="TPM1MODH" address="33"/>
|
||||
<symbol name="TPM1MODL" address="34"/>
|
||||
<symbol name="TPM1C0SC" address="35"/>
|
||||
<symbol name="TPM1C0VH" address="36"/>
|
||||
<symbol name="TPM1COVL" address="37"/>
|
||||
<symbol name="TPM1C1SC" address="38"/>
|
||||
<symbol name="TPM1C1VH" address="39"/>
|
||||
<symbol name="TPM1C1VL" address="3A"/>
|
||||
<symbol name="TPM1C2SC" address="3B"/>
|
||||
<symbol name="TPM1C2VH" address="3C"/>
|
||||
<symbol name="TPM1C2VL" address="3D"/>
|
||||
<symbol name="Reserved_3E" address="3E"/>
|
||||
<symbol name="Reserved_3F" address="3F"/>
|
||||
<symbol name="PTFD" address="40"/>
|
||||
<symbol name="PTFPE" address="41"/>
|
||||
<symbol name="PTFSE" address="42"/>
|
||||
<symbol name="PTFDD" address="43"/>
|
||||
<symbol name="PTGD" address="44"/>
|
||||
<symbol name="PTGPE" address="45"/>
|
||||
<symbol name="PTGSE" address="46"/>
|
||||
<symbol name="PTGDD" address="47"/>
|
||||
<symbol name="ICGC1" address="48"/>
|
||||
<symbol name="ICGC2" address="49"/>
|
||||
<symbol name="ICGS1" address="4A"/>
|
||||
<symbol name="ICGS2" address="4B"/>
|
||||
<symbol name="ICGFLTU" address="4C"/>
|
||||
<symbol name="ICGFLTL" address="4D"/>
|
||||
<symbol name="ICGTRM" address="4E"/>
|
||||
<symbol name="Reserved_4F" address="4F"/>
|
||||
<symbol name="ATD1C" address="50"/>
|
||||
<symbol name="ATD1SC" address="51"/>
|
||||
<symbol name="ATD1RH" address="52"/>
|
||||
<symbol name="ATD1RL" address="53"/>
|
||||
<symbol name="ATD1PE" address="54"/>
|
||||
<symbol name="Reserved_55" address="55"/>
|
||||
<symbol name="Reserved_56" address="56"/>
|
||||
<symbol name="Reserved_57" address="57"/>
|
||||
<symbol name="IIC1A" address="58"/>
|
||||
<symbol name="IIC1F" address="59"/>
|
||||
<symbol name="IIC1C" address="5A"/>
|
||||
<symbol name="IIC1S" address="5B"/>
|
||||
<symbol name="IIC1D" address="5C"/>
|
||||
<symbol name="Reserved_5D" address="5D"/>
|
||||
<symbol name="Reserved_5E" address="5E"/>
|
||||
<symbol name="Reserved_5F" address="5F"/>
|
||||
<symbol name="TPM2SC" address="60"/>
|
||||
<symbol name="TPM2CNTH" address="61"/>
|
||||
<symbol name="TPM2CNTL" address="62"/>
|
||||
<symbol name="TPM2MODH" address="63"/>
|
||||
<symbol name="TPM2MODL" address="64"/>
|
||||
<symbol name="TPM2C0SC" address="65"/>
|
||||
<symbol name="TPM2C0VH" address="66"/>
|
||||
<symbol name="TPM2C0VL" address="67"/>
|
||||
<symbol name="TPM2C1SC" address="68"/>
|
||||
<symbol name="TPM2C1VH" address="69"/>
|
||||
<symbol name="TPM2C1VL" address="6A"/>
|
||||
<symbol name="TPM2C2SC" address="6B"/>
|
||||
<symbol name="TPM2C2VH" address="6C"/>
|
||||
<symbol name="TPM2C2VL" address="6D"/>
|
||||
<symbol name="TPM2C3SC" address="6E"/>
|
||||
<symbol name="TPM2C3VH" address="6F"/>
|
||||
<symbol name="TPM2C3VL" address="70"/>
|
||||
<symbol name="TPM2C4SC" address="71"/>
|
||||
<symbol name="TPM2C4VH" address="72"/>
|
||||
<symbol name="TPM2C4VL" address="73"/>
|
||||
<symbol name="Reserved_74" address="74"/>
|
||||
<symbol name="Reserved_75" address="75"/>
|
||||
<symbol name="Reserved_76" address="76"/>
|
||||
<symbol name="Reserved_77" address="77"/>
|
||||
<symbol name="Reserved_78" address="78"/>
|
||||
<symbol name="Reserved_79" address="79"/>
|
||||
<symbol name="Reserved_7A" address="7A"/>
|
||||
<symbol name="Reserved_7B" address="7B"/>
|
||||
<symbol name="Reserved_7C" address="7C"/>
|
||||
<symbol name="Reserved_7D" address="7D"/>
|
||||
<symbol name="Reserved_7E" address="7E"/>
|
||||
<symbol name="Reserved_7F" address="7F"/>
|
||||
<symbol name="SRS" address="1800"/>
|
||||
<symbol name="SBDFR" address="1801"/>
|
||||
<symbol name="SOPT" address="1802"/>
|
||||
<symbol name="Reserved_1803" address="1803"/>
|
||||
<symbol name="Reserved_1804" address="1804"/>
|
||||
<symbol name="Reserved_1805" address="1805"/>
|
||||
<symbol name="SDIDH" address="1806"/>
|
||||
<symbol name="SDIDL" address="1807"/>
|
||||
<symbol name="SRTISC" address="1808"/>
|
||||
<symbol name="SPMSC1" address="1809"/>
|
||||
<symbol name="SPMSC2" address="180A"/>
|
||||
<symbol name="Reserved_180B" address="180B"/>
|
||||
<symbol name="Reserved_180C" address="180C"/>
|
||||
<symbol name="Reserved_180D" address="180D"/>
|
||||
<symbol name="Reserved_180E" address="180E"/>
|
||||
<symbol name="Reserved_180F" address="180F"/>
|
||||
<symbol name="DBGCAH" address="1810"/>
|
||||
<symbol name="DBGCAL" address="1811"/>
|
||||
<symbol name="DBGCBH" address="1812"/>
|
||||
<symbol name="DBGCBL" address="1813"/>
|
||||
<symbol name="DBGFH" address="1814"/>
|
||||
<symbol name="DBGFL" address="1815"/>
|
||||
<symbol name="DBGC" address="1816"/>
|
||||
<symbol name="DBGT" address="1817"/>
|
||||
<symbol name="DBGS" address="1818"/>
|
||||
<symbol name="Reserved_1819" address="1819"/>
|
||||
<symbol name="Reserved_181A" address="181A"/>
|
||||
<symbol name="Reserved_181B" address="181B"/>
|
||||
<symbol name="Reserved_181C" address="181C"/>
|
||||
<symbol name="Reserved_181D" address="181D"/>
|
||||
<symbol name="Reserved_181E" address="181E"/>
|
||||
<symbol name="Reserved_181F" address="181F"/>
|
||||
<symbol name="FCDIV" address="1820"/>
|
||||
<symbol name="FOPT" address="1821"/>
|
||||
<symbol name="Reserved_1822" address="1822"/>
|
||||
<symbol name="FCNFG" address="1823"/>
|
||||
<symbol name="FPROT" address="1824"/>
|
||||
<symbol name="FSTAT" address="1825"/>
|
||||
<symbol name="FCMD" address="1826"/>
|
||||
<symbol name="Reserved_1827" address="1827"/>
|
||||
<symbol name="Reserved_1828" address="1828"/>
|
||||
<symbol name="Reserved_1829" address="1829"/>
|
||||
<symbol name="Reserved_182A" address="182A"/>
|
||||
<symbol name="Reserved_182B" address="182B"/>
|
||||
<symbol name="NVBACKKEY0" address="FFB0"/>
|
||||
<symbol name="NVBACKKEY1" address="FFB1"/>
|
||||
<symbol name="NVBACKKEY2" address="FFB2"/>
|
||||
<symbol name="NVBACKKEY3" address="FFB3"/>
|
||||
<symbol name="NVBACKKEY4" address="FFB4"/>
|
||||
<symbol name="NVBACKKEY5" address="FFB5"/>
|
||||
<symbol name="NVBACKKEY6" address="FFB6"/>
|
||||
<symbol name="NVBACKKEY7" address="FFB7"/>
|
||||
<symbol name="Reserved_FFB8" address="FFB8"/>
|
||||
<symbol name="Reserved_FFB9" address="FFB9"/>
|
||||
<symbol name="Reserved_FFBA" address="FFBA"/>
|
||||
<symbol name="Reserved_FFBB" address="FFBB"/>
|
||||
<symbol name="Reserved_FFBC" address="FFBC"/>
|
||||
<symbol name="NVPROT" address="FFBD"/>
|
||||
<symbol name="Reserved_FFBE" address="FFBE"/>
|
||||
<symbol name="NVOPT" address="FFBF"/>
|
||||
<symbol name="VECTOR_USER_FFC0" address="FFC0" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_USER_FFC2" address="FFC2" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_USER_FFC4" address="FFC4" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_USER_FFC6" address="FFC6" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_USER_FFC8" address="FFC8" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_USER_FFCA" address="FFCA" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_RTI" address="FFCC" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_IIC" address="FFCE" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_ATD_Conversion" address="FFD0" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Keyboard" address="FFD2" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_SCI2_Transmit" address="FFD4" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_SCI2_Receive" address="FFD6" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_SCI2_Error" address="FFD8" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_SCI1_Transmit" address="FFDA" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_SCI1_Receive" address="FFDC" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_SCI1_Error" address="FFDE" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_SPI" address="FFE0" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_TPM2_Overflow" address="FFE2" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_TPM2_Channel_4" address="FFE4" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_TPM2_Channel_3" address="FFE6" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_TPM2_Channel_2" address="FFE8" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_TPM2_Channel_1" address="FFEA" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_TPM2_Channel_0" address="FFEC" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_TPM1_Overflow" address="FFEE" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_TPM1_Channel_2" address="FFF0" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_TPM1_Channel_1" address="FFF2" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_TPM1_Channel_0" address="FFF4" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_ICG" address="FFF6" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Low_Voltage_Detect" address="FFF8" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_IRQ" address="FFFA" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_SWI" address="FFFC" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Reset" address="FFFE" entry="true" type="code_ptr"/>
|
||||
</default_symbols>
|
||||
<default_memory_blocks>
|
||||
<memory_block name="DIRECT_PAGE_REGISTERS" start_address="0x0000" length="0x0080" initialized="false"/>
|
||||
<memory_block name="LOW_RAM" start_address="0x0080" length="0x0080" initialized="false"/>
|
||||
<memory_block name="MAIN_RAM" start_address="0x0100" length="0x0F80" initialized="false"/>
|
||||
<memory_block name="HIGH_PAGE_REGISTERS" start_address="0x1800" length="0x002C" initialized="false"/>
|
||||
<!--
|
||||
<memory_block name="FLASH1" start_address="0x1080" length="0x0780" initialized="false"/>
|
||||
<memory_block name="FLASH2" start_address="0x182C" length="0xE7D4" initialized="false"/>
|
||||
<memory_block name="NON-VOLATILE_REGISTERS" start_address="0xFFB0" length="0x0010" initialized="false"/>
|
||||
-->
|
||||
</default_memory_blocks>
|
||||
</processor_spec>
|
||||
@@ -0,0 +1,50 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
|
||||
<compiler_spec>
|
||||
<global>
|
||||
<range space="RAM"/>
|
||||
</global>
|
||||
<stackpointer register="SP" space="RAM" growth="negative"/>
|
||||
<returnaddress>
|
||||
<varnode space="stack" offset="0" size="2"/>
|
||||
</returnaddress>
|
||||
<default_proto>
|
||||
<prototype name="__fastcall" extrapop="2" stackshift="2">
|
||||
<input>
|
||||
<pentry minsize="1" maxsize="1">
|
||||
<register name="A"/>
|
||||
</pentry>
|
||||
</input>
|
||||
<output>
|
||||
<pentry minsize="1" maxsize="1">
|
||||
<register name="A"/>
|
||||
</pentry>
|
||||
</output>
|
||||
<unaffected>
|
||||
<register name="SP"/>
|
||||
<register name="HIX"/>
|
||||
</unaffected>
|
||||
</prototype>
|
||||
</default_proto>
|
||||
<prototype name="__stdcall" extrapop="2" stackshift="2">
|
||||
<input>
|
||||
<pentry minsize="1" maxsize="500" align="1">
|
||||
<addr offset="3" space="stack"/>
|
||||
</pentry>
|
||||
</input>
|
||||
<output>
|
||||
<pentry minsize="1" maxsize="1">
|
||||
<register name="A"/>
|
||||
</pentry>
|
||||
</output>
|
||||
<unaffected>
|
||||
<register name="SP"/>
|
||||
<register name="HIX"/>
|
||||
</unaffected>
|
||||
</prototype>
|
||||
<resolveprototype name="__fastcall/__stdcall">
|
||||
<model name="__stdcall"/> <!-- The default case -->
|
||||
<model name="__fastcall"/>
|
||||
</resolveprototype>
|
||||
<eval_current_prototype name="__fastcall/__stdcall"/>
|
||||
</compiler_spec>
|
||||
@@ -0,0 +1,28 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
|
||||
<language_definitions>
|
||||
<language processor="HCS08"
|
||||
endian="big"
|
||||
size="16"
|
||||
variant="default"
|
||||
version="1.0"
|
||||
slafile="HCS08.sla"
|
||||
processorspec="HCS08.pspec"
|
||||
manualindexfile="../manuals/HCS08.idx"
|
||||
id="HCS08:BE:16:default">
|
||||
<description>HCS08 Microcontroller Family</description>
|
||||
<compiler name="default" spec="HCS08.cspec" id="default"/>
|
||||
</language>
|
||||
<language processor="HCS08"
|
||||
endian="big"
|
||||
size="16"
|
||||
variant="MC9S08GB60"
|
||||
version="1.0"
|
||||
slafile="HCS08.sla"
|
||||
processorspec="HCS08-MC9S08GB60.pspec"
|
||||
manualindexfile="../manuals/HCS08.idx"
|
||||
id="HCS08:BE:16:MC9S08GB60">
|
||||
<description>HCS08 Microcontroller Family - MC9S08GB60</description>
|
||||
<compiler name="default" spec="HCS08.cspec" id="default"/>
|
||||
</language>
|
||||
</language_definitions>
|
||||
@@ -0,0 +1,6 @@
|
||||
<opinions>
|
||||
<constraint loader="Executable and Linking Format (ELF)" compilerSpecID="default">
|
||||
<constraint primary="71" processor="HCS08" endian="big" size="16" variant="default"/>
|
||||
<constraint primary="72" processor="HCS08" endian="big" size="16" variant="default"/>
|
||||
</constraint>
|
||||
</opinions>
|
||||
@@ -0,0 +1,28 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!--
|
||||
This is the processor specification for the HCS08 (68HCS08) processor family.
|
||||
-->
|
||||
<processor_spec>
|
||||
<programcounter register="PC"/>
|
||||
<default_symbols>
|
||||
<symbol name="NVBACKKEY0" address="FFB0"/>
|
||||
<symbol name="NVBACKKEY1" address="FFB1"/>
|
||||
<symbol name="NVBACKKEY2" address="FFB2"/>
|
||||
<symbol name="NVBACKKEY3" address="FFB3"/>
|
||||
<symbol name="NVBACKKEY4" address="FFB4"/>
|
||||
<symbol name="NVBACKKEY5" address="FFB5"/>
|
||||
<symbol name="NVBACKKEY6" address="FFB6"/>
|
||||
<symbol name="NVBACKKEY7" address="FFB7"/>
|
||||
<symbol name="Reserved_FFB8" address="FFB8"/>
|
||||
<symbol name="Reserved_FFB9" address="FFB9"/>
|
||||
<symbol name="Reserved_FFBA" address="FFBA"/>
|
||||
<symbol name="Reserved_FFBB" address="FFBB"/>
|
||||
<symbol name="Reserved_FFBC" address="FFBC"/>
|
||||
<symbol name="NVPROT" address="FFBD"/>
|
||||
<symbol name="NVOPT" address="FFBF"/>
|
||||
<symbol name="VECTOR_Low_Voltage_Detect" address="FFF8" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_IRQ" address="FFFA" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_SWI" address="FFFC" entry="true" type="code_ptr"/>
|
||||
<symbol name="VECTOR_Reset" address="FFFE" entry="true" type="code_ptr"/>
|
||||
</default_symbols>
|
||||
</processor_spec>
|
||||
@@ -0,0 +1,5 @@
|
||||
# sleigh specification file for Freescale HCS08 (68HCS08)
|
||||
|
||||
@define HCS08 "1"
|
||||
|
||||
@include "HCS_HC.sinc"
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,90 @@
|
||||
@M68HC05TB.pdf[ Rev. 2.0 1998 M68HC05 Family, Understanding Small Microcontrollers, NXP.com ]
|
||||
ADC, 222
|
||||
ADD, 223
|
||||
AND, 224
|
||||
ASL, 225
|
||||
ASLA, 225
|
||||
ASLX, 225
|
||||
ASR, 226
|
||||
ASRA, 226
|
||||
ASRX, 226
|
||||
BCC, 227
|
||||
BCLR, 228
|
||||
BCS, 229
|
||||
BEQ, 230
|
||||
BHCC, 231
|
||||
BHCS, 232
|
||||
BHI, 233
|
||||
BHS, 234
|
||||
BIH, 235
|
||||
BIL, 236
|
||||
BIT, 237
|
||||
BLO, 238
|
||||
BLS, 239
|
||||
BMC, 240
|
||||
BMI, 241
|
||||
BMS, 242
|
||||
BNE, 243
|
||||
BPL, 244
|
||||
BRA, 245
|
||||
BRCLR, 246
|
||||
BRN, 247
|
||||
BRSET, 248
|
||||
BSET, 249
|
||||
BSR, 250
|
||||
CLC, 251
|
||||
CLI, 252
|
||||
CLR, 253
|
||||
CLRA, 253
|
||||
CLRX, 253
|
||||
CMP, 254
|
||||
COM, 255
|
||||
COMA, 255
|
||||
COMX, 255
|
||||
CPX, 256
|
||||
DEC, 257
|
||||
DECA, 257
|
||||
DECX, 257
|
||||
EOR, 258
|
||||
INC, 259
|
||||
INCA, 259
|
||||
INCX, 259
|
||||
JMP, 260
|
||||
JSR, 261
|
||||
LDA, 262
|
||||
LDX, 263
|
||||
LSL, 264
|
||||
LSLA, 264
|
||||
LSLX, 264
|
||||
LSR, 265
|
||||
LSRA, 265
|
||||
LSRX, 265
|
||||
MUL, 266
|
||||
NEG, 267
|
||||
NEGA, 267
|
||||
NEGX, 267
|
||||
NOP, 268
|
||||
ORA, 269
|
||||
ROL, 270
|
||||
ROLA, 270
|
||||
ROLX, 270
|
||||
ROR, 271
|
||||
RORA, 271
|
||||
RORX, 271
|
||||
RSP, 272
|
||||
RTI, 273
|
||||
RTS, 274
|
||||
SBC, 275
|
||||
SEC, 276
|
||||
SEI, 277
|
||||
STA, 278
|
||||
STOP, 279
|
||||
STX, 280
|
||||
SUB, 281
|
||||
SWI, 282
|
||||
TAX, 283
|
||||
TST, 284
|
||||
TSTA, 284
|
||||
TSTX, 284
|
||||
TXA, 285
|
||||
WAIT, 286
|
||||
@@ -0,0 +1,120 @@
|
||||
@CPU08RM.pdf[ Rev. 4 02/2006 M68HC08 Microcontrollers, NXP.com ]
|
||||
ADC, 63
|
||||
ADD, 64
|
||||
AIS, 65
|
||||
AIX, 66
|
||||
AND, 67
|
||||
ASL, 68
|
||||
ASLA, 68
|
||||
ASLX, 68
|
||||
ASR, 69
|
||||
ASRA, 69
|
||||
ASRX, 69
|
||||
BCC, 70
|
||||
BCLR, 71
|
||||
BCS, 72
|
||||
BEQ, 73
|
||||
BGE, 74
|
||||
BGT, 75
|
||||
BHCC, 76
|
||||
BHCS, 77
|
||||
BHI, 78
|
||||
BHS, 79
|
||||
BIH, 80
|
||||
BIL, 81
|
||||
BIT, 82
|
||||
BLE, 83
|
||||
BLO, 84
|
||||
BLS, 85
|
||||
BLT, 86
|
||||
BMC, 87
|
||||
BMI, 88
|
||||
BMS, 89
|
||||
BNE, 90
|
||||
BPL, 91
|
||||
BRA, 92
|
||||
BRCLR, 94
|
||||
BRN, 95
|
||||
BRSET, 96
|
||||
BSET, 97
|
||||
BSR, 98
|
||||
CBEQ, 99
|
||||
CBEQA, 99
|
||||
CBEQX, 99
|
||||
CLC, 100
|
||||
CLI, 101
|
||||
CLR, 102
|
||||
CLRA, 102
|
||||
CLRX, 102
|
||||
CLRH, 102
|
||||
CMP, 103
|
||||
COM, 104
|
||||
COMA, 104
|
||||
COMX, 104
|
||||
CPHX, 105
|
||||
CPX, 106
|
||||
DAA, 107
|
||||
DBNZ, 109
|
||||
DBNZA, 109
|
||||
DBNZX, 109
|
||||
DEC, 110
|
||||
DECA, 110
|
||||
DECX, 110
|
||||
DIV, 111
|
||||
EOR, 112
|
||||
INC, 113
|
||||
INCA, 113
|
||||
INCX, 113
|
||||
JMP, 114
|
||||
JSR, 115
|
||||
LDA, 116
|
||||
LDHX, 117
|
||||
LDX, 118
|
||||
LSL, 119
|
||||
LSLA, 119
|
||||
LSLX, 119
|
||||
LSR, 120
|
||||
LSRA, 120
|
||||
LSRX, 120
|
||||
MOV, 121
|
||||
MUL, 122
|
||||
NEG, 123
|
||||
NEGA, 123
|
||||
NEGX, 123
|
||||
NOP, 124
|
||||
NSA, 125
|
||||
ORA, 126
|
||||
PSHA, 127
|
||||
PSHH, 128
|
||||
PSHX, 129
|
||||
PULA, 130
|
||||
PULH, 131
|
||||
PULX, 132
|
||||
ROL, 133
|
||||
ROLA, 133
|
||||
ROLX, 133
|
||||
ROR, 134
|
||||
RORA, 134
|
||||
RORX, 134
|
||||
RSP, 135
|
||||
RTI, 136
|
||||
RTS, 137
|
||||
SBC, 138
|
||||
SEC, 139
|
||||
SEI, 140
|
||||
STA, 141
|
||||
STHX, 142
|
||||
STOP, 143
|
||||
STX, 144
|
||||
SUB, 145
|
||||
SWI, 146
|
||||
TAP, 147
|
||||
TAX, 148
|
||||
TPA, 149
|
||||
TST, 150
|
||||
TSTA, 150
|
||||
TSTX, 150
|
||||
TSX, 151
|
||||
TXA, 152
|
||||
TXS, 153
|
||||
WAIT, 154
|
||||
@@ -0,0 +1,121 @@
|
||||
@HCS08RMV1.pdf[ Rev. 2 05/2007 M68HCS08 Microcontrollers, NXP.com ]
|
||||
ADC, 201
|
||||
ADD, 202
|
||||
AIS, 203
|
||||
AIX, 204
|
||||
AND, 205
|
||||
ASL, 206
|
||||
ASLA, 206
|
||||
ASLX, 206
|
||||
ASR, 207
|
||||
ASRA, 207
|
||||
ASRX, 207
|
||||
BCC, 208
|
||||
BCLR, 209
|
||||
BCS, 210
|
||||
BEQ, 211
|
||||
BGE, 212
|
||||
BGND, 213
|
||||
BGT, 214
|
||||
BHCC, 215
|
||||
BHCS, 216
|
||||
BHI, 217
|
||||
BHS, 218
|
||||
BIH, 219
|
||||
BIL, 220
|
||||
BIT, 221
|
||||
BLE, 222
|
||||
BLO, 223
|
||||
BLS, 224
|
||||
BLT, 225
|
||||
BMC, 226
|
||||
BMI, 227
|
||||
BMS, 228
|
||||
BNE, 229
|
||||
BPL, 230
|
||||
BRA, 231
|
||||
BRCLR, 233
|
||||
BRN, 234
|
||||
BRSET, 235
|
||||
BSET, 236
|
||||
BSR, 237
|
||||
CBEQ, 238
|
||||
CBEQA, 238
|
||||
CBEQX, 238
|
||||
CLC, 239
|
||||
CLI, 240
|
||||
CLR, 241
|
||||
CLRA, 241
|
||||
CLRX, 241
|
||||
CLRH, 241
|
||||
CMP, 242
|
||||
COM, 243
|
||||
COMA, 243
|
||||
COMX, 243
|
||||
CPHX, 244
|
||||
CPX, 245
|
||||
DAA, 246
|
||||
DBNZ, 248
|
||||
DBNZA, 248
|
||||
DBNZX, 248
|
||||
DEC, 249
|
||||
DECA, 249
|
||||
DECX, 249
|
||||
DIV, 250
|
||||
EOR, 251
|
||||
INC, 252
|
||||
INCA, 252
|
||||
INCX, 252
|
||||
JMP, 253
|
||||
JSR, 254
|
||||
LDA, 255
|
||||
LDHX, 256
|
||||
LDX, 257
|
||||
LSL, 258
|
||||
LSLA, 258
|
||||
LSLX, 258
|
||||
LSR, 259
|
||||
LSRA, 259
|
||||
LSRX, 259
|
||||
MOV, 260
|
||||
MUL, 261
|
||||
NEG, 262
|
||||
NEGA, 262
|
||||
NEGX, 262
|
||||
NOP, 263
|
||||
NSA, 264
|
||||
ORA, 265
|
||||
PSHA, 266
|
||||
PSHH, 267
|
||||
PSHX, 268
|
||||
PULA, 269
|
||||
PULH, 270
|
||||
PULX, 271
|
||||
ROL, 272
|
||||
ROLA, 272
|
||||
ROLX, 272
|
||||
ROR, 273
|
||||
RORA, 273
|
||||
RORX, 273
|
||||
RSP, 274
|
||||
RTI, 275
|
||||
RTS, 276
|
||||
SBC, 277
|
||||
SEC, 278
|
||||
SEI, 279
|
||||
STA, 280
|
||||
STHX, 281
|
||||
STOP, 282
|
||||
STX, 283
|
||||
SUB, 284
|
||||
SWI, 285
|
||||
TAP, 286
|
||||
TAX, 287
|
||||
TPA, 288
|
||||
TST, 289
|
||||
TSTA, 289
|
||||
TSTX, 289
|
||||
TSX, 290
|
||||
TXA, 291
|
||||
TXS, 292
|
||||
WAIT, 293
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user