Merge branch '226-issue-splitting-domain-into-several-datagrams' into 'stable-1.6'

Prevent creating too large datagrams

See merge request etherlab.org/ethercat!205
This commit is contained in:
Florian Pose
2026-07-16 14:03:21 +02:00
3 changed files with 22 additions and 14 deletions
+10 -2
View File
@@ -1,6 +1,6 @@
/*****************************************************************************
*
* Copyright (C) 2006-2008 Florian Pose, Ingenieurgemeinschaft IgH
* Copyright (C) 2006-2026 Florian Pose, Ingenieurgemeinschaft IgH
*
* This file is part of the IgH EtherCAT Master.
*
@@ -145,8 +145,16 @@ int ec_datagram_prealloc(
)
{
if (datagram->data_origin == EC_ORIG_EXTERNAL
|| size <= datagram->mem_size)
|| size <= datagram->mem_size) {
return 0;
}
if (size > EC_MAX_DATA_SIZE) {
EC_ERR("%s(datagram = %p, size = %zu): Exceeding the"
" maximum datagram size of %u bytes.\n",
__func__, datagram, size, EC_MAX_DATA_SIZE);
return -EOVERFLOW;
}
if (datagram->data) {
kfree(datagram->data);
+8 -8
View File
@@ -1,6 +1,6 @@
/*****************************************************************************
*
* Copyright (C) 2006-2008 Florian Pose, Ingenieurgemeinschaft IgH
* Copyright (C) 2006-2026 Florian Pose, Ingenieurgemeinschaft IgH
*
* This file is part of the IgH EtherCAT Master.
*
@@ -77,13 +77,13 @@ void ec_fmmu_config_page(
sync->physical_start_address, fmmu->sync_index,
fmmu->dir == EC_DIR_INPUT ? "in" : "out");
EC_WRITE_U32(data, fmmu->logical_start_address);
EC_WRITE_U16(data + 4, fmmu->data_size); // size of fmmu
EC_WRITE_U8 (data + 6, 0x00); // logical start bit
EC_WRITE_U8 (data + 7, 0x07); // logical end bit
EC_WRITE_U16(data + 8, sync->physical_start_address);
EC_WRITE_U8 (data + 10, 0x00); // physical start bit
EC_WRITE_U8 (data + 11, fmmu->dir == EC_DIR_INPUT ? 0x01 : 0x02);
EC_WRITE_U32(data, fmmu->logical_start_address);
EC_WRITE_U16(data + 4, fmmu->data_size); // size of fmmu
EC_WRITE_U8(data + 6, 0x00); // logical start bit
EC_WRITE_U8(data + 7, 0x07); // logical end bit
EC_WRITE_U16(data + 8, sync->physical_start_address);
EC_WRITE_U8(data + 10, 0x00); // physical start bit
EC_WRITE_U8(data + 11, fmmu->dir == EC_DIR_INPUT ? 0x01 : 0x02);
EC_WRITE_U16(data + 12, 0x0001); // enable
EC_WRITE_U16(data + 14, 0x0000); // reserved
}
+4 -4
View File
@@ -1,6 +1,6 @@
/*****************************************************************************
*
* Copyright (C) 2006-2008 Florian Pose, Ingenieurgemeinschaft IgH
* Copyright (C) 2006-2026 Florian Pose, Ingenieurgemeinschaft IgH
*
* This file is part of the IgH EtherCAT Master.
*
@@ -25,8 +25,8 @@
/****************************************************************************/
#ifndef __EC_FMMU_CONFIG_H__
#define __EC_FMMU_CONFIG_H__
#ifndef MASTER_FMMU_CONFIG_H_
#define MASTER_FMMU_CONFIG_H_
#include "globals.h"
#include "sync.h"
@@ -55,4 +55,4 @@ void ec_fmmu_config_page(const ec_fmmu_config_t *, const ec_sync_t *,
/****************************************************************************/
#endif
#endif // MASTER_FMMU_CONFIG_H_