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#ifdef USE_ESP8266
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#include "esphome/core/defines.h"
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#ifdef USE_ESP8266_CRASH_HANDLER
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#include "crash_handler.h"
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#include "esphome/core/log.h"
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#include <cinttypes>
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extern "C" {
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#include <user_interface.h>
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// Global reset info struct populated by SDK/Arduino core at boot
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extern struct rst_info resetInfo;
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}
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// Xtensa windowed-ABI: bits[31:30] encode call type (CALL0=00, CALL4=01,
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// CALL8=10, CALL12=11). Mask and force bit 30 to recover the real address.
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static constexpr uint32_t XTENSA_ADDR_MASK = 0x3FFFFFFF;
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static constexpr uint32_t XTENSA_CODE_BASE = 0x40000000;
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// ESP8266 memory map boundaries for code regions
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static constexpr uint32_t IRAM_START = 0x40100000;
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static constexpr uint32_t IRAM_END = 0x40108000; // 32KB
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// Linker symbols for the actual firmware IROM section.
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// Using these instead of a conservative upper bound (0x40400000) prevents
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// false positives from stale stack values beyond the actual flash mapping.
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extern "C" {
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// NOLINTBEGIN(bugprone-reserved-identifier,readability-identifier-naming,readability-redundant-declaration)
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extern void _irom0_text_start(void);
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extern void _irom0_text_end(void);
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// NOLINTEND(bugprone-reserved-identifier,readability-identifier-naming,readability-redundant-declaration)
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}
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// Check if a value looks like a code address in IRAM or flash-mapped IROM.
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// IRAM_ATTR as safety net — normally inlined into custom_crash_callback, but
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// ensures correctness if the compiler ever chooses not to inline.
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static inline bool IRAM_ATTR is_code_addr(uint32_t val) {
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uint32_t addr = (val & XTENSA_ADDR_MASK) | XTENSA_CODE_BASE;
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return (addr >= IRAM_START && addr < IRAM_END) ||
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(addr >= (uint32_t) _irom0_text_start && addr < (uint32_t) _irom0_text_end);
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}
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// Recover the actual code address from a windowed-ABI return address on the stack.
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static inline uint32_t IRAM_ATTR recover_code_addr(uint32_t val) { return (val & XTENSA_ADDR_MASK) | XTENSA_CODE_BASE; }
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// RTC user memory layout for crash backtrace data.
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// User-accessible RTC memory: blocks 64-191 (each block = 4 bytes).
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// We use blocks 174-191 (last 18 blocks, 72 bytes) to minimize conflicts.
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// Store 16 raw candidates, filter to real return addresses at log time.
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static constexpr uint8_t RTC_CRASH_BASE = 174;
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static constexpr size_t MAX_BACKTRACE = 16;
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// Magic word packs sentinel, version, and count into one uint32_t:
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// bits[31:16] = sentinel
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// bits[15:8] = version
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// bits[7:0] = backtrace count
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static constexpr uint8_t CRASH_SENTINEL_BITS = 16;
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static constexpr uint8_t CRASH_VERSION_BITS = 8;
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static constexpr uint16_t CRASH_SENTINEL_VALUE = 0xDEAD;
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static constexpr uint8_t CRASH_VERSION_VALUE = 1;
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static constexpr uint32_t CRASH_SENTINEL = static_cast<uint32_t>(CRASH_SENTINEL_VALUE) << CRASH_SENTINEL_BITS;
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static constexpr uint32_t CRASH_VERSION = static_cast<uint32_t>(CRASH_VERSION_VALUE) << CRASH_VERSION_BITS;
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static constexpr uint32_t CRASH_SENTINEL_MASK = static_cast<uint32_t>(0xFFFF) << CRASH_SENTINEL_BITS;
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static constexpr uint32_t CRASH_VERSION_MASK = static_cast<uint32_t>(0xFF) << CRASH_VERSION_BITS;
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static constexpr uint32_t CRASH_COUNT_MASK = 0xFF;
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// Struct layout: 18 RTC blocks (72 bytes):
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// [0] = magic (sentinel | version | count)
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// [1..16] = up to 16 code addresses from stack scanning
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// [17] = epc1 at crash time (to skip duplicates at log time)
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struct RtcCrashData {
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uint32_t magic;
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uint32_t backtrace[MAX_BACKTRACE];
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uint32_t epc1; // Fault PC, used to filter duplicates
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};
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static_assert(sizeof(RtcCrashData) == 72, "RtcCrashData must fit in 18 RTC blocks");
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namespace esphome::esp8266 {
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static const char *const TAG = "esp8266";
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static inline bool is_crash_reason(uint32_t reason) {
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return reason == REASON_WDT_RST || reason == REASON_EXCEPTION_RST || reason == REASON_SOFT_WDT_RST;
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}
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bool crash_handler_has_data() { return is_crash_reason(resetInfo.reason); }
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// Xtensa exception cause names for the LX106 core (ESP8266).
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// Only includes causes that can actually occur on the LX106 — it has no MMU,
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// no TLB, no PIF, and no privilege levels, so causes 12-18 and 24-26 are
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// impossible and omitted. The numeric cause is always logged as fallback.
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// Uses if-else with LOG_STR to avoid CSWTCH jump tables (RAM on ESP8266).
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static const LogString *get_exception_cause(uint32_t cause) {
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if (cause == 0)
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return LOG_STR("IllegalInst");
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if (cause == 2)
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return LOG_STR("InstFetchErr");
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if (cause == 3)
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return LOG_STR("LoadStoreErr");
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if (cause == 4)
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return LOG_STR("Level1Int");
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if (cause == 6)
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return LOG_STR("DivByZero");
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if (cause == 9)
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return LOG_STR("Alignment");
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if (cause == 20)
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return LOG_STR("InstFetchProhibit");
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if (cause == 28)
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return LOG_STR("LoadProhibit");
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if (cause == 29)
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return LOG_STR("StoreProhibit");
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return nullptr;
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}
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static const LogString *get_reset_reason(uint32_t reason) {
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if (reason == REASON_WDT_RST)
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return LOG_STR("Hardware WDT");
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if (reason == REASON_EXCEPTION_RST)
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return LOG_STR("Exception");
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if (reason == REASON_SOFT_WDT_RST)
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return LOG_STR("Soft WDT");
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return LOG_STR("Unknown");
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}
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// Read backtrace from RTC user memory into caller-provided buffer.
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// Returns the number of valid backtrace entries (0 if no data found).
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static uint8_t read_rtc_backtrace(uint32_t *backtrace, size_t max_entries) {
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RtcCrashData rtc_data;
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if (!system_rtc_mem_read(RTC_CRASH_BASE, &rtc_data, sizeof(rtc_data)))
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return 0;
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uint32_t magic = rtc_data.magic;
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if ((magic & CRASH_SENTINEL_MASK) != CRASH_SENTINEL || (magic & CRASH_VERSION_MASK) != CRASH_VERSION)
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return 0;
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uint8_t raw_count = magic & CRASH_COUNT_MASK;
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if (raw_count > MAX_BACKTRACE)
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raw_count = MAX_BACKTRACE;
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// Skip any that match epc1 (already reported as the fault PC).
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// Note: we cannot verify CALL instructions at addr-3 on ESP8266 because
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// reading from IROM causes LoadStoreError due to flash cache conflicts
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// (the reading code and target can share a direct-mapped cache line).
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// The linker-symbol IROM bounds already eliminate most false positives.
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uint8_t out = 0;
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for (uint8_t i = 0; i < raw_count && out < max_entries; i++) {
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uint32_t addr = rtc_data.backtrace[i];
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if (addr != rtc_data.epc1)
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backtrace[out++] = addr;
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}
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return out;
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}
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// Intentionally uses separate ESP_LOGE calls per line instead of combining into
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// one multi-line log message. This ensures each address appears as its own line
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// on the serial console, making it possible to see partial output if the device
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// crashes again during boot, and allowing the CLI's process_stacktrace to match
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// and decode each address individually.
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void crash_handler_log() {
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if (!is_crash_reason(resetInfo.reason))
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return;
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// Read and filter backtrace from RTC into stack-local buffer (no persistent RAM cost).
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// Both resetInfo and RTC data survive until the next reset, so this can be
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// called multiple times (logger init + API subscribe) with the same result.
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uint32_t backtrace[MAX_BACKTRACE];
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uint8_t bt_count = read_rtc_backtrace(backtrace, MAX_BACKTRACE);
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ESP_LOGE(TAG, "*** CRASH DETECTED ON PREVIOUS BOOT ***");
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// GCC's ROM divide routine triggers IllegalInstruction (exccause=0) at specific
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// ROM addresses instead of IntegerDivideByZero (exccause=6). Patch to match
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// the Arduino core's postmortem handler behavior.
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static constexpr uint32_t EXCCAUSE_ILLEGAL_INSTRUCTION = 0;
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static constexpr uint32_t EXCCAUSE_INTEGER_DIVIDE_BY_ZERO = 6;
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static constexpr uint32_t ROM_DIV_ZERO_ADDR_1 = 0x4000dce5;
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static constexpr uint32_t ROM_DIV_ZERO_ADDR_2 = 0x4000dd3d;
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uint32_t exccause = resetInfo.exccause;
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if (exccause == EXCCAUSE_ILLEGAL_INSTRUCTION &&
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(resetInfo.epc1 == ROM_DIV_ZERO_ADDR_1 || resetInfo.epc1 == ROM_DIV_ZERO_ADDR_2)) {
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exccause = EXCCAUSE_INTEGER_DIVIDE_BY_ZERO;
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}
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const LogString *cause = get_exception_cause(exccause);
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if (cause != nullptr) {
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ESP_LOGE(TAG, " Reason: %s - %s (exccause=%" PRIu32 ")", LOG_STR_ARG(get_reset_reason(resetInfo.reason)),
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LOG_STR_ARG(cause), exccause);
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} else {
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ESP_LOGE(TAG, " Reason: %s (exccause=%" PRIu32 ")", LOG_STR_ARG(get_reset_reason(resetInfo.reason)), exccause);
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}
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ESP_LOGE(TAG, " PC: 0x%08" PRIX32, resetInfo.epc1);
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if (resetInfo.reason == REASON_EXCEPTION_RST) {
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ESP_LOGE(TAG, " EXCVADDR: 0x%08" PRIX32, resetInfo.excvaddr);
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}
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for (uint8_t i = 0; i < bt_count; i++) {
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ESP_LOGE(TAG, " BT%d: 0x%08" PRIX32, i, backtrace[i]);
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}
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}
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} // namespace esphome::esp8266
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// --- Custom crash callback ---
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// Overrides the weak custom_crash_callback() from Arduino core's
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// core_esp8266_postmortem.cpp. Called during exception handling before
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// the device restarts. We scan the full stack for code addresses and store
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// them in RTC user memory (which survives software reset).
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extern "C" void IRAM_ATTR custom_crash_callback(struct rst_info *rst_info, uint32_t stack, uint32_t stack_end) {
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// No zero-init — only magic, epc1, and backtrace[0..count-1] are read.
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// Saves the IRAM cost of a 72-byte zero-init loop.
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RtcCrashData data; // NOLINT(cppcoreguidelines-pro-type-member-init)
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uint8_t count = 0;
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// Stack pointer from the Xtensa exception frame is always 4-byte aligned.
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auto *scan = (uint32_t *) stack; // NOLINT(performance-no-int-to-ptr)
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auto *end = (uint32_t *) stack_end; // NOLINT(performance-no-int-to-ptr)
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uint32_t epc1 = rst_info->epc1;
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for (; scan < end && count < MAX_BACKTRACE; scan++) {
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uint32_t val = *scan;
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if (is_code_addr(val)) {
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uint32_t addr = recover_code_addr(val);
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// Skip epc1 — already reported as the fault PC
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if (addr != epc1)
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data.backtrace[count++] = addr;
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}
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}
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data.epc1 = epc1;
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data.magic = CRASH_SENTINEL | CRASH_VERSION | count;
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system_rtc_mem_write(RTC_CRASH_BASE, &data, sizeof(data));
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}
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#endif // USE_ESP8266_CRASH_HANDLER
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#endif // USE_ESP8266
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