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The read buffer must be invalidated after a DMA read operation as
nothing guarantees an invalidation before the operation finishes
persists until after it's complete.
Quoth the ARM ARMv7M ARM (Architecture Reference Manual): "Entries for
addresses with a Normal Cacheable attribute can be allocated to an
enabled cache at any time, and so the cache invalidate operation cannot
ensure that the address is not present in an enabled cache."
Due to considerations surrounding how the buffer is actually used, we
end up needing an invalidate before and flush after the read op.
Not handling this correctly manifested as rampant dataflash corruption
using LittleFS on KakuteH7Mini (commit 33631df2) due to the driver not
seeing "busy" responses when polling the dataflash chip and having
written data be ignored. This scenario was, however, very fragile, and
everything worked correctly for some alignments of MCU code flash,
presumably creating different timing or cache influences.
It's not clear where else this could have caused an issue, the LittleFS
poll loop is perhaps unique in writing one byte then reading one byte.
Nevertheless, careful investigation with a debugger and logic analyzer,
along with understanding of the manuals, justify this as a proper fix
(and of course the corruption no longer manifests).