AP_BattMonitor: TIBQ fix for clearing alerts

writes 1 byte instead of 2 which was incorrect
This commit is contained in:
Randy Mackay
2026-07-21 09:38:06 +09:00
parent 379f53efef
commit f241278e4d
2 changed files with 13 additions and 4 deletions
@@ -721,10 +721,10 @@ bool AP_BattMonitor_TIBQ76952::configure()
hal.scheduler->delay(10);
// clear any remaining permanent failure alerts
direct_command(TIBQ769x2_PFAlertA, 0xFF, CommandType::WRITE);
direct_command(TIBQ769x2_PFAlertB, 0xFF, CommandType::WRITE);
direct_command(TIBQ769x2_PFAlertC, 0xFF, CommandType::WRITE);
direct_command(TIBQ769x2_PFAlertD, 0xFF, CommandType::WRITE);
direct_command_write_1byte(TIBQ769x2_PFAlertA, 0xFF);
direct_command_write_1byte(TIBQ769x2_PFAlertB, 0xFF);
direct_command_write_1byte(TIBQ769x2_PFAlertC, 0xFF);
direct_command_write_1byte(TIBQ769x2_PFAlertD, 0xFF);
// update configuration
ConfigUpdateType update_type = (ConfigUpdateType)cfg_update.get();
@@ -992,6 +992,12 @@ uint16_t AP_BattMonitor_TIBQ76952::direct_command_read_2bytes(uint16_t reg) cons
return 0;
}
// send a direct command to write 1byte
bool AP_BattMonitor_TIBQ76952::direct_command_write_1byte(uint16_t reg, uint8_t data) const
{
return write_register(reg, &data, 1);
}
// write 1, 2, or 4 bytes to a RAM data memory register (0x9xxx addresses)
// this includes delays so it should only be called during startup configuration
// uses subcommand protocol: write address+data to 0x3E, then checksum+length to 0x60
@@ -82,6 +82,9 @@ protected:
uint8_t direct_command_read_1byte(uint16_t reg) const;
uint16_t direct_command_read_2bytes(uint16_t reg) const;
// send a direct command to write 1byte
bool direct_command_write_1byte(uint16_t reg, uint8_t data) const;
// write 1, 2, or 4 bytes to a RAM data memory register (0x9xxx addresses)
// this includes delays so it should only be called during startup configuration
void set_register(uint16_t reg_addr, uint32_t reg_data, uint8_t len) const;