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https://github.com/PX4/PX4-Autopilot.git
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LPC17xx CAN PCLK divisor is not a configuration parameter
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4268 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
@@ -2348,3 +2348,5 @@
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LEDs
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LEDs
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* arch/arm/src/lpc17xx/lpc17_can.c: Add logic to change the CAN bit rate based
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* arch/arm/src/lpc17xx/lpc17_can.c: Add logic to change the CAN bit rate based
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on the NuttX configuration.
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on the NuttX configuration.
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* arch/arm/src/lpc17xx/lpc17_can.c: PCLK divisor is now a configuration
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option.
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@@ -72,6 +72,66 @@
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/****************************************************************************
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/****************************************************************************
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* Pre-processor Definitions
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* Pre-processor Definitions
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****************************************************************************/
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****************************************************************************/
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/* Configuration ************************************************************/
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#ifdef CONFIG_LPC17_CAN1
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/* A CAN bit rate must be provided */
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# ifndef CONFIG_CAN1_BAUD
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# error "CONFIG_CAN1_BAUD is not defined"
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# endif
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/* If no divsor is provided, use a divisor of 4 */
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# ifndef CONFIG_CAN1_DIVISOR
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# define CONFIG_CAN1_DIVISOR 4
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# endif
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/* Get the SYSCON_PCLKSEL value for CAN1 the implements this divisor */
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# if CONFIG_CAN1_DIVISOR == 1
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# define CAN1_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK
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# elif CONFIG_CAN1_DIVISOR == 2
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# define CAN1_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK2
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# elif CONFIG_CAN1_DIVISOR == 4
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# define CAN1_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK4
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# elif CONFIG_CAN1_DIVISOR == 6
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# define CAN1_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK6
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# else
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# error "Unsupported value of CONFIG_CAN1_DIVISOR"
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# endif
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#endif
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#ifdef CONFIG_LPC17_CAN2
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/* A CAN bit rate must be provided */
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# ifndef CONFIG_CAN2_BAUD
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# error "CONFIG_CAN2_BAUD is not defined"
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# endif
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/* If no divsor is provided, use a divisor of 4 */
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# ifndef CONFIG_CAN2_DIVISOR
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# define CONFIG_CAN2_DIVISOR 4
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# endif
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/* Get the SYSCON_PCLKSEL value for CAN2 the implements this divisor */
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# if CONFIG_CAN2_DIVISOR == 1
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# define CAN2_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK
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# elif CONFIG_CAN2_DIVISOR == 2
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# define CAN2_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK2
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# elif CONFIG_CAN2_DIVISOR == 4
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# define CAN2_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK4
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# elif CONFIG_CAN2_DIVISOR == 6
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# define CAN2_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK6
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# else
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# error "Unsupported value of CONFIG_CAN2_DIVISOR"
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# endif
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#endif
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/* Debug ********************************************************************/
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/* Debug ********************************************************************/
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/* Non-standard debug that may be enabled just for testing CAN */
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/* Non-standard debug that may be enabled just for testing CAN */
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@@ -1078,7 +1138,7 @@ FAR struct can_dev_s *lpc17_caninitialize(int port)
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regval = can_getcommon(LPC17_SYSCON_PCLKSEL0);
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regval = can_getcommon(LPC17_SYSCON_PCLKSEL0);
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regval &= ~SYSCON_PCLKSEL0_CAN1_MASK;
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regval &= ~SYSCON_PCLKSEL0_CAN1_MASK;
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regval |= (SYSCON_PCLKSEL_CCLK4 << SYSCON_PCLKSEL0_CAN1_SHIFT);
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regval |= (CAN1_CCLK_DIVISOR << SYSCON_PCLKSEL0_CAN1_SHIFT);
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can_putcommon(LPC17_SYSCON_PCLKSEL0, regval);
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can_putcommon(LPC17_SYSCON_PCLKSEL0, regval);
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/* Configure CAN GPIO pins */
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/* Configure CAN GPIO pins */
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@@ -1105,7 +1165,7 @@ FAR struct can_dev_s *lpc17_caninitialize(int port)
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regval = can_getcommon(LPC17_SYSCON_PCLKSEL0);
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regval = can_getcommon(LPC17_SYSCON_PCLKSEL0);
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regval &= ~SYSCON_PCLKSEL0_CAN2_MASK;
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regval &= ~SYSCON_PCLKSEL0_CAN2_MASK;
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regval |= (SYSCON_PCLKSEL_CCLK4 << SYSCON_PCLKSEL0_CAN2_SHIFT);
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regval |= (CAN2_CCLK_DIVISOR << SYSCON_PCLKSEL0_CAN2_SHIFT);
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can_putcommon(LPC17_SYSCON_PCLKSEL0, regval);
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can_putcommon(LPC17_SYSCON_PCLKSEL0, regval);
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/* Configure CAN GPIO pins */
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/* Configure CAN GPIO pins */
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@@ -644,6 +644,18 @@ LPCXpresso Configuration Options
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CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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CONFIG_UARTn_2STOP - Two stop bits
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CONFIG_UARTn_2STOP - Two stop bits
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LPC17xx specific CAN device driver settings. These settings all
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require CONFIG_CAN:
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CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
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CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
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CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
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(the CCLK frequency is divided by this number to get the CAN clock).
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Options = {1,2,4,6}. Default: 4.
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CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
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(the CCLK frequency is divided by this number to get the CAN clock).
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Options = {1,2,4,6}. Default: 4.
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LPC17xx specific PHY/Ethernet device driver settings. These setting
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LPC17xx specific PHY/Ethernet device driver settings. These setting
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also require CONFIG_NET and CONFIG_LPC17_ETHERNET.
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also require CONFIG_NET and CONFIG_LPC17_ETHERNET.
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@@ -284,6 +284,18 @@ mbed Configuration Options
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CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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CONFIG_UARTn_2STOP - Two stop bits
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CONFIG_UARTn_2STOP - Two stop bits
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LPC17xx specific CAN device driver settings. These settings all
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require CONFIG_CAN:
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CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
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CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
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CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
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(the CCLK frequency is divided by this number to get the CAN clock).
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Options = {1,2,4,6}. Default: 4.
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CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
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(the CCLK frequency is divided by this number to get the CAN clock).
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Options = {1,2,4,6}. Default: 4.
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LPC17xx specific PHY/Ethernet device driver settings. These setting
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LPC17xx specific PHY/Ethernet device driver settings. These setting
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also require CONFIG_NET and CONFIG_LPC17_ETHERNET.
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also require CONFIG_NET and CONFIG_LPC17_ETHERNET.
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@@ -396,6 +396,18 @@ Nucleus 2G Configuration Options
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CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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CONFIG_UARTn_2STOP - Two stop bits
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CONFIG_UARTn_2STOP - Two stop bits
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LPC17xx specific CAN device driver settings. These settings all
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require CONFIG_CAN:
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CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
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CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
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CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
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(the CCLK frequency is divided by this number to get the CAN clock).
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Options = {1,2,4,6}. Default: 4.
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CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
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(the CCLK frequency is divided by this number to get the CAN clock).
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Options = {1,2,4,6}. Default: 4.
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LPC17xx specific PHY/Ethernet device driver settings. These setting
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LPC17xx specific PHY/Ethernet device driver settings. These setting
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also require CONFIG_NET and CONFIG_LPC17_ETHERNET.
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also require CONFIG_NET and CONFIG_LPC17_ETHERNET.
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@@ -693,6 +693,18 @@ Olimex LPC1766-STK Configuration Options
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CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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CONFIG_UARTn_2STOP - Two stop bits
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CONFIG_UARTn_2STOP - Two stop bits
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LPC17xx specific CAN device driver settings. These settings all
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require CONFIG_CAN:
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CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
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CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
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CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
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(the CCLK frequency is divided by this number to get the CAN clock).
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Default: 4
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CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
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(the CCLK frequency is divided by this number to get the CAN clock).
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Default: 4
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LPC17xx specific PHY/Ethernet device driver settings. These setting
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LPC17xx specific PHY/Ethernet device driver settings. These setting
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also require CONFIG_NET and CONFIG_LPC17_ETHERNET.
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also require CONFIG_NET and CONFIG_LPC17_ETHERNET.
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