Finish PWM pulse count configuration

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4287 7fd9a85b-ad96-42d3-883c-3090e2eb8679

nuttx/arch/arm/src/stm32/stm32_pwm.c

@@ -169,7 +169,7 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv);
 #if defined(CONFIG_STM32_TIM1_PWM)
 static int pwm_tim1interrupt(int irq, void *context);
 #endif
-#if defined(CONFIG_STM32_TIM1_PWM)
+#if defined(CONFIG_STM32_TIM8_PWM)
 static int pwm_tim8interrupt(int irq, void *context);
 #endif
 #endif
@@ -906,12 +906,12 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv)
 {
   /* Verify that this is an update interrupt.  Nothing else is expected. */
 
-  pwmllvdbg("Update interrupt: %04x\n", pwm_getreg(STM32_GTIM_SR_OFFSET));
+  pwmllvdbg("Update interrupt: %04x\n", pwm_getreg(priv, STM32_GTIM_SR_OFFSET));
-  DEBUGASSERT((pwm_getreg(STM32_GTIM_SR_OFFSET) & ATIM_SR_UIF) != 0);
+  DEBUGASSERT((pwm_getreg(priv, STM32_GTIM_SR_OFFSET) & ATIM_SR_UIF) != 0);
 
   /* Disable further interrupts and stop the timer */
 
-  (void)pwm_stop((FAR struct pwm_lowerhalf_s *)priv)
+  (void)pwm_stop((FAR struct pwm_lowerhalf_s *)priv);
 
   /* Then perform the callback into the upper half driver */
 

nuttx/arch/mips/src/pic32mx/pic32mx-usbdev.c

@@ -2163,7 +2163,7 @@ static int pic32mx_interrupt(int irq, void *context)
 
   usbir = pic32mx_getreg(PIC32MX_USB_IR) & pic32mx_getreg(PIC32MX_USB_IE);
   otgir = pic32mx_getreg(PIC32MX_USBOTG_IR) & pic32mx_getreg(PIC32MX_USBOTG_IE);
-  usbtrace(TRACE_INTENTRY(PIC32MX_TRACEINTID_INTERRUPT), usbir|otgir);
+  usbtrace(TRACE_INTENTRY(PIC32MX_TRACEINTID_INTERRUPT), usbir | otgir);
 
 #ifdef CONFIG_USBOTG
   /* Session Request Protocol (SRP) Time Out Check */
@@ -2396,7 +2396,7 @@ static int pic32mx_interrupt(int irq, void *context)
 
 interrupt_exit:
   up_clrpend_irq(PIC32MX_IRQSRC_USB);
-  usbtrace(TRACE_INTEXIT(PIC32MX_TRACEINTID_INTERRUPT), usbir | usbotg);
+  usbtrace(TRACE_INTEXIT(PIC32MX_TRACEINTID_INTERRUPT), usbir | otgir);
   return OK;
 }
 

nuttx/configs/stm3240g-eval/README.txt

@@ -596,10 +596,19 @@ Where <subdir> is one of the following:
 
        CONFIG_PWM=y              : Enable the generic PWM infrastructure
        CONFIG_PWM_PULSECOUNT=n   : Disable to support TIM1/8 pulse counts
+       CONFIG_STM32_TIM4=y       : Enable TIM4
        CONFIG_STM32_TIM4_PWM=y   : Use TIM4 to generate PWM output
        CONFIG_STM32_TIM4_CHANNEL=2
 
-       See also apps/examples/README.txt
+       Or..
+
+       CONFIG_PWM=y              : Enable the generic PWM infrastructure
+       CONFIG_PWM_PULSECOUNT=y   : Enable to support TIM1/8 pulse counts
+       CONFIG_STM32_TIM1=y       : Enable TIM1
+       CONFIG_STM32_TIM1_PWM=y   : Use TIM1 to generate PWM output
+       CONFIG_STM32_TIM1_CHANNEL=1
+
+       See also include/board.h and apps/examples/README.txt
 
        Special PWM-only debug options:
 

nuttx/configs/stm3240g-eval/include/board.h

@@ -2,7 +2,7 @@
  * configs/stm3240g-eval/include/board.h
  * include/arch/board/board.h
  *
- *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-12 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -307,20 +307,79 @@
 /* PWM
  *
  * The STM3240G-Eval has no real on-board PWM devices, but the board can be
- * configured to output a pulse train using TIM4 CH2.  This pin is used by FSMC is
+ * configured to output a pulse train using the following:
- * but is also connected to the Motor Control Connector (CN5) just for this
- * purpose:
  *
- *   PD13 FSMC_A18 / MC_TIM4_CH2OUT pin 33 (EnB)
+ * If FSMC is not used:
- *
+ *   TIM4 CH2OUT: PD13 FSMC_A18 / MC_TIM4_CH2OUT
- * FSMC must be disabled in this case!  PD13 is available at:
+ *   Daughterboard Extension Connector, CN3, pin 32
- *
- *   Daughterboard Extension Connector, CN3, pin 32 - available
- *   TFT LCD Connector, CN19, pin 17 -- not available without removing the LCD.
  *   Motor Control Connector CN15, pin 33 -- not available unless you bridge SB14.
+ *
+ *   TIM1 CH1OUT: PE9 FSMC_D6
+ *   Daughterboard Extension Connector, CN2, pin 24
+ *
+ *   TIM1_CH2OUT: PE11 FSMC_D8
+ *   Daughterboard Extension Connector, CN2, pin 26
+ *
+ *   TIM1_CH3OUT: PE13 FSMC_D10
+ *   Daughterboard Extension Connector, CN2, pin 28
+ *
+ *   TIM1_CH4OUT: PE14 FSMC_D11
+ *   Daughterboard Extension Connector, CN2, pin 29
+ *
+ * If OTG FS is not used
+ *
+ *   TIM1_CH3OUT: PA10 OTG_FS_ID
+ *   Daughterboard Extension Connector, CN3, pin 14
+ *
+ *   TIM1_CH4OUT: PA11 OTG_FS_DM
+ *   Daughterboard Extension Connector, CN3, pin 11
+ *
+ * If DMCI is not used
+ *
+ *   TIM8 CH1OUT: PI5 DCMI_VSYNC & MC
+ *   Daughterboard Extension Connector, CN4, pin 4
+ *
+ *   TIM8_CH2OUT: PI6 DCMI_D6 & MC
+ *   Daughterboard Extension Connector, CN4, pin 3
+ *
+ *   TIM8_CH3OUT: PI7 DCMI_D7 & MC
+ *   Daughterboard Extension Connector, CN4, pin 2
+ *
+ * If SDIO is not used
+ *
+ *   TIM8_CH3OUT: PC8 MicroSDCard_D0 & MC
+ *   Daughterboard Extension Connector, CN3, pin 18
+ *
+ *   TIM8_CH4OUT: PC9 MicroSDCard_D1 & I2S_CKIN (JP16)
+ *   Daughterboard Extension Connector, CN3, pin 15
+ *
+ * Others
+ *
+ *   TIM8 CH1OUT: PC6 I2S_MCK & Smartcard_IO (JP21 open)
  */
 
-#define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2
+#if !defined(CONFIG_STM32_FSMC)
+#  define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2
+#  define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2
+#  define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_2
+#  define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_2
+#  define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_2
+#elif !defined(CONFIG_STM32_OTGFS)
+#  define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1
+#  define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_1
+#endif
+
+#if !defined(CONFIG_STM32_DCMI)
+#  define GPIO_TIM8_CH1OUT GPIO_TIM8_CH1OUT_2
+#  define GPIO_TIM8_CH2OUT GPIO_TIM8_CH2OUT_2
+#  define GPIO_TIM8_CH3OUT GPIO_TIM8_CH3OUT_2
+#else
+#  define GPIO_TIM8_CH1OUT GPIO_TIM8_CH1OUT_1
+#  if !defined(CONFIG_STM32_SDIO)
+#  define GPIO_TIM8_CH3OUT GPIO_TIM8_CH3OUT_1
+#  define GPIO_TIM8_CH4OUT GPIO_TIM8_CH4OUT_1
+#  endif
+#endif
 
 /* CAN
  *

nuttx/configs/stm3240g-eval/nsh/defconfig

@@ -349,14 +349,13 @@ CONFIG_STM32_ADC3_SAMPLE_FREQUENCY=100
 # PWM configuration
 #
 # The STM3240G-Eval has no real on-board PWM devices, but the board can be configured to output
-# a pulse train using TIM4 CH2.  This pin is used by FSMC is connect to CN5 just for this
+# a pulse train using several options (see board.h).  Here the default setup is for TIM1, CH1.
-# purpose.
+# Don't forget to enable CONFIG_STM32_TIM1
 #
 CONFIG_PWM=n
-CONFIG_PWM_PULSECOUNT=n
+CONFIG_PWM_PULSECOUNT=y
-CONFIG_STM32_TIM4=y
+CONFIG_STM32_TIM1_PWM=y
-CONFIG_STM32_TIM4_PWM=y
+CONFIG_STM32_TIM1_CHANNEL=1
-CONFIG_STM32_TIM4_CHANNEL=2
 
 #
 # General build options

nuttx/configs/stm3240g-eval/src/stm3240g-internal.h

@@ -113,21 +113,19 @@
 /* PWM
  *
  * The STM3240G-Eval has no real on-board PWM devices, but the board can be
- * configured to output a pulse train using TIM4 CH2.  This pin is used by FSMC is
+ * configured to output a pulse train using TIM4, TIM1, or TIM8 (see board.h).
- * but is also connected to the Motor Control Connector (CN5) just for this
+ * Let's figure out which the user has configured.
- * purpose:
- *
- *   PD13 FSMC_A18 / MC_TIM4_CH2OUT pin 33 (EnB)
- *
- * FSMC must be disabled in this case!  PD13 is available at:
- *
- *   Daughterboard Extension Connector, CN3, pin 32 - available
- *   TFT LCD Connector, CN19, pin 17 -- not available without removing the LCD.
- *   Motor Control Connector CN15, pin 33 -- not available unless you bridge SB14.
  */
 
-#define STM3240G_EVAL_PWMTIMER   4
+#ifdef CONFIG_PWM
-#define STM3240G_EVAL_PWMCHANNEL 2
+#  if defined(CONFIG_STM32_TIM1_PWM)
+#    define STM3240G_EVAL_PWMTIMER 1
+#  elif defined(CONFIG_STM32_TIM4_PWM)
+#    define STM3240G_EVAL_PWMTIMER 4
+#  elif defined(CONFIG_STM32_TIM8_PWM)
+#    define STM3240G_EVAL_PWMTIMER 8
+#  endif
+#endif
 
 /****************************************************************************************************
  * Public Types

nuttx/configs/stm3240g-eval/src/up_pwm.c

@@ -57,34 +57,12 @@
 /* Configuration *******************************************************************/
 /* PWM
  *
- * The STM3240G-Eval has no real on-board PWM devices, but the board can be configured to output
+ * The STM3240G-Eval has no real on-board PWM devices, but the board can be
- * a pulse train using TIM4 CH2.  This pin is used by FSMC is connect to CN5 just for this
+ * configured to output a pulse train using variously unused pins on the board for
- * purpose:
+ * PWM output (see board.h for details of pins).
- *
- * PD13 FSMC_A18 / MC_TIM4_CH2OUT pin 33 (EnB)
- *
- * FSMC must be disabled in this case!
  */
 
-#define HAVE_PWM 1
+#ifdef CONFIG_PWM
-
-#ifndef CONFIG_PWM
-#  undef HAVE_PWM
-#endif
-
-#ifndef CONFIG_STM32_TIM4
-#  undef HAVE_PWM
-#endif
-
-#ifndef CONFIG_STM32_TIM4_PWM
-#  undef HAVE_PWM
-#endif
-
-#if CONFIG_STM32_TIM4_CHANNEL != STM3240G_EVAL_PWMCHANNEL
-#  undef HAVE_PWM
-#endif
-
-#ifdef HAVE_PWM
 
 /************************************************************************************
  * Private Functions
@@ -139,4 +117,4 @@ int pwm_devinit(void)
   return OK;
 }
 
-#endif /* HAVE_PWM */
+#endif /* CONFIG_PWM */