mirror of
https://github.com/PX4/PX4-Autopilot.git
synced 2026-05-28 10:46:33 +08:00
boards: enable CONFIG_ARMV7M_LAZYFPU everywhere
This commit is contained in:
committed by
Lorenz Meier
parent
abec2bd8df
commit
cb74cb8692
@@ -32,6 +32,7 @@ CONFIG_ARCH_CHIP_STM32=y
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CONFIG_ARCH_CHIP_STM32F427V=y
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CONFIG_ARCH_CHIP_STM32F427V=y
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -52,6 +52,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -31,6 +31,7 @@ CONFIG_ARCH_CHIP_STM32=y
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CONFIG_ARCH_CHIP_STM32F405RG=y
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CONFIG_ARCH_CHIP_STM32F405RG=y
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -28,6 +28,7 @@ CONFIG_ARCH_CHIP_STM32=y
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CONFIG_ARCH_CHIP_STM32F412CE=y
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CONFIG_ARCH_CHIP_STM32F412CE=y
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -20,6 +20,7 @@ CONFIG_ARCH_CHIP_STM32H7=y
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -35,6 +35,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -20,6 +20,7 @@ CONFIG_ARCH_CHIP_STM32H7=y
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -35,6 +35,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -20,6 +20,7 @@ CONFIG_ARCH_CHIP_STM32H7=y
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -35,6 +35,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -36,6 +36,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -36,6 +36,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -37,6 +37,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -20,6 +20,7 @@ CONFIG_ARCH_CHIP_STM32H7=y
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -35,6 +35,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -35,6 +35,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_STACKCHECK=y
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CONFIG_ARMV7M_STACKCHECK=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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@@ -35,6 +35,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -36,6 +36,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -29,6 +29,7 @@ CONFIG_ARCH_CHIP_STM32=y
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CONFIG_ARCH_CHIP_STM32F429V=y
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CONFIG_ARCH_CHIP_STM32F429V=y
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -35,6 +35,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -35,6 +35,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -20,6 +20,7 @@ CONFIG_ARCH_CHIP_STM32H7=y
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -35,6 +35,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -35,6 +35,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_DTCM=y
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_ICACHE=y
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||||||
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -32,6 +32,7 @@ CONFIG_ARCH_CHIP_STM32=y
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CONFIG_ARCH_CHIP_STM32F427V=y
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CONFIG_ARCH_CHIP_STM32F427V=y
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARCH_STACKDUMP=y
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||||||
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -19,6 +19,7 @@ CONFIG_ARCH_CHIP_KINETIS=y
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CONFIG_ARCH_CHIP_MK66FN2M0VMD18=y
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CONFIG_ARCH_CHIP_MK66FN2M0VMD18=y
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
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@@ -19,6 +19,7 @@ CONFIG_ARCH_CHIP_KINETIS=y
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CONFIG_ARCH_CHIP_MK66FN2M0VMD18=y
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CONFIG_ARCH_CHIP_MK66FN2M0VMD18=y
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_INTERRUPTSTACK=512
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARMV7M_LAZYFPU=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_MEMCPY=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARDCTL_RESET=y
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CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -18,6 +18,7 @@ CONFIG_ARCH_CHIP_KINETIS=y
|
|||||||
CONFIG_ARCH_CHIP_MK66FN2M0VMD18=y
|
CONFIG_ARCH_CHIP_MK66FN2M0VMD18=y
|
||||||
CONFIG_ARCH_INTERRUPTSTACK=512
|
CONFIG_ARCH_INTERRUPTSTACK=512
|
||||||
CONFIG_ARCH_STACKDUMP=y
|
CONFIG_ARCH_STACKDUMP=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -18,6 +18,7 @@ CONFIG_ARCH_CHIP_KINETIS=y
|
|||||||
CONFIG_ARCH_CHIP_MK66FN2M0VMD18=y
|
CONFIG_ARCH_CHIP_MK66FN2M0VMD18=y
|
||||||
CONFIG_ARCH_INTERRUPTSTACK=512
|
CONFIG_ARCH_INTERRUPTSTACK=512
|
||||||
CONFIG_ARCH_STACKDUMP=y
|
CONFIG_ARCH_STACKDUMP=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -24,6 +24,7 @@ CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
|
|||||||
CONFIG_ARMV7M_DTCM=y
|
CONFIG_ARMV7M_DTCM=y
|
||||||
CONFIG_ARMV7M_ICACHE=y
|
CONFIG_ARMV7M_ICACHE=y
|
||||||
CONFIG_ARMV7M_ITCM=y
|
CONFIG_ARMV7M_ITCM=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_ARM_MPU=y
|
CONFIG_ARM_MPU=y
|
||||||
|
|||||||
@@ -19,6 +19,7 @@ CONFIG_ARCH_CHIP_S32K146=y
|
|||||||
CONFIG_ARCH_CHIP_S32K14X=y
|
CONFIG_ARCH_CHIP_S32K14X=y
|
||||||
CONFIG_ARCH_CHIP_S32K1XX=y
|
CONFIG_ARCH_CHIP_S32K1XX=y
|
||||||
CONFIG_ARCH_STACKDUMP=y
|
CONFIG_ARCH_STACKDUMP=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -20,6 +20,7 @@ CONFIG_ARCH_CHIP="stm32"
|
|||||||
CONFIG_ARCH_CHIP_STM32=y
|
CONFIG_ARCH_CHIP_STM32=y
|
||||||
CONFIG_ARCH_CHIP_STM32F405RG=y
|
CONFIG_ARCH_CHIP_STM32F405RG=y
|
||||||
CONFIG_ARCH_INTERRUPTSTACK=512
|
CONFIG_ARCH_INTERRUPTSTACK=512
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -32,6 +32,7 @@ CONFIG_ARCH_CHIP_STM32=y
|
|||||||
CONFIG_ARCH_CHIP_STM32F427V=y
|
CONFIG_ARCH_CHIP_STM32F427V=y
|
||||||
CONFIG_ARCH_INTERRUPTSTACK=512
|
CONFIG_ARCH_INTERRUPTSTACK=512
|
||||||
CONFIG_ARCH_STACKDUMP=y
|
CONFIG_ARCH_STACKDUMP=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -32,6 +32,7 @@ CONFIG_ARCH_CHIP_STM32=y
|
|||||||
CONFIG_ARCH_CHIP_STM32F427V=y
|
CONFIG_ARCH_CHIP_STM32F427V=y
|
||||||
CONFIG_ARCH_INTERRUPTSTACK=512
|
CONFIG_ARCH_INTERRUPTSTACK=512
|
||||||
CONFIG_ARCH_STACKDUMP=y
|
CONFIG_ARCH_STACKDUMP=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -32,6 +32,7 @@ CONFIG_ARCH_CHIP_STM32=y
|
|||||||
CONFIG_ARCH_CHIP_STM32F427V=y
|
CONFIG_ARCH_CHIP_STM32F427V=y
|
||||||
CONFIG_ARCH_INTERRUPTSTACK=512
|
CONFIG_ARCH_INTERRUPTSTACK=512
|
||||||
CONFIG_ARCH_STACKDUMP=y
|
CONFIG_ARCH_STACKDUMP=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_STACKCHECK=y
|
CONFIG_ARMV7M_STACKCHECK=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
|
|||||||
@@ -32,6 +32,7 @@ CONFIG_ARCH_CHIP_STM32=y
|
|||||||
CONFIG_ARCH_CHIP_STM32F427V=y
|
CONFIG_ARCH_CHIP_STM32F427V=y
|
||||||
CONFIG_ARCH_INTERRUPTSTACK=512
|
CONFIG_ARCH_INTERRUPTSTACK=512
|
||||||
CONFIG_ARCH_STACKDUMP=y
|
CONFIG_ARCH_STACKDUMP=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -32,6 +32,7 @@ CONFIG_ARCH_CHIP_STM32=y
|
|||||||
CONFIG_ARCH_CHIP_STM32F427V=y
|
CONFIG_ARCH_CHIP_STM32F427V=y
|
||||||
CONFIG_ARCH_INTERRUPTSTACK=512
|
CONFIG_ARCH_INTERRUPTSTACK=512
|
||||||
CONFIG_ARCH_STACKDUMP=y
|
CONFIG_ARCH_STACKDUMP=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -32,6 +32,7 @@ CONFIG_ARCH_CHIP_STM32=y
|
|||||||
CONFIG_ARCH_CHIP_STM32F427V=y
|
CONFIG_ARCH_CHIP_STM32F427V=y
|
||||||
CONFIG_ARCH_INTERRUPTSTACK=512
|
CONFIG_ARCH_INTERRUPTSTACK=512
|
||||||
CONFIG_ARCH_STACKDUMP=y
|
CONFIG_ARCH_STACKDUMP=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_STACKCHECK=y
|
CONFIG_ARMV7M_STACKCHECK=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
|
|||||||
@@ -32,6 +32,7 @@ CONFIG_ARCH_CHIP_STM32=y
|
|||||||
CONFIG_ARCH_CHIP_STM32F469I=y
|
CONFIG_ARCH_CHIP_STM32F469I=y
|
||||||
CONFIG_ARCH_INTERRUPTSTACK=512
|
CONFIG_ARCH_INTERRUPTSTACK=512
|
||||||
CONFIG_ARCH_STACKDUMP=y
|
CONFIG_ARCH_STACKDUMP=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -36,6 +36,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
|
|||||||
CONFIG_ARMV7M_DCACHE=y
|
CONFIG_ARMV7M_DCACHE=y
|
||||||
CONFIG_ARMV7M_DTCM=y
|
CONFIG_ARMV7M_DTCM=y
|
||||||
CONFIG_ARMV7M_ICACHE=y
|
CONFIG_ARMV7M_ICACHE=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -36,6 +36,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
|
|||||||
CONFIG_ARMV7M_DCACHE=y
|
CONFIG_ARMV7M_DCACHE=y
|
||||||
CONFIG_ARMV7M_DTCM=y
|
CONFIG_ARMV7M_DTCM=y
|
||||||
CONFIG_ARMV7M_ICACHE=y
|
CONFIG_ARMV7M_ICACHE=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_STACKCHECK=y
|
CONFIG_ARMV7M_STACKCHECK=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
|
|||||||
@@ -36,6 +36,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
|
|||||||
CONFIG_ARMV7M_DCACHE=y
|
CONFIG_ARMV7M_DCACHE=y
|
||||||
CONFIG_ARMV7M_DTCM=y
|
CONFIG_ARMV7M_DTCM=y
|
||||||
CONFIG_ARMV7M_ICACHE=y
|
CONFIG_ARMV7M_ICACHE=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -36,6 +36,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
|
|||||||
CONFIG_ARMV7M_DCACHE=y
|
CONFIG_ARMV7M_DCACHE=y
|
||||||
CONFIG_ARMV7M_DTCM=y
|
CONFIG_ARMV7M_DTCM=y
|
||||||
CONFIG_ARMV7M_ICACHE=y
|
CONFIG_ARMV7M_ICACHE=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -36,6 +36,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
|
|||||||
CONFIG_ARMV7M_DCACHE=y
|
CONFIG_ARMV7M_DCACHE=y
|
||||||
CONFIG_ARMV7M_DTCM=y
|
CONFIG_ARMV7M_DTCM=y
|
||||||
CONFIG_ARMV7M_ICACHE=y
|
CONFIG_ARMV7M_ICACHE=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -36,6 +36,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
|
|||||||
CONFIG_ARMV7M_DCACHE=y
|
CONFIG_ARMV7M_DCACHE=y
|
||||||
CONFIG_ARMV7M_DTCM=y
|
CONFIG_ARMV7M_DTCM=y
|
||||||
CONFIG_ARMV7M_ICACHE=y
|
CONFIG_ARMV7M_ICACHE=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_STACKCHECK=y
|
CONFIG_ARMV7M_STACKCHECK=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
|
|||||||
@@ -35,6 +35,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
|
|||||||
CONFIG_ARMV7M_DCACHE=y
|
CONFIG_ARMV7M_DCACHE=y
|
||||||
CONFIG_ARMV7M_DTCM=y
|
CONFIG_ARMV7M_DTCM=y
|
||||||
CONFIG_ARMV7M_ICACHE=y
|
CONFIG_ARMV7M_ICACHE=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -35,6 +35,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
|
|||||||
CONFIG_ARMV7M_DCACHE=y
|
CONFIG_ARMV7M_DCACHE=y
|
||||||
CONFIG_ARMV7M_DTCM=y
|
CONFIG_ARMV7M_DTCM=y
|
||||||
CONFIG_ARMV7M_ICACHE=y
|
CONFIG_ARMV7M_ICACHE=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -20,6 +20,7 @@ CONFIG_ARCH_CHIP_STM32H7=y
|
|||||||
CONFIG_ARCH_INTERRUPTSTACK=512
|
CONFIG_ARCH_INTERRUPTSTACK=512
|
||||||
CONFIG_ARMV7M_BASEPRI_WAR=y
|
CONFIG_ARMV7M_BASEPRI_WAR=y
|
||||||
CONFIG_ARMV7M_ICACHE=y
|
CONFIG_ARMV7M_ICACHE=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -35,6 +35,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
|
|||||||
CONFIG_ARMV7M_DCACHE=y
|
CONFIG_ARMV7M_DCACHE=y
|
||||||
CONFIG_ARMV7M_DTCM=y
|
CONFIG_ARMV7M_DTCM=y
|
||||||
CONFIG_ARMV7M_ICACHE=y
|
CONFIG_ARMV7M_ICACHE=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
CONFIG_BOARDCTL_RESET=y
|
CONFIG_BOARDCTL_RESET=y
|
||||||
|
|||||||
@@ -35,6 +35,7 @@ CONFIG_ARMV7M_BASEPRI_WAR=y
|
|||||||
CONFIG_ARMV7M_DCACHE=y
|
CONFIG_ARMV7M_DCACHE=y
|
||||||
CONFIG_ARMV7M_DTCM=y
|
CONFIG_ARMV7M_DTCM=y
|
||||||
CONFIG_ARMV7M_ICACHE=y
|
CONFIG_ARMV7M_ICACHE=y
|
||||||
|
CONFIG_ARMV7M_LAZYFPU=y
|
||||||
CONFIG_ARMV7M_MEMCPY=y
|
CONFIG_ARMV7M_MEMCPY=y
|
||||||
CONFIG_ARMV7M_STACKCHECK=y
|
CONFIG_ARMV7M_STACKCHECK=y
|
||||||
CONFIG_ARMV7M_USEBASEPRI=y
|
CONFIG_ARMV7M_USEBASEPRI=y
|
||||||
|
|||||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user