[REVISIT] Support upstream DSHOT Revist!

The Addition of PX4_ARCH_DCACHE_LINESIZE is fundamentally wrong.
   It asserst that an STM32F4 has a cache and it does not.
   This should be #if defined() on CONFIG_ARMV7M_DCACHE
This commit is contained in:
David Sidrane
2019-10-23 04:22:25 -07:00
committed by Lorenz Meier
parent 2bb7a1f3c7
commit 850821f47f
3 changed files with 38 additions and 1 deletions
@@ -46,7 +46,7 @@ __BEGIN_DECLS
# define PX4_BBSRAM_GETDESC_IOCTL STM32_BBSRAM_GETDESC_IOCTL
#endif
#define PX4_NUMBER_I2C_BUSES STM32_NI2C
#define PX4_ARCH_DCACHE_LINESIZE 32
#define PX4_ARCH_DCACHE_LINESIZE 32 // REMOVE this The DSHOT added this and needs to be fixed THERE IS NO DCAHE on F4
__END_DECLS
@@ -0,0 +1,36 @@
/****************************************************************************
*
* Copyright (c) 2019 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#pragma once
#include "../../../stm32_common/include/px4_arch/dshot.h"
@@ -46,6 +46,7 @@ __BEGIN_DECLS
#define PX4_BBSRAM_GETDESC_IOCTL STM32H7_BBSRAM_GETDESC_IOCTL
#define PX4_FLASH_BASE 0x08000000
#define PX4_NUMBER_I2C_BUSES STM32H7_NI2C
#define PX4_ARCH_DCACHE_LINESIZE ARMV7M_DCACHE_LINESIZE //Fix me! REMOVE this The DSHOT added this and needs to be fixed
int stm32h7_flash_lock(size_t addr);
int stm32h7_flash_unlock(size_t addr);