[BACKPORT 1.17] imxrt related fixes and mr-tropic support (#26052)

2026-10-06 09:02:52 +08:00 · 2025-12-23 15:10:07 -05:00
parent 77766d1301
commit 82532f9642
66 changed files with 6287 additions and 625 deletions
@@ -41,6 +41,10 @@ jobs:
            scripts: >
              boards/nxp/tropic-community/nuttx-config/scripts/itcm_functions_includes.ld
              boards/nxp/tropic-community/nuttx-config/scripts/itcm_static_functions.ld
+          - target: nxp_mr-tropic
+            scripts: >
+              boards/nxp/mr-tropic/nuttx-config/scripts/itcm_functions_includes.ld
+              boards/nxp/mr-tropic/nuttx-config/scripts/itcm_static_functions.ld
    steps:
      - uses: actions/checkout@v4
        with:
@@ -456,6 +456,16 @@ CONFIG:
      buildType: MinSizeRel
      settings:
        CONFIG: nxp_mr-canhubk3_fmu
+    nxp_mr-tropic_default:
+      short: nxp_mr-tropic_default
+      buildType: MinSizeRel
+      settings:
+        CONFIG: nxp_mr-tropic_default
+    nxp_mr-tropic_bootloader:
+      short: nxp_mr-tropic_bootloader
+      buildType: MinSizeRel
+      settings:
+        CONFIG: nxp_mr-tropic_bootloader
    nxp_tropic-community_default:
      short: nxp_tropic-community_default
      buildType: MinSizeRel
@@ -0,0 +1,3 @@
+CONFIG_BOARD_TOOLCHAIN="arm-none-eabi"
+CONFIG_BOARD_ARCHITECTURE="cortex-m7"
+CONFIG_BOARD_ROMFSROOT=""
@@ -0,0 +1,44 @@
+############################################################################
+#
+#   Copyright (c) 2024 PX4 Development Team. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name PX4 nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+
+set(PX4_FW_NAME ${PX4_BINARY_DIR}/${PX4_BOARD_VENDOR}_${PX4_BOARD_MODEL}_${PX4_BOARD_LABEL}.hex)
+
+add_custom_target(upload_teensy
+	COMMAND ${PYTHON_EXECUTABLE} ${PX4_SOURCE_DIR}/Tools/teensy_uploader.py --port ${serial_ports} ${PX4_FW_NAME} --vendor-id 0x1FC9 --product-id 0x0024
+	DEPENDS ${PX4_FW_NAME}
+	COMMENT "uploading px4"
+	VERBATIM
+	USES_TERMINAL
+	WORKING_DIRECTORY ${PX4_BINARY_DIR}
+)
@@ -0,0 +1,109 @@
+CONFIG_BOARD_TOOLCHAIN="arm-none-eabi"
+CONFIG_BOARD_ARCHITECTURE="cortex-m7"
+CONFIG_BOARD_ETHERNET=y
+CONFIG_BOARD_SERIAL_GPS1="/dev/ttyS1"
+CONFIG_BOARD_SERIAL_TEL1="/dev/ttyS2"
+CONFIG_BOARD_SERIAL_TEL2="/dev/ttyS4"
+CONFIG_BOARD_SERIAL_TEL3="/dev/ttyS3"
+CONFIG_BOARD_SERIAL_RC="/dev/ttyS6"
+CONFIG_BOARD_PARAM_FILE="/fs/nor/mtd_params"
+CONFIG_DRIVERS_ADC_BOARD_ADC=y
+CONFIG_DRIVERS_BAROMETER_BMP388=y
+CONFIG_DRIVERS_BAROMETER_INVENSENSE_ICP201XX=y
+CONFIG_DRIVERS_BAROMETER_MS5611=y
+CONFIG_DRIVERS_CAMERA_CAPTURE=y
+CONFIG_DRIVERS_CAMERA_TRIGGER=y
+CONFIG_DRIVERS_CDCACM_AUTOSTART=y
+CONFIG_COMMON_DIFFERENTIAL_PRESSURE=y
+CONFIG_COMMON_DISTANCE_SENSOR=y
+CONFIG_DRIVERS_DISTANCE_SENSOR_LIGHTWARE_SF45_SERIAL=y
+CONFIG_DRIVERS_DSHOT=y
+CONFIG_DRIVERS_GNSS_SEPTENTRIO=y
+CONFIG_DRIVERS_GPS=y
+CONFIG_DRIVERS_IMU_BOSCH_BMI088=y
+CONFIG_DRIVERS_IMU_INVENSENSE_ICM20948=y
+CONFIG_DRIVERS_IMU_INVENSENSE_ICM42688P=y
+CONFIG_DRIVERS_IMU_INVENSENSE_ICM45686=y
+CONFIG_COMMON_INS=y
+CONFIG_COMMON_LIGHT=y
+CONFIG_DRIVERS_LIGHTS_RGBLED_PWM=y
+CONFIG_COMMON_MAGNETOMETER=y
+CONFIG_DRIVERS_MAGNETOMETER_BOSCH_BMM350=y
+CONFIG_COMMON_OPTICAL_FLOW=y
+CONFIG_DRIVERS_OSD_MSP_OSD=y
+CONFIG_DRIVERS_POWER_MONITOR_INA226=y
+CONFIG_DRIVERS_POWER_MONITOR_INA228=y
+CONFIG_DRIVERS_POWER_MONITOR_INA238=y
+CONFIG_DRIVERS_PWM_OUT=y
+CONFIG_COMMON_RC=y
+CONFIG_DRIVERS_SAFETY_BUTTON=y
+CONFIG_COMMON_TELEMETRY=y
+CONFIG_DRIVERS_TONE_ALARM=y
+CONFIG_DRIVERS_UAVCAN=y
+CONFIG_BOARD_UAVCAN_INTERFACES=1
+CONFIG_COMMON_UWB=y
+CONFIG_MODULES_AIRSPEED_SELECTOR=y
+CONFIG_MODULES_BATTERY_STATUS=y
+CONFIG_MODULES_CAMERA_FEEDBACK=y
+CONFIG_MODULES_COMMANDER=y
+CONFIG_MODULES_CONTROL_ALLOCATOR=y
+CONFIG_MODULES_DATAMAN=y
+CONFIG_MODULES_EKF2=y
+CONFIG_MODULES_ESC_BATTERY=y
+CONFIG_MODULES_EVENTS=y
+CONFIG_MODULES_FLIGHT_MODE_MANAGER=y
+CONFIG_MODULES_FW_ATT_CONTROL=y
+CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=y
+CONFIG_MODULES_FW_MODE_MANAGER=y
+CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=y
+CONFIG_MODULES_FW_RATE_CONTROL=y
+CONFIG_MODULES_GIMBAL=y
+CONFIG_MODULES_GYRO_CALIBRATION=y
+CONFIG_MODULES_GYRO_FFT=y
+CONFIG_MODULES_LAND_DETECTOR=y
+CONFIG_MODULES_LANDING_TARGET_ESTIMATOR=y
+CONFIG_MODULES_LOAD_MON=y
+CONFIG_MODULES_LOCAL_POSITION_ESTIMATOR=y
+CONFIG_MODULES_LOGGER=y
+CONFIG_MODULES_MAG_BIAS_ESTIMATOR=y
+CONFIG_MODULES_MANUAL_CONTROL=y
+CONFIG_MODULES_MAVLINK=y
+CONFIG_MODULES_MC_ATT_CONTROL=y
+CONFIG_MODULES_MC_AUTOTUNE_ATTITUDE_CONTROL=y
+CONFIG_MODULES_MC_HOVER_THRUST_ESTIMATOR=y
+CONFIG_MODULES_MC_POS_CONTROL=y
+CONFIG_MODULES_MC_RATE_CONTROL=y
+CONFIG_MODULES_NAVIGATOR=y
+CONFIG_MODE_NAVIGATOR_VTOL_TAKEOFF=y
+CONFIG_NUM_MISSION_ITMES_SUPPORTED=1000
+CONFIG_MODULES_RC_UPDATE=y
+CONFIG_MODULES_ROVER_POS_CONTROL=y
+CONFIG_MODULES_SENSORS=y
+CONFIG_MODULES_TEMPERATURE_COMPENSATION=y
+CONFIG_MODULES_UXRCE_DDS_CLIENT=y
+CONFIG_MODULES_VTOL_ATT_CONTROL=y
+CONFIG_MODULES_ZENOH=y
+CONFIG_SYSTEMCMDS_ACTUATOR_TEST=y
+CONFIG_SYSTEMCMDS_BSONDUMP=y
+CONFIG_SYSTEMCMDS_DMESG=y
+CONFIG_SYSTEMCMDS_DUMPFILE=y
+CONFIG_SYSTEMCMDS_I2C_LAUNCHER=y
+CONFIG_SYSTEMCMDS_I2CDETECT=y
+CONFIG_SYSTEMCMDS_LED_CONTROL=y
+CONFIG_SYSTEMCMDS_MFT=y
+CONFIG_SYSTEMCMDS_NETMAN=y
+CONFIG_SYSTEMCMDS_NSHTERM=y
+CONFIG_SYSTEMCMDS_PARAM=y
+CONFIG_SYSTEMCMDS_PERF=y
+CONFIG_SYSTEMCMDS_REBOOT=y
+CONFIG_SYSTEMCMDS_SD_BENCH=y
+CONFIG_SYSTEMCMDS_SD_STRESS=y
+CONFIG_SYSTEMCMDS_SERIAL_TEST=y
+CONFIG_SYSTEMCMDS_SYSTEM_TIME=y
+CONFIG_SYSTEMCMDS_TOP=y
+CONFIG_SYSTEMCMDS_TOPIC_LISTENER=y
+CONFIG_SYSTEMCMDS_TUNE_CONTROL=y
+CONFIG_SYSTEMCMDS_UORB=y
+CONFIG_SYSTEMCMDS_USB_CONNECTED=y
+CONFIG_SYSTEMCMDS_VER=y
+CONFIG_SYSTEMCMDS_WORK_QUEUE=y
@@ -0,0 +1,13 @@
+{
+    "board_id": 37,
+    "magic": "PX4FWv1",
+    "description": "Firmware for the MR-TROPIC board",
+    "image": "",
+    "build_time": 0,
+    "summary": "MR-TROPIC",
+    "version": "0.1",
+    "image_size": 0,
+    "image_maxsize": 3932160,
+    "git_identity": "",
+    "board_revision": 0
+}
@@ -0,0 +1,38 @@
+#!/bin/sh
+#
+# board specific defaults
+#------------------------------------------------------------------------------
+
+# Mavlink ethernet (CFG 1000)
+param set-default MAV_2_CONFIG 1000
+param set-default MAV_2_BROADCAST 1
+param set-default MAV_2_MODE 0
+param set-default MAV_2_RADIO_CTL 0
+param set-default MAV_2_RATE 100000
+param set-default MAV_2_REMOTE_PRT 14550
+param set-default MAV_2_UDP_PRT 14550
+
+param set-default SENS_EN_INA238 0
+param set-default SENS_EN_INA228 0
+param set-default SENS_EN_INA226 0
+
+param set-default RC_CRSF_PRT_CFG 300
+param set-default RC_CRSF_TEL_EN 1
+param set-default RC_SBUS_PRT_CFG 0
+
+if [ -f "/fs/microsd/ipcfg-eth0" ]
+then
+else
+	netman update -i eth0
+fi
+
+rgbled_pwm start
+safety_button start
+
+if param greater -s UAVCAN_ENABLE 0
+then
+	ifup can0
+fi
+
+# Start the ESC telemetry
+dshot telemetry -d /dev/ttyS5 -x
@@ -0,0 +1,4 @@
+#!/bin/sh
+#
+# Tropic Community specific board MAVLink startup script.
+#------------------------------------------------------------------------------
@@ -0,0 +1,68 @@
+#!/bin/sh
+#
+# PX4 board sensors init
+#------------------------------------------------------------------------------
+#
+# UART mapping on Tropic Community:
+#
+# LPUART5       /dev/ttyS0      CONSOLE
+# LPUART3       /dev/ttyS1      GPS
+# LPUART2       /dev/ttyS2      TELEM1
+# LPUART4       /dev/ttyS3      TELEM2
+# LPUART8       /dev/ttyS4      RC
+#
+#------------------------------------------------------------------------------
+
+set INA_CONFIGURED no
+
+board_adc start
+
+if param compare SENS_EN_INA226 1
+then
+	# Start Digital power monitors
+	ina226 -X -b 3 -t 1 -k start
+	set INA_CONFIGURED yes
+fi
+
+if param compare SENS_EN_INA228 1
+then
+	# Start Digital power monitors
+	ina228 -X -b 3 -t 1 -k start
+	set INA_CONFIGURED yes
+fi
+
+if param compare SENS_EN_INA238 1
+then
+	# Start Digital power monitors
+	ina238 -X -b 3 -t 1 -k start
+	set INA_CONFIGURED yes
+fi
+
+if [ $INA_CONFIGURED = no ]
+then
+	# INA226, INA228, INA238 auto-start
+	i2c_launcher start -b 3 -t 1
+fi
+
+# Internal SPI bus icm45686
+icm45686 -R 2 -b 3 -s start
+
+# Internal on IMU SPI BMI088
+bmi088 -A -R 2 -b 4 -s start
+bmi088 -G -R 2 -b 4 -s start
+
+# Internal magnetometer on I2c
+bmm350 -I -b 4 -R 6 start
+
+# External compass on GPS1/I2C1 (the 3rd external bus): standard Holybro Pixhawk 4 or CUAV V5 GPS/compass puck (with lights, safety button, and buzzer)
+ist8310 -X -b 1 -R 10 start
+
+# Possible internal Baro
+
+# Disable startup of internal baros if param is set to false
+if param compare SENS_INT_BARO_EN 1
+then
+	bmp388 -I -b 4 start
+fi
+
+unset INA_CONFIGURED
@@ -0,0 +1,4 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
@@ -0,0 +1,107 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_DEV_CONSOLE is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_SPI_EXCHANGE is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD_CUSTOM=y
+CONFIG_ARCH_BOARD_CUSTOM_DIR="../../../../boards/nxp/mr-tropic/nuttx-config"
+CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
+CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
+CONFIG_ARCH_CHIP="imxrt"
+CONFIG_ARCH_CHIP_IMXRT=y
+CONFIG_ARCH_CHIP_MIMXRT1064DVL6A=y
+CONFIG_ARCH_INTERRUPTSTACK=4096
+CONFIG_ARCH_RAMVECTORS=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_ARMV7M_DCACHE=y
+CONFIG_ARMV7M_DTCM=y
+CONFIG_ARMV7M_ICACHE=y
+CONFIG_ARMV7M_ITCM=y
+CONFIG_ARMV7M_MEMCPY=y
+CONFIG_ARMV7M_USEBASEPRI=y
+CONFIG_ARM_MPU=y
+CONFIG_ARM_MPU_RESET=y
+CONFIG_BOARDCTL=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_BOARD_ASSERT_RESET_VALUE=0
+CONFIG_BOARD_INITTHREAD_PRIORITY=254
+CONFIG_BOARD_LATE_INITIALIZE=y
+CONFIG_BOARD_LOOPSPERMSEC=115000
+CONFIG_BOARD_RESET_ON_ASSERT=2
+CONFIG_CDCACM=y
+CONFIG_CDCACM_BULKIN_REQLEN=96
+CONFIG_CDCACM_IFLOWCONTROL=y
+CONFIG_CDCACM_PRODUCTID=0x0025
+CONFIG_CDCACM_PRODUCTSTR="PX4 BL MR-TROPIC"
+CONFIG_CDCACM_RXBUFSIZE=600
+CONFIG_CDCACM_TXBUFSIZE=12000
+CONFIG_CDCACM_VENDORID=0x1FC9
+CONFIG_CDCACM_VENDORSTR="NXP SEMICONDUCTORS"
+CONFIG_DEBUG_ASSERTIONS=y
+CONFIG_DEBUG_ERROR=y
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_HARDFAULT_ALERT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DEBUG_TCBINFO=y
+CONFIG_DEBUG_USAGEFAULT=y
+CONFIG_DEFAULT_SMALL=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_FDCLONE_DISABLE=y
+CONFIG_FDCLONE_STDIO=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_IMXRT_EDMA=y
+CONFIG_IMXRT_EDMA_EDBG=y
+CONFIG_IMXRT_EDMA_ELINK=y
+CONFIG_IMXRT_EDMA_NTCD=64
+CONFIG_IMXRT_ITCM=384
+CONFIG_IMXRT_LPUART3=y
+CONFIG_IMXRT_SNVS_LPSRTC=y
+CONFIG_IMXRT_USBDEV=y
+CONFIG_INIT_ENTRYPOINT="bootloader_main"
+CONFIG_INIT_STACKSIZE=3194
+CONFIG_LIBC_FLOATINGPOINT=y
+CONFIG_LIBC_LONG_LONG=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_LPUART3_BAUD=57600
+CONFIG_LPUART3_IFLOWCONTROL=y
+CONFIG_LPUART3_OFLOWCONTROL=y
+CONFIG_LPUART3_RXBUFSIZE=600
+CONFIG_LPUART3_RXDMA=y
+CONFIG_LPUART3_TXBUFSIZE=1500
+CONFIG_LPUART3_TXDMA=y
+CONFIG_MEMSET_64BIT=y
+CONFIG_MEMSET_OPTSPEED=y
+CONFIG_PREALLOC_TIMERS=50
+CONFIG_PTHREAD_MUTEX_ROBUST=y
+CONFIG_PTHREAD_STACK_MIN=512
+CONFIG_RAM_SIZE=1048576
+CONFIG_RAM_START=0x20200000
+CONFIG_RAW_BINARY=y
+CONFIG_SERIAL_TERMIOS=y
+CONFIG_SIG_DEFAULT=y
+CONFIG_SIG_SIGALRM_ACTION=y
+CONFIG_SIG_SIGUSR1_ACTION=y
+CONFIG_SIG_SIGUSR2_ACTION=y
+CONFIG_SPI=y
+CONFIG_STACK_COLORATION=y
+CONFIG_START_DAY=30
+CONFIG_START_MONTH=11
+CONFIG_STDIO_BUFFER_SIZE=32
+CONFIG_SYSTEMTICK_HOOK=y
+CONFIG_SYSTEM_CDCACM=y
+CONFIG_TASK_NAME_SIZE=24
+CONFIG_USBDEV=y
+CONFIG_USBDEV_BUSPOWERED=y
+CONFIG_USBDEV_DMA=y
+CONFIG_USBDEV_DUALSPEED=y
+CONFIG_USBDEV_MAXPOWER=500
+CONFIG_USEC_PER_TICK=1000
@@ -0,0 +1,177 @@
+/****************************************************************************
+ * boards/nxp/mr-tropic/nuttx-config/scripts/bootloader_script.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* Specify the memory areas */
+
+MEMORY
+{
+  flash (rx)  : ORIGIN = 0x70000000, LENGTH = 128K
+  sram  (rwx) : ORIGIN = 0x20200000, LENGTH = 512K
+  itcm  (rwx) : ORIGIN = 0x00000000, LENGTH = 384K
+  dtcm  (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
+}
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+EXTERN(g_flash_config)
+EXTERN(g_image_vector_table)
+EXTERN(g_boot_data)
+EXTERN(board_get_manifest)
+EXTERN(_bootdelay_signature)
+
+ENTRY(_stext)
+
+SECTIONS
+{
+    /* Image Vector Table and Boot Data for booting from external flash */
+
+    .boot_hdr : ALIGN(4)
+    {
+        FILL(0xff)
+        __boot_hdr_start__ = ABSOLUTE(.) ;
+        KEEP(*(.boot_hdr.conf))
+        . = 0x1000 ;
+        KEEP(*(.boot_hdr.ivt))
+        . = 0x1020 ;
+        KEEP(*(.boot_hdr.boot_data))
+        . = 0x1030 ;
+        KEEP(*(.boot_hdr.dcd_data))
+        __boot_hdr_end__ = ABSOLUTE(.) ;
+        . = 0x2000 ;
+    } >flash
+
+    .vectors :
+    {
+        KEEP(*(.vectors))
+        *(.text .text.__start)
+    } >flash
+
+    .itcmfunc :
+    {
+        . = ALIGN(8);
+        _sitcmfuncs = ABSOLUTE(.);
+        FILL(0xFF)
+        . = 0x40 ;
+        *(.ram_vectors)
+        . = ALIGN(8);
+        _eitcmfuncs = ABSOLUTE(.);
+    } > itcm AT > flash
+
+    _fitcmfuncs = LOADADDR(.itcmfunc);
+
+    .text : ALIGN(4)
+    {
+        _stext = ABSOLUTE(.);
+        *(.vectors)
+		. = ALIGN(32);
+		/*
+		This signature provides the bootloader with a way to delay booting
+		*/
+		_bootdelay_signature = ABSOLUTE(.);
+		FILL(0xffecc2925d7d05c5)
+		. += 8;
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        . = ALIGN(4096);
+        _etext = ABSOLUTE(.);
+        _srodata = ABSOLUTE(.);
+        *(.rodata .rodata.*)
+        . = ALIGN(4096);
+        _erodata = ABSOLUTE(.);
+    } > flash
+
+    .init_section :
+    {
+        _sinit = ABSOLUTE(.);
+        KEEP(*(.init_array .init_array.*))
+        _einit = ABSOLUTE(.);
+    } > flash
+
+    .ARM.extab :
+    {
+        *(.ARM.extab*)
+    } > flash
+
+    .ARM.exidx :
+    {
+        __exidx_start = ABSOLUTE(.);
+        *(.ARM.exidx*)
+        __exidx_end = ABSOLUTE(.);
+    } > flash
+
+    _eronly = ABSOLUTE(.);
+
+    .data :
+    {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        . = ALIGN(4);
+        _edata = ABSOLUTE(.);
+    } > sram AT > flash
+
+    .ramfunc ALIGN(4):
+    {
+        _sramfuncs = ABSOLUTE(.);
+        *(.ramfunc  .ramfunc.*)
+        _eramfuncs = ABSOLUTE(.);
+    } > sram AT > flash
+
+    _framfuncs = LOADADDR(.ramfunc);
+
+    .bss :
+    {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = ABSOLUTE(.);
+    } > sram
+
+    /* Stabs debugging sections. */
+
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+
+    _boot_loadaddr = ORIGIN(flash);
+    _boot_size = LENGTH(flash);
+    _ram_size = LENGTH(sram);
+    _sdtcm = ORIGIN(dtcm);
+    _edtcm = ORIGIN(dtcm) + LENGTH(dtcm);
+}
@@ -0,0 +1,163 @@
+/* Static */
+*(.text.arm_ack_irq)
+*(.text.arm_doirq)
+*(.text.arm_svcall)
+*(.text.arm_switchcontext)
+*(.text.clock_timer)
+*(.text.exception_common)
+*(.text.flexio_irq_handler)
+*(.text.hrt_absolute_time)
+*(.text.hrt_call_enter)
+*(.text.hrt_tim_isr)
+*(.text.imxrt_configwaitints)
+*(.text.imxrt_dma_callback)
+*(.text.imxrt_dmach_interrupt)
+*(.text.imxrt_dmach_xfrsetup)
+*(.text.imxrt_dmaterminate)
+*(.text.imxrt_dispatch)
+*(.text.imxrt_edma_interrupt)
+*(.text.imxrt_endwait)
+*(.text.imxrt_enet_interrupt)
+*(.text.imxrt_enet_interrupt_work)
+*(.text.imxrt_interrupt)
+*(.text.imxrt_gpio1_16_31_interrupt)
+*(.text.imxrt_gpio2_0_15_interrupt)
+*(.text.imxrt_lpi2c_isr)
+*(.text.imxrt_lpspi3select)
+*(.text.imxrt_lpspi4select)
+*(.text.imxrt_lpspi_exchange)
+*(.text.imxrt_recvdma)
+*(.text.imxrt_tcd_free)
+*(.text.imxrt_timerisr)
+*(.text.imxrt_transmit)
+*(.text.imxrt_txdone)
+*(.text.imxrt_txtimeout_work)
+*(.text.imxrt_txtimeout_expiry)
+*(.text.imxrt_txpoll)
+*(.text.imxrt_txringfull)
+*(.text.imxrt_txavail_work)
+*(.text.imxrt_txavail)
+*(.text.imxrt_usbinterrupt)
+*(.text.irq_dispatch)
+*(.text.ioctl)
+*(.text.memcpy)
+*(.text.memset)
+*(.text.nxsched_add_blocked)
+*(.text.nxsched_add_prioritized)
+*(.text.nxsched_add_readytorun)
+*(.text.nxsched_get_files)
+*(.text.nxsched_get_tcb)
+*(.text.nxsched_merge_pending)
+*(.text.nxsched_process_timer)
+*(.text.nxsched_remove_blocked)
+*(.text.nxsched_remove_readytorun)
+*(.text.nxsched_resume_scheduler)
+*(.text.nxsched_suspend_scheduler)
+*(.text.nxsem_add_holder)
+*(.text.nxsem_add_holder_tcb)
+*(.text.nxsem_clockwait)
+*(.text.nxsem_foreachholder)
+*(.text.nxsem_freecount0holder)
+*(.text.nxsem_freeholder)
+*(.text.nxsem_post)
+*(.text.nxsem_release_holder)
+*(.text.nxsem_restore_baseprio)
+*(.text.nxsem_tickwait)
+*(.text.nxsem_timeout)
+*(.text.nxsem_trywait)
+*(.text.nxsem_wait)
+*(.text.nxsem_wait_uninterruptible)
+*(.text.nxsig_timedwait)
+*(.text.sched_lock)
+*(.text.sched_note_resume)
+*(.text.sched_note_suspend)
+*(.text.sched_unlock)
+*(.text.strcmp)
+*(.text.sq_addafter)
+*(.text.sq_addlast)
+*(.text.sq_rem)
+*(.text.sq_remafter)
+*(.text.sq_remfirst)
+*(.text.uart_connected)
+*(.text.up_block_task)
+*(.text.up_unblock_task)
+*(.text.wd_timer)
+*(.text.wd_start)
+*(.text.work_thread)
+*(.text.work_queue)
+*(.text._do_memcpy)
+
+/* Tropic Eth tune */
+*(.text.devif_poll)
+*(.text.devif_poll_tcp_connections)
+*(.text.tcp_poll)
+*(.text.devif_poll_udp_connections)
+*(.text.udp_nextconn)
+*(.text.udp_poll)
+*(.text.udp_ipv4_select)
+*(.text.udp_callback)
+*(.text.udp_datahandler)
+*(.text.udp_send)
+*(.text.udp_active)
+*(.text.udp_ipv4_active)
+*(.text.psock_udp_sendto)
+*(.text.sendto_eventhandler)
+*(.text.net_dataevent)
+*(.text.devif_conn_event)
+*(.text.devif_event_trigger)
+*(.text.devif_poll_icmp)
+*(.text.icmp_poll)
+*(.text.arp_out)
+*(.text.arp_find)
+*(.text.arp_format)
+*(.text.net_ipv4addr_hdrcmp) /* itcm-check-ignore */
+*(.text.net_ipv4addr_copy) /* itcm-check-ignore */
+*(.text.net_ipv4addr_broadcast) /* itcm-check-ignore */
+*(.text.wd_start)
+*(.text.arp_arpin)
+*(.text.ipv4_input)
+*(.text.work_thread)
+*(.text.work_queue)
+
+/* ICM45686 */
+*(.text._ZN8ICM4568612ProcessAccelERKyPKN19InvenSense_ICM456864FIFO4DATAEh)
+*(.text._ZN8ICM4568611ProcessGyroERKyPKN19InvenSense_ICM456864FIFO4DATAEh)
+*(.text._ZN8ICM456868FIFOReadERKy)
+*(.text._ZN8ICM456867RunImplEv)
+*(.text._ZN8ICM4568618ProcessTemperatureEPKN19InvenSense_ICM456864FIFO4DATAEh)
+*(.text._ZN12I2CSPIDriverI8ICM45686E3RunEv)
+*(.text._ZN8ICM4568613FIFOReadCountEv)
+
+/* BMI088 */
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer12RegisterReadENS1_8RegisterE)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer13FIFOReadCountEv)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer8FIFOReadERKyh)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer13RegisterCheckERKNS2_17register_config_tE)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer13RegisterWriteENS1_8RegisterEh)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer17UpdateTemperatureEv)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer23RegisterSetAndClearBitsENS1_8RegisterEhh)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer26DataReadyInterruptCallbackEiPvS3_)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer7RunImplEv)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer9DataReadyEv)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_AccelerometerD0Ev)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_AccelerometerD1Ev)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_AccelerometerD2Ev)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope12RegisterReadENS1_8RegisterE)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope13RegisterCheckERKNS2_17register_config_tE)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope13RegisterWriteENS1_8RegisterEh)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope23RegisterSetAndClearBitsENS1_8RegisterEhh)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope26DataReadyInterruptCallbackEiPvS3_)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope7RunImplEv)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope8FIFOReadERKyh)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope9DataReadyEv)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_GyroscopeD0Ev)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_GyroscopeD1Ev)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_GyroscopeD2Ev)
+*(.text._ZN12I2CSPIDriverI6BMI088E3RunEv)
+
+/* BMM350 */
+*(.text._ZN12I2CSPIDriverI6BMM350E3RunEv)
+*(.text._ZN6BMM3507RunImplEv)
+*(.text._ZN6BMM35013RegisterWriteEN12Bosch_BMM3508RegisterEh)
+*(.text._ZN6BMM35012RegisterReadEN12Bosch_BMM3508RegisterEPh)
+*(.text._ZN6BMM35014ReadOutRawDataEPf)
@@ -0,0 +1,187 @@
+/****************************************************************************
+ * boards/nxp/mr-tropic/nuttx-config/scripts/script.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* Specify the memory areas */
+
+MEMORY
+{
+  flash (rx)  : ORIGIN = 0x70020000, LENGTH = 4194304 - 256K
+  sram  (rwx) : ORIGIN = 0x20200000, LENGTH = 512K
+  itcm  (rwx) : ORIGIN = 0x00000000, LENGTH = 384K
+  dtcm  (rwx) : ORIGIN = 0x20000000, LENGTH = 127K
+  dtcm_nocache  (rwx) : ORIGIN = 0x2001FC00, LENGTH = 1K
+}
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+EXTERN(g_flash_config)
+EXTERN(g_image_vector_table)
+EXTERN(g_boot_data)
+EXTERN(board_get_manifest)
+EXTERN(_bootdelay_signature)
+
+ENTRY(_stext)
+
+SECTIONS
+{
+    /* Image Vector Table and Boot Data for booting from external flash */
+
+    .boot_hdr : ALIGN(4)
+    {
+        FILL(0xff)
+        __boot_hdr_start__ = ABSOLUTE(.) ;
+        KEEP(*(.boot_hdr.conf))
+        . = 0x1000 ;
+        KEEP(*(.boot_hdr.ivt))
+        . = 0x1020 ;
+        KEEP(*(.boot_hdr.boot_data))
+        . = 0x1030 ;
+        KEEP(*(.boot_hdr.dcd_data))
+        __boot_hdr_end__ = ABSOLUTE(.) ;
+        . = 0x2000 ;
+    } >flash
+
+    /* Workaround for ethernet issue, by placing g_desc_pool into DTCM,
+       which effectively puts it into a no-cache region */
+    .dtcm_nocache : {
+        *(.bss.g_desc_pool)
+    } > dtcm_nocache
+
+    .vectors :
+    {
+        KEEP(*(.vectors))
+        *(.text .text.__start)
+    } >flash
+
+    .itcmfunc :
+    {
+        . = ALIGN(8);
+        _sitcmfuncs = ABSOLUTE(.);
+        FILL(0xFF)
+        . = 0x40 ;
+        *(.ram_vectors)
+        INCLUDE "itcm_static_functions.ld"
+        INCLUDE "itcm_functions_includes.ld"
+        . = ALIGN(8);
+        _eitcmfuncs = ABSOLUTE(.);
+    } > itcm AT > flash
+
+    _fitcmfuncs = LOADADDR(.itcmfunc);
+
+    .text :
+    {
+        _stext = ABSOLUTE(.);
+        *(.vectors)
+	. = ALIGN(32);
+	/*
+	This signature provides the bootloader with a way to delay booting
+	*/
+	_bootdelay_signature = ABSOLUTE(.);
+	FILL(0xffecc2925d7d05c5)
+	. += 8;
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        . = ALIGN(4096);
+        _etext = ABSOLUTE(.);
+        _srodata = ABSOLUTE(.);
+        *(.rodata .rodata.*)
+        . = ALIGN(4096);
+        _erodata = ABSOLUTE(.);
+    } > flash
+
+    .init_section :
+    {
+        _sinit = ABSOLUTE(.);
+        KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
+        KEEP(*(.init_array .ctors))
+        _einit = ABSOLUTE(.);
+    } > flash
+
+    .ARM.extab :
+    {
+        *(.ARM.extab*)
+    } > flash
+
+    .ARM.exidx :
+    {
+        __exidx_start = ABSOLUTE(.);
+        *(.ARM.exidx*)
+        __exidx_end = ABSOLUTE(.);
+    } > flash
+
+    _eronly = ABSOLUTE(.);
+
+    .data :
+    {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        . = ALIGN(4);
+        _edata = ABSOLUTE(.);
+    } > sram AT > flash
+
+    .ramfunc ALIGN(4):
+    {
+        _sramfuncs = ABSOLUTE(.);
+        *(.ramfunc  .ramfunc.*)
+        _eramfuncs = ABSOLUTE(.);
+    } > sram AT > flash
+
+    _framfuncs = LOADADDR(.ramfunc);
+
+    .bss :
+    {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = ABSOLUTE(.);
+    } > sram
+
+    /* Stabs debugging sections. */
+
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+
+    _boot_loadaddr = ORIGIN(flash);
+    _boot_size = LENGTH(flash);
+    _ram_size = LENGTH(sram);
+    _sdtcm = ORIGIN(dtcm);
+    _edtcm = ORIGIN(dtcm) + LENGTH(dtcm);
+}
@@ -0,0 +1,86 @@
+############################################################################
+#
+#   Copyright (c) 2024 PX4 Development Team. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name PX4 nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+if("${PX4_BOARD_LABEL}" STREQUAL  "bootloader")
+	add_compile_definitions(BOOTLOADER)
+	add_library(drivers_board
+		bootloader_main.c
+		init.c
+		usb.c
+		imxrt_flexspi_nor_boot.c
+		imxrt_flexspi_nor_flash.c
+		timer_config.cpp
+	)
+	target_link_libraries(drivers_board
+		PRIVATE
+			nuttx_arch # sdio
+			nuttx_drivers # sdio
+			px4_layer #gpio
+			arch_io_pins # iotimer
+			arch_board_romapi
+			bootloader
+	)
+	target_include_directories(drivers_board PRIVATE ${PX4_SOURCE_DIR}/platforms/nuttx/src/bootloader/common)
+
+else()
+
+	px4_add_library(drivers_board
+		i2c.cpp
+		init.c
+		sdhc.c
+		spi.cpp
+		timer_config.cpp
+		tropic_led_pwm.cpp
+		usb.c
+		imxrt_flexspi_nor_boot.c
+		imxrt_flexspi_nor_flash.c
+		imxrt_flexspi_storage.c
+		imxrt_ocram_initialize.c
+		hw_rev_ver_tropic.c
+		manifest.c
+	)
+
+
+	# Force compiler not to use builtin functions (like memcpy)
+	# to optimize for loops in init.c (imxrt_ocram_initialize)
+	set_source_files_properties(imxrt_ocram_initialize.c PROPERTIES COMPILE_FLAGS -fno-builtin)
+
+	target_link_libraries(drivers_board
+		PRIVATE
+			arch_board_romapi
+			arch_spi
+			nuttx_arch # sdio
+			nuttx_drivers # sdio
+			px4_layer
+	)
+
+endif()
@@ -0,0 +1,61 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2023 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file bootloader_main.c
+ *
+ * FMU-specific early startup code for bootloader
+*/
+
+#include "board_config.h"
+#include "bl.h"
+
+#include <nuttx/config.h>
+#include <nuttx/board.h>
+#include <chip.h>
+#include <arch/board/board.h>
+#include "arm_internal.h"
+#include <px4_platform_common/init.h>
+
+extern int sercon_main(int c, char **argv);
+
+void board_late_initialize(void)
+{
+	sercon_main(0, NULL);
+}
+
+extern void sys_tick_handler(void);
+void board_timerhook(void)
+{
+	sys_tick_handler();
+}
@@ -0,0 +1,130 @@
+/*
+ * hw_config.h
+ *
+ *  Created on: May 17, 2015
+ *      Author: david_s5
+ */
+
+#ifndef HW_CONFIG_H_
+#define HW_CONFIG_H_
+
+/****************************************************************************
+ * 10-8--2016:
+ *  To simplify the ripple effect on the tools, we will be using
+ *  /dev/serial/by-id/<asterisk>PX4<asterisk> to locate PX4 devices. Therefore
+ *  moving forward all Bootloaders must contain the prefix "PX4 BL "
+ *  in the USBDEVICESTRING
+ *  This Change will be made in an upcoming BL release
+ ****************************************************************************/
+/*
+ * Define usage to configure a bootloader
+ *
+ *
+ * Constant                example          Usage
+ * APP_LOAD_ADDRESS     0x08004000            - The address in Linker Script, where the app fw is org-ed
+ * BOOTLOADER_DELAY     5000                  - Ms to wait while under USB pwr or bootloader request
+ * BOARD_FMUV2
+ * INTERFACE_USB        1                     - (Optional) Scan and use the USB interface for bootloading
+ * INTERFACE_USART      1                     - (Optional) Scan and use the Serial interface for bootloading
+ * USBDEVICESTRING      "PX4 BL FMU v2.x"     - USB id string
+ * USBPRODUCTID         0x0011                - PID Should match defconfig
+ * BOOT_DELAY_ADDRESS   0x000001a0            - (Optional) From the linker script from Linker Script to get a custom
+ *                                               delay provided by an APP FW
+ * BOARD_TYPE           9                     - Must match .prototype boad_id
+ * _FLASH_KBYTES        (*(uint16_t *)0x1fff7a22) - Run time flash size detection
+ * BOARD_FLASH_SECTORS  ((_FLASH_KBYTES == 0x400) ? 11 : 23) - Run time determine the physical last sector
+ * BOARD_FLASH_SECTORS   11                   - Hard coded zero based last sector
+ * BOARD_FLASH_SIZE     (_FLASH_KBYTES*1024)-   Total Flash size of device, determined at run time.
+ *                         (1024 * 1024)      - Hard coded Total Flash of device - The bootloader and app reserved will be deducted
+ *                                              programmatically
+ *
+ * BOARD_FIRST_FLASH_SECTOR_TO_ERASE  2        - Optional sectors index in the flash_sectors table  (F4 only), to begin erasing.
+ *                                               This is to allow sectors to be reserved for app fw usage. That will NOT be erased
+ *                                               during a FW upgrade.
+ *                                               The default is 0, and selects the first sector to be erased, as the 0th entry in the
+ *                                               flash_sectors table. Which is the second physical sector of FLASH in the device.
+ *                                               The first physical sector of FLASH is used by the bootloader, and is not defined
+ *                                               in the table.
+ *
+ * APP_RESERVATION_SIZE (BOARD_FIRST_FLASH_SECTOR_TO_ERASE * 16 * 1024) - Number of bytes reserved by the APP FW. This number plus
+ *                                                                        BOOTLOADER_RESERVATION_SIZE  will be deducted from
+ *                                                                        BOARD_FLASH_SIZE to determine the size of the App FW
+ *                                                                        and hence the address space of FLASH to erase and program.
+ * USBMFGSTRING            "PX4 AP"            - Optional USB MFG string (default is '3D Robotics' if not defined.)
+ * SERIAL_BREAK_DETECT_DISABLED                -  Optional prevent break selection on Serial port from entering or staying in BL
+ *
+ * * Other defines are somewhat self explanatory.
+ */
+
+/* Boot device selection list*/
+#define USB0_DEV       0x01
+#define SERIAL0_DEV    0x02
+#define SERIAL1_DEV    0x04
+
+#define APP_LOAD_ADDRESS               0x70020000
+#define APP_VECTOR_OFFSET              0x2000
+#define BOOTLOADER_DELAY               5000
+#define INTERFACE_USB                  1
+#define INTERFACE_USB_CONFIG           "/dev/ttyACM0"
+
+//#define USE_VBUS_PULL_DOWN
+#define INTERFACE_USART                1
+#define INTERFACE_USART_CONFIG         "/dev/ttyS0,1500000"
+#define BOOT_DELAY_ADDRESS             0x00039FA0
+#define BOARD_TYPE                     37
+// The board has a 64 Mb part with 16384, 4K secors, but we artificialy limit it to 4 Mb
+// as 1024, 4K sectors
+#define BOARD_FLASH_SECTORS            960 // 1024 * 4k sectors, 128k for bootloader, 128k for storage
+#define BOARD_FIRST_FLASH_SECTOR_TO_ERASE 32 // We resreve 128K for the bootloader
+#define BOARD_FLASH_SIZE               (BOARD_FLASH_SECTORS * 4096)
+
+#define OSC_FREQ                       24
+
+#define BOARD_PIN_LED_ACTIVITY         GPIO_nLED_BLUE // BLUE
+#define BOARD_PIN_LED_BOOTLOADER       GPIO_nLED_GREEN // GREEN
+#define BOARD_LED_ON                   0
+#define BOARD_LED_OFF                  1
+
+#define SERIAL_BREAK_DETECT_DISABLED   1
+
+/*
+ * Uncommenting this allows to force the bootloader through
+ * a PWM output pin. As this can accidentally initialize
+ * an ESC prematurely, it is not recommended. This feature
+ * has not been used and hence defaults now to off.
+ *
+ * # define BOARD_FORCE_BL_PIN_OUT         (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN14)
+ * # define BOARD_FORCE_BL_PIN_IN          (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTE|GPIO_PIN11)
+ *
+ * # define BOARD_POWER_PIN_OUT           (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
+ * # define BOARD_POWER_ON                 1
+ * # define BOARD_POWER_OFF                0
+ * # undef  BOARD_POWER_PIN_RELEASE        // Leave pin enabling Power - un comment to release (disable power)
+ *
+*/
+
+#if !defined(ARCH_SN_MAX_LENGTH)
+# define ARCH_SN_MAX_LENGTH 12
+#endif
+
+#if !defined(APP_RESERVATION_SIZE)
+#  define APP_RESERVATION_SIZE 0
+#endif
+
+#if !defined(BOARD_FIRST_FLASH_SECTOR_TO_ERASE)
+#  define BOARD_FIRST_FLASH_SECTOR_TO_ERASE 1
+#endif
+
+#if !defined(USB_DATA_ALIGN)
+# define USB_DATA_ALIGN
+#endif
+
+#ifndef BOOT_DEVICES_SELECTION
+#  define BOOT_DEVICES_SELECTION USB0_DEV|SERIAL0_DEV|SERIAL1_DEV
+#endif
+
+#ifndef BOOT_DEVICES_FILTER_ONUSB
+#  define BOOT_DEVICES_FILTER_ONUSB USB0_DEV|SERIAL0_DEV|SERIAL1_DEV
+#endif
+
+#endif /* HW_CONFIG_H_ */
@@ -0,0 +1,165 @@
+/****************************************************************************
+ *
+ *   Copyright (C) 2023 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file hw_rev_ver_canhubk3.c
+ * CANHUBK3 Hardware Revision and Version ID API
+ */
+#include <drivers/drv_adc.h>
+#include <px4_arch/adc.h>
+#include <px4_platform_common/micro_hal.h>
+#include <px4_platform_common/px4_config.h>
+#include <px4_platform/board_determine_hw_info.h>
+#include <stdio.h>
+#include <board_config.h>
+#include <drivers/drv_sensor.h>
+
+#include <systemlib/px4_macros.h>
+
+#include <nuttx/spi/spi.h>
+
+#if defined(BOARD_HAS_HW_VERSIONING)
+
+#define HW_INFO_SIZE HW_INFO_VER_DIGITS + HW_INFO_REV_DIGITS
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+static int hw_revision = 0;
+static char hw_info[HW_INFO_SIZE] = {0};
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+static char hw_base_info[HW_INFO_SIZE] = {0};
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+/************************************************************************************
+ * Name: board_get_hw_type
+ *
+ * Description:
+ *   Optional returns a 0 terminated string defining the HW type.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   a 0 terminated string defining the HW type. This my be a 0 length string ""
+ *
+ ************************************************************************************/
+
+__EXPORT const char *board_get_hw_type_name()
+{
+	return (const char *) hw_info;
+}
+
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+/************************************************************************************
+ * Name: board_get_hw_base_type_name
+ *
+ * Description:
+ *   Optional returns a 0 terminated string defining the base type.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   a 0 terminated string defining the HW type. This my be a 0 length string ""
+ *
+ ************************************************************************************/
+
+__EXPORT const char *board_get_hw_base_type_name()
+{
+	return (const char *) hw_base_info;
+}
+#endif
+
+/************************************************************************************
+ * Name: board_get_hw_version
+ *
+ * Description:
+ *   Optional returns a integer HW version
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   An integer value of this boards hardware version.
+ *   A value of -1 is the default for boards not supporting the BOARD_HAS_VERSIONING API.
+ *   A value of 0 is the default for boards supporting the API but not having version.
+ *
+ ************************************************************************************/
+
+__EXPORT int board_get_hw_version()
+{
+	return 0;
+}
+
+/************************************************************************************
+ * Name: board_get_hw_revision
+ *
+ * Description:
+ *   Optional returns a integer HW revision
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   An integer value of this boards hardware revision.
+ *   A value of -1 is the default for boards not supporting the BOARD_HAS_VERSIONING API.
+ *   A value of 0 is the default for boards supporting the API but not having revision.
+ *
+ ************************************************************************************/
+
+__EXPORT int board_get_hw_revision()
+{
+	return hw_revision;
+}
+
+/************************************************************************************
+  * Name: board_determine_hw_info
+ *
+ * Description:
+ *	Uses GPIO to detect MR-CANHUBK3-ADAP
+ *
+ ************************************************************************************/
+
+int board_determine_hw_info()
+{
+	hw_revision = 0; //TODO Read fuses
+
+	sprintf(hw_info, "%03d", hw_revision);
+
+	return 0;
+}
+#endif
@@ -0,0 +1,40 @@
+/****************************************************************************
+ *
+ *   Copyright (C) 2024 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#include <px4_arch/i2c_hw_description.h>
+
+constexpr px4_i2c_bus_t px4_i2c_buses[I2C_BUS_MAX_BUS_ITEMS] = {
+	initI2CBusExternal(1),
+	initI2CBusExternal(3),
+	initI2CBusInternal(4),
+};
@@ -0,0 +1,55 @@
+/****************************************************************************
+ * boards/arm/imxrt/imxrt1064-evk/src/imxrt_flexspi_nor_boot.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "imxrt_flexspi_nor_boot.h"
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+locate_data(".boot_hdr.ivt")
+const struct ivt_s g_image_vector_table = {
+	IVT_HEADER,                         /* IVT Header */
+	IMAGE_ENTRY_ADDRESS,                /* Image  Entry Function */
+	IVT_RSVD,                           /* Reserved = 0 */
+	(uint32_t)DCD_ADDRESS,              /* Address where DCD information is stored */
+	(uint32_t)BOOT_DATA_ADDRESS,        /* Address where BOOT Data Structure is stored */
+	(uint32_t)IMAG_VECTOR_TABLE,        /* Pointer to IVT Self (absolute address */
+	(uint32_t)CSF_ADDRESS,              /* Address where CSF file is stored */
+	IVT_RSVD                            /* Reserved = 0 */
+};
+
+locate_data(".boot_hdr.boot_data")
+const struct boot_data_s g_boot_data = {
+	IMAGE_DEST,                         /* boot start location */
+	(IMAGE_DEST_END - IMAGE_DEST),      /* size */
+	PLUGIN_FLAG,                        /* Plugin flag */
+	0xffffffff                          /* empty - extra data word */
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/* None */
@@ -0,0 +1,166 @@
+/****************************************************************************
+ * boards/arm/imxrt/imxrt1064-evk/src/imxrt_flexspi_nor_boot.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_IMXRT_IMXRT1060_EVK_SRC_IMXRT_FLEXSPI_NOR_BOOT_H
+#define __BOARDS_ARM_IMXRT_IMXRT1060_EVK_SRC_IMXRT_FLEXSPI_NOR_BOOT_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* IVT Data */
+
+#define IVT_MAJOR_VERSION           0x4
+#define IVT_MAJOR_VERSION_SHIFT     0x4
+#define IVT_MAJOR_VERSION_MASK      0xf
+#define IVT_MINOR_VERSION           0x1
+#define IVT_MINOR_VERSION_SHIFT     0x0
+#define IVT_MINOR_VERSION_MASK      0xf
+
+#define IVT_VERSION(major, minor)   \
+	((((major) & IVT_MAJOR_VERSION_MASK) << IVT_MAJOR_VERSION_SHIFT) |  \
+	 (((minor) & IVT_MINOR_VERSION_MASK) << IVT_MINOR_VERSION_SHIFT))
+
+#define IVT_TAG_HEADER              (0xd1)       /* Image Vector Table */
+#define IVT_SIZE                    0x2000
+#define IVT_PAR                     IVT_VERSION(IVT_MAJOR_VERSION, IVT_MINOR_VERSION)
+
+#define IVT_HEADER                  (IVT_TAG_HEADER | (IVT_SIZE << 8) | (IVT_PAR << 24))
+#define IVT_RSVD                    (uint32_t)(0x00000000)
+
+/* DCD Data */
+
+#define DCD_TAG_HEADER              (0xd2)
+#define DCD_TAG_HEADER_SHIFT        (24)
+#define DCD_VERSION                 (0x40)
+#define DCD_ARRAY_SIZE              1
+
+#define FLASH_BASE                  0x70000000
+#define FLASH_END                   0x70400000
+
+/* This needs to take into account  the memory configuration at boot
+ * bootloader
+ */
+
+#define ROM_BOOTLOADER_OCRAM_RES    0x8000
+#define OCRAM_BASE                  (0x20200000 + ROM_BOOTLOADER_OCRAM_RES)
+#define OCRAM_END                   (OCRAM_BASE + (512 * 1024) + (256 * 1024) \
+				     - ROM_BOOTLOADER_OCRAM_RES)
+
+#define SCLK 1
+#if defined(CONFIG_BOOT_RUNFROMFLASH)
+#  define IMAGE_DEST                FLASH_BASE
+#  define IMAGE_DEST_END            FLASH_END
+#  define IMAGE_DEST_OFFSET         0
+#else
+#  define IMAGE_DEST                OCRAM_BASE
+#  define IMAGE_DEST_END            OCRAM_END
+#  define IMAGE_DEST_OFFSET         IVT_SIZE
+#endif
+
+#define LOCATE_IN_DEST(x)           (((uint32_t)(x)) - FLASH_BASE + IMAGE_DEST)
+#define LOCATE_IN_SRC(x)            (((uint32_t)(x)) - IMAGE_DEST + FLASH_BASE)
+
+#ifdef CONFIG_IMXRT1064_EVK_SDRAM
+#  define DCD_ADDRESS               &g_dcd_data
+#else
+#  define DCD_ADDRESS               0
+#endif
+#define BOOT_DATA_ADDRESS           LOCATE_IN_DEST(&g_boot_data)
+#define CSF_ADDRESS                 0
+#define PLUGIN_FLAG                 (uint32_t)0
+
+/* Located in Destination Memory */
+
+#define IMAGE_ENTRY_ADDRESS        ((uint32_t)&_vectors)
+#define IMAG_VECTOR_TABLE           LOCATE_IN_DEST(&g_image_vector_table)
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* IVT Data */
+
+struct ivt_s {
+	/* Header with tag #HAB_TAG_IVT, length and HAB version fields
+	 * (see data)
+	 */
+
+	uint32_t hdr;
+
+	/* Absolute address of the first instruction to execute from the
+	 * image
+	 */
+
+	uint32_t entry;
+
+	/* Reserved in this version of HAB: should be NULL. */
+
+	uint32_t reserved1;
+
+	/* Absolute address of the image DCD: may be NULL. */
+
+	uint32_t dcd;
+
+	/* Absolute address of the Boot Data: may be NULL, but not interpreted
+	 * any further by HAB
+	 */
+
+	uint32_t boot_data;
+
+	/* Absolute address of the IVT. */
+
+	uint32_t self;
+
+	/* Absolute address of the image CSF. */
+
+	uint32_t csf;
+
+	/* Reserved in this version of HAB: should be zero. */
+
+	uint32_t reserved2;
+};
+
+/* Boot Data */
+
+struct boot_data_s {
+	uint32_t start;           /* boot start location */
+	uint32_t size;            /* size */
+	uint32_t plugin;          /* plugin flag - 1 if downloaded application is plugin */
+	uint32_t placeholder;     /* placeholder to make even 0x10 size */
+};
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+extern const struct boot_data_s g_boot_data;
+#ifdef CONFIG_IMXRT1064_EVK_SDRAM
+extern const uint8_t g_dcd_data[];
+#endif
+extern  const uint32_t  _vectors[];
+
+#endif /* __BOARDS_ARM_IMXRT_IMXRT1060_EVK_SRC_IMXRT_FLEXSPI_NOR_BOOT_H */
@@ -0,0 +1,107 @@
+/****************************************************************************
+ * boards/arm/imxrt/teensy-4.x/src/imxrt_flexspi_nor_flash.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "imxrt_flexspi_nor_flash.h"
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+enum {
+	/* SPI instructions */
+
+	READ_FAST = 0,
+	READ_STATUS_REG = 1,
+	WRITE_ENABLE = 3,
+	SECTOR_ERASE_4K = 5,
+	READ_FAST_QUAD_OUTPUT = 6,
+	PAGE_PROGRAM_QUAD_INPUT = 7,
+	ERASE_BLOCK = 8,
+	PAGE_PROGRAM = 9,
+	CHIP_ERASE = 11,
+};
+
+locate_data(".boot_hdr.conf")
+const struct flexspi_nor_config_s g_flash_config = {
+	.mem_config =
+	{
+		.tag                    = FLEXSPI_CFG_BLK_TAG,
+		.version                = FLEXSPI_CFG_BLK_VERSION,
+		.read_sample_clksrc     = FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_DQSPAD,
+		.cs_hold_time           = 3u,
+		.cs_setup_time          = 3u,
+		.column_address_width   = 0u,
+		.device_type            = FLEXSPI_DEVICE_TYPE_SERIAL_NOR,
+		.sflash_pad_type        = SERIAL_FLASH_4PADS,
+		.serial_clk_freq        = FLEXSPI_SERIAL_CLKFREQ_133MHz,
+		.sflash_a1size          = 4u * 1024u * 1024u,
+		.lookup_table           =
+		{
+			[4 * READ_FAST] =       FLEXSPI_LUT_SEQ(CMD_SDR,   FLEXSPI_1PAD, 0xeb,
+								RADDR_SDR, FLEXSPI_4PAD, 0x18),
+			[4 * READ_FAST + 1] =   FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06,
+								READ_SDR,  FLEXSPI_4PAD, 0x04),
+
+			[4 * READ_STATUS_REG] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05,
+								READ_SDR,  FLEXSPI_1PAD, 0x04),
+
+			[4 * WRITE_ENABLE] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06,
+							     STOP, FLEXSPI_1PAD, 0),
+
+			[4 * SECTOR_ERASE_4K] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20,
+								RADDR_SDR, FLEXSPI_1PAD, 0x18),
+
+			[4 * CHIP_ERASE] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60,
+							   STOP, FLEXSPI_1PAD, 0),
+
+			[4 * ERASE_BLOCK] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xd8,
+							    RADDR_SDR, FLEXSPI_1PAD, 0x18),
+
+			[4 * PAGE_PROGRAM] =     FLEXSPI_LUT_SEQ(CMD_SDR,   FLEXSPI_1PAD, 0x02,
+					RADDR_SDR, FLEXSPI_1PAD, 0x18),
+			[4 * PAGE_PROGRAM + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04,
+					STOP,      FLEXSPI_1PAD, 0x0),
+
+			[4 * READ_FAST_QUAD_OUTPUT] =     FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x6b,
+					RADDR_SDR, FLEXSPI_1PAD, 0x18),
+			[4 * READ_FAST_QUAD_OUTPUT + 1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x08,
+					READ_SDR,  FLEXSPI_4PAD, 0x04),
+
+			[4 * PAGE_PROGRAM_QUAD_INPUT] =     FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x32,
+					RADDR_SDR, FLEXSPI_1PAD, 0x18),
+			[4 * PAGE_PROGRAM_QUAD_INPUT + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x04,
+					STOP,      FLEXSPI_1PAD, 0),
+
+		},
+	},
+
+	.page_size = 256u,
+	.sector_size = 4u * 1024u,
+	.blocksize = 64u * 1024u,
+	.is_uniform_blocksize = false,
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
@@ -0,0 +1,102 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2018-2019, 2023 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file imxrt_ocram_initialize.c
+ *
+ * PX4 fmu-v6xrt RAM startup early startup code.
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "arm_internal.h"
+#include "imxrt_iomuxc.h"
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+
+__BEGIN_DECLS
+extern const uint64_t _fitcmfuncs;   /* Copy source address in FLASH */
+extern uint64_t _sitcmfuncs;         /* Copy destination start address in ITCM */
+extern uint64_t _eitcmfuncs;         /* Copy destination end address in ITCM */
+extern uint64_t _sdtcm;              /* Copy destination start address in DTCM */
+extern uint64_t _edtcm;              /* Copy destination end address in DTCM */
+__END_DECLS
+
+/****************************************************************************
+ * Name: imxrt_ocram_initialize
+ *
+ * Description:
+ *   Called off reset vector to reconfigure the flexRAM
+ *   and finish the FLASH to RAM Copy.
+ *   CMakeLists.txt Forces compiler not to use builtin functions using -fno-builtin
+ *
+ ****************************************************************************/
+
+__EXPORT void imxrt_ocram_initialize(void)
+{
+	uint32_t regval;
+	register uint64_t *src;
+	register uint64_t *dest;
+
+	/* FlexRAM Configuration
+	 *    F = 64K ITCM
+	 *    A = 64K DTCM
+	 *    5 = 64K OCRAM
+	 *    So 0xFFFFFFAA is
+	 *    384K FlexRAM ITCM
+	 *    128K FlexRAM DTCM
+	 * */
+
+	putreg32(0xFFFFFFAA, IMXRT_IOMUXC_GPR_GPR17);
+	regval = getreg32(IMXRT_IOMUXC_GPR_GPR16);
+	putreg32(regval | GPR_GPR16_FLEXRAM_BANK_CFG_SEL, IMXRT_IOMUXC_GPR_GPR16);
+
+	/* Copy any necessary code sections from FLASH to ITCM. The process is the
+	* same as the code copying from FLASH to RAM above. */
+	for (src = (uint64_t *)&_fitcmfuncs, dest = (uint64_t *)&_sitcmfuncs;
+	     dest < (uint64_t *)&_eitcmfuncs;) {
+		*dest++ = *src++;
+	}
+
+	/* Clear .dtcm.  We'll do this inline (vs. calling memset) just to be
+	* certain that there are no issues with the state of global variables.
+	*/
+
+	for (dest = &_sdtcm; dest < &_edtcm;) {
+		*dest++ = 0;
+	}
+}
@@ -0,0 +1,79 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2023 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file manifest.c
+ *
+ * This module supplies the interface to the manifest of hardware that is
+ * optional and dependent on the HW REV and HW VER IDs
+ *
+ * The manifest allows the system to know whether a hardware option
+ * say for example the PX4IO is an no-pop option vs it is broken.
+ *
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <px4_platform_common/px4_config.h>
+#include <stdbool.h>
+#include <syslog.h>
+
+#include "systemlib/px4_macros.h"
+#include "px4_log.h"
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+
+
+/************************************************************************************
+ * Name: board_query_manifest
+ *
+ * Description:
+ *   Optional returns manifest item.
+ *
+ * Input Parameters:
+ *   manifest_id - the ID for the manifest item to retrieve
+ *
+ * Returned Value:
+ *   0 - item is not in manifest => assume legacy operations
+ *   pointer to a manifest item
+ *
+ ************************************************************************************/
+
+__EXPORT px4_hw_mft_item board_query_manifest(px4_hw_mft_item_id_t id)
+{
+	return px4_hw_mft_unsupported;
+}
@@ -0,0 +1,128 @@
+/****************************************************************************
+ *
+ *   Copyright (C) 2016-2018 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt <gnutt@nuttx.org>
+ *            David Sidrane <david_s5@nscdg.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+/* A micro Secure Digital (SD) card slot is available on the board connected to
+ * the SD Host Controller (USDHC1) signals of the MCU. This slot will accept
+ * micro format SD memory cards.
+ *
+ *   ------------ ------------- --------
+ *    SD Card Slot Board Signal  IMXRT Pin
+ *    ------------ ------------- --------
+ *    DAT0         USDHC1_DATA0  GPIO_SD_B0_02
+ *    DAT1         USDHC1_DATA1  GPIO_SD_B0_03
+ *    DAT2         USDHC1_DATA2  GPIO_SD_B0_04
+ *    CD/DAT3      USDHC1_DATA3  GPIO_SD_B0_05
+ *    CMD          USDHC1_CMD    GPIO_SD_B0_00
+ *    CLK          USDHC1_CLK    GPIO_SD_B0_01
+ *    CD           USDHC1_CD     GPIO_B1_12
+ *    ------------ ------------- --------
+ *
+ * There are no Write Protect available to the IMXRT.
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <px4_platform_common/px4_config.h>
+#include <px4_log.h>
+
+#include <stdbool.h>
+#include <stdio.h>
+#include <debug.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/sdio.h>
+#include <nuttx/mmcsd.h>
+
+#include "chip.h"
+#include "imxrt_usdhc.h"
+
+#include "board_config.h"
+
+#ifdef CONFIG_IMXRT_USDHC
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: fmurt1062_usdhc_initialize
+ *
+ * Description:
+ *   Inititialize the SDHC SD card slot
+ *
+ ****************************************************************************/
+
+int fmurt1062_usdhc_initialize(void)
+{
+	int ret;
+
+	/* Mount the SDHC-based MMC/SD block driver */
+	/* First, get an instance of the SDHC interface */
+
+	struct sdio_dev_s *sdhc = imxrt_usdhc_initialize(CONFIG_NSH_MMCSDSLOTNO);
+
+	if (!sdhc) {
+		PX4_ERR("ERROR: Failed to initialize SDHC slot %d\n", CONFIG_NSH_MMCSDSLOTNO);
+		return -ENODEV;
+	}
+
+	/* Now bind the SDHC interface to the MMC/SD driver */
+
+	ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdhc);
+
+	if (ret != OK) {
+		PX4_ERR("ERROR: Failed to bind SDHC to the MMC/SD driver: %d\n", ret);
+		return ret;
+	}
+
+	syslog(LOG_INFO, "Successfully bound SDHC to the MMC/SD driver\n");
+
+	return OK;
+}
+#endif /* CONFIG_IMXRT_USDHC */
@@ -0,0 +1,95 @@
+/************************************************************************************
+ *
+ *   Copyright (C) 2016, 2018 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt <gnutt@nuttx.org>
+ *            David Sidrane <david_s5@nscdg.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <px4_arch/spi_hw_description.h>
+#include <drivers/drv_sensor.h>
+#include <nuttx/spi/spi.h>
+
+#include <px4_platform_common/px4_config.h>
+#include <px4_log.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <nuttx/spi/spi.h>
+#include <arch/board/board.h>
+#include <systemlib/px4_macros.h>
+#include <px4_platform/gpio.h>
+
+#include <arm_internal.h>
+#include <chip.h>
+#include "imxrt_lpspi.h"
+#include "imxrt_gpio.h"
+#include "board_config.h"
+#include <systemlib/err.h>
+
+constexpr px4_spi_bus_all_hw_t px4_spi_buses_all_hw[BOARD_NUM_SPI_CFG_HW_VERSIONS] = {
+	initSPIFmumID(TROPIC_0, {
+		initSPIBus(SPI::Bus::LPSPI3, {
+			initSPIDevice(DRV_IMU_DEVTYPE_ICM45686, SPI::CS{GPIO::Port1, GPIO::Pin28}, SPI::DRDY{GPIO::Port3, GPIO::Pin18}), /* GPIO_AD_B1_12 GPIO1_IO28 */
+		}),
+		initSPIBus(SPI::Bus::LPSPI4, {
+			initSPIDevice(DRV_GYR_DEVTYPE_BMI088, SPI::CS{GPIO::Port2, GPIO::Pin18}, SPI::DRDY{GPIO::Port2, GPIO::Pin10}),  /* GPIO_B1_02 GPIO2_IO18 */
+			initSPIDevice(DRV_ACC_DEVTYPE_BMI088, SPI::CS{GPIO::Port2, GPIO::Pin0}, SPI::DRDY{GPIO::Port1, GPIO::Pin25}), /* GPIO_B0_00 GPIO2_IO00 */
+		}),
+	}),
+
+	initSPIFmumID(TROPIC_1, {
+		initSPIBus(SPI::Bus::LPSPI3, {
+			initSPIDevice(DRV_IMU_DEVTYPE_ICM42688P, SPI::CS{GPIO::Port1, GPIO::Pin28}), /* GPIO_AD_B1_12 GPIO1_IO28 */
+		}),
+		initSPIBus(SPI::Bus::LPSPI4, {
+			initSPIDevice(DRV_GYR_DEVTYPE_BMI088, SPI::CS{GPIO::Port2, GPIO::Pin18}),  /* GPIO_B1_02 GPIO2_IO18 */
+			initSPIDevice(DRV_ACC_DEVTYPE_BMI088, SPI::CS{GPIO::Port2, GPIO::Pin0}), /* GPIO_B0_00 GPIO2_IO00 */
+		}),
+	}),
+
+	initSPIFmumID(TROPIC_2, {
+		initSPIBus(SPI::Bus::LPSPI3, {
+			initSPIDevice(DRV_IMU_DEVTYPE_ICM42686P, SPI::CS{GPIO::Port1, GPIO::Pin28}), /* GPIO_AD_B1_12 GPIO1_IO28 */
+		}),
+		initSPIBus(SPI::Bus::LPSPI4, {
+			initSPIDevice(DRV_GYR_DEVTYPE_BMI088, SPI::CS{GPIO::Port2, GPIO::Pin18}),  /* GPIO_B1_02 GPIO2_IO18 */
+			initSPIDevice(DRV_ACC_DEVTYPE_BMI088, SPI::CS{GPIO::Port2, GPIO::Pin0}), /* GPIO_B0_00 GPIO2_IO00 */
+		}),
+	}),
+};
+
+static constexpr bool unused = validateSPIConfig(px4_spi_buses_all_hw);
@@ -0,0 +1,152 @@
+/****************************************************************************
+ *
+ *   Copyright (C) 2024 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+#include <stdint.h>
+
+#include <chip.h>
+#include "hardware/imxrt_tmr.h"
+#include "hardware/imxrt_flexpwm.h"
+#include "imxrt_gpio.h"
+#include "imxrt_iomuxc.h"
+#include "hardware/imxrt_pinmux.h"
+#include "imxrt_xbar.h"
+#include "imxrt_periphclks.h"
+
+#include <drivers/drv_pwm_output.h>
+#include <px4_arch/io_timer_hw_description.h>
+
+#include "board_config.h"
+
+/****************************************************************************************************
+ * Definitions
+ ****************************************************************************************************/
+
+/* Register accessors */
+
+#define _REG(_addr) (*(volatile uint16_t *)(_addr))
+
+/* QTimer3 register accessors */
+
+#define REG(_reg) _REG(IMXRT_QTIMER3_BASE + IMXRT_TMR_OFFSET(IMXRT_TMR_CH0,(_reg)))
+
+#define rCOMP1        REG(IMXRT_TMR_COMP1_OFFSET)
+#define rCOMP2        REG(IMXRT_TMR_COMP2_OFFSET)
+#define rCAPT         REG(IMXRT_TMR_CAPT_OFFSET)
+#define rLOAD         REG(IMXRT_TMR_LOAD_OFFSET)
+#define rHOLD         REG(IMXRT_TMR_HOLD_OFFSET)
+#define rCNTR         REG(IMXRT_TMR_CNTR_OFFSET)
+#define rCTRL         REG(IMXRT_TMR_CTRL_OFFSET)
+#define rSCTRL        REG(IMXRT_TMR_SCTRL_OFFSET)
+#define rCMPLD1       REG(IMXRT_TMR_CMPLD1_OFFSET)
+#define rCMPLD2       REG(IMXRT_TMR_CMPLD2_OFFSET)
+#define rCSCTRL       REG(IMXRT_TMR_CSCTRL_OFFSET)
+#define rFILT         REG(IMXRT_TMR_FILT_OFFSET)
+#define rDMA          REG(IMXRT_TMR_DMA_OFFSET)
+#define rENBL         REG(IMXRT_TMR_ENBL_OFFSET)
+
+
+constexpr io_timers_t io_timers[MAX_IO_TIMERS] = {
+	initIOPWMDshot(PWM::FlexPWM2, PWM::Submodule0), // PWM_1, PMW_2
+	initIOPWMDshot(PWM::FlexPWM2, PWM::Submodule1), // PWM_3, PWM_4
+	initIOPWMDshot(PWM::FlexPWM4, PWM::Submodule1), // PWM_5, PWM_6
+	initIOPWMDshot(PWM::FlexPWM4, PWM::Submodule2), // PWM_7, PWM_8
+};
+
+#define FXIO_IOMUX  (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | IOMUX_PULL_UP_47K | IOMUX_SCHMITT_TRIGGER)
+
+constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
+	initIOTimerChannelDshot(io_timers, {PWM::PWM2_PWM_A, PWM::Submodule0}, IOMUX::Pad::GPIO_EMC_06, GPIO_FLEXIO1_FLEXIO06_1 | FXIO_IOMUX, 6),
+	initIOTimerChannelDshot(io_timers, {PWM::PWM2_PWM_B, PWM::Submodule0}, IOMUX::Pad::GPIO_EMC_07, GPIO_FLEXIO1_FLEXIO07_1 | FXIO_IOMUX, 7),
+	initIOTimerChannelDshot(io_timers, {PWM::PWM2_PWM_A, PWM::Submodule1}, IOMUX::Pad::GPIO_EMC_08, GPIO_FLEXIO1_FLEXIO08_1 | FXIO_IOMUX, 8),
+	initIOTimerChannelDshot(io_timers, {PWM::PWM2_PWM_B, PWM::Submodule1}, IOMUX::Pad::GPIO_EMC_09, GPIO_FLEXIO1_FLEXIO09_1 | FXIO_IOMUX, 9),
+	initIOTimerChannelDshot(io_timers, {PWM::PWM4_PWM_A, PWM::Submodule1}, IOMUX::Pad::GPIO_EMC_02, GPIO_FLEXIO1_FLEXIO02_1 | FXIO_IOMUX, 2),
+	initIOTimerChannelDshot(io_timers, {PWM::PWM4_PWM_B, PWM::Submodule1}, IOMUX::Pad::GPIO_EMC_03, GPIO_FLEXIO1_FLEXIO03_1 | FXIO_IOMUX, 3),
+	initIOTimerChannelDshot(io_timers, {PWM::PWM4_PWM_A, PWM::Submodule2}, IOMUX::Pad::GPIO_EMC_04, GPIO_FLEXIO1_FLEXIO04_1 | FXIO_IOMUX, 4),
+	initIOTimerChannelDshot(io_timers, {PWM::PWM4_PWM_B, PWM::Submodule2}, IOMUX::Pad::GPIO_EMC_05, GPIO_FLEXIO1_FLEXIO05_1 | FXIO_IOMUX, 5),
+};
+
+constexpr io_timers_channel_mapping_t io_timers_channel_mapping =
+	initIOTimerChannelMapping(io_timers, timer_io_channels);
+
+constexpr io_timers_t led_pwm_timers[MAX_LED_TIMERS] = {
+};
+
+constexpr timer_io_channels_t led_pwm_channels[MAX_TIMER_LED_CHANNELS] = {
+};
+
+#include <stdio.h>
+void fmurt1062_timer_initialize(void)
+{
+	/* We must configure Qtimer 3 as the IPG divide by to yield 16 Mhz
+	 * and deliver that clock to the eFlexPWM234 via XBAR
+	 *
+	 * IPG    = 144 Mhz
+	 * 16Mhz  = 144 / 9
+	 * COMP 1 = 5, COMP2 = 4
+	 *
+	 * */
+
+	/* Enable Block Clocks for Qtimer and XBAR1 */
+
+	imxrt_clockall_timer3();
+	imxrt_clockall_xbar1();
+
+	/* Disable Timer */
+
+	rCTRL = 0;
+	rCOMP1 = 5 - 1; // N - 1
+	rCOMP2 = 4 - 1;
+
+	rCAPT = 0;
+	rLOAD = 0;
+	rCNTR = 0;
+
+	rSCTRL = TMR_SCTRL_OEN;
+
+	rCMPLD1 = 0;
+	rCMPLD2 = 0;
+	rCSCTRL = 0;
+	rFILT   = 0;
+	rDMA    = 0;
+
+	/* Count rising edges of primary source,
+	 * Prescaler is /1
+	 * Count UP until compare, then re-initialize. a successful compare occurs when the counter reaches a COMP1 value.
+	 * Toggle OFLAG output using alternating compare registers
+	 */
+	rCTRL   = (TMR_CTRL_CM_MODE1 | TMR_CTRL_PCS_DIV1 | TMR_CTRL_LENGTH | TMR_CTRL_OUTMODE_TOG_ALT);
+
+	/* QTIMER3_TIMER0  -> Flexpwm234ExtClk  */
+
+	imxrt_xbar_connect(IMXRT_XBARA1_OUT_FLEXPWM234_EXT_CLK_SEL_OFFSET, IMXRT_XBARA1_IN_QTIMER3_TMR0_OUT);
+	imxrt_xbar_connect(IMXRT_XBARA1_OUT_FLEXPWM1_EXT_CLK_SEL_OFFSET, IMXRT_XBARA1_IN_QTIMER3_TMR0_OUT);
+}
@@ -0,0 +1,182 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2024 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Airmind nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+* @file tropic_led_pwm.cpp
+*/
+
+#include <px4_platform_common/px4_config.h>
+#include <systemlib/px4_macros.h>
+#include <nuttx/arch.h>
+#include <nuttx/irq.h>
+
+#include <sys/types.h>
+#include <stdbool.h>
+
+#include <assert.h>
+#include <debug.h>
+#include <time.h>
+#include <queue.h>
+#include <errno.h>
+#include <string.h>
+#include <stdio.h>
+
+#include <arch/board/board.h>
+#include <drivers/drv_pwm_output.h>
+
+#include <px4_arch/io_timer.h>
+
+#include <chip.h>
+#include "imxrt_xbar.h"
+#include "imxrt_periphclks.h"
+#include "hardware/imxrt_tmr.h"
+#include "hardware/imxrt_flexpwm.h"
+
+#define LED_PWM_FREQ    1000
+#define FLEXPWM_FREQ    1000000
+#define QTMR_FREQ       (144000000/128)
+
+#define SM_SPACING (IMXRT_FLEXPWM_SM1CNT_OFFSET-IMXRT_FLEXPWM_SM0CNT_OFFSET)
+
+#define FLEXPWM_TIMER_BASE  IMXRT_FLEXPWM2_BASE
+
+/* Register accessors */
+#define _REG(_addr)	(*(volatile uint16_t *)(_addr))
+#define _REG16(_base, _reg)	(*(volatile uint16_t *)(_base + _reg))
+#define FLEXPWMREG(_tmr, _sm, _reg)		_REG16(_tmr + ((_sm) * SM_SPACING), (_reg))
+
+/* FlexPWM Registers for LED_G */
+#define rINIT(_tim, _sm)       FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0INIT_OFFSET)       /* Initial Count Register */
+#define rCTRL(_tim, _sm)       FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0CTRL_OFFSET)       /* Control Register */
+#define rCTRL2(_tim, _sm)      FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0CTRL2_OFFSET)      /* Control 2 Register */
+#define rFSTS0(_tim)           FLEXPWMREG(_tim,  0, IMXRT_FLEXPWM_FSTS0_OFFSET)         /* Fault Status Register */
+#define rVAL0(_tim, _sm)       FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL0_OFFSET)       /* Value Register 0 */
+#define rVAL1(_tim, _sm)       FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL1_OFFSET)       /* Value Register 1 */
+#define rVAL2(_tim, _sm)       FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL2_OFFSET)       /* Value Register 2 */
+#define rVAL3(_tim, _sm)       FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL3_OFFSET)       /* Value Register 3 */
+#define rVAL4(_tim, _sm)       FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL4_OFFSET)       /* Value Register 4 */
+#define rVAL5(_tim, _sm)       FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL5_OFFSET)       /* Value Register 5 */
+#define rFFILT0(_tim)          FLEXPWMREG(_tim,  0, IMXRT_FLEXPWM_FFILT0_OFFSET)        /* Fault Filter Register */
+#define rDISMAP0(_tim, _sm)    FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0DISMAP0_OFFSET)    /* Fault Disable Mapping Register 0 */
+#define rDISMAP1(_tim, _sm)    FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0DISMAP1_OFFSET)    /* Fault Disable Mapping Register 1 */
+#define rOUTEN(_tim)           FLEXPWMREG(_tim,  0, IMXRT_FLEXPWM_OUTEN_OFFSET)         /* Output Enable Register */
+#define rDTSRCSEL(_tim)        FLEXPWMREG(_tim,  0, IMXRT_FLEXPWM_DTSRCSEL_OFFSET)      /* PWM Source Select Register */
+#define rMCTRL(_tim)           FLEXPWMREG(_tim,  0, IMXRT_FLEXPWM_MCTRL_OFFSET)         /* Master Control Register */
+
+#define OUTEN_A_MASK 0x1
+#define OUTEN_B_MASK 0x2
+
+#define FREQ
+
+static void flexpwm_led(uint32_t timer, uint32_t sm, uint16_t cvalue, uint32_t gpio_mux, uint32_t pwm_mux,
+			uint32_t out_mask)
+{
+	if (cvalue == 0) {
+		//rMCTRL(timer) &= ~MCTRL_RUN(1 << sm);
+		px4_arch_configgpio(gpio_mux);
+
+	} else {
+		rMCTRL(timer) |= (1 << (sm + MCTRL_CLDOK_SHIFT));
+		rVAL1(timer, sm) = (FLEXPWM_FREQ / LED_PWM_FREQ) - 1;
+
+		if (out_mask & OUTEN_A_MASK) {
+			rVAL3(timer, sm) = (FLEXPWM_FREQ / LED_PWM_FREQ) - (cvalue);
+
+		} else if (out_mask & OUTEN_B_MASK) {
+			rVAL5(timer, sm) = (FLEXPWM_FREQ / LED_PWM_FREQ) - (cvalue);
+		}
+
+		rMCTRL(timer) |= MCTRL_LDOK(1 << sm) | MCTRL_RUN(1 << sm);
+		px4_arch_configgpio(pwm_mux);
+	}
+}
+
+int
+led_pwm_servo_set(unsigned channel, uint8_t cvalue)
+{
+	if (channel == 0) {
+		flexpwm_led(IMXRT_FLEXPWM3_BASE, 2, cvalue, GPIO_nLED_RED, PWM_LED_RED, OUTEN_A_MASK);
+
+	} else if (channel == 1) {
+		flexpwm_led(IMXRT_FLEXPWM1_BASE, 3, cvalue, GPIO_nLED_GREEN, PWM_LED_GREEN, OUTEN_A_MASK);
+
+	} else if (channel == 2) {
+		flexpwm_led(IMXRT_FLEXPWM3_BASE, 2, cvalue * 3, GPIO_nLED_BLUE, PWM_LED_BLUE, OUTEN_B_MASK);
+	}
+
+	return 0;
+}
+
+void flexpwm_init(uint32_t timer, uint32_t sm, uint32_t out_mask)
+{
+	/* Clear all Faults */
+	rFSTS0(timer) = FSTS_FFLAG_MASK;
+	rMCTRL(timer) |= (1 << (sm + MCTRL_CLDOK_SHIFT));
+
+	rCTRL2(timer, sm) = SMCTRL2_CLK_SEL_EXT_CLK | SMCTRL2_DBGEN | SMCTRL2_INDEP;
+	rCTRL(timer, sm)  = SMCTRL_PRSC_DIV16 | SMCTRL_FULL;
+	/* Edge aligned at 0 */
+	rINIT(timer, sm) = 0;
+	rVAL0(timer, sm) = 0;
+	rVAL2(timer, sm) = 0;
+	rVAL4(timer, sm) = 0;
+	rFFILT0(timer) &= ~FFILT_FILT_PER_MASK;
+	rDISMAP0(timer, sm) = 0xf000;
+	rDISMAP1(timer, sm) = 0xf000;
+
+
+	if (out_mask & OUTEN_A_MASK) {
+		rOUTEN(timer) |= OUTEN_PWMA_EN(1 << sm);
+	}
+
+	if (out_mask & OUTEN_B_MASK) {
+		rOUTEN(timer) |= OUTEN_PWMB_EN(1 << sm);
+	}
+
+	rDTSRCSEL(timer) = 0;
+	rMCTRL(timer) |= MCTRL_LDOK(1 << sm);
+}
+
+int led_pwm_servo_init()
+{
+	/* PWM_LED_GREEN - FLEXPWM2_PWMB03 */
+	imxrt_clockall_pwm1();
+	imxrt_clockall_pwm3();
+
+	flexpwm_init(IMXRT_FLEXPWM3_BASE, 2, OUTEN_A_MASK | OUTEN_B_MASK); // GPIO_FLEXPWM3_PWMA02_1
+	flexpwm_init(IMXRT_FLEXPWM1_BASE, 3, OUTEN_A_MASK); // GPIO_FLEXPWM1_PWMA03_2
+
+
+
+	return OK;
+}
@@ -0,0 +1,129 @@
+/****************************************************************************
+ *
+ *   Copyright (C) 2024 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file usb.c
+ *
+ * Board-specific USB functions.
+ */
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <px4_platform_common/px4_config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <nuttx/usb/usbdev.h>
+#include <nuttx/usb/usbdev_trace.h>
+
+#include <arm_internal.h>
+#include <chip.h>
+#include <hardware/imxrt_usb_analog.h>
+#include "board_config.h"
+#include "imxrt_periphclks.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+int imxrt_usb_initialize(void)
+{
+	imxrt_clockall_usboh3();
+	return 0;
+}
+/************************************************************************************
+ * Name:  imxrt_usbpullup
+ *
+ * Description:
+ *   If USB is supported and the board supports a pullup via GPIO (for USB software
+ *   connect and disconnect), then the board software must provide imxrt_usbpullup.
+ *   See include/nuttx/usb/usbdev.h for additional description of this method.
+ *   Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be
+ *   NULL.
+ *
+ ************************************************************************************/
+
+__EXPORT
+int imxrt_usbpullup(FAR struct usbdev_s *dev, bool enable)
+{
+	usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
+
+	return OK;
+}
+
+/************************************************************************************
+ * Name:  imxrt_usbsuspend
+ *
+ * Description:
+ *   Board logic must provide the imxrt_usbsuspend logic if the USBDEV driver is
+ *   used.  This function is called whenever the USB enters or leaves suspend mode.
+ *   This is an opportunity for the board logic to shutdown clocks, power, etc.
+ *   while the USB is suspended.
+ *
+ ************************************************************************************/
+
+__EXPORT
+void imxrt_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+	uinfo("resume: %d\n", resume);
+}
+
+/************************************************************************************
+ * Name: board_read_VBUS_state
+ *
+ * Description:
+ *   All boards must provide a way to read the state of VBUS, this my be simple
+ *   digital input on a GPIO. Or something more complicated like a Analong input
+ *   or reading a bit from a USB controller register.
+ *
+ * Returns -  0 if connected.
+ *
+ ************************************************************************************/
+
+int board_read_VBUS_state(void)
+{
+
+	return (getreg32(IMXRT_USB_ANALOG_USB1_VBUS_DETECT_STAT) & USB_ANALOG_USB_VBUS_DETECT_STAT_VBUS_VALID) ? 0 : 1;
+}
@@ -14,6 +14,7 @@ CONFIG_DRIVERS_CAMERA_TRIGGER=y
 CONFIG_DRIVERS_CDCACM_AUTOSTART=y
 CONFIG_COMMON_DIFFERENTIAL_PRESSURE=y
 CONFIG_COMMON_DISTANCE_SENSOR=y
+CONFIG_DRIVERS_DISTANCE_SENSOR_LIGHTWARE_SF45_SERIAL=y
 CONFIG_DRIVERS_DSHOT=y
 CONFIG_DRIVERS_GNSS_SEPTENTRIO=y
 CONFIG_DRIVERS_GPS=y
@@ -26,12 +27,12 @@ CONFIG_COMMON_LIGHT=y
 CONFIG_DRIVERS_LIGHTS_RGBLED_PWM=y
 CONFIG_COMMON_MAGNETOMETER=y
 CONFIG_COMMON_OPTICAL_FLOW=y
-CONFIG_COMMON_OSD=y
+CONFIG_DRIVERS_OSD_MSP_OSD=y
 CONFIG_DRIVERS_POWER_MONITOR_INA226=y
 CONFIG_DRIVERS_POWER_MONITOR_INA228=y
 CONFIG_DRIVERS_POWER_MONITOR_INA238=y
 CONFIG_DRIVERS_PWM_OUT=y
-CONFIG_DRIVERS_RC_INPUT=y
+CONFIG_COMMON_RC=y
 CONFIG_DRIVERS_SAFETY_BUTTON=y
 CONFIG_COMMON_TELEMETRY=y
 CONFIG_DRIVERS_TONE_ALARM=y
@@ -44,13 +45,15 @@ CONFIG_MODULES_CAMERA_FEEDBACK=y
 CONFIG_MODULES_COMMANDER=y
 CONFIG_MODULES_CONTROL_ALLOCATOR=y
 CONFIG_MODULES_DATAMAN=y
+CONFIG_NUM_MISSION_ITMES_SUPPORTED=1000
 CONFIG_MODULES_EKF2=y
 CONFIG_MODULES_ESC_BATTERY=y
 CONFIG_MODULES_EVENTS=y
 CONFIG_MODULES_FLIGHT_MODE_MANAGER=y
 CONFIG_MODULES_FW_ATT_CONTROL=y
 CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=y
-CONFIG_MODULES_FW_POS_CONTROL=y
+CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=y
+CONFIG_MODULES_FW_MODE_MANAGER=y
 CONFIG_MODULES_FW_RATE_CONTROL=y
 CONFIG_MODULES_GIMBAL=y
 CONFIG_MODULES_GYRO_CALIBRATION=y
@@ -100,3 +103,4 @@ CONFIG_SYSTEMCMDS_UORB=y
 CONFIG_SYSTEMCMDS_USB_CONNECTED=y
 CONFIG_SYSTEMCMDS_VER=y
 CONFIG_SYSTEMCMDS_WORK_QUEUE=y
+CONFIG_ARCH_CHIP_IMXRT=y
@@ -62,7 +62,9 @@ CONFIG_FS_CROMFS=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FATTIME=y
 CONFIG_FS_LITTLEFS=y
-CONFIG_FS_LITTLEFS_PROGRAM_SIZE_FACTOR=2
+CONFIG_FS_LITTLEFS_CACHE_SIZE_FACTOR=2
+CONFIG_FS_LITTLEFS_LOOKAHEAD_SIZE=64
+CONFIG_FS_LITTLEFS_PROGRAM_SIZE_FACTOR=1
 CONFIG_FS_PROCFS=y
 CONFIG_FS_PROCFS_MAX_TASKS=64
 CONFIG_FS_PROCFS_REGISTER=y
@@ -75,6 +77,7 @@ CONFIG_I2C=y
 CONFIG_I2C_RESET=y
 CONFIG_IDLETHREAD_STACKSIZE=2048
 CONFIG_IMXRT_DTCM_HEAP=y
+CONFIG_IMXRT_DTCM_HEAP_SIZE=127
 CONFIG_IMXRT_EDMA=y
 CONFIG_IMXRT_EDMA_EDBG=y
 CONFIG_IMXRT_EDMA_ELINK=y
@@ -84,8 +87,6 @@ CONFIG_IMXRT_ENET_NTXBUFFERS=8
 CONFIG_IMXRT_ENET_PHYINIT=y
 CONFIG_IMXRT_FLEXCAN3=y
 CONFIG_IMXRT_FLEXCAN_TXMB=1
-CONFIG_IMXRT_FLEXSPI1=y
-CONFIG_IMXRT_FLEXSPI1_XIP=y
 CONFIG_IMXRT_GPIO1_0_15_IRQ=y
 CONFIG_IMXRT_GPIO1_16_31_IRQ=y
 CONFIG_IMXRT_GPIO2_0_15_IRQ=y
@@ -115,18 +115,29 @@
 *(.text.work_thread)
 *(.text.work_queue)

-/* Flash Storage */
-*(.text.imxrt_flexspi_transfer_blocking)
-*(.text.imxrt_flexspi_transfer_blocking_private)
-*(.text.imxrt_flexspi_write_blocking)
-*(.text.imxrt_flexspi_read_blocking)
-*(.text.imxrt_flexspi_check_and_clear_error)
-*(.text.imxrt_flexspi_get_bus_idle_status)
-*(.text.imxrt_flexspi_configure_prefetch)
-*(.text.imxrt_flexspi_configure_prefetch_private)
-*(.text.imxrt_flexspi_storage_write_enable)
-*(.text.imxrt_flexspi_storage_wait_bus_busy)
-*(.text.imxrt_flexspi_storage_read_status)
-*(.text.imxrt_flexspi_storage_erase)
-*(.text.imxrt_flexspi_storage_bwrite)
-*(.text.imxrt_flexspi_storage_page_program)
+/* BMI088 */
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer12RegisterReadENS1_8RegisterE)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer13FIFOReadCountEv)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer8FIFOReadERKyh)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer13RegisterCheckERKNS2_17register_config_tE)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer13RegisterWriteENS1_8RegisterEh)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer17UpdateTemperatureEv)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer23RegisterSetAndClearBitsENS1_8RegisterEhh)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer26DataReadyInterruptCallbackEiPvS3_)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer7RunImplEv)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_Accelerometer9DataReadyEv)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_AccelerometerD0Ev)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_AccelerometerD1Ev)
+*(.text._ZN5Bosch6BMI08813Accelerometer20BMI088_AccelerometerD2Ev)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope12RegisterReadENS1_8RegisterE)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope13RegisterCheckERKNS2_17register_config_tE)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope13RegisterWriteENS1_8RegisterEh)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope23RegisterSetAndClearBitsENS1_8RegisterEhh)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope26DataReadyInterruptCallbackEiPvS3_)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope7RunImplEv)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope8FIFOReadERKyh)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_Gyroscope9DataReadyEv)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_GyroscopeD0Ev)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_GyroscopeD1Ev)
+*(.text._ZN5Bosch6BMI0889Gyroscope16BMI088_GyroscopeD2Ev)
+*(.text._ZN12I2CSPIDriverI6BMI088E3RunEv)
@@ -22,10 +22,11 @@

 MEMORY
 {
-  flash (rx)  : ORIGIN = 0x60000000, LENGTH = 7936K - 128K
+  flash (rx)  : ORIGIN = 0x60000000, LENGTH = 7936K - 256K
  sram  (rwx) : ORIGIN = 0x20200000, LENGTH = 512K
  itcm  (rwx) : ORIGIN = 0x00000000, LENGTH = 384K
-  dtcm  (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
+  dtcm  (rwx) : ORIGIN = 0x20000000, LENGTH = 127K
+  dtcm_nocache  (rwx) : ORIGIN = 0x2001FC00, LENGTH = 1K
 }

 OUTPUT_ARCH(arm)
@@ -55,6 +56,12 @@ SECTIONS
        . = 0x2000 ;
    } >flash

+    /* Workaround for ethernet issue, by placing g_desc_pool into DTCM,
+       which effectively puts it into a no-cache region */
+    .dtcm_nocache : {
+        *(.bss.g_desc_pool)
+    } > dtcm_nocache
+
    .vectors :
    {
        KEEP(*(.vectors))
@@ -162,6 +169,10 @@ SECTIONS
    .debug_line 0 : { *(.debug_line) }
    .debug_pubnames 0 : { *(.debug_pubnames) }
    .debug_aranges 0 : { *(.debug_aranges) }
+
+    _boot_loadaddr = ORIGIN(flash);
+    _boot_size = LENGTH(flash);
+    _ram_size = LENGTH(sram);
    _sdtcm = ORIGIN(dtcm);
    _edtcm = ORIGIN(dtcm) + LENGTH(dtcm);
 }
@@ -51,6 +51,8 @@ set_source_files_properties(imxrt_ocram_initialize.c PROPERTIES COMPILE_FLAGS -f

 target_link_libraries(drivers_board
 	PRIVATE
+		arch_board_romapi
+		arch_spi
 		nuttx_arch # sdio
 		nuttx_drivers # sdio
 		px4_layer
@@ -112,7 +112,6 @@

 #define GPIO_DRDY_OFF_SPI4_DRDY7_EXTERNAL1   _PIN_OFF(GPIO_SPI4_DRDY7_EXTERNAL1)

-
 #define ADC_IOMUX (IOMUX_CMOS_INPUT | IOMUX_PULL_NONE | IOMUX_DRIVE_HIZ)

 #define ADC1_CH(n)                  (n)
@@ -262,6 +261,10 @@ static inline int board_read_usb2_vbus_state(void)
 	}

 #define BOARD_ENABLE_CONSOLE_BUFFER
+
+/* Flash instance for storage */
+#define NOR_INSTANCE      0
+
 __BEGIN_DECLS

 /****************************************************************************************************
@@ -316,6 +319,8 @@ extern int imxrt1062_spi_bus_initialize(void);
 *
 ************************************************************************************/

+extern void imxrt_spiinitialize(void);
+
 extern int imxrt_usb_initialize(void);

 extern void imxrt_usbinitialize(void);
@@ -326,6 +331,8 @@ extern void fmurt1062_timer_initialize(void);

 #include <px4_platform_common/board_common.h>

+void imxrt_flash_romapi_initialize(void);
+
 int imxrt_flexspi_storage_initialize(void);

 #endif /* __ASSEMBLY__ */
@@ -28,55 +28,71 @@
 * Public Data
 ****************************************************************************/

+enum {
+	/* SPI instructions */
+
+	READ_FAST = 0,
+	READ_STATUS_REG = 1,
+	WRITE_ENABLE = 3,
+	SECTOR_ERASE_4K = 5,
+	READ_FAST_QUAD_OUTPUT = 6,
+	PAGE_PROGRAM_QUAD_INPUT = 7,
+	ERASE_BLOCK = 8,
+	PAGE_PROGRAM = 9,
+	CHIP_ERASE = 11,
+};
+
 locate_data(".boot_hdr.conf")
 const struct flexspi_nor_config_s g_flash_config = {
 	.mem_config =
 	{
-		.tag = FLEXSPI_CFG_BLK_TAG,
-		.version = FLEXSPI_CFG_BLK_VERSION,
-		.read_sample_clksrc =  FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_SCKPAD,
-		.cs_hold_time = 1u,
-		.cs_setup_time = 1u,
-		.column_address_width = 0u,
-		.device_type = FLEXSPI_DEVICE_TYPE_SERIAL_NOR,
-		.sflash_pad_type = SERIAL_FLASH_4PADS,
-		.serial_clk_freq = FLEXSPI_SERIAL_CLKFREQ_133MHz,
-		.sflash_a1size = 8u * 1024u * 1024u,
-		.data_valid_time =
+		.tag                    = FLEXSPI_CFG_BLK_TAG,
+		.version                = FLEXSPI_CFG_BLK_VERSION,
+		.read_sample_clksrc     =  FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_SCKPAD,
+		.cs_hold_time           = 1u,
+		.cs_setup_time          = 1u,
+		.column_address_width   = 0u,
+		.device_type            = FLEXSPI_DEVICE_TYPE_SERIAL_NOR,
+		.sflash_pad_type        = SERIAL_FLASH_4PADS,
+		.serial_clk_freq        = FLEXSPI_SERIAL_CLKFREQ_133MHz,
+		.sflash_a1size          = 8u * 1024u * 1024u,
+		.lookup_table           =
 		{
-			0u, 0u
-		},
-		.lookup_table =
-		{
-			/* Fast Read Quad I/O */
-			[0 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xeb,
-						  RADDR_SDR, FLEXSPI_4PAD, 0x18),
-			[0 + 1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06,
-						  READ_SDR, FLEXSPI_4PAD, 0x04),
+			[4 * READ_FAST] =       FLEXSPI_LUT_SEQ(CMD_SDR,   FLEXSPI_1PAD, 0xeb,
+								RADDR_SDR, FLEXSPI_4PAD, 0x18),
+			[4 * READ_FAST + 1] =   FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06,
+								READ_SDR,  FLEXSPI_4PAD, 0x04),

-			/* Read Status Register-1 */
-			[4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05,
-						      READ_SDR, FLEXSPI_1PAD, 0x04),
+			[4 * READ_STATUS_REG] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05,
+								READ_SDR,  FLEXSPI_1PAD, 0x04),

-			/* Write Status Register-1 */
-			[4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01, STOP, FLEXSPI_1PAD, 0x0),
+			[4 * WRITE_ENABLE] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06,
+							     STOP, FLEXSPI_1PAD, 0),

-			/* Sector Erase (4KB) */
-			[4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20,
-						      RADDR_SDR, FLEXSPI_1PAD, 0x18),
+			[4 * SECTOR_ERASE_4K] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20,
+								RADDR_SDR, FLEXSPI_1PAD, 0x18),

-			/* Block Erase (64KB) */
-			[4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xd8,
-						      RADDR_SDR, FLEXSPI_1PAD, 0x18),
+			[4 * CHIP_ERASE] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60,
+							   STOP, FLEXSPI_1PAD, 0),

-			/* Page Program */
-			[4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02,
-						      RADDR_SDR, FLEXSPI_1PAD, 0x18),
-			[4 * 9 + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04,
-						      STOP, FLEXSPI_1PAD, 0x0),
+			[4 * ERASE_BLOCK] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xd8,
+							    RADDR_SDR, FLEXSPI_1PAD, 0x18),
+
+			[4 * PAGE_PROGRAM] =     FLEXSPI_LUT_SEQ(CMD_SDR,   FLEXSPI_1PAD, 0x02,
+					RADDR_SDR, FLEXSPI_1PAD, 0x18),
+			[4 * PAGE_PROGRAM + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04,
+					STOP,      FLEXSPI_1PAD, 0x0),
+
+			[4 * READ_FAST_QUAD_OUTPUT] =     FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x6b,
+					RADDR_SDR, FLEXSPI_1PAD, 0x18),
+			[4 * READ_FAST_QUAD_OUTPUT + 1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x08,
+					READ_SDR,  FLEXSPI_4PAD, 0x04),
+
+			[4 * PAGE_PROGRAM_QUAD_INPUT] =     FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x32,
+					RADDR_SDR, FLEXSPI_1PAD, 0x18),
+			[4 * PAGE_PROGRAM_QUAD_INPUT + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x04,
+					STOP,      FLEXSPI_1PAD, 0),

-			/* Chip Erase */
-			[4 * 11 + 0] =  FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60, STOP, FLEXSPI_1PAD, 0x0),
 		},
 	},

@@ -64,9 +64,9 @@
 #include <nuttx/analog/adc.h>
 #include <nuttx/mm/gran.h>

-#include "arm_internal.h"
 #include "arm_internal.h"
 #include "imxrt_flexspi_nor_boot.h"
+#include <px4_arch/imxrt_flexspi_nor_flash.h>
 #include "imxrt_iomuxc.h"
 #include "imxrt_flexcan.h"
 #include "imxrt_enet.h"
@@ -84,6 +84,7 @@
 #include <drivers/drv_board_led.h>
 #include <systemlib/px4_macros.h>
 #include <px4_arch/io_timer.h>
+#include <px4_arch/imxrt_romapi.h>
 #include <px4_platform_common/init.h>
 #include <px4_platform/gpio.h>
 #include <px4_platform/board_dma_alloc.h>
@@ -144,6 +145,30 @@ __EXPORT void board_on_reset(int status)
 	}
 }

+/****************************************************************************
+ * Name: imxrt_flash_romapi_initialize
+ *
+ * Description:
+ *
+ ****************************************************************************/
+struct flexspi_nor_config_s g_bootConfig;
+
+locate_code(".ramfunc")
+void imxrt_flash_romapi_initialize(void)
+{
+	memcpy((struct flexspi_nor_config_s *)&g_bootConfig, &g_flash_config,
+	       sizeof(struct flexspi_nor_config_s));
+	g_bootConfig.memConfig.tag = FLEXSPI_CFG_BLK_TAG;
+
+	ROM_API_Init();
+
+	ROM_FLEXSPI_NorFlash_Init(NOR_INSTANCE, (struct flexspi_nor_config_s *)&g_bootConfig);
+	ROM_FLEXSPI_NorFlash_ClearCache(NOR_INSTANCE);
+
+	ARM_DSB();
+	ARM_ISB();
+	ARM_DMB();
+}

 locate_code(".ramfunc")
 void imxrt_flash_setup_prefetch_partition(void)
@@ -207,6 +232,8 @@ __EXPORT void imxrt_boardinitialize(void)
 {
 	imxrt_flash_setup_prefetch_partition();

+	imxrt_flash_romapi_initialize();
+
 	board_on_reset(-1); /* Reset PWM first thing */

 	/* configure LEDs */
@@ -218,10 +245,6 @@ __EXPORT void imxrt_boardinitialize(void)
 	const uint32_t gpio[] = PX4_GPIO_INIT_LIST;
 	px4_gpio_init(gpio, arraySize(gpio));

-	/* configure SPI interfaces */
-
-	imxrt_spidev_initialize();
-
 	imxrt_usb_initialize();

 	fmurt1062_timer_initialize();
@@ -330,14 +353,18 @@ void imxrt_flexio_clocking(void)
 ****************************************************************************/
 __EXPORT int board_app_initialize(uintptr_t arg)
 {
+	int ret = OK;
+
+#if !defined(BOOTLOADER)
+
 	imxrt_flexio_clocking();

 	/* Power on Interfaces */

-	board_spi_reset(10, 0xffff);
-
 	px4_platform_init();

+	imxrt_spiinitialize();
+
 	/* configure the DMA allocator */

 	if (board_dma_alloc_init() < 0) {
@@ -350,14 +377,13 @@ __EXPORT int board_app_initialize(uintptr_t arg)
 	hrt_call_every(&serial_dma_call, 1000, 1000, (hrt_callout)imxrt_serial_dma_poll, NULL);
 #endif

-	int ret = OK;
 #if defined(CONFIG_IMXRT_USDHC)
 	ret = fmurt1062_usdhc_initialize();
 #endif

-	/* Configure SPI-based devices */
+	imxrt_spiinitialize();

-	ret = imxrt1062_spi_bus_initialize();
+	board_spi_reset(10, 0xffff);

 #ifdef CONFIG_IMXRT_ENET
 	imxrt_netinitialize(0);
@@ -367,7 +393,6 @@ __EXPORT int board_app_initialize(uintptr_t arg)
 	imxrt_caninitialize(3);
 #endif

-#ifdef CONFIG_IMXRT_FLEXSPI
 	ret = imxrt_flexspi_storage_initialize();

 	if (ret < 0) {
@@ -375,7 +400,7 @@ __EXPORT int board_app_initialize(uintptr_t arg)
 		       "ERROR: imxrt_flexspi_nor_initialize failed: %d\n", ret);
 	}

-#endif
+#endif /* !defined(BOOTLOADER) */

 	return ret;
 }
@@ -157,8 +157,13 @@
 #if BOARD_NUMBER_BRICKS == 0
 /* allow SITL to disable all bricks */
 #elif BOARD_NUMBER_BRICKS == 1
-#  define BOARD_BATT_V_LIST       {ADC_BATTERY_VOLTAGE_CHANNEL}
-#  define BOARD_BATT_I_LIST       {ADC_BATTERY_CURRENT_CHANNEL}
+#  if  defined(BOARD_NUMBER_DIGITAL_BRICKS)
+#    define BOARD_BATT_V_LIST       {-1}
+#    define BOARD_BATT_I_LIST       {-1}
+#  else
+#    define BOARD_BATT_V_LIST       {ADC_BATTERY_VOLTAGE_CHANNEL}
+#    define BOARD_BATT_I_LIST       {ADC_BATTERY_CURRENT_CHANNEL}
+#  endif
 #  define BOARD_BRICK_VALID_LIST  {BOARD_ADC_BRICK_VALID}
 #elif BOARD_NUMBER_BRICKS == 2
 #  if  defined(BOARD_NUMBER_DIGITAL_BRICKS)
@@ -507,6 +507,9 @@ if(NOT NUTTX_DIR MATCHES "external")
 	if(CONFIG_ARCH_CHIP_MIMXRT1062DVL6A)
 		set(DEBUG_DEVICE "MIMXRT1062XXX6A")
 		set(DEBUG_SVD_FILE "MIMXRT1062.xml")
+	elseif(CONFIG_ARCH_CHIP_MIMXRT1064DVL6A)
+		set(DEBUG_DEVICE "MIMXRT1064XXX6A")
+		set(DEBUG_SVD_FILE "MIMXRT1064.xml")
 	elseif(CONFIG_ARCH_CHIP_MIMXRT1176DVMAA)
 		set(DEBUG_DEVICE "MIMXRT1176DVMAA")
 		set(DEBUG_SVD_FILE "MIMXRT1176_cm7.xml")
@@ -158,6 +158,9 @@ function(px4_os_determine_build_chip)
 	elseif(CONFIG_ARCH_CHIP_MIMXRT1062DVL6A)
 		set(CHIP_MANUFACTURER "nxp")
 		set(CHIP "rt106x")
+	elseif(CONFIG_ARCH_CHIP_MIMXRT1064DVL6A)
+		set(CHIP_MANUFACTURER "nxp")
+		set(CHIP "rt106x")
 	elseif(CONFIG_ARCH_CHIP_MIMXRT1176DVMAA)
 		set(CHIP_MANUFACTURER "nxp")
 		set(CHIP "rt117x")
@@ -9,9 +9,19 @@
 #include "hw_config.h"
 #include <px4_arch/imxrt_flexspi_nor_flash.h>
 #include <px4_arch/imxrt_romapi.h>
-#include <hardware/rt117x/imxrt117x_ocotp.h>
-#include <hardware/rt117x/imxrt117x_anadig.h>
-#include <hardware/rt117x/imxrt117x_snvs.h>
+#ifdef CONFIG_ARCH_FAMILY_IMXRT117x
+#  include <hardware/rt117x/imxrt117x_ocotp.h>
+#  include <hardware/rt117x/imxrt117x_anadig.h>
+#  include <hardware/rt117x/imxrt117x_snvs.h>
+#else
+#  include <chip.h>
+#  include <hardware/imxrt_usb_analog.h>
+#  include <hardware/imxrt_snvs.h>
+#  include <hardware/imxrt_ocotp.h>
+#  include "hardware/imxrt_ccm.h"
+#  include "imxrt_periphclks.h"
+#  define SNVS_LPCR_GPR_Z_DIS             (1 << 24)  /* Bit 24: General Purpose Registers Zeroization Disable */
+#endif
 #include <hardware/imxrt_usb_analog.h>
 #include "imxrt_clockconfig.h"

@@ -30,14 +40,31 @@

 #define APP_SIZE_MAX			(BOARD_FLASH_SIZE - (BOOTLOADER_RESERVATION_SIZE + APP_RESERVATION_SIZE))

+#ifdef CONFIG_ARCH_FAMILY_IMXRT117x
 #define CHIP_TAG     "i.MX RT11?0,r??"
-#define CHIP_TAG_LEN sizeof(CHIP_TAG)-1
-
 #define SI_REV(n)             ((n & 0x7000000) >> 24)
 #define DIFPROG_TYPE(n)       ((n & 0xF000) >> 12)
 #define DIFPROG_REV_MAJOR(n)  ((n & 0xF0) >> 4)
 #define DIFPROG_REV_MINOR(n)  ((n & 0xF))
+#elif defined(CONFIG_ARCH_FAMILY_IMXRT106x)
+#define CHIP_TAG     "i.MX RT10?? r?.?"
+#define DIGPROG_MINOR_SHIFT           0
+#define DIGPROG_MINOR_MASK            (0xff << DIGPROG_MINOR_SHIFT)
+#define DIGPROG_MINOR(info)           (((info) & DIGPROG_MINOR_MASK) >> DIGPROG_MINOR_SHIFT)
+#define DIGPROG_MAJOR_LOWER_SHIFT     8
+#define DIGPROG_MAJOR_LOWER_MASK      (0xff << DIGPROG_MAJOR_LOWER_SHIFT)
+#define DIGPROG_MAJOR_LOWER(info)     (((info) & DIGPROG_MAJOR_LOWER_MASK) >> DIGPROG_MAJOR_LOWER_SHIFT)
+#define DIGPROG_MAJOR_UPPER_SHIFT     16
+#define DIGPROG_MAJOR_UPPER_MASK      (0xff << DIGPROG_MAJOR_UPPER_SHIFT)
+#define DIGPROG_MAJOR_UPPER(info)     (((info) & DIGPROG_MAJOR_UPPER_MASK) >> DIGPROG_MAJOR_UPPER_SHIFT)
+#endif
+#define CHIP_TAG_LEN sizeof(CHIP_TAG)-1

+#ifdef CONFIG_ARCH_FAMILY_IMXRT117x
+#define FLASH_BASE IMXRT_FLEXSPI1_CIPHER_BASE
+#elif defined(CONFIG_ARCH_CHIP_MIMXRT1064DVL6A)
+#define FLASH_BASE IMXRT_FLEX2CIPHER_BASE
+#endif

 /* context passed to cinit */
 #if INTERFACE_USART
@@ -287,6 +314,27 @@ board_deinit(void)
 	px4_arch_configgpio(MK_GPIO_INPUT(BOARD_PIN_LED_BOOTLOADER));
 #endif

+#ifdef CONFIG_ARCH_FAMILY_IMXRT106x
+
+	// Restore CCM registers to ROM state
+	putreg32(0x00000001, IMXRT_CCM_CACRR);
+	putreg32(0x000A8200, IMXRT_CCM_CBCDR);
+	putreg32(0x06490B03, IMXRT_CCM_CSCDR1);
+	putreg32(0x75AE8104, IMXRT_CCM_CBCMR);
+	putreg32(0x67930001, IMXRT_CCM_CSCMR1);
+
+	imxrt_clockoff_lpuart3();
+	imxrt_clockoff_usboh3();
+	imxrt_clockoff_timer3();
+	imxrt_clockoff_xbar1();
+	imxrt_clockoff_xbar3();
+
+	up_disable_icache();
+	up_disable_dcache();
+
+#endif
+
+#ifdef CONFIG_ARCH_FAMILY_IMXRT117x
 	const uint32_t dnfw[] = {
 		CCM_CR_M7,
 		CCM_CR_BUS,
@@ -309,6 +357,8 @@ board_deinit(void)
 			putreg32(CCM_CR_CTRL_OFF, IMXRT_CCM_CR_CTRL(i));
 		}
 	}
+
+#endif
 }

 inline void arch_systic_init(void)
@@ -365,7 +415,7 @@ ssize_t arch_flash_write(uintptr_t address, const void *buffer, size_t buflen)
 		j++;
 	}

-	uintptr_t offset = ((uintptr_t) address) - IMXRT_FLEXSPI1_CIPHER_BASE;
+	uintptr_t offset = ((uintptr_t) address) - FLASH_BASE;

 	volatile uint32_t status = ROM_FLEXSPI_NorFlash_ProgramPage(1, pConfig, offset, (const uint32_t *)buffer);
 	up_invalidate_dcache((uintptr_t)address,
@@ -400,7 +450,7 @@ flash_func_sector_size(unsigned sector)
 ssize_t up_progmem_ispageerased(unsigned sector)
 {
 	const uint32_t bytes_per_sector =  flash_func_sector_size(sector);
-	uint32_t *address = (uint32_t *)(IMXRT_FLEXSPI1_CIPHER_BASE + (sector * bytes_per_sector));
+	uint32_t *address = (uint32_t *)(FLASH_BASE + (sector * bytes_per_sector));
 	const uint32_t uint32_per_sector =  bytes_per_sector / sizeof(*address);

 	int blank = 0; /* Assume it is Bank */
@@ -437,9 +487,9 @@ flash_func_erase_sector(unsigned sector, bool force)
 		struct flexspi_nor_config_s *pConfig = &g_bootConfig;

 		const uint32_t bytes_per_sector =  flash_func_sector_size(sector);
-		uint32_t *address = (uint32_t *)(IMXRT_FLEXSPI1_CIPHER_BASE + (sector * bytes_per_sector));
+		uint32_t *address = (uint32_t *)(FLASH_BASE + (sector * bytes_per_sector));

-		uintptr_t offset = ((uintptr_t) address) - IMXRT_FLEXSPI1_CIPHER_BASE;
+		uintptr_t offset = ((uintptr_t) address) - FLASH_BASE;
 		irqstate_t flags;
 		flags = enter_critical_section();
 		volatile uint32_t  status = ROM_FLEXSPI_NorFlash_Erase(1, pConfig, (uintptr_t) offset, bytes_per_sector);
@@ -473,6 +523,8 @@ flash_func_read_otp(uintptr_t address)
 	return 0;
 }

+#ifdef CONFIG_ARCH_FAMILY_IMXRT117x
+
 uint32_t get_mcu_id(void)
 {
 	// ??? is DEBUGMCU get able
@@ -499,6 +551,36 @@ int get_mcu_desc(int max, uint8_t *revstr)
 	return  strp - revstr;
 }

+#elif defined(CONFIG_ARCH_FAMILY_IMXRT106x)
+
+uint32_t get_mcu_id(void)
+{
+	return getreg32(IMXRT_OCOTP_UNIQUE_ID_LSB);
+}
+
+int get_mcu_desc(int max, uint8_t *revstr)
+{
+	uint32_t info = getreg32(IMXRT_USB_ANALOG_DIGPROG);
+	// CHIP_TAG     "i.MX RT10?? r?.?"
+	static uint8_t chip[sizeof(CHIP_TAG) + 1] = CHIP_TAG;
+	chip[CHIP_TAG_LEN - 1] = '0' +  DIGPROG_MINOR(info);
+	chip[CHIP_TAG_LEN - 3] = '1' + DIGPROG_MAJOR_LOWER(info);
+	chip[CHIP_TAG_LEN - 6] = getreg32(0x401F867C) == 0x10 ? '4' : '2';
+	chip[CHIP_TAG_LEN - 7] = DIGPROG_MAJOR_UPPER(info)  == 0x6a ? '5' : '6';
+
+	uint8_t *endp = &revstr[max - 1];
+	uint8_t *strp = revstr;
+	uint8_t *des = chip;
+
+	while (strp < endp && *des) {
+		*strp++ = *des++;
+	}
+
+	return  strp - revstr;
+}
+
+#endif
+

 int check_silicon(void)
 {
@@ -717,6 +799,7 @@ bootloader_main(void)
 	 * Returns -  0 if connected.
 	 *
 	 ************************************************************************************/
+#ifdef CONFIG_ARCH_FAMILY_IMXRT117x
 #undef IMXRT_USB_ANALOG_USB1_VBUS_DETECT_STAT
 #define USB1_VBUS_DET_STAT_OFFSET               0xd0
 #define IMXRT_USB_ANALOG_USB1_VBUS_DETECT_STAT (IMXRT_USBPHY1_BASE + USB1_VBUS_DET_STAT_OFFSET)
@@ -727,6 +810,17 @@ bootloader_main(void)
 		try_boot = false;
 	}

+#elif defined(CONFIG_ARCH_FAMILY_IMXRT106x)
+#undef IMXRT_USB_ANALOG_USB1_VBUS_DETECT_STAT
+#define IMXRT_USB_ANALOG_USB1_VBUS_DETECT_STAT (IMXRT_ANATOP_BASE + IMXRT_USB_ANALOG_USB1_VBUS_DETECT_STAT_OFFSET)
+
+	if ((getreg32(IMXRT_USB_ANALOG_USB1_VBUS_DETECT_STAT) & USB_ANALOG_USB_VBUS_DETECT_STAT_VBUS_VALID) != 0) {
+		usb_connected = true;
+		/* don't try booting before we set up the bootloader */
+		try_boot = false;
+	}
+
+#endif
 #endif

 #if INTERFACE_USART
@@ -0,0 +1,34 @@
+############################################################################
+#
+#   Copyright (c) 2023 PX4 Development Team. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name PX4 nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+add_subdirectory(../imxrt_common arch_bootloader)
@@ -35,9 +35,7 @@ px4_add_library(arch_board_reset
 	board_reset.cpp
 )

-if (CONFIG_ARCH_FAMILY_IMXRT117x)
 target_link_libraries(arch_board_reset PRIVATE arch_board_romapi)
-endif()

 # up_systemreset
 if (NOT DEFINED CONFIG_BUILD_FLAT)
@@ -45,6 +45,12 @@

 #ifdef CONFIG_ARCH_FAMILY_IMXRT117x
 #include <hardware/rt117x/imxrt117x_snvs.h>
+#elif defined CONFIG_ARCH_FAMILY_IMXRT106x
+#  include <hardware/imxrt_snvs.h>
+#  define SNVS_LPCR_GPR_Z_DIS             (1 << 24)  /* Bit 24: General Purpose Registers Zeroization Disable */
+#endif
+
+#ifdef BOARD_HAS_ISP_BOOTLOADER
 #include <px4_arch/imxrt_flexspi_nor_flash.h>
 #include <px4_arch/imxrt_romapi.h>
 #endif
@@ -59,13 +65,9 @@

 static int board_reset_enter_bootloader()
 {
-#ifdef CONFIG_ARCH_FAMILY_IMXRT117x
 	uint32_t regvalue = BOOT_RTC_SIGNATURE;
 	modifyreg32(IMXRT_SNVS_LPCR, 0, SNVS_LPCR_GPR_Z_DIS);
 	putreg32(regvalue, PX4_IMXRT_RTC_REBOOT_REG_ADDRESS);
-#elif defined(BOARD_HAS_TEENSY_BOOTLOADER)
-	asm("BKPT #251"); /* Enter Teensy MKL02 bootloader */
-#endif
 	return OK;
 }

@@ -75,15 +77,16 @@ int board_reset(int status)
 		board_reset_enter_bootloader();
 	}

-#if defined(BOARD_HAS_ISP_BOOTLOADER)
-
 	else if (status == REBOOT_TO_ISP) {
+#ifdef BOARD_HAS_TEENSY_BOOTLOADER
+		asm("BKPT #251"); /* Enter Teensy MKL02 bootloader */
+#elif defined(BOARD_HAS_ISP_BOOTLOADER)
 		uint32_t arg = 0xeb100000;
 		ROM_API_Init();
 		ROM_RunBootloader(&arg);
+#endif
 	}

-#endif

 #if defined(BOARD_HAS_ON_RESET)
 	board_on_reset(status);
@@ -74,26 +74,40 @@ typedef enum {
 	BDSHOT_RECEIVE_COMPLETE,
 } dshot_state;

-typedef struct dshot_handler_t {
+typedef struct dshot_channel_t {
 	bool			init;
 	uint32_t 		data_seg1;
 	uint32_t 		irq_data;
 	dshot_state             state;
-	bool			bdshot;
 	uint32_t                raw_response;
 	uint16_t                erpm;
 	uint32_t		crc_error_cnt;
 	uint32_t		frame_error_cnt;
 	uint32_t		no_response_cnt;
 	uint32_t		last_no_response_cnt;
-} dshot_handler_t;
+	bool                    bdshot;
+	uint32_t                bdshot_tcmp;
+	uint32_t                bdshot_training_mask;
+	uint8_t                 bdshot_training_count;
+	uint8_t                 bdshot_training_success;
+	bool                    bdshot_training_done;
+	int8_t                  bdshot_tcmp_offset;
+} dshot_channel_t;

 #define BDSHOT_OFFLINE_COUNT 400 // If there are no responses for 400 setpoints ESC is offline

-static dshot_handler_t dshot_inst[DSHOT_TIMERS] = {};
+#define BDSHOT_TCMP_MIN_OFFSET -16
+#define BDSHOT_TCMP_MAX_OFFSET 15
+#define BDSHOT_TCMP_TO_MASK(x) ((x) - BDSHOT_TCMP_MIN_OFFSET)
+#define BDSHOT_TRAINING_TRIES 200
+#define BDSHOT_TRAINING_SUCCESS 198
+
+#define BDSHOT_ZERO_RESPONSE    0x52951
+
+static dshot_channel_t dshot_inst[DSHOT_TIMERS] = {};

 static uint32_t dshot_tcmp;
-static uint32_t bdshot_tcmp;
+static unsigned dshot_speed;
 static uint32_t dshot_mask;
 static uint32_t bdshot_recv_mask;
 static uint32_t bdshot_parsed_recv_mask;
@@ -155,6 +169,12 @@ static inline void clear_timer_status_flags(uint32_t mask)
 	flexio_putreg32(mask, IMXRT_FLEXIO_TIMSTAT_OFFSET);
 }

+static inline void flexio_dshot_set_tcmp(uint32_t channel)
+{
+	dshot_inst[channel].bdshot_tcmp = 0x2900 | (((BOARD_FLEXIO_PREQ / (dshot_speed * 5 / 4) / 2) +
+					  dshot_inst[channel].bdshot_tcmp_offset) & 0xFF);
+}
+
 static void flexio_dshot_output(uint32_t channel, uint32_t pin, uint32_t timcmp, bool inverted)
 {
 	/* Disable Shifter */
@@ -278,7 +298,7 @@ static int flexio_irq_handler(int irq, void *context, void *arg)
 						IMXRT_FLEXIO_TIMCFG0_OFFSET + channel * 0x4);

 				/* Enable on pin transition, resychronize through reset on rising edge */
-				flexio_putreg32(bdshot_tcmp, IMXRT_FLEXIO_TIMCMP0_OFFSET + channel * 0x4);
+				flexio_putreg32(dshot_inst[channel].bdshot_tcmp, IMXRT_FLEXIO_TIMCMP0_OFFSET + channel * 0x4);

 				/* Trigger on FXIO pin transition, Baud mode */
 				flexio_putreg32(FLEXIO_TIMCTL_TRGSEL(2 * timer_io_channels[channel].dshot.flexio_pin) |
@@ -305,7 +325,7 @@ int up_dshot_init(uint32_t channel_mask, unsigned dshot_pwm_freq, bool enable_bi
 {
 	/* Calculate dshot timings based on dshot_pwm_freq */
 	dshot_tcmp = 0x2F00 | (((BOARD_FLEXIO_PREQ / (dshot_pwm_freq * 3) / 2) - 1) & 0xFF);
-	bdshot_tcmp = 0x2900 | (((BOARD_FLEXIO_PREQ / (dshot_pwm_freq * 5 / 4) / 2) - 3) & 0xFF);
+	dshot_speed = dshot_pwm_freq;

 	/* Clock FlexIO peripheral */
 	imxrt_clockall_flexio1();
@@ -340,7 +360,16 @@ int up_dshot_init(uint32_t channel_mask, unsigned dshot_pwm_freq, bool enable_bi

 			imxrt_config_gpio(timer_io_channels[channel].dshot.pinmux | IOMUX_PULL_UP);

-			dshot_inst[channel].bdshot = enable_bidirectional_dshot;
+			if (enable_bidirectional_dshot) {
+				dshot_inst[channel].bdshot = true;
+				dshot_inst[channel].bdshot_training_mask = 0;
+				dshot_inst[channel].bdshot_tcmp_offset = BDSHOT_TCMP_MIN_OFFSET;
+				dshot_inst[channel].bdshot_training_done = false;
+				flexio_dshot_set_tcmp(channel);
+
+			} else {
+				dshot_inst[channel].bdshot = false;
+			}

 			flexio_dshot_output(channel, timer_io_channels[channel].dshot.flexio_pin, dshot_tcmp, dshot_inst[channel].bdshot);

@@ -357,6 +386,52 @@ int up_dshot_init(uint32_t channel_mask, unsigned dshot_pwm_freq, bool enable_bi
 	return channel_mask;
 }

+void up_bdshot_training(uint32_t channel, uint32_t value)
+{
+	dshot_channel_t *ch = &dshot_inst[channel];
+
+	if (value == BDSHOT_ZERO_RESPONSE) {
+		// Count successful responses
+		ch->bdshot_training_success++;
+
+	} else if ((value & 0x1) == 0) {
+		// Invalidate frame error immediately
+		ch->bdshot_training_count = BDSHOT_TRAINING_TRIES - 1;
+	}
+
+	// Keep count and check if a training round finished
+	ch->bdshot_training_count++;
+
+	if (ch->bdshot_training_count == BDSHOT_TRAINING_TRIES) {
+		if (ch->bdshot_training_success >= BDSHOT_TRAINING_SUCCESS) {
+			ch->bdshot_training_mask |=
+				(1 << BDSHOT_TCMP_TO_MASK(ch->bdshot_tcmp_offset));
+		}
+
+		ch->bdshot_training_count = 0;
+		ch->bdshot_training_success = 0;
+		ch->bdshot_tcmp_offset++;
+
+		if (ch->bdshot_tcmp_offset == BDSHOT_TCMP_MAX_OFFSET) {
+
+			if (ch->bdshot_training_mask == 0) {
+				// No candidates retry
+				ch->bdshot_tcmp_offset = BDSHOT_TCMP_MIN_OFFSET;
+
+			} else {
+				// Training done, use mask to find best offset
+				int low  = __builtin_ctz(ch->bdshot_training_mask);
+				int high = 31 - __builtin_clz(ch->bdshot_training_mask);
+				ch->bdshot_tcmp_offset = ((low + high) / 2) + BDSHOT_TCMP_MIN_OFFSET;
+				ch->bdshot_training_done = true;
+			}
+		}
+
+		// Update TCMP
+		flexio_dshot_set_tcmp(channel);
+	}
+}
+
 void up_bdshot_erpm(void)
 {
 	uint32_t value;
@@ -373,8 +448,12 @@ void up_bdshot_erpm(void)
 		if (bdshot_recv_mask & (1 << channel)) {
 			value = ~dshot_inst[channel].raw_response & 0xFFFFF;

-			/* if lowest significant isn't 1 we've got a framing error */
-			if (value & 0x1) {
+			// BDSHOT ESC hardware varies and timings differ between units.
+			// Run training to estimate the correct baudrate to lock onto.
+			if (!dshot_inst[channel].bdshot_training_done) {
+				up_bdshot_training(channel, value);
+
+			} else if (value & 0x1) { /* if lowest significant isn't 1 we've got a framing error */
 				/* Decode RLL */
 				value = (value ^ (value >> 1));

@@ -461,6 +540,8 @@ void up_bdshot_status(void)
 		if (dshot_inst[channel].init) {
 			PX4_INFO("Channel %i %s Last erpm %i value", channel, up_bdshot_channel_status(channel) ? "online" : "offline",
 				 dshot_inst[channel].erpm);
+			PX4_INFO("BDSHOT Training done: %s TCMP offset: %d", dshot_inst[channel].bdshot_training_done ? "YES" : "NO",
+				 dshot_inst[channel].bdshot_tcmp_offset);
 			PX4_INFO("CRC errors Frame error No response");
 			PX4_INFO("%10lu %11lu %11lu", dshot_inst[channel].crc_error_cnt, dshot_inst[channel].frame_error_cnt,
 				 dshot_inst[channel].no_response_cnt);
@@ -138,18 +138,33 @@
 	(FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \
 	 FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))

+#ifdef CONFIG_ARCH_FAMILY_IMXRT106x
+//!@brief Definitions for FlexSPI Serial Clock Frequency
+typedef enum _FlexSpiSerialClockFreq {
+	kFlexSpiSerialClk_30MHz  = 1,
+	kFlexSpiSerialClk_50MHz  = 2,
+	kFlexSpiSerialClk_60MHz  = 3,
+	kFlexSpiSerialClk_75MHz  = 4,
+	kFlexSpiSerialClk_80MHz  = 5,
+	kFlexSpiSerialClk_100MHz = 6,
+	kFlexSpiSerialClk_120MHz = 7,
+	kFlexSpiSerialClk_133MHz = 8,
+	kFlexSpiSerialClk_166MHz = 9,
+} flexspi_serial_clk_freq_t;
+#elif defined(CONFIG_ARCH_FAMILY_IMXRT117x)
 //!@brief Definitions for FlexSPI Serial Clock Frequency
 typedef enum _FlexSpiSerialClockFreq {
 	kFlexSpiSerialClk_30MHz  = 1,
 	kFlexSpiSerialClk_50MHz  = 2,
 	kFlexSpiSerialClk_60MHz  = 3,
 	kFlexSpiSerialClk_80MHz  = 4,
-	kFlexSpiSerialClk_100MHz  = 5,
+	kFlexSpiSerialClk_100MHz = 5,
 	kFlexSpiSerialClk_120MHz = 6,
 	kFlexSpiSerialClk_133MHz = 7,
 	kFlexSpiSerialClk_166MHz = 8,
 	kFlexSpiSerialClk_200MHz = 9,
 } flexspi_serial_clk_freq_t;
+#endif

 //!@brief FlexSPI clock configuration type
 enum {
@@ -239,7 +239,9 @@ status_t ROM_FLEXSPI_NorFlash_Erase(uint32_t instance, flexspi_nor_config_t *con
 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout
 */
+#ifdef CONFIG_ARCH_FAMILY_IMXRT117x
 status_t ROM_FLEXSPI_NorFlash_EraseSector(uint32_t instance, flexspi_nor_config_t *config, uint32_t start);
+#endif

 /*!
 * @brief Erase one block specified by address
@@ -259,7 +261,9 @@ status_t ROM_FLEXSPI_NorFlash_EraseSector(uint32_t instance, flexspi_nor_config_
 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout
 */
+#ifdef CONFIG_ARCH_FAMILY_IMXRT117x
 status_t ROM_FLEXSPI_NorFlash_EraseBlock(uint32_t instance, flexspi_nor_config_t *config, uint32_t start);
+#endif

 /*!
 * @brief Erase all the Serial NOR devices connected on FLEXSPI.
@@ -342,10 +346,12 @@ status_t ROM_FLEXSPI_NorFlash_UpdateLut(uint32_t instance,
 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout Device timeout.
 */
+#ifdef CONFIG_ARCH_FAMILY_IMXRT117x
 status_t ROM_FLEXSPI_NorFlash_WaitBusy(uint32_t instance,
 				       flexspi_nor_config_t *config,
 				       bool isParallelMode,
 				       uint32_t address);
+#endif
 /*@}*/

 /*!
@@ -52,8 +52,29 @@ typedef union _standard_version {
 #endif
 } standard_version_t;

+
+#ifdef CONFIG_ARCH_FAMILY_IMXRT106x
+
 /*!
- * @brief Interface for the ROM FLEXSPI NOR flash driver.
+ * @brief Interface for the IMXRT106X ROM FLEXSPI NOR flash driver.
+ */
+typedef struct {
+	uint32_t version;
+	status_t (*init)(uint32_t instance, flexspi_nor_config_t *config);
+	status_t (*page_program)(uint32_t instance, flexspi_nor_config_t *config, uint32_t dst_addr, const uint32_t *src);
+	status_t (*erase_all)(uint32_t instance, flexspi_nor_config_t *config);
+	status_t (*erase)(uint32_t instance, flexspi_nor_config_t *config, uint32_t start, uint32_t length);
+	status_t (*read)(uint32_t instance, flexspi_nor_config_t *config, uint32_t *dst, uint32_t start, uint32_t bytes);
+	void (*clear_cache)(uint32_t instance);
+	status_t (*xfer)(uint32_t instance, flexspi_xfer_t *xfer);
+	status_t (*update_lut)(uint32_t instance, uint32_t seqIndex, const uint32_t *lutBase, uint32_t numberOfSeq);
+	status_t (*get_config)(uint32_t instance, flexspi_nor_config_t *config,	serial_nor_config_option_t *option);
+} flexspi_nor_driver_interface_t;
+
+#elif defined(CONFIG_ARCH_FAMILY_IMXRT117x)
+
+/*!
+ * @brief Interface for the IMXRT117X ROM FLEXSPI NOR flash driver.
 */
 typedef struct {
 	uint32_t version;
@@ -73,6 +94,33 @@ typedef struct {
 	const uint32_t reserved1[2]; /*!< Reserved */
 } flexspi_nor_driver_interface_t;

+#endif
+
+
+#ifdef CONFIG_ARCH_FAMILY_IMXRT106x
+
+/*!
+* @brief Root of the bootloader api tree.
+*
+* An instance of this struct resides in read-only memory in the bootloader. It
+* provides a user application access to APIs exported by the bootloader.
+*
+* @note The order of existing fields must not be changed.
+*/
+typedef struct {
+	const uint32_t version; //!< Bootloader version	number
+	const char *copyright; //!< Bootloader Copyright
+	void (*runBootloader)(void *arg); //!< Function to start the bootloader executing
+	const uint32_t *reserved0; //!< Reserved
+	const flexspi_nor_driver_interface_t *flexSpiNorDriver; //!< FlexSPI NOR Flash API
+	const uint32_t *reserved1; //!< Reserved
+	const uint32_t *unused_rtwdogDriver;
+	const uint32_t *unused_wdogDriver;
+	const uint32_t *reserved2;
+} bootloader_api_entry_t;
+
+#elif defined(CONFIG_ARCH_FAMILY_IMXRT117x)
+
 /*!
 * @brief Root of the bootloader api tree.
 *
@@ -89,6 +137,8 @@ typedef struct {
 	const uint32_t reserved[8];                             /*!< Reserved */
 } bootloader_api_entry_t;

+#endif
+
 /*******************************************************************************
 * Variables
 ******************************************************************************/
@@ -104,13 +154,18 @@ static bootloader_api_entry_t *g_bootloaderTree = NULL;
 locate_code(".ramfunc")
 void ROM_API_Init(void)
 {
+#ifdef CONFIG_ARCH_FAMILY_IMXRT106x
+	g_bootloaderTree = ((bootloader_api_entry_t *) * (uint32_t *)0x0020001cU);
+#else

-	if ((getreg32(IMXRT_ANADIG_MISC_MISC_DIFPROG) & ANADIG_MISC_MISC_DIFPROG_CHIPID(0x10U)) != 0U) {
-		g_bootloaderTree = ((bootloader_api_entry_t *) * (uint32_t *)0x0021001cU);
+	if (getreg32(IMXRT_ANADIG_MISC_MISC_DIFPROG) == 0x001170A0U) {
+		g_bootloaderTree = ((bootloader_api_entry_t *) * (uint32_t *)0x0020001cU);

 	} else {
-		g_bootloaderTree = ((bootloader_api_entry_t *) * (uint32_t *)0x0020001cU);
+		g_bootloaderTree = ((bootloader_api_entry_t *) * (uint32_t *)0x0021001cU);
 	}
+
+#endif
 }

 /*!
@@ -193,6 +248,8 @@ status_t ROM_FLEXSPI_NorFlash_Erase(uint32_t instance, flexspi_nor_config_t *con
 	return g_bootloaderTree->flexSpiNorDriver->erase(instance, config, start, length);
 }

+#ifdef CONFIG_ARCH_FAMILY_IMXRT117x
+
 /*!
 * @brief Erase one sector specified by address.
 *
@@ -219,6 +276,8 @@ status_t ROM_FLEXSPI_NorFlash_EraseBlock(uint32_t instance, flexspi_nor_config_t
 	return g_bootloaderTree->flexSpiNorDriver->erase_block(instance, config, start);
 }

+#endif
+
 /*! @brief Erase all the Serial NOR devices connected on FLEXSPI. */
 locate_code(".ramfunc")
 status_t ROM_FLEXSPI_NorFlash_EraseAll(uint32_t instance, flexspi_nor_config_t *config)
@@ -242,23 +301,42 @@ status_t ROM_FLEXSPI_NorFlash_UpdateLut(uint32_t instance,
 	return g_bootloaderTree->flexSpiNorDriver->update_lut(instance, seqIndex, lutBase, seqNumber);
 }

+
+#ifdef CONFIG_ARCH_FAMILY_IMXRT106x
+
+/*! @brief Software reset for the FLEXSPI logic. */
+locate_code(".ramfunc")
+void ROM_FLEXSPI_NorFlash_ClearCache(uint32_t instance)
+{
+	g_bootloaderTree->flexSpiNorDriver->clear_cache(instance);
+}
+
+
+#elif defined(CONFIG_ARCH_FAMILY_IMXRT117x)
+
 /*! @brief Software reset for the FLEXSPI logic. */
 locate_code(".ramfunc")
 void ROM_FLEXSPI_NorFlash_ClearCache(uint32_t instance)
 {
 	uint32_t clearCacheFunctionAddress;

-	if ((getreg32(IMXRT_ANADIG_MISC_MISC_DIFPROG) & ANADIG_MISC_MISC_DIFPROG_CHIPID(0x10U)) != 0U) {
+	if (getreg32(IMXRT_ANADIG_MISC_MISC_DIFPROG) == 0x001170a0U) {
+		clearCacheFunctionAddress = 0x0020426bU;
+
+	} else if (getreg32(IMXRT_ANADIG_MISC_MISC_DIFPROG) == 0x001170b0U) {
 		clearCacheFunctionAddress = 0x0021a3b7U;

 	} else {
-		clearCacheFunctionAddress = 0x0020426bU;
+		clearCacheFunctionAddress = 0x0021a3bfU;
 	}

 	clearCacheCommand_t clearCacheCommand;
 	MISRA_CAST(clearCacheCommand_t, clearCacheCommand, uint32_t, clearCacheFunctionAddress);
 	(void)clearCacheCommand(instance);
 }
+#endif
+
+#ifdef CONFIG_ARCH_FAMILY_IMXRT117x

 /*! @brief Wait until device is idle*/
 locate_code(".ramfunc")
@@ -269,3 +347,5 @@ status_t ROM_FLEXSPI_NorFlash_WaitBusy(uint32_t instance,
 {
 	return g_bootloaderTree->flexSpiNorDriver->wait_busy(instance, config, isParallelMode, address);
 }
+
+#endif
@@ -90,7 +90,7 @@ int board_mcu_version(char *rev, const char **revstr, const char **errata)
 #define DIGPROG_MAJOR_UPPER_MASK      (0xff << DIGPROG_MAJOR_UPPER_SHIFT)
 #define DIGPROG_MAJOR_UPPER(info)     (((info) & DIGPROG_MAJOR_UPPER_MASK) >> DIGPROG_MAJOR_UPPER_SHIFT)
 //                            876543210
-#define CHIP_TAG     "i.MX RT10?2 r?.?"
+#define CHIP_TAG     "i.MX RT10?? r?.?"
 #define CHIP_TAG_LEN sizeof(CHIP_TAG)-1

 int board_mcu_version(char *rev, const char **revstr, const char **errata)
@@ -100,6 +100,7 @@ int board_mcu_version(char *rev, const char **revstr, const char **errata)

 	chip[CHIP_TAG_LEN - 1] = '0' +  DIGPROG_MINOR(info);
 	chip[CHIP_TAG_LEN - 3] = '1' + DIGPROG_MAJOR_LOWER(info);
+	chip[CHIP_TAG_LEN - 6] = getreg32(0x401F867C) == 0x10 ? '4' : '2';
 	chip[CHIP_TAG_LEN - 7] = DIGPROG_MAJOR_UPPER(info)  == 0x6a ? '5' : '6';
 	*revstr = chip;
 	*rev = '0' + DIGPROG_MINOR(info);
@@ -36,11 +36,13 @@ add_subdirectory(../imxrt/adc adc)
 add_subdirectory(../imxrt/board_critmon board_critmon)
 add_subdirectory(../imxrt/board_hw_info board_hw_info)
 add_subdirectory(../imxrt/board_reset board_reset)
+add_subdirectory(../imxrt/romapi romapi)
 add_subdirectory(../imxrt/dshot dshot)
 add_subdirectory(../imxrt/hrt hrt)
 add_subdirectory(../imxrt/led_pwm led_pwm)
 add_subdirectory(../imxrt/io_pins io_pins)
 add_subdirectory(../imxrt/tone_alarm tone_alarm)
 add_subdirectory(../imxrt/version version)
+add_subdirectory(../imxrt/spi spi)

 add_subdirectory(px4io_serial)
@@ -41,8 +41,8 @@
 #include <px4_platform_common/constexpr_util.h>

 #include <board_config.h>
-#ifndef CONFIG_ARCH_CHIP_MIMXRT1062DVL6A
-# error "This code has only been validated with IMXRT1062. Make sure it is correct before using it on another board."
+#if !defined(CONFIG_ARCH_CHIP_MIMXRT1062DVL6A) && !defined(CONFIG_ARCH_CHIP_MIMXRT1064DVL6A)
+# error "This code has only been validated with IMXRT1062 and IMXRT1064. Make sure it is correct before using it on another board."
 #endif

 /*
@@ -0,0 +1,36 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2024 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+#pragma once
+
+
+#include "../../../imxrt/include/px4_arch/imxrt_flexspi_nor_flash.h"
@@ -0,0 +1,36 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2024 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+#pragma once
+
+
+#include "../../../imxrt/include/px4_arch/imxrt_romapi.h"
@@ -47,8 +47,8 @@
 #include <hardware/imxrt_pinmux.h>

 #include <board_config.h>
-#ifndef CONFIG_ARCH_CHIP_MIMXRT1062DVL6A
-# error "This code has only been validated with IMXRT1062. Make sure it is correct before using it on another board."
+#if !defined(CONFIG_ARCH_CHIP_MIMXRT1062DVL6A) && !defined(CONFIG_ARCH_CHIP_MIMXRT1064DVL6A)
+# error "This code has only been validated with IMXRT1062 and IMXRT1064. Make sure it is correct before using it on another board."
 #endif


@@ -46,6 +46,58 @@

 #define GENERAL_OUTPUT_IOMUX (IOMUX_CMOS_OUTPUT | IOMUX_PULL_KEEP | IOMUX_DRIVE_33OHM  | IOMUX_SPEED_MEDIUM | IOMUX_SLEW_FAST)

+constexpr bool validateSPIConfig(const px4_spi_bus_t spi_busses_conf[SPI_BUS_MAX_BUS_ITEMS])
+{
+	const bool nuttx_enabled_spi_buses[] = {
+#ifdef CONFIG_IMXRT_LPSPI1
+		true,
+#else
+		false,
+#endif
+#ifdef CONFIG_IMXRT_LPSPI2
+		true,
+#else
+		false,
+#endif
+#ifdef CONFIG_IMXRT_LPSPI3
+		true,
+#else
+		false,
+#endif
+#ifdef CONFIG_IMXRT_LPSPI4
+		true,
+#else
+		false,
+#endif
+#ifdef CONFIG_IMXRT_LPSPI5
+		true,
+#else
+		false,
+#endif
+#ifdef CONFIG_IMXRT_LPSPI6
+		true,
+#else
+		false,
+#endif
+	};
+
+	for (unsigned i = 0; i < sizeof(nuttx_enabled_spi_buses) / sizeof(nuttx_enabled_spi_buses[0]); ++i) {
+		bool found_bus = false;
+
+		for (int j = 0; j < SPI_BUS_MAX_BUS_ITEMS; ++j) {
+			if (spi_busses_conf[j].bus == (int)i + 1) {
+				found_bus = true;
+			}
+		}
+
+		// Either the bus is enabled in NuttX and configured in spi_busses_conf, or disabled and not configured
+		constexpr_assert(found_bus == nuttx_enabled_spi_buses[i], "SPI bus config mismatch (CONFIG_STM32H7_SPIx)");
+	}
+
+	return false;
+}
+
+
 static inline constexpr px4_spi_bus_device_t initSPIDevice(uint32_t devid, SPI::CS cs_gpio, SPI::DRDY drdy_gpio = {})
 {
 	px4_spi_bus_device_t ret{};
@@ -138,8 +190,57 @@ static inline constexpr SPI::bus_device_external_cfg_t initSPIConfigExternal(SPI
 	return ret;
 }

-constexpr bool validateSPIConfig(const px4_spi_bus_t spi_busses_conf[SPI_BUS_MAX_BUS_ITEMS])
+
+struct px4_spi_bus_array_t {
+	px4_spi_bus_t item[SPI_BUS_MAX_BUS_ITEMS];
+};
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+static inline constexpr px4_spi_bus_all_hw_t initSPIFmumID(hw_fmun_id_t hw_fmun_id,
+		const px4_spi_bus_array_t &bus_items)
 {
-	return true;
+	px4_spi_bus_all_hw_t ret{};
+
+	for (int i = 0; i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
+		ret.buses[i] = bus_items.item[i];
+	}
+
+	ret.board_hw_fmun_id = hw_fmun_id;
+	return ret;
 }
+#else
+static inline constexpr px4_spi_bus_all_hw_t initSPIHWVersion(int hw_version_revision,
+		const px4_spi_bus_array_t &bus_items)
+{
+	px4_spi_bus_all_hw_t ret{};
+
+	for (int i = 0; i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
+		ret.buses[i] = bus_items.item[i];
+	}
+
+	ret.board_hw_version_revision = hw_version_revision;
+	return ret;
+}
+#endif
+constexpr bool validateSPIConfig(const px4_spi_bus_t spi_buses_conf[SPI_BUS_MAX_BUS_ITEMS]);
+
+constexpr bool validateSPIConfig(const px4_spi_bus_all_hw_t spi_buses_conf[BOARD_NUM_SPI_CFG_HW_VERSIONS])
+{
+	for (int ver = 0; ver < BOARD_NUM_SPI_CFG_HW_VERSIONS; ++ver) {
+		validateSPIConfig(spi_buses_conf[ver].buses);
+	}
+
+	for (int ver = 1; ver < BOARD_NUM_SPI_CFG_HW_VERSIONS; ++ver) {
+		for (int i = 0; i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
+			const bool equal_power_enable_gpio = spi_buses_conf[ver].buses[i].power_enable_gpio == spi_buses_conf[ver -
+							     1].buses[i].power_enable_gpio;
+			// currently board_control_spi_sensors_power_configgpio() depends on that - this restriction can be removed
+			// by ensuring board_control_spi_sensors_power_configgpio() is called after the hw version is determined
+			// and SPI config is initialized.
+			constexpr_assert(equal_power_enable_gpio, "All HW versions must define the same power enable GPIO");
+		}
+	}
+
+	return false;
+}
+
 #endif // CONFIG_SPI