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Add logic to control CAN bit rate via the .config file

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git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4266 7fd9a85b-ad96-42d3-883c-3090e2eb8679
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patacongo
2012-01-05 20:39:56 +00:00
parent f16e231491
commit 7de5004f47
3 changed files with 173 additions and 8 deletions
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nuttx/ChangeLog
+2
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@@ -2346,3 +2346,5 @@
(Contributed by Mike Smith)
* configs/stm3240g-eval/src: Add APIs support to support user access to the
LEDs
* arch/arm/src/lpc17xx/lpc17_can.c: Add logic to change the CAN bit rate based
on the NuttX configuration.
nuttx/arch/arm/src/lpc17xx/lpc17_can.c
+168 -5
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nuttx/arch/arm/src/lpc17xx/lpc17_lowputc.c
+3 -3
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@@ -1,8 +1,8 @@
/**************************************************************************
* arch/arm/src/lpc17xx/lpc17_lowputc.c
*
* Copyright (C) 2010-2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Copyright (C) 2010-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -130,7 +130,7 @@
#define CONSOLE_FCR_VALUE (UART_FCR_RXTRIGGER_8 | UART_FCR_TXRST |\
UART_FCR_RXRST | UART_FCR_FIFOEN)
/* Select a CCLK divider to produce the UART PCLK. The stratey is to select the
/* Select a CCLK divider to produce the UART PCLK. The strategy is to select the
* smallest divisor that results in an solution within range of the 16-bit
* DLM and DLL divisor:
*