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crazyflie: fix PWM channel ordering

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Channels belonging to a certain timer were not all grouped together.
This is required by the .first_channel_index and .last_channel_index data
members.

We introduce a new mixer geometry to solve the problem.
This commit is contained in:
Beat Küng
2020-01-13 10:57:31 +01:00
committed by David Sidrane
parent 17ab617877
commit 73bd90ddd5
6 changed files with 47 additions and 10 deletions
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boards/bitcraze/crazyflie/src/timer_config.c
+9 -9
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@@ -92,6 +92,15 @@ __EXPORT const timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
.ccr_offset = STM32_GTIM_CCR2_OFFSET,
.masks = GTIM_SR_CC2IF | GTIM_SR_CC2OF
},
{
// M2
.gpio_out = GPIO_TIM2_CH4OUT,
.gpio_in = GPIO_TIM2_CH4IN,
.timer_index = 0,
.timer_channel = 4,
.ccr_offset = STM32_GTIM_CCR4_OFFSET,
.masks = GTIM_SR_CC4IF | GTIM_SR_CC4OF
},
{
// M3
.gpio_out = GPIO_TIM2_CH1OUT,
@@ -110,13 +119,4 @@ __EXPORT const timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
.ccr_offset = STM32_GTIM_CCR4_OFFSET,
.masks = GTIM_SR_CC4IF | GTIM_SR_CC4OF
},
{
// M2
.gpio_out = GPIO_TIM2_CH4OUT,
.gpio_in = GPIO_TIM2_CH4IN,
.timer_index = 0,
.timer_channel = 4,
.ccr_offset = STM32_GTIM_CCR4_OFFSET,
.masks = GTIM_SR_CC4IF | GTIM_SR_CC4OF
},
};