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px4_fmu-v6x:Add support for DMA on SPI6

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This commit is contained in:
David Sidrane
2020-06-09 09:48:47 -07:00
committed by Daniel Agar
parent 768ed297f2
commit 72c681134d
4 changed files with 15 additions and 3 deletions
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boards/px4/fmu-v6x/nuttx-config/include/board_dma_map.h
+3
View File
@@ -46,3 +46,6 @@
// DMAMUX2 // DMAMUX2
#define DMAMAP_SPI3_RX DMAMAP_DMA12_SPI3RX_1 /* DMA2:61 */ #define DMAMAP_SPI3_RX DMAMAP_DMA12_SPI3RX_1 /* DMA2:61 */
#define DMAMAP_SPI3_TX DMAMAP_DMA12_SPI3TX_1 /* DMA2:62 */ #define DMAMAP_SPI3_TX DMAMAP_DMA12_SPI3TX_1 /* DMA2:62 */
#define DMAMAP_SPI6_RX DMAMAP_BDMA_SPI6_RX /* BDMA:11 */
#define DMAMAP_SPI6_TX DMAMAP_BDMA_SPI6_TX /* BDMA:12 */
boards/px4/fmu-v6x/nuttx-config/nsh/defconfig
+3
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@@ -179,6 +179,7 @@ CONFIG_STM32H7_ADC1=y
CONFIG_STM32H7_ADC3=y CONFIG_STM32H7_ADC3=y
CONFIG_STM32H7_BBSRAM=y CONFIG_STM32H7_BBSRAM=y
CONFIG_STM32H7_BBSRAM_FILES=5 CONFIG_STM32H7_BBSRAM_FILES=5
CONFIG_STM32H7_BDMA=y
CONFIG_STM32H7_BKPSRAM=y CONFIG_STM32H7_BKPSRAM=y
CONFIG_STM32H7_DMA1=y CONFIG_STM32H7_DMA1=y
CONFIG_STM32H7_DMA2=y CONFIG_STM32H7_DMA2=y
@@ -218,6 +219,8 @@ CONFIG_STM32H7_SPI3_DMA=y
CONFIG_STM32H7_SPI3_DMA_BUFFER=1024 CONFIG_STM32H7_SPI3_DMA_BUFFER=1024
CONFIG_STM32H7_SPI5=y CONFIG_STM32H7_SPI5=y
CONFIG_STM32H7_SPI6=y CONFIG_STM32H7_SPI6=y
CONFIG_STM32H7_SPI6_DMA=y
CONFIG_STM32H7_SPI6_DMA_BUFFER=1024
CONFIG_STM32H7_SPI_DMA=y CONFIG_STM32H7_SPI_DMA=y
CONFIG_STM32H7_SPI_DMATHRESHOLD=8 CONFIG_STM32H7_SPI_DMATHRESHOLD=8
CONFIG_STM32H7_TIM12=y CONFIG_STM32H7_TIM12=y
boards/px4/fmu-v6x/nuttx-config/scripts/script.ld
+6
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@@ -205,6 +205,12 @@ SECTIONS
_ebss = ABSOLUTE(.); _ebss = ABSOLUTE(.);
} > sram } > sram
/* Emit the the D3 power domain section for locating BDMA data */
.sram4 (NOLOAD) :
{
} > sram4
/* Stabs debugging sections. */ /* Stabs debugging sections. */
.stab 0 : { *(.stab) } .stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) } .stabstr 0 : { *(.stabstr) }
boards/px4/fmu-v6x/nuttx-config/stackcheck/defconfig
+3 -3
View File
@@ -31,7 +31,6 @@ CONFIG_ARCH_CHIP_STM32H743ZI=y
CONFIG_ARCH_CHIP_STM32H7=y CONFIG_ARCH_CHIP_STM32H7=y
CONFIG_ARCH_INTERRUPTSTACK=512 CONFIG_ARCH_INTERRUPTSTACK=512
CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_USE_MPU=y
CONFIG_ARMV7M_BASEPRI_WAR=y CONFIG_ARMV7M_BASEPRI_WAR=y
CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DTCM=y CONFIG_ARMV7M_DTCM=y
@@ -181,6 +180,7 @@ CONFIG_STM32H7_ADC1=y
CONFIG_STM32H7_ADC3=y CONFIG_STM32H7_ADC3=y
CONFIG_STM32H7_BBSRAM=y CONFIG_STM32H7_BBSRAM=y
CONFIG_STM32H7_BBSRAM_FILES=5 CONFIG_STM32H7_BBSRAM_FILES=5
CONFIG_STM32H7_BDMA=y
CONFIG_STM32H7_BKPSRAM=y CONFIG_STM32H7_BKPSRAM=y
CONFIG_STM32H7_DMA1=y CONFIG_STM32H7_DMA1=y
CONFIG_STM32H7_DMA2=y CONFIG_STM32H7_DMA2=y
@@ -197,7 +197,6 @@ CONFIG_STM32H7_I2C4=y
CONFIG_STM32H7_I2C_DYNTIMEO=y CONFIG_STM32H7_I2C_DYNTIMEO=y
CONFIG_STM32H7_I2C_DYNTIMEO_STARTSTOP=10 CONFIG_STM32H7_I2C_DYNTIMEO_STARTSTOP=10
CONFIG_STM32H7_OTGFS=y CONFIG_STM32H7_OTGFS=y
CONFIG_STM32H7_PHYADDR=0
CONFIG_STM32H7_PHYSR=31 CONFIG_STM32H7_PHYSR=31
CONFIG_STM32H7_PHYSR_100MBPS=0x8 CONFIG_STM32H7_PHYSR_100MBPS=0x8
CONFIG_STM32H7_PHYSR_FULLDUPLEX=0x10 CONFIG_STM32H7_PHYSR_FULLDUPLEX=0x10
@@ -221,6 +220,8 @@ CONFIG_STM32H7_SPI3_DMA=y
CONFIG_STM32H7_SPI3_DMA_BUFFER=1024 CONFIG_STM32H7_SPI3_DMA_BUFFER=1024
CONFIG_STM32H7_SPI5=y CONFIG_STM32H7_SPI5=y
CONFIG_STM32H7_SPI6=y CONFIG_STM32H7_SPI6=y
CONFIG_STM32H7_SPI6_DMA=y
CONFIG_STM32H7_SPI6_DMA_BUFFER=1024
CONFIG_STM32H7_SPI_DMA=y CONFIG_STM32H7_SPI_DMA=y
CONFIG_STM32H7_SPI_DMATHRESHOLD=8 CONFIG_STM32H7_SPI_DMATHRESHOLD=8
CONFIG_STM32H7_TIM12=y CONFIG_STM32H7_TIM12=y
@@ -243,7 +244,6 @@ CONFIG_SYSTEM_CDCACM=y
CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_PING=y CONFIG_SYSTEM_PING=y
CONFIG_TASK_NAME_SIZE=24 CONFIG_TASK_NAME_SIZE=24
CONFIG_TIME_EXTENDED=y
CONFIG_UART4_BAUD=57600 CONFIG_UART4_BAUD=57600
CONFIG_UART4_RXBUFSIZE=600 CONFIG_UART4_RXBUFSIZE=600
CONFIG_UART4_TXBUFSIZE=1500 CONFIG_UART4_TXBUFSIZE=1500