mirror of
https://github.com/PX4/PX4-Autopilot.git
synced 2026-06-05 14:17:20 +08:00
Hoist the GPIO driver out and integrate it with the px4fmu driver. Move these pieces into the drivers tree.
This commit is contained in:
px4dev
@@ -294,9 +294,6 @@ __EXPORT int nsh_archinitialize(void)
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/* Get board information if available */
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/* Initialize the user GPIOs */
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px4fmu_gpio_init();
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#ifdef CONFIG_ADC
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int adc_state = adc_devinit();
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@@ -47,6 +47,8 @@
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#include <nuttx/compiler.h>
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#include <stdint.h>
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#include "stm32_internal.h"
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/****************************************************************************************************
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* Definitions
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****************************************************************************************************/
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@@ -150,17 +152,4 @@
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extern void stm32_spiinitialize(void);
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/****************************************************************************************************
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* Name: px4fmu_gpio_init
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*
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* Description:
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* Called to configure the PX4FMU user GPIOs
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*
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****************************************************************************************************/
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extern void px4fmu_gpio_init(void);
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// XXX additional SPI chipselect functions required?
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#endif /* __ASSEMBLY__ */
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+66
-16
@@ -40,25 +40,75 @@
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#include <sys/ioctl.h>
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#ifdef CONFIG_ARCH_BOARD_PX4FMU
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/*
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* GPIO defines come from a board-specific header, as they are shared
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* with board-specific logic.
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* PX4FMU GPIO numbers.
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*
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* The board-specific header must define:
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* GPIO_DEVICE_PATH
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* GPIO_RESET
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* GPIO_SET_OUTPUT
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* GPIO_SET_INPUT
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* GPIO_SET_ALT_1
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* GPIO_SET_ALT_2
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* GPIO_SET_ALT_3
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* GPIO_SET_ALT_4
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* GPIO_SET
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* GPIO_CLEAR
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* GPIO_GET
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* For shared pins, alternate function 1 selects the non-GPIO mode
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* (USART2, CAN2, etc.)
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*/
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# define GPIO_EXT_1 (1<<0) /**< high-power GPIO 1 */
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# define GPIO_EXT_2 (1<<1) /**< high-power GPIO 1 */
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# define GPIO_MULTI_1 (1<<2) /**< USART2 CTS */
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# define GPIO_MULTI_2 (1<<3) /**< USART2 RTS */
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# define GPIO_MULTI_3 (1<<4) /**< USART2 TX */
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# define GPIO_MULTI_4 (1<<5) /**< USART2 RX */
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# define GPIO_CAN_TX (1<<6) /**< CAN2 TX */
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# define GPIO_CAN_RX (1<<7) /**< CAN2 RX */
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/* Include board-specific GPIO definitions as well. */
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#include <arch/board/drv_gpio.h>
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/**
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* Default GPIO device - other devices may also support this protocol if
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* they also export GPIO-like things. This is always the GPIOs on the
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* main board.
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*/
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# define GPIO_DEVICE_PATH "/dev/px4fmu"
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#endif
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#ifndef GPIO_DEVICE_PATH
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# error No GPIO support for this board.
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#endif
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/*
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* IOCTL definitions.
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*
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* For all ioctls, the (arg) argument is a bitmask of GPIOs to be affected
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* by the operation, with the LSB being the lowest-numbered GPIO.
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*
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* Note that there may be board-specific relationships between GPIOs;
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* applications using GPIOs should be aware of this.
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*/
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#define _GPIOCBASE 0x6700
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#define GPIOC(_x) _IOC(_GPIOCBASE, _x)
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/** reset all board GPIOs to their default state */
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#define GPIO_RESET GPIOC(0)
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/** configure the board GPIOs in (arg) as outputs */
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#define GPIO_SET_OUTPUT GPIOC(1)
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/** configure the board GPIOs in (arg) as inputs */
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#define GPIO_SET_INPUT GPIOC(2)
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/** configure the board GPIOs in (arg) for the first alternate function (if supported) */
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#define GPIO_SET_ALT_1 GPIOC(3)
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/** configure the board GPIO (arg) for the second alternate function (if supported) */
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#define GPIO_SET_ALT_2 GPIOC(4)
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/** configure the board GPIO (arg) for the third alternate function (if supported) */
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#define GPIO_SET_ALT_3 GPIOC(5)
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/** configure the board GPIO (arg) for the fourth alternate function (if supported) */
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#define GPIO_SET_ALT_4 GPIOC(6)
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/** set the GPIOs in (arg) */
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#define GPIO_SET GPIOC(10)
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/** clear the GPIOs in (arg) */
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#define GPIO_CLEAR GPIOC(11)
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/** read all the GPIOs and return their values in *(uint32_t *)arg */
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#define GPIO_GET GPIOC(12)
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#endif /* _DRV_GPIO_H */
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@@ -39,4 +39,6 @@ APPNAME = fmu
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PRIORITY = SCHED_PRIORITY_DEFAULT
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STACKSIZE = 2048
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INCLUDES = $(TOPDIR)/arch/arm/src/stm32 $(TOPDIR)/arch/arm/src/common
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include $(APPDIR)/mk/app.mk
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File diff suppressed because it is too large
Load Diff
@@ -1,107 +0,0 @@
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/****************************************************************************
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*
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* Copyright (C) 2012 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/**
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* @file GPIO driver interface.
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*
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* This header defines the basic interface to platform-specific GPIOs.
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*/
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#ifndef _BOARD_DRV_GPIO_H
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#define _BOARD_DRV_GPIO_H
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/*
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* PX4FMU GPIO numbers.
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*
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* For shared pins, alternate function 1 selects the non-GPIO mode
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* (USART2, CAN2, etc.)
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*/
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#define GPIO_EXT_1 (1<<0) /**< high-power GPIO 1 */
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#define GPIO_EXT_2 (1<<1) /**< high-power GPIO 1 */
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#define GPIO_MULTI_1 (1<<2) /**< USART2 CTS */
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#define GPIO_MULTI_2 (1<<3) /**< USART2 RTS */
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#define GPIO_MULTI_3 (1<<4) /**< USART2 TX */
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#define GPIO_MULTI_4 (1<<5) /**< USART2 RX */
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#define GPIO_CAN_TX (1<<6) /**< CAN2 TX */
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#define GPIO_CAN_RX (1<<7) /**< CAN2 RX */
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/**
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* Default GPIO device - other devices may also support this protocol if
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* they also export GPIO-like things. This is always the GPIOs on the
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* main board.
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*/
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#define GPIO_DEVICE_PATH "/dev/gpio"
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/*
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* IOCTL definitions.
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*
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* For all ioctls, the (arg) argument is a bitmask of GPIOs to be affected
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* by the operation, with the LSB being the lowest-numbered GPIO.
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*
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* Note that there may be board-specific relationships between GPIOs;
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* applications using GPIOs should be aware of this.
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*/
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#define _GPIOCBASE 0x6700
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#define GPIOC(_x) _IOC(_GPIOCBASE, _x)
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/** reset all board GPIOs to their default state */
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#define GPIO_RESET GPIOC(0)
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/** configure the board GPIOs in (arg) as outputs */
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#define GPIO_SET_OUTPUT GPIOC(1)
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/** configure the board GPIOs in (arg) as inputs */
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#define GPIO_SET_INPUT GPIOC(2)
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/** configure the board GPIOs in (arg) for the first alternate function (if supported) */
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#define GPIO_SET_ALT_1 GPIOC(3)
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/** configure the board GPIO (arg) for the second alternate function (if supported) */
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#define GPIO_SET_ALT_2 GPIOC(4)
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/** configure the board GPIO (arg) for the third alternate function (if supported) */
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#define GPIO_SET_ALT_3 GPIOC(5)
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/** configure the board GPIO (arg) for the fourth alternate function (if supported) */
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#define GPIO_SET_ALT_4 GPIOC(6)
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/** set the GPIOs in (arg) */
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#define GPIO_SET GPIOC(10)
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/** clear the GPIOs in (arg) */
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#define GPIO_CLEAR GPIOC(11)
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/** read all the GPIOs and return their values in *(uint32_t *)arg */
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#define GPIO_GET GPIOC(12)
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#endif /* _DRV_GPIO_H */
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@@ -95,7 +95,7 @@ CONFIGURED_APPS += drivers/l3gd20
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CONFIGURED_APPS += drivers/px4io
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CONFIGURED_APPS += drivers/stm32
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CONFIGURED_APPS += drivers/stm32/tone_alarm
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CONFIGURED_APPS += px4/fmu
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CONFIGURED_APPS += drivers/px4fmu
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# Testing stuff
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CONFIGURED_APPS += px4/sensors_bringup
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@@ -41,7 +41,6 @@ ASRCS =
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AOBJS = $(ASRCS:.S=$(OBJEXT))
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CSRCS = up_leds.c \
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drv_gpio.c \
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drv_led.c drv_eeprom.c
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COBJS = $(CSRCS:.c=$(OBJEXT))
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@@ -1,195 +0,0 @@
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/****************************************************************************
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*
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* Copyright (C) 2012 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/*
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* GPIO driver for PX4FMU.
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*
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*/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <debug.h>
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#include <errno.h>
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#include <nuttx/spi.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "chip.h"
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#include "stm32_internal.h"
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#include "px4fmu-internal.h"
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#include <arch/board/drv_gpio.h>
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static int px4fmu_gpio_ioctl(struct file *filep, int cmd, unsigned long arg);
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static const struct file_operations px4fmu_gpio_fops = {
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.ioctl = px4fmu_gpio_ioctl,
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};
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static struct {
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uint32_t input;
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uint32_t output;
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uint32_t alt;
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} gpio_tab[] = {
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{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0},
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{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0},
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{GPIO_GPIO2_INPUT, GPIO_GPIO2_OUTPUT, GPIO_USART2_CTS_1},
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{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, GPIO_USART2_RTS_1},
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{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, GPIO_USART2_TX_1},
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{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, GPIO_USART2_RX_1},
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{GPIO_GPIO6_INPUT, GPIO_GPIO6_OUTPUT, GPIO_CAN2_TX_2},
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{GPIO_GPIO7_INPUT, GPIO_GPIO7_OUTPUT, GPIO_CAN2_RX_2},
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};
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#define NGPIO (sizeof(gpio_tab) / sizeof(gpio_tab[0]))
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static void
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px4fmu_gpio_reset(void)
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{
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/*
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* Setup default GPIO config - all pins as GPIOs, GPIO driver chip
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* to input mode.
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*/
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for (unsigned i = 0; i < NGPIO; i++)
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stm32_configgpio(gpio_tab[i].input);
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stm32_gpiowrite(GPIO_GPIO_DIR, 0);
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stm32_configgpio(GPIO_GPIO_DIR);
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}
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static void
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px4fmu_gpio_set_function(uint32_t gpios, int function)
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{
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/*
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* GPIOs 0 and 1 must have the same direction as they are buffered
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* by a shared 2-port driver. Any attempt to set either sets both.
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*/
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if (gpios & 3) {
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gpios |= 3;
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/* flip the buffer to output mode if required */
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if (GPIO_SET_OUTPUT == function)
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stm32_gpiowrite(GPIO_GPIO_DIR, 1);
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}
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/* configure selected GPIOs as required */
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for (unsigned i = 0; i < NGPIO; i++) {
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if (gpios & (1<<i)) {
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switch (function) {
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case GPIO_SET_INPUT:
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stm32_configgpio(gpio_tab[i].input);
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break;
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case GPIO_SET_OUTPUT:
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stm32_configgpio(gpio_tab[i].output);
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break;
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case GPIO_SET_ALT_1:
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if (gpio_tab[i].alt != 0)
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stm32_configgpio(gpio_tab[i].alt);
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break;
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}
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}
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}
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/* flip buffer to input mode if required */
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if ((GPIO_SET_INPUT == function) && (gpios & 3))
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stm32_gpiowrite(GPIO_GPIO_DIR, 0);
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}
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static void
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px4fmu_gpio_write(uint32_t gpios, int function)
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{
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int value = (function == GPIO_SET) ? 1 : 0;
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for (unsigned i = 0; i < NGPIO; i++)
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if (gpios & (1<<i))
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stm32_gpiowrite(gpio_tab[i].output, value);
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}
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static uint32_t
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px4fmu_gpio_read(void)
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{
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uint32_t bits = 0;
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for (unsigned i = 0; i < NGPIO; i++)
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if (stm32_gpioread(gpio_tab[i].input))
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bits |= (1 << i);
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return bits;
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}
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void
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px4fmu_gpio_init(void)
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{
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/* reset all GPIOs to default state */
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px4fmu_gpio_reset();
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/* register the driver */
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register_driver(GPIO_DEVICE_PATH, &px4fmu_gpio_fops, 0666, NULL);
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}
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static int
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px4fmu_gpio_ioctl(struct file *filep, int cmd, unsigned long arg)
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{
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int result = OK;
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switch (cmd) {
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case GPIO_RESET:
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px4fmu_gpio_reset();
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break;
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case GPIO_SET_OUTPUT:
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case GPIO_SET_INPUT:
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case GPIO_SET_ALT_1:
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px4fmu_gpio_set_function(arg, cmd);
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break;
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case GPIO_SET:
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case GPIO_CLEAR:
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px4fmu_gpio_write(arg, cmd);
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break;
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case GPIO_GET:
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*(uint32_t *)arg = px4fmu_gpio_read();
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break;
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default:
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result = -ENOTTY;
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}
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return result;
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}
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