mirror of
https://github.com/PX4/PX4-Autopilot.git
synced 2026-06-07 01:04:19 +08:00
Tease the PWM driver out and fix some build issues after cleaning up behind the cpuload pieces.
This commit is contained in:
@@ -63,7 +63,6 @@
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#include "px4fmu_internal.h"
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#include "stm32_uart.h"
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#include <arch/board/up_cpuload.h>
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#include <arch/board/up_adc.h>
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#include <arch/board/board.h>
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#include <arch/board/drv_led.h>
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@@ -71,6 +70,8 @@
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#include <drivers/drv_hrt.h>
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#include <systemlib/cpuload.h>
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/****************************************************************************
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* Pre-Processor Definitions
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****************************************************************************/
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@@ -41,14 +41,15 @@
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* channel.
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*/
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#ifndef _DRV_PWM_OUTPUT_H
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#define _DRV_PWM_OUTPUT_H
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#pragma once
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#include <stdint.h>
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#include <sys/ioctl.h>
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#include "drv_orb_dev.h"
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__BEGIN_DECLS
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/**
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* Path for the default PWM output device.
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*
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@@ -109,4 +110,63 @@ ORB_DECLARE(output_pwm);
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#define PWM_SERVO_GET(_servo) _IOC(_PWM_SERVO_BASE, 0x40 + _servo)
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#endif /* _DRV_PWM_OUTPUT_H */
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/*
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* Low-level PWM output interface.
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*
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* This is the low-level API to the platform-specific PWM driver.
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*/
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/**
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* Intialise the PWM servo outputs using the specified configuration.
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*
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* @param channel_mask Bitmask of channels (LSB = channel 0) to enable.
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* This allows some of the channels to remain configured
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* as GPIOs or as another function.
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* @return OK on success.
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*/
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__EXPORT extern int up_pwm_servo_init(uint32_t channel_mask);
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/**
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* De-initialise the PWM servo outputs.
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*/
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__EXPORT extern void up_pwm_servo_deinit(void);
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/**
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* Arm or disarm servo outputs.
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*
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* When disarmed, servos output no pulse.
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*
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* @bug This function should, but does not, guarantee that any pulse
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* currently in progress is cleanly completed.
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*
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* @param armed If true, outputs are armed; if false they
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* are disarmed.
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*/
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__EXPORT extern void up_pwm_servo_arm(bool armed);
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/**
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* Set the servo update rate
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*
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* @param rate The update rate in Hz to set.
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* @return OK on success, -ERANGE if an unsupported update rate is set.
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*/
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__EXPORT extern int up_pwm_servo_set_rate(unsigned rate);
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/**
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* Set the current output value for a channel.
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*
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* @param channel The channel to set.
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* @param value The output pulse width in microseconds.
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*/
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__EXPORT extern int up_pwm_servo_set(unsigned channel, servo_position_t value);
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/**
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* Get the current output value for a channel.
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*
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* @param channel The channel to read.
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* @return The output pulse width in microseconds, or zero if
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* outputs are not armed or not configured.
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*/
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__EXPORT extern servo_position_t up_pwm_servo_get(unsigned channel);
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__END_DECLS
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@@ -0,0 +1,42 @@
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############################################################################
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#
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# Copyright (C) 2012 PX4 Development Team. All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name PX4 nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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#
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# STM32 driver support code
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#
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# Modules in this directory are compiled for all STM32 targets.
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#
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INCLUDES = $(TOPDIR)/arch/arm/src/stm32 $(TOPDIR)/arch/arm/src/common
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include $(APPDIR)/mk/app.mk
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@@ -0,0 +1,348 @@
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/****************************************************************************
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*
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* Copyright (C) 2012 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/*
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* @file drv_pwm_servo.c
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*
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* Servo driver supporting PWM servos connected to STM32 timer blocks.
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*
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* Works with any of the 'generic' or 'advanced' STM32 timers that
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* have output pins, does not require an interrupt.
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*/
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#include <nuttx/config.h>
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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#include <sys/types.h>
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#include <stdbool.h>
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#include <assert.h>
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#include <debug.h>
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#include <time.h>
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#include <queue.h>
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#include <errno.h>
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#include <string.h>
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#include <stdio.h>
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#include <arch/board/board.h>
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#include <drivers/drv_pwm_output.h>
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#include "chip.h"
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#include "up_internal.h"
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#include "up_arch.h"
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#include "stm32_internal.h"
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#include "stm32_gpio.h"
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#include "stm32_tim.h"
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/* configuration limits */
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#define PWM_SERVO_MAX_TIMERS 2
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#define PWM_SERVO_MAX_CHANNELS 8
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/* default rate (in Hz) of PWM updates */
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static uint32_t pwm_update_rate = 50;
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/*
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* Servo configuration for all of the pins that can be used as
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* PWM outputs on FMU.
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*/
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/* array of timers dedicated to PWM servo use */
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static const struct pwm_servo_timer {
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uint32_t base;
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uint32_t clock_register;
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uint32_t clock_bit;
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uint32_t clock_freq;
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} pwm_timers[] = {
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{
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.base = STM32_TIM2_BASE,
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.clock_register = STM32_RCC_APB1ENR,
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.clock_bit = RCC_APB1ENR_TIM2EN,
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.clock_freq = STM32_APB1_TIM2_CLKIN
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}
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};
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/* array of channels in logical order */
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static const struct pwm_servo_channel {
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uint32_t gpio;
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uint8_t timer_index;
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uint8_t timer_channel;
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servo_position_t default_value;
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} pwm_channels[] = {
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{
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.gpio = GPIO_TIM2_CH1OUT,
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.timer_index = 0,
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.timer_channel = 1,
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.default_value = 1000,
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},
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{
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.gpio = GPIO_TIM2_CH2OUT,
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.timer_index = 0,
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.timer_channel = 2,
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.default_value = 1000,
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},
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{
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.gpio = GPIO_TIM2_CH3OUT,
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.timer_index = 0,
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.timer_channel = 3,
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.default_value = 1000,
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},
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{
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.gpio = GPIO_TIM2_CH4OUT,
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.timer_index = 0,
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.timer_channel = 4,
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.default_value = 1000,
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}
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};
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#define REG(_tmr, _reg) (*(volatile uint32_t *)(pwm_timers[_tmr].base + _reg))
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#define rCR1(_tmr) REG(_tmr, STM32_GTIM_CR1_OFFSET)
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#define rCR2(_tmr) REG(_tmr, STM32_GTIM_CR2_OFFSET)
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#define rSMCR(_tmr) REG(_tmr, STM32_GTIM_SMCR_OFFSET)
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#define rDIER(_tmr) REG(_tmr, STM32_GTIM_DIER_OFFSET)
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#define rSR(_tmr) REG(_tmr, STM32_GTIM_SR_OFFSET)
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#define rEGR(_tmr) REG(_tmr, STM32_GTIM_EGR_OFFSET)
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#define rCCMR1(_tmr) REG(_tmr, STM32_GTIM_CCMR1_OFFSET)
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#define rCCMR2(_tmr) REG(_tmr, STM32_GTIM_CCMR2_OFFSET)
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#define rCCER(_tmr) REG(_tmr, STM32_GTIM_CCER_OFFSET)
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#define rCNT(_tmr) REG(_tmr, STM32_GTIM_CNT_OFFSET)
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#define rPSC(_tmr) REG(_tmr, STM32_GTIM_PSC_OFFSET)
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#define rARR(_tmr) REG(_tmr, STM32_GTIM_ARR_OFFSET)
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#define rCCR1(_tmr) REG(_tmr, STM32_GTIM_CCR1_OFFSET)
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#define rCCR2(_tmr) REG(_tmr, STM32_GTIM_CCR2_OFFSET)
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#define rCCR3(_tmr) REG(_tmr, STM32_GTIM_CCR3_OFFSET)
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#define rCCR4(_tmr) REG(_tmr, STM32_GTIM_CCR4_OFFSET)
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#define rDCR(_tmr) REG(_tmr, STM32_GTIM_DCR_OFFSET)
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#define rDMAR(_tmr) REG(_tmr, STM32_GTIM_DMAR_OFFSET)
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static void
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pwm_timer_init(unsigned timer)
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{
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/* enable the timer clock before we try to talk to it */
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modifyreg32(pwm_timers[timer].clock_register, 0, pwm_timers[timer].clock_bit);
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/* disable and configure the timer */
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rCR1(timer) = 0;
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rCR2(timer) = 0;
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rSMCR(timer) = 0;
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rDIER(timer) = 0;
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rCCER(timer) = 0;
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rCCMR1(timer) = 0;
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rCCMR2(timer) = 0;
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rCCER(timer) = 0;
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rDCR(timer) = 0;
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/* configure the timer to free-run at 1MHz */
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rPSC(timer) = (pwm_timers[timer].clock_freq / 1000000) - 1;
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/* and update at the desired rate */
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rARR(timer) = (1000000 / pwm_update_rate) - 1;
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/* generate an update event; reloads the counter and all registers */
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rEGR(timer) = GTIM_EGR_UG;
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/* note that the timer is left disabled - arming is performed separately */
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}
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static void
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pwm_timer_set_rate(unsigned timer, unsigned rate)
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{
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/* configure the timer to update at the desired rate */
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rARR(timer) = 1000000 / rate;
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/* generate an update event; reloads the counter and all registers */
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rEGR(timer) = GTIM_EGR_UG;
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}
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static void
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pwm_channel_init(unsigned channel)
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{
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unsigned timer = pwm_channels[channel].timer_index;
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/* configure the GPIO first */
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stm32_configgpio(pwm_channels[channel].gpio);
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/* configure the channel */
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switch (pwm_channels[channel].timer_channel) {
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case 1:
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rCCMR1(timer) |= (6 << 4);
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rCCR1(timer) = pwm_channels[channel].default_value;
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rCCER(timer) |= (1 << 0);
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break;
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case 2:
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rCCMR1(timer) |= (6 << 12);
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rCCR2(timer) = pwm_channels[channel].default_value;
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rCCER(timer) |= (1 << 4);
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break;
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case 3:
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rCCMR2(timer) |= (6 << 4);
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rCCR3(timer) = pwm_channels[channel].default_value;
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rCCER(timer) |= (1 << 8);
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break;
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case 4:
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rCCMR2(timer) |= (6 << 12);
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rCCR4(timer) = pwm_channels[channel].default_value;
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rCCER(timer) |= (1 << 12);
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break;
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}
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}
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int
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up_pwm_servo_set(unsigned channel, servo_position_t value)
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{
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if (channel >= PWM_SERVO_MAX_CHANNELS) {
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lldbg("pwm_channel_set: bogus channel %u\n", channel);
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return -1;
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}
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unsigned timer = pwm_channels[channel].timer_index;
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/* test timer for validity */
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if ((pwm_timers[timer].base == 0) ||
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(pwm_channels[channel].gpio == 0))
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return -1;
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/* configure the channel */
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if (value > 0)
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value--;
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switch (pwm_channels[channel].timer_channel) {
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case 1:
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rCCR1(timer) = value;
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break;
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case 2:
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rCCR2(timer) = value;
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break;
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case 3:
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rCCR3(timer) = value;
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break;
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case 4:
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rCCR4(timer) = value;
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break;
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default:
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return -1;
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}
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return 0;
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}
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servo_position_t
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up_pwm_servo_get(unsigned channel)
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{
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if (channel >= PWM_SERVO_MAX_CHANNELS) {
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lldbg("pwm_channel_get: bogus channel %u\n", channel);
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return 0;
|
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}
|
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|
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unsigned timer = pwm_channels[channel].timer_index;
|
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servo_position_t value = 0;
|
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|
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/* test timer for validity */
|
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if ((pwm_timers[timer].base == 0) ||
|
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(pwm_channels[channel].gpio == 0))
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return 0;
|
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|
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/* configure the channel */
|
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switch (pwm_channels[channel].timer_channel) {
|
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case 1:
|
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value = rCCR1(timer);
|
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break;
|
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case 2:
|
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value = rCCR2(timer);
|
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break;
|
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case 3:
|
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value = rCCR3(timer);
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break;
|
||||
case 4:
|
||||
value = rCCR4(timer);
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break;
|
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}
|
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return value;
|
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}
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|
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int
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up_pwm_servo_init(uint32_t channel_mask)
|
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{
|
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/* do basic timer initialisation first */
|
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for (unsigned i = 0; i < PWM_SERVO_MAX_TIMERS; i++) {
|
||||
if (pwm_timers[i].base != 0)
|
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pwm_timer_init(i);
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}
|
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|
||||
/* now init channels */
|
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for (unsigned i = 0; i < PWM_SERVO_MAX_CHANNELS; i++) {
|
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/* don't do init for disabled channels; this leaves the pin configs alone */
|
||||
if (((1<<i) & channel_mask) && (pwm_channels[i].gpio != 0))
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pwm_channel_init(i);
|
||||
}
|
||||
return OK;
|
||||
}
|
||||
|
||||
void
|
||||
up_pwm_servo_deinit(void)
|
||||
{
|
||||
/* disable the timers */
|
||||
up_pwm_servo_arm(false);
|
||||
}
|
||||
|
||||
int
|
||||
up_pwm_servo_set_rate(unsigned rate)
|
||||
{
|
||||
if ((rate < 50) || (rate > 400))
|
||||
return -ERANGE;
|
||||
|
||||
for (unsigned i = 0; i < PWM_SERVO_MAX_TIMERS; i++) {
|
||||
if (pwm_timers[i].base != 0)
|
||||
pwm_timer_set_rate(i, rate);
|
||||
}
|
||||
return OK;
|
||||
}
|
||||
|
||||
void
|
||||
up_pwm_servo_arm(bool armed)
|
||||
{
|
||||
/*
|
||||
* XXX this is inelgant and in particular will either jam outputs at whatever level
|
||||
* they happen to be at at the time the timers stop or generate runts.
|
||||
* The right thing is almost certainly to kill auto-reload on the timers so that
|
||||
* they just stop at the end of their count for disable, and to reset/restart them
|
||||
* for enable.
|
||||
*/
|
||||
|
||||
/* iterate timers and arm/disarm appropriately */
|
||||
for (unsigned i = 0; i < PWM_SERVO_MAX_TIMERS; i++) {
|
||||
if (pwm_timers[i].base != 0)
|
||||
rCR1(i) = armed ? GTIM_CR1_CEN : 0;
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user