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[Sponsored by Holybro] Support for Kakute H743-Wing (#24669)

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* hrt: Fix PPM input on channel 2

The CCMR1_PPM define for PPM input on channel 2 was incorrectly set to 2,
which was setting bits for channel 1 instead of channel 2. This prevented
PPM input from functioning properly on channel 2.

Changed CCMR1_PPM for channel 2 from 2 to (1 << 8), which correctly
configures the CC2S bits for input capture mode on TI2.

This fixes an issue noted in the existing code comment:
"FIXME! There is an interaction in the CCMR registers that prevents
using Chan 1 as the timer and chan 2 as the PPM"

Tested on STM32H743 with PPM input on PC7 (TIM8_CH2).

* rc_input: enable sharing serial and PPM pin

By setting RC_SERIAL_PORT_SHARED_PPM_PIN_GPIO_RX it is now possible to
use the same pin on the STM32 for PPM input as well as serial input.

* boards: Add support for Holybro KakuteH7-Wing
This commit is contained in:
Julian Oes
2025-05-05 10:44:11 +12:00
committed by GitHub
parent 2fece23c64
commit 3c39095271
31 changed files with 5998 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files
platforms/nuttx/src/px4/stm/stm32_common/hrt/hrt.c
+4 -6
View File
@@ -232,7 +232,6 @@
/*
* Specific registers and bits used by HRT sub-functions
*/
/* FIXME! There is an interaction in the CCMR registers that prevents using Chan 1 as the timer and chan 2 as the PPM*/
#if HRT_TIMER_CHANNEL == 1
# define rCCR_HRT rCCR1 /* compare register for HRT */
# define DIER_HRT GTIM_DIER_CC1IE /* interrupt enable for HRT */
@@ -306,13 +305,12 @@ int hrt_ioctl(unsigned int cmd, unsigned long arg);
# define GTIM_CCER_CC4NP 0
# define PPM_EDGE_FLIP
# endif
/* FIXME! There is an interaction in the CCMR registers that prevents using Chan 1 as the timer and chan 2 as the PPM*/
# if HRT_PPM_CHANNEL == 1
# define rCCR_PPM rCCR1 /* capture register for PPM */
# define DIER_PPM GTIM_DIER_CC1IE /* capture interrupt (non-DMA mode) */
# define SR_INT_PPM GTIM_SR_CC1IF /* capture interrupt (non-DMA mode) */
# define SR_OVF_PPM GTIM_SR_CC1OF /* capture overflow (non-DMA mode) */
# define CCMR1_PPM 1 /* not on TI1/TI2 */
# define CCMR1_PPM (1 << 0) /* not on TI1/TI2 */
# define CCMR2_PPM 0 /* on TI3, not on TI4 */
# define CCER_PPM (GTIM_CCER_CC1E | GTIM_CCER_CC1P | GTIM_CCER_CC1NP) /* CC1, both edges */
# define CCER_PPM_FLIP GTIM_CCER_CC1P
@@ -321,7 +319,7 @@ int hrt_ioctl(unsigned int cmd, unsigned long arg);
# define DIER_PPM GTIM_DIER_CC2IE /* capture interrupt (non-DMA mode) */
# define SR_INT_PPM GTIM_SR_CC2IF /* capture interrupt (non-DMA mode) */
# define SR_OVF_PPM GTIM_SR_CC2OF /* capture overflow (non-DMA mode) */
# define CCMR1_PPM 2 /* not on TI1/TI2 */
# define CCMR1_PPM (1 << 8) /* not on TI1/TI2 */
# define CCMR2_PPM 0 /* on TI3, not on TI4 */
# define CCER_PPM (GTIM_CCER_CC2E | GTIM_CCER_CC2P | GTIM_CCER_CC2NP) /* CC2, both edges */
# define CCER_PPM_FLIP GTIM_CCER_CC2P
@@ -331,7 +329,7 @@ int hrt_ioctl(unsigned int cmd, unsigned long arg);
# define SR_INT_PPM GTIM_SR_CC3IF /* capture interrupt (non-DMA mode) */
# define SR_OVF_PPM GTIM_SR_CC3OF /* capture overflow (non-DMA mode) */
# define CCMR1_PPM 0 /* not on TI1/TI2 */
# define CCMR2_PPM 1 /* on TI3, not on TI4 */
# define CCMR2_PPM (1 << 0) /* on TI3, not on TI4 */
# define CCER_PPM (GTIM_CCER_CC3E | GTIM_CCER_CC3P | GTIM_CCER_CC3NP) /* CC3, both edges */
# define CCER_PPM_FLIP GTIM_CCER_CC3P
# elif HRT_PPM_CHANNEL == 4
@@ -340,7 +338,7 @@ int hrt_ioctl(unsigned int cmd, unsigned long arg);
# define SR_INT_PPM GTIM_SR_CC4IF /* capture interrupt (non-DMA mode) */
# define SR_OVF_PPM GTIM_SR_CC4OF /* capture overflow (non-DMA mode) */
# define CCMR1_PPM 0 /* not on TI1/TI2 */
# define CCMR2_PPM 2 /* on TI3, not on TI4 */
# define CCMR2_PPM (1 << 8) /* on TI3, not on TI4 */
# define CCER_PPM (GTIM_CCER_CC4E | GTIM_CCER_CC4P | GTIM_CCER_CC4NP) /* CC4, both edges */
# define CCER_PPM_FLIP GTIM_CCER_CC4P
# else