mirror of
https://github.com/PX4/PX4-Autopilot.git
synced 2026-05-28 10:46:33 +08:00
mpu9250: accumulated minor improvements and cleanup
- perform reset as per the datasheet (disable I2C immediately, set power mode, wait for appropriate time, etc) - remove interrupt perf counter and instead only count misses - minor style changes to stay in sync with the other Invensense drivers
This commit is contained in:
@@ -35,9 +35,6 @@ px4_add_module(
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MODULE drivers__imu__invensense__mpu9250
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MODULE drivers__imu__invensense__mpu9250
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MAIN mpu9250
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MAIN mpu9250
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COMPILE_FLAGS
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COMPILE_FLAGS
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-O0
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-DDEBUG_BUILD
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-Wno-error
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SRCS
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SRCS
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AKM_AK8963_registers.hpp
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AKM_AK8963_registers.hpp
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InvenSense_MPU9250_registers.hpp
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InvenSense_MPU9250_registers.hpp
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@@ -213,12 +213,10 @@ enum PWR_MGMT_1_BIT : uint8_t {
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H_RESET = Bit7,
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H_RESET = Bit7,
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SLEEP = Bit6,
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SLEEP = Bit6,
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CLKSEL_2 = Bit2,
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// CLKSEL[2:0]
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CLKSEL_1 = Bit1,
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CLKSEL_0 = Bit0, // It is required that CLKSEL[2:0] be set to 001 to achieve full gyroscope performance.
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CLKSEL_0 = Bit0,
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};
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};
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namespace FIFO
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namespace FIFO
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{
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{
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static constexpr size_t SIZE = 512;
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static constexpr size_t SIZE = 512;
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@@ -51,7 +51,7 @@ MPU9250::MPU9250(I2CSPIBusOption bus_option, int bus, uint32_t device, enum Rota
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_px4_gyro(get_device_id(), ORB_PRIO_HIGH, rotation)
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_px4_gyro(get_device_id(), ORB_PRIO_HIGH, rotation)
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{
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{
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if (drdy_gpio != 0) {
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if (drdy_gpio != 0) {
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_drdy_interval_perf = perf_alloc(PC_INTERVAL, MODULE_NAME": DRDY interval");
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_drdy_missed_perf = perf_alloc(PC_COUNT, MODULE_NAME": DRDY missed");
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}
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}
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ConfigureSampleRate(_px4_gyro.get_max_rate_hz());
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ConfigureSampleRate(_px4_gyro.get_max_rate_hz());
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@@ -82,7 +82,7 @@ MPU9250::~MPU9250()
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perf_free(_fifo_empty_perf);
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perf_free(_fifo_empty_perf);
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perf_free(_fifo_overflow_perf);
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perf_free(_fifo_overflow_perf);
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perf_free(_fifo_reset_perf);
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perf_free(_fifo_reset_perf);
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perf_free(_drdy_interval_perf);
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perf_free(_drdy_missed_perf);
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delete _slave_ak8963_magnetometer;
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delete _slave_ak8963_magnetometer;
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}
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}
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@@ -118,14 +118,14 @@ void MPU9250::print_status()
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{
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{
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I2CSPIDriverBase::print_status();
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I2CSPIDriverBase::print_status();
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PX4_INFO("FIFO empty interval: %d us (%.3f Hz)", _fifo_empty_interval_us, 1e6 / _fifo_empty_interval_us);
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PX4_INFO("FIFO empty interval: %d us (%.1f Hz)", _fifo_empty_interval_us, 1e6 / _fifo_empty_interval_us);
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perf_print_counter(_bad_register_perf);
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perf_print_counter(_bad_register_perf);
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perf_print_counter(_bad_transfer_perf);
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perf_print_counter(_bad_transfer_perf);
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perf_print_counter(_fifo_empty_perf);
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perf_print_counter(_fifo_empty_perf);
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perf_print_counter(_fifo_overflow_perf);
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perf_print_counter(_fifo_overflow_perf);
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perf_print_counter(_fifo_reset_perf);
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perf_print_counter(_fifo_reset_perf);
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perf_print_counter(_drdy_interval_perf);
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perf_print_counter(_drdy_missed_perf);
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if (_slave_ak8963_magnetometer) {
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if (_slave_ak8963_magnetometer) {
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@@ -154,7 +154,7 @@ void MPU9250::RunImpl()
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// PWR_MGMT_1: Device Reset
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// PWR_MGMT_1: Device Reset
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RegisterWrite(Register::PWR_MGMT_1, PWR_MGMT_1_BIT::H_RESET);
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RegisterWrite(Register::PWR_MGMT_1, PWR_MGMT_1_BIT::H_RESET);
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_reset_timestamp = now;
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_reset_timestamp = now;
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_consecutive_failures = 0;
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_failure_count = 0;
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_state = STATE::WAIT_FOR_RESET;
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_state = STATE::WAIT_FOR_RESET;
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ScheduleDelayed(100_ms);
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ScheduleDelayed(100_ms);
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break;
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break;
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@@ -167,11 +167,11 @@ void MPU9250::RunImpl()
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&& (RegisterRead(Register::PWR_MGMT_1) == 0x01)) {
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&& (RegisterRead(Register::PWR_MGMT_1) == 0x01)) {
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// Wakeup and reset digital signal path
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// Wakeup and reset digital signal path
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RegisterWrite(Register::PWR_MGMT_1, 0);
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RegisterWrite(Register::PWR_MGMT_1, PWR_MGMT_1_BIT::CLKSEL_0);
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RegisterWrite(Register::SIGNAL_PATH_RESET,
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RegisterWrite(Register::SIGNAL_PATH_RESET,
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SIGNAL_PATH_RESET_BIT::GYRO_RESET | SIGNAL_PATH_RESET_BIT::ACCEL_RESET | SIGNAL_PATH_RESET_BIT::TEMP_RESET);
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SIGNAL_PATH_RESET_BIT::GYRO_RESET | SIGNAL_PATH_RESET_BIT::ACCEL_RESET | SIGNAL_PATH_RESET_BIT::TEMP_RESET);
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RegisterWrite(Register::USER_CTRL, USER_CTRL_BIT::I2C_MST_EN | USER_CTRL_BIT::I2C_IF_DIS | USER_CTRL_BIT::I2C_MST_RST |
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RegisterWrite(Register::USER_CTRL, USER_CTRL_BIT::I2C_MST_EN | USER_CTRL_BIT::SIG_COND_RST | USER_CTRL_BIT::I2C_IF_DIS |
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USER_CTRL_BIT::SIG_COND_RST);
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USER_CTRL_BIT::I2C_MST_RST);
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// if reset succeeded then configure
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// if reset succeeded then configure
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_state = STATE::CONFIGURE;
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_state = STATE::CONFIGURE;
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@@ -233,8 +233,8 @@ void MPU9250::RunImpl()
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case STATE::FIFO_READ: {
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case STATE::FIFO_READ: {
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if (_data_ready_interrupt_enabled) {
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if (_data_ready_interrupt_enabled) {
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// scheduled from interrupt if _drdy_fifo_read_samples was set
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// scheduled from interrupt if _drdy_fifo_read_samples was set
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if (_drdy_fifo_read_samples.fetch_and(0) == _fifo_gyro_samples) {
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if (_drdy_fifo_read_samples.fetch_and(0) != _fifo_gyro_samples) {
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perf_count_interval(_drdy_interval_perf, now);
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perf_count(_drdy_missed_perf);
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}
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}
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// push backup schedule back
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// push backup schedule back
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@@ -265,22 +265,25 @@ void MPU9250::RunImpl()
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} else if (samples >= 1) {
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} else if (samples >= 1) {
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if (FIFORead(now, samples)) {
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if (FIFORead(now, samples)) {
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success = true;
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success = true;
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_consecutive_failures = 0;
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if (_failure_count > 0) {
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_failure_count--;
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}
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}
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}
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}
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}
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}
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}
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if (!success) {
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if (!success) {
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_consecutive_failures++;
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_failure_count++;
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// full reset if things are failing consistently
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// full reset if things are failing consistently
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if (_consecutive_failures > 10) {
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if (_failure_count > 10) {
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Reset();
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Reset();
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return;
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return;
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}
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}
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}
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}
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if (!success || hrt_elapsed_time(&_last_config_check_timestamp) > 10_ms) {
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if (!success || hrt_elapsed_time(&_last_config_check_timestamp) > 100_ms) {
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// check configuration registers periodically or immediately following any failure
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// check configuration registers periodically or immediately following any failure
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if (RegisterCheck(_register_cfg[_checked_register])) {
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if (RegisterCheck(_register_cfg[_checked_register])) {
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_last_config_check_timestamp = now;
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_last_config_check_timestamp = now;
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@@ -406,12 +409,12 @@ int MPU9250::DataReadyInterruptCallback(int irq, void *context, void *arg)
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void MPU9250::DataReady()
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void MPU9250::DataReady()
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{
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{
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const uint8_t count = _drdy_count.fetch_add(1) + 1;
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uint32_t expected = 0;
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uint8_t expected = 0;
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// at least the required number of samples in the FIFO
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// at least the required number of samples in the FIFO
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if ((count >= _fifo_gyro_samples) && _drdy_fifo_read_samples.compare_exchange(&expected, _fifo_gyro_samples)) {
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if (((_drdy_count.fetch_add(1) + 1) >= _fifo_gyro_samples)
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&& _drdy_fifo_read_samples.compare_exchange(&expected, _fifo_gyro_samples)) {
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_drdy_count.store(0);
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_drdy_count.store(0);
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ScheduleNow();
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ScheduleNow();
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}
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}
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@@ -145,15 +145,15 @@ private:
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perf_counter_t _fifo_empty_perf{perf_alloc(PC_COUNT, MODULE_NAME": FIFO empty")};
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perf_counter_t _fifo_empty_perf{perf_alloc(PC_COUNT, MODULE_NAME": FIFO empty")};
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perf_counter_t _fifo_overflow_perf{perf_alloc(PC_COUNT, MODULE_NAME": FIFO overflow")};
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perf_counter_t _fifo_overflow_perf{perf_alloc(PC_COUNT, MODULE_NAME": FIFO overflow")};
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perf_counter_t _fifo_reset_perf{perf_alloc(PC_COUNT, MODULE_NAME": FIFO reset")};
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perf_counter_t _fifo_reset_perf{perf_alloc(PC_COUNT, MODULE_NAME": FIFO reset")};
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perf_counter_t _drdy_interval_perf{nullptr};
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perf_counter_t _drdy_missed_perf{nullptr};
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hrt_abstime _reset_timestamp{0};
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hrt_abstime _reset_timestamp{0};
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hrt_abstime _last_config_check_timestamp{0};
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hrt_abstime _last_config_check_timestamp{0};
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hrt_abstime _temperature_update_timestamp{0};
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hrt_abstime _temperature_update_timestamp{0};
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unsigned _consecutive_failures{0};
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int _failure_count{0};
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px4::atomic<uint8_t> _drdy_fifo_read_samples{0};
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px4::atomic<uint32_t> _drdy_fifo_read_samples{0};
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px4::atomic<uint8_t> _drdy_count{0};
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px4::atomic<uint32_t> _drdy_count{0};
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bool _data_ready_interrupt_enabled{false};
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bool _data_ready_interrupt_enabled{false};
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enum class STATE : uint8_t {
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enum class STATE : uint8_t {
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@@ -166,7 +166,7 @@ private:
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STATE _state{STATE::RESET};
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STATE _state{STATE::RESET};
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uint16_t _fifo_empty_interval_us{1250}; // default 1250 us / 800 Hz transfer interval
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uint16_t _fifo_empty_interval_us{1250}; // default 1250 us / 800 Hz transfer interval
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uint8_t _fifo_gyro_samples{static_cast<uint8_t>(_fifo_empty_interval_us / (1000000 / GYRO_RATE))};
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uint32_t _fifo_gyro_samples{static_cast<uint32_t>(_fifo_empty_interval_us / (1000000 / GYRO_RATE))};
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uint8_t _checked_register{0};
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uint8_t _checked_register{0};
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static constexpr uint8_t size_register_cfg{12};
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static constexpr uint8_t size_register_cfg{12};
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@@ -183,6 +183,6 @@ private:
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{ Register::INT_ENABLE, INT_ENABLE_BIT::RAW_RDY_EN, 0 },
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{ Register::INT_ENABLE, INT_ENABLE_BIT::RAW_RDY_EN, 0 },
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{ Register::I2C_MST_DELAY_CTRL, I2C_MST_DELAY_CTRL_BIT::I2C_SLVX_DLY_EN, 0 },
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{ Register::I2C_MST_DELAY_CTRL, I2C_MST_DELAY_CTRL_BIT::I2C_SLVX_DLY_EN, 0 },
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{ Register::USER_CTRL, USER_CTRL_BIT::FIFO_EN | USER_CTRL_BIT::I2C_MST_EN | USER_CTRL_BIT::I2C_IF_DIS, 0 },
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{ Register::USER_CTRL, USER_CTRL_BIT::FIFO_EN | USER_CTRL_BIT::I2C_MST_EN | USER_CTRL_BIT::I2C_IF_DIS, 0 },
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{ Register::PWR_MGMT_1, PWR_MGMT_1_BIT::CLKSEL_0, 0 },
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{ Register::PWR_MGMT_1, PWR_MGMT_1_BIT::CLKSEL_0, PWR_MGMT_1_BIT::SLEEP },
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};
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};
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};
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};
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@@ -86,7 +86,7 @@ void MPU9250_AK8963::Run()
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// CNTL2 SRST: Soft reset
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// CNTL2 SRST: Soft reset
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_mpu9250.I2CSlaveRegisterWrite(I2C_ADDRESS_DEFAULT, (uint8_t)Register::CNTL2, CNTL2_BIT::SRST);
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_mpu9250.I2CSlaveRegisterWrite(I2C_ADDRESS_DEFAULT, (uint8_t)Register::CNTL2, CNTL2_BIT::SRST);
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_reset_timestamp = hrt_absolute_time();
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_reset_timestamp = hrt_absolute_time();
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_consecutive_failures = 0;
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_failure_count = 0;
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_state = STATE::READ_WHO_AM_I;
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_state = STATE::READ_WHO_AM_I;
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ScheduleDelayed(100_ms);
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ScheduleDelayed(100_ms);
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break;
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break;
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@@ -190,7 +190,9 @@ void MPU9250_AK8963::Run()
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success = true;
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success = true;
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_consecutive_failures = 0;
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if (_failure_count > 0) {
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_failure_count--;
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}
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ScheduleDelayed(20_ms); // ~50 Hz
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ScheduleDelayed(20_ms); // ~50 Hz
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return;
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return;
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@@ -199,9 +201,9 @@ void MPU9250_AK8963::Run()
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if (!success) {
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if (!success) {
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perf_count(_bad_transfer_perf);
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perf_count(_bad_transfer_perf);
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_consecutive_failures++;
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_failure_count++;
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if (_consecutive_failures > 100) {
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if (_failure_count > 10) {
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Reset();
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Reset();
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return;
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return;
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}
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}
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@@ -93,7 +93,7 @@ private:
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hrt_abstime _reset_timestamp{0};
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hrt_abstime _reset_timestamp{0};
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hrt_abstime _last_config_check_timestamp{0};
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hrt_abstime _last_config_check_timestamp{0};
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unsigned _consecutive_failures{0};
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int _failure_count{0};
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bool _sensitivity_adjustments_loaded{false};
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bool _sensitivity_adjustments_loaded{false};
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float _sensitivity[3] {1.f, 1.f, 1.f};
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float _sensitivity[3] {1.f, 1.f, 1.f};
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