MR-CANHUBK344 NXP B3RB Rover support (#23897)

* s32k3xx: EMIOS allow independent frequencies for each channel

* mr-canhubk3: update config

* mr-canhubk344: Fix adap board detect

* mr-canhubk344: Use LPSPI1 (Port P1A) for SD card

* airframes: Add B3RB Ackermann rover config

See https://nxp.gitbook.io/mr-b3rb for more information about the NXP
B3RB platform. PX4 Support basic control for now

platforms/nuttx/src/px4/nxp/s32k3xx/include/px4_arch/hw_description.h

@@ -46,10 +46,34 @@
 
 namespace Timer
 {
+
+
+// Just to keep def extract_timer(line): happy
 enum Timer {
-	EMIOS0 = 0,
-	EMIOS1,
-	EMIOS2,
+	EMIOS0_Channel0,
+	EMIOS0_Channel1,
+	EMIOS0_Channel2,
+	EMIOS0_Channel3,
+	EMIOS0_Channel4,
+	EMIOS0_Channel5,
+	EMIOS0_Channel6,
+	EMIOS0_Channel7,
+	EMIOS1_Channel0,
+	EMIOS1_Channel1,
+	EMIOS1_Channel2,
+	EMIOS1_Channel3,
+	EMIOS1_Channel4,
+	EMIOS1_Channel5,
+	EMIOS1_Channel6,
+	EMIOS1_Channel7,
+	EMIOS2_Channel0,
+	EMIOS2_Channel1,
+	EMIOS2_Channel2,
+	EMIOS2_Channel3,
+	EMIOS2_Channel4,
+	EMIOS2_Channel5,
+	EMIOS2_Channel6,
+	EMIOS2_Channel7,
 };
 enum Channel {
 	Channel0 = 0,
@@ -70,11 +94,37 @@ struct TimerChannel {
 static inline constexpr uint32_t timerBaseRegister(Timer::Timer timer)
 {
 	switch (timer) {
-	case Timer::EMIOS0: return S32K3XX_EMIOS0_BASE;
+	case Timer::EMIOS0_Channel0:
+	case Timer::EMIOS0_Channel1:
+	case Timer::EMIOS0_Channel2:
+	case Timer::EMIOS0_Channel3:
+	case Timer::EMIOS0_Channel4:
+	case Timer::EMIOS0_Channel5:
+	case Timer::EMIOS0_Channel6:
+	case Timer::EMIOS0_Channel7:
+		return S32K3XX_EMIOS0_BASE;
 
-	case Timer::EMIOS1: return S32K3XX_EMIOS1_BASE;
 
-	case Timer::EMIOS2: return S32K3XX_EMIOS2_BASE;
+
+	case Timer::EMIOS1_Channel0:
+	case Timer::EMIOS1_Channel1:
+	case Timer::EMIOS1_Channel2:
+	case Timer::EMIOS1_Channel3:
+	case Timer::EMIOS1_Channel4:
+	case Timer::EMIOS1_Channel5:
+	case Timer::EMIOS1_Channel6:
+	case Timer::EMIOS1_Channel7:
+		return S32K3XX_EMIOS1_BASE;
+
+	case Timer::EMIOS2_Channel0:
+	case Timer::EMIOS2_Channel1:
+	case Timer::EMIOS2_Channel2:
+	case Timer::EMIOS2_Channel3:
+	case Timer::EMIOS2_Channel4:
+	case Timer::EMIOS2_Channel5:
+	case Timer::EMIOS2_Channel6:
+	case Timer::EMIOS2_Channel7:
+		return S32K3XX_EMIOS2_BASE;
 	}
 
 	return 0;

platforms/nuttx/src/px4/nxp/s32k3xx/include/px4_arch/io_timer.h

@@ -45,7 +45,7 @@
 #pragma once
 __BEGIN_DECLS
 /* configuration limits */
-#define MAX_IO_TIMERS			1
+#define MAX_IO_TIMERS			8
 #define MAX_TIMER_IO_CHANNELS		8
 
 #define MAX_LED_TIMERS			2
@@ -88,6 +88,7 @@ typedef struct io_timers_t {
 	uint32_t	vectorno_12_15;      /* IRQ number */
 	uint32_t	vectorno_16_19;      /* IRQ number */
 	uint32_t	vectorno_20_23;      /* IRQ number */
+	uint32_t        channel;
 } io_timers_t;
 
 typedef struct io_timers_channel_mapping_element_t {

platforms/nuttx/src/px4/nxp/s32k3xx/include/px4_arch/io_timer_hw_description.h

@@ -55,15 +55,7 @@ static inline constexpr timer_io_channels_t initIOTimerChannel(const io_timers_t
 	ret.timer_channel = (int)timer.channel + 1;
 
 	// find timer index
-	ret.timer_index = 0xff;
-	const uint32_t timer_base = timerBaseRegister(timer.timer);
-
-	for (int i = 0; i < MAX_IO_TIMERS; ++i) {
-		if (io_timers_conf[i].base == timer_base) {
-			ret.timer_index = i;
-			break;
-		}
-	}
+	ret.timer_index = timer.channel;
 
 	constexpr_assert(ret.timer_index != 0xff, "Timer not found");
 
@@ -80,13 +72,20 @@ static inline constexpr timer_io_channels_t initIOTimerChannel(const io_timers_t
  * Ch20 - Ch23 = vectorno - 5
  */
 
-static inline constexpr io_timers_t initIOTimer(Timer::Timer timer)
+static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, Timer::Channel channel)
 {
 	bool nuttx_config_timer_enabled = false;
 	io_timers_t ret{};
 
 	switch (timer) {
-	case Timer::EMIOS0:
+	case Timer::EMIOS0_Channel0:
+	case Timer::EMIOS0_Channel1:
+	case Timer::EMIOS0_Channel2:
+	case Timer::EMIOS0_Channel3:
+	case Timer::EMIOS0_Channel4:
+	case Timer::EMIOS0_Channel5:
+	case Timer::EMIOS0_Channel6:
+	case Timer::EMIOS0_Channel7:
 		ret.base = S32K3XX_EMIOS0_BASE;
 		ret.clock_register = 0;
 		ret.clock_bit = 0;
@@ -96,12 +95,20 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer)
 		ret.vectorno_12_15 = S32K3XX_IRQ_EMIOS0_12_15;
 		ret.vectorno_16_19 = S32K3XX_IRQ_EMIOS0_16_19;
 		ret.vectorno_20_23 = S32K3XX_IRQ_EMIOS0_20_23;
+		ret.channel = channel;
 #ifdef CONFIG_S32K3XX_EMIOS0
 		nuttx_config_timer_enabled = true;
 #endif
 		break;
 
-	case Timer::EMIOS1:
+	case Timer::EMIOS1_Channel0:
+	case Timer::EMIOS1_Channel1:
+	case Timer::EMIOS1_Channel2:
+	case Timer::EMIOS1_Channel3:
+	case Timer::EMIOS1_Channel4:
+	case Timer::EMIOS1_Channel5:
+	case Timer::EMIOS1_Channel6:
+	case Timer::EMIOS1_Channel7:
 		ret.base = S32K3XX_EMIOS1_BASE;
 		ret.clock_register = 0;
 		ret.clock_bit = 0;
@@ -116,7 +123,15 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer)
 #endif
 		break;
 
-	case Timer::EMIOS2:
+
+	case Timer::EMIOS2_Channel0:
+	case Timer::EMIOS2_Channel1:
+	case Timer::EMIOS2_Channel2:
+	case Timer::EMIOS2_Channel3:
+	case Timer::EMIOS2_Channel4:
+	case Timer::EMIOS2_Channel5:
+	case Timer::EMIOS2_Channel6:
+	case Timer::EMIOS2_Channel7:
 		ret.base = S32K3XX_EMIOS2_BASE;
 		ret.clock_register = 0;
 		ret.clock_bit = 0;

platforms/nuttx/src/px4/nxp/s32k3xx/io_pins/io_timer.c

@@ -868,6 +868,11 @@ int io_timer_set_ccr(unsigned channel, uint16_t value)
 
 		} else {
 			//FIXME why multiple by 2
+
+			if ((rC(channels_timer(channel), channel) & EMIOS_C_UCPRE_MASK) == 0) {
+				value = value * 4;
+			}
+
 			/* configure the channel */
 			irqstate_t flags = px4_enter_critical_section();
 			rA(channels_timer(channel), timer_io_channels[channel].timer_channel - 1) = EMIOS_A(value * 2);

platforms/nuttx/src/px4/nxp/s32k3xx/io_pins/pwm_servo.c

@@ -128,13 +128,13 @@ int up_pwm_servo_set_rate_group_update(unsigned channel, unsigned rate)
 
 	if (rate != 0) {
 
-		/* limit update rate to 1..10000Hz; somewhat arbitrary but safe */
+		/* limit update rate to 1..20000Hz; somewhat arbitrary but safe */
 
 		if (rate < 1) {
 			return -ERANGE;
 		}
 
-		if (rate > 10000) {
+		if (rate > 20000) {
 			return -ERANGE;
 		}
 	}