bake patch: disable IRQ for DMA2_Stream0

This commit is contained in:
Oskar Weigl
2018-10-24 19:56:36 -07:00
parent 1ccf17b36a
commit fe06800587
2 changed files with 4 additions and 35 deletions
@@ -1,33 +0,0 @@
From ab5ca860b3729d76a9c43c485776147ab69d2342 Mon Sep 17 00:00:00 2001
From: Samuel Sadok <samuel.sadok@bluewin.ch>
Date: Mon, 26 Mar 2018 19:02:45 -0700
Subject: [PATCH] disable IRQ for DMA2_Stream0
This DMA stream is used to read values from ADC1
while ADC1 cycles through it's sequence of input
channels. No interrupts are required to make
this work.
---
Firmware/Board/v3/Src/dma.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Firmware/Board/v3/Src/dma.c b/Firmware/Board/v3/Src/dma.c
index 55d5e03..3de873a 100644
--- a/Firmware/Board/v3/Src/dma.c
+++ b/Firmware/Board/v3/Src/dma.c
@@ -78,8 +78,10 @@ void MX_DMA_Init(void)
HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
/* DMA2_Stream0_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0);
- HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
+ // Dear STM, no we _don't_ want to fire an interrupt for this DMA
+ // (it's not possible to deselect this in CubeMX)
+ //HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0);
+ //HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
}
--
2.16.2
+4 -2
View File
@@ -78,8 +78,10 @@ void MX_DMA_Init(void)
HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
/* DMA2_Stream0_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
// Dear STM, no we _don't_ want to fire an interrupt for this DMA
// (it's not possible to deselect this in CubeMX)
//HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0);
//HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
}