Merge branch 'devel' into sam_dfu

This commit is contained in:
Oskar Weigl
2018-03-04 02:58:40 -08:00
176 changed files with 1749 additions and 499 deletions
+18 -15
View File
@@ -8,21 +8,21 @@ __pycache__/
# Distribution / packaging
.Python
env/
build/
develop-eggs/
dist/
downloads/
eggs/
.eggs/
lib/
lib64/
parts/
sdist/
var/
*.egg-info/
.installed.cfg
*.egg
#env/
#build/
#develop-eggs/
#dist/
#downloads/
#eggs/
#.eggs/
#lib/
#lib64/
#parts/
#sdist/
#var/
#*.egg-info/
#.installed.cfg
#*.egg
# PyInstaller
# Usually these files are written by a python script from a template
@@ -60,3 +60,6 @@ target/
#Ipython Notebook
.ipynb_checkpoints
# Tup
.tup
+31
View File
@@ -0,0 +1,31 @@
# adapted from https://github.com/andysworkshop/stm32plus/blob/master/.travis.yml
language: c
sudo: false
addons:
apt:
packages:
libc6-i386
cache:
directories:
- $HOME/dl
install:
- export GCC_DIR=$HOME/dl/gcc-arm-none-eabi-5_2-2015q4
- export GCC_ARCHIVE=$HOME/dl/gcc-arm-none-eabi-5_2-2015q4-20151219-linux.tar.bz2
- export GCC_URL=https://launchpad.net/gcc-arm-embedded/5.0/5-2015-q4-major/+download/gcc-arm-none-eabi-5_2-2015q4-20151219-linux.tar.bz2
- if [ ! -e $GCC_DIR/bin/arm-none-eabi-gcc ]; then wget $GCC_URL -O $GCC_ARCHIVE; tar xfj $GCC_ARCHIVE -C $HOME/dl; fi
- export PATH=$PATH:$GCC_DIR/bin
- export TUP_DIR=$HOME/dl/tup_0.7.2.12+ga582fee_amd64
- export TUP_ARCHIVE=$HOME/dl/tup_0.7.2.12+ga582fee_amd64.deb
- export TUP_URL=http://ppa.launchpad.net/anatol/tup/ubuntu/pool/main/t/tup/tup_0.7.2.12+ga582fee_amd64.deb
- if [ ! -e $TUP_DIR/bin/tup ]; then wget $TUP_URL -O $TUP_ARCHIVE; dpkg-deb -R $TUP_ARCHIVE $TUP_DIR; fi
- export PATH=$PATH:$TUP_DIR/usr/bin
script:
- cd Firmware
- mkdir -p build
- tup generate ./build.sh
- bash -xe ./build.sh
+95 -117
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@@ -4,136 +4,114 @@
"name": "Win32",
"includePath": [
"${workspaceRoot}",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/include",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS",
"${workspaceRoot}/Drivers/DRV8301",
"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Core/Inc",
"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc",
"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc",
"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy",
"${workspaceRoot}/Drivers/CMSIS/Device/ST/STM32F4xx/Include",
"${workspaceRoot}/Drivers/CMSIS/Include",
"${workspaceRoot}/Inc",
"${workspaceRoot}/MotorControl",
"C:/Program Files (x86)/GNU Tools ARM Embedded/6 2017-q1-update/arm-none-eabi/include/c++/6.3.1",
"C:/Program Files (x86)/GNU Tools ARM Embedded/6 2017-q1-update/arm-none-eabi/include/c++/6.3.1/arm-none-eabi",
"C:/Program Files (x86)/GNU Tools ARM Embedded/6 2017-q1-update/lib/gcc/arm-none-eabi/6.3.1/include",
"C:/Program Files (x86)/GNU Tools ARM Embedded/6 2017-q1-update/arm-none-eabi/include"
"${workspaceRoot}/Board/v3.3/Inc",
"${workspaceRoot}/Board/v3.3/Drivers/CMSIS/Include",
"${workspaceRoot}/Board/v3.3/Drivers/CMSIS/Device/ST/STM32F4xx/Include",
"${workspaceRoot}/Board/v3.3/Drivers/DRV8301",
"${workspaceRoot}/Board/v3.3/Drivers/STM32F4xx_HAL_Driver/Inc",
"${workspaceRoot}/Board/v3.3/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy",
"${workspaceRoot}/Board/v3.3/Middlewares/ST/STM32_USB_Device_Library/Core/Inc",
"${workspaceRoot}/Board/v3.3/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc",
"${workspaceRoot}/Board/v3.3/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS",
"${workspaceRoot}/Board/v3.3/Middlewares/Third_Party/FreeRTOS/Source/include",
"${workspaceRoot}/Board/v3.3/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F",
"c:/program files (x86)/gnu tools arm embedded/6 2017-q1-update/arm-none-eabi/include/c++/6.3.1",
"c:/program files (x86)/gnu tools arm embedded/6 2017-q1-update/arm-none-eabi/include/c++/6.3.1/arm-none-eabi",
"c:/program files (x86)/gnu tools arm embedded/6 2017-q1-update/arm-none-eabi/include/c++/6.3.1/backward",
"c:/program files (x86)/gnu tools arm embedded/6 2017-q1-update/lib/gcc/arm-none-eabi/6.3.1/include",
"c:/program files (x86)/gnu tools arm embedded/6 2017-q1-update/lib/gcc/arm-none-eabi/6.3.1/include-fixed",
"c:/program files (x86)/gnu tools arm embedded/6 2017-q1-update/arm-none-eabi/include"
],
"defines": [
"_DEBUG",
"UNICODE"
"STM32F405xx",
"USE_HAL_DRIVER",
"__weak=\"__attribute__((weak))\"",
"__packed=\"__attribute__((__packed__))\"",
"__GNUC__"
],
"intelliSenseMode": "clang-x64",
"browse": {
"path": [
"${workspaceRoot}",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/include",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS",
"${workspaceRoot}/Drivers/DRV8301",
"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Core/Inc",
"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc",
"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc",
"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy",
"${workspaceRoot}/Drivers/CMSIS/Device/ST/STM32F4xx/Include",
"${workspaceRoot}/Drivers/CMSIS/Include",
"${workspaceRoot}/Inc",
"${workspaceRoot}/MotorControl"
"C:/Program Files (x86)/GNU Tools ARM Embedded"
],
"limitSymbolsToIncludedHeaders": true,
"databaseFilename": ""
"limitSymbolsToIncludedHeaders": true
}
},
{
"name": "Linux",
"includePath": [
"${workspaceRoot}",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/include",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS",
"${workspaceRoot}/Drivers/DRV8301",
"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Core/Inc",
"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc",
"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc",
"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy",
"${workspaceRoot}/Drivers/CMSIS/Device/ST/STM32F4xx/Include",
"${workspaceRoot}/Drivers/CMSIS/Include",
"${workspaceRoot}/Inc",
"${workspaceRoot}/MotorControl",
"/usr/lib/gcc/arm-none-eabi/4.9.3/include",
"/usr/lib/arm-none-eabi/include"
],
"defines": [
"_DEBUG",
"UNICODE"
],
"intelliSenseMode": "clang-x64",
"browse": {
"path": [
{
"name": "Linux",
"includePath": [
"${workspaceRoot}",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/include",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS",
"${workspaceRoot}/Drivers/DRV8301",
"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Core/Inc",
"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc",
"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc",
"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy",
"${workspaceRoot}/Drivers/CMSIS/Device/ST/STM32F4xx/Include",
"${workspaceRoot}/Drivers/CMSIS/Include",
"${workspaceRoot}/Inc",
"${workspaceRoot}/MotorControl",
"/usr/lib/gcc/arm-none-eabi/4.9.3/include",
"/usr/lib/arm-none-eabi/include"
],
"defines": [
"STM32F405xx",
"USE_HAL_DRIVER",
"__weak=\"__attribute__((weak))\"",
"__packed=\"__attribute__((__packed__))\"",
"__GNUC__"
],
"intelliSenseMode": "clang-x64",
"browse": {
"path": [
"${workspaceRoot}",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/include",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS",
"${workspaceRoot}/Drivers/DRV8301",
"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Core/Inc",
"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc",
"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc",
"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy",
"${workspaceRoot}/Drivers/CMSIS/Device/ST/STM32F4xx/Include",
"${workspaceRoot}/Drivers/CMSIS/Include",
"${workspaceRoot}/Inc",
"${workspaceRoot}/MotorControl"
],
"limitSymbolsToIncludedHeaders": true,
"databaseFilename": ""
}
},
{
"name": "MacOS",
"includePath": [
"${workspaceRoot}",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/include",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS",
"${workspaceRoot}/Drivers/DRV8301",
"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Core/Inc",
"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc",
"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc",
"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy",
"${workspaceRoot}/Drivers/CMSIS/Device/ST/STM32F4xx/Include",
"${workspaceRoot}/Drivers/CMSIS/Include",
"${workspaceRoot}/Inc",
"${workspaceRoot}/MotorControl",
"/usr/local/Caskroom/gcc-arm-embedded/6-2017-q2-update/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include",
"/usr/local/Caskroom/gcc-arm-embedded/6-2017-q2-update/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/c++/6.3.1",
"/usr/local/Caskroom/gcc-arm-embedded/6-2017-q2-update/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/c++/6.3.1/arm-none-eabi",
"/usr/local/Caskroom/gcc-arm-embedded/6-2017-q2-update/gcc-arm-none-eabi-6-2017-q2-update/lib/gcc/arm-none-eabi/6.3.1/include"
],
"defines": [
"_DEBUG",
"UNICODE"
],
"intelliSenseMode": "clang-x64",
"browse": {
"path": [
"/usr/lib/gcc/arm-none-eabi/4.9.3/include",
"/usr/lib/arm-none-eabi/include"
],
"limitSymbolsToIncludedHeaders": true,
"databaseFilename": ""
}
},
{
"name": "Mac",
"includePath": [
"${workspaceRoot}",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/include",
"${workspaceRoot}/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS",
"${workspaceRoot}/Drivers/DRV8301",
"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Core/Inc",
"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc",
"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc",
"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy",
"${workspaceRoot}/Drivers/CMSIS/Device/ST/STM32F4xx/Include",
"${workspaceRoot}/Drivers/CMSIS/Include",
"${workspaceRoot}/Inc",
"${workspaceRoot}/MotorControl",
"/usr/local/Caskroom/gcc-arm-embedded/6-2017-q2-update/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include",
"/usr/local/Caskroom/gcc-arm-embedded/6-2017-q2-update/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/c++/6.3.1",
"/usr/local/Caskroom/gcc-arm-embedded/6-2017-q2-update/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/c++/6.3.1/arm-none-eabi",
"/usr/local/Caskroom/gcc-arm-embedded/6-2017-q2-update/gcc-arm-none-eabi-6-2017-q2-update/lib/gcc/arm-none-eabi/6.3.1/include"
],
"defines": [
"STM32F405xx",
"USE_HAL_DRIVER",
"__weak=\"__attribute__((weak))\"",
"__packed=\"__attribute__((__packed__))\"",
"__GNUC__"
],
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"${workspaceRoot}/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc",
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"${workspaceRoot}/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy",
"${workspaceRoot}/Drivers/CMSIS/Device/ST/STM32F4xx/Include",
"${workspaceRoot}/Drivers/CMSIS/Include",
"${workspaceRoot}/Inc",
"${workspaceRoot}/MotorControl"
],
"limitSymbolsToIncludedHeaders": true,
"databaseFilename": ""
"/usr/local/Caskroom/gcc-arm-embedded/"
],
"limitSymbolsToIncludedHeaders": true,
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}
],
+2
View File
@@ -1,5 +1,7 @@
{
"C_Cpp.clang_format_style": "{ BasedOnStyle: Google, IndentWidth: 4, ColumnLimit: 0 }",
"C_Cpp.intelliSenseEngine": "Default",
"C_Cpp.intelliSenseEngineFallback": "Disabled",
"files.exclude": {
"build": true
},
+1 -1
View File
@@ -6,7 +6,7 @@
{
"taskName": "build",
"type": "shell",
"command": "make -j4",
"command": "make",
"group": {
"kind": "build",
"isDefault": true
@@ -45,6 +45,8 @@
// drivers
#include "drv8301.h"
#include "utils.h"
// **************************************************************************
// the defines
@@ -362,7 +364,7 @@ uint16_t DRV8301_readSpi(DRV8301_Handle handle, const DRV8301_RegName_e regName)
// Actuate chipselect
HAL_GPIO_WritePin(handle->nCSgpioHandle, handle->nCSgpioNumber, GPIO_PIN_RESET);
osDelay(1);
delay_us(1);
// Do blocking read
uint16_t zerobuff = 0;
@@ -374,17 +376,17 @@ uint16_t DRV8301_readSpi(DRV8301_Handle handle, const DRV8301_RegName_e regName)
// but for some reason you actually need to pulse it.
// Actuate chipselect
HAL_GPIO_WritePin(handle->nCSgpioHandle, handle->nCSgpioNumber, GPIO_PIN_SET);
osDelay(1);
delay_us(1);
// Actuate chipselect
HAL_GPIO_WritePin(handle->nCSgpioHandle, handle->nCSgpioNumber, GPIO_PIN_RESET);
osDelay(1);
delay_us(1);
HAL_SPI_TransmitReceive(handle->spiHandle, (uint8_t*)(&zerobuff), (uint8_t*)(&recbuff), 1, 1000);
osDelay(1);
delay_us(1);
// Actuate chipselect
HAL_GPIO_WritePin(handle->nCSgpioHandle, handle->nCSgpioNumber, GPIO_PIN_SET);
osDelay(1);
delay_us(1);
assert(recbuff != 0xbeef);
@@ -590,16 +592,16 @@ void DRV8301_writeSpi(DRV8301_Handle handle, const DRV8301_RegName_e regName,con
{
// Actuate chipselect
HAL_GPIO_WritePin(handle->nCSgpioHandle, handle->nCSgpioNumber, GPIO_PIN_RESET);
osDelay(1);
delay_us(1);
// Do blocking write
uint16_t controlword = (uint16_t)DRV8301_buildCtrlWord(DRV8301_CtrlMode_Write, regName, data);
HAL_SPI_Transmit(handle->spiHandle, (uint8_t*)(&controlword), 1, 1000);
osDelay(1);
delay_us(1);
// Actuate chipselect
HAL_GPIO_WritePin(handle->nCSgpioHandle, handle->nCSgpioNumber, GPIO_PIN_SET);
osDelay(1);
delay_us(1);
return;
} // end of DRV8301_writeSpi() function
@@ -659,12 +661,14 @@ void DRV8301_readData(DRV8301_Handle handle, DRV_SPI_8301_Vars_t *Spi_8301_Vars)
Spi_8301_Vars->Stat_Reg_1.FETLB_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETLB_OC_BITS);
Spi_8301_Vars->Stat_Reg_1.FETHC_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETHC_OC_BITS);
Spi_8301_Vars->Stat_Reg_1.FETLC_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETLC_OC_BITS);
Spi_8301_Vars->Stat_Reg_1_Value = drvDataNew;
// Update Status Register 2
drvRegName = DRV8301_RegName_Status_2;
drvDataNew = DRV8301_readSpi(handle,drvRegName);
Spi_8301_Vars->Stat_Reg_2.GVDD_OV = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS2_GVDD_OV_BITS);
Spi_8301_Vars->Stat_Reg_2.DeviceID = (uint16_t)(drvDataNew & (uint16_t)DRV8301_STATUS2_ID_BITS);
Spi_8301_Vars->Stat_Reg_2_Value = drvDataNew;
// Update Control Register 1
drvRegName = DRV8301_RegName_Control_1;
@@ -674,6 +678,7 @@ void DRV8301_readData(DRV8301_Handle handle, DRV_SPI_8301_Vars_t *Spi_8301_Vars)
Spi_8301_Vars->Ctrl_Reg_1.PWM_MODE = (DRV8301_PwmMode_e)(drvDataNew & (uint16_t)DRV8301_CTRL1_PWM_MODE_BITS);
Spi_8301_Vars->Ctrl_Reg_1.OC_MODE = (DRV8301_OcMode_e)(drvDataNew & (uint16_t)DRV8301_CTRL1_OC_MODE_BITS);
Spi_8301_Vars->Ctrl_Reg_1.OC_ADJ_SET = (DRV8301_VdsLevel_e)(drvDataNew & (uint16_t)DRV8301_CTRL1_OC_ADJ_SET_BITS);
Spi_8301_Vars->Ctrl_Reg_1_Value = drvDataNew;
// Update Control Register 2
drvRegName = DRV8301_RegName_Control_2;
@@ -682,7 +687,7 @@ void DRV8301_readData(DRV8301_Handle handle, DRV_SPI_8301_Vars_t *Spi_8301_Vars)
Spi_8301_Vars->Ctrl_Reg_2.GAIN = (DRV8301_ShuntAmpGain_e)(drvDataNew & (uint16_t)DRV8301_CTRL2_GAIN_BITS);
Spi_8301_Vars->Ctrl_Reg_2.DC_CAL_CH1p2 = (DRV8301_DcCalMode_e)(drvDataNew & (uint16_t)(DRV8301_CTRL2_DC_CAL_1_BITS | DRV8301_CTRL2_DC_CAL_2_BITS));
Spi_8301_Vars->Ctrl_Reg_2.OC_TOFF = (DRV8301_OcOffTimeMode_e)(drvDataNew & (uint16_t)DRV8301_CTRL2_OC_TOFF_BITS);
Spi_8301_Vars->Ctrl_Reg_2_Value = drvDataNew;
Spi_8301_Vars->RcvCmd = false;
}
@@ -412,8 +412,13 @@ typedef struct _DRV_SPI_8301_Vars_t_
DRV_SPI_8301_Stat2_t_ Stat_Reg_2;
DRV_SPI_8301_CTRL1_t_ Ctrl_Reg_1;
DRV_SPI_8301_CTRL2_t_ Ctrl_Reg_2;
uint16_t Stat_Reg_1_Value;
uint16_t Stat_Reg_2_Value;
uint16_t Ctrl_Reg_1_Value;
uint16_t Ctrl_Reg_2_Value;
bool SndCmd;
bool RcvCmd;
}DRV_SPI_8301_Vars_t;

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