mirror of
https://github.com/FreeRTOS/FreeRTOS.git
synced 2026-09-22 19:24:10 +08:00
Add PIC32MEC14xx port and demo application.
This commit is contained in:
Richard Barry
+1
-1
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
+1
-1
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
+1
-1
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
+1
-1
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
@@ -0,0 +1,113 @@
|
||||
#
|
||||
# There exist several targets which are by default empty and which can be
|
||||
# used for execution of your targets. These targets are usually executed
|
||||
# before and after some main targets. They are:
|
||||
#
|
||||
# .build-pre: called before 'build' target
|
||||
# .build-post: called after 'build' target
|
||||
# .clean-pre: called before 'clean' target
|
||||
# .clean-post: called after 'clean' target
|
||||
# .clobber-pre: called before 'clobber' target
|
||||
# .clobber-post: called after 'clobber' target
|
||||
# .all-pre: called before 'all' target
|
||||
# .all-post: called after 'all' target
|
||||
# .help-pre: called before 'help' target
|
||||
# .help-post: called after 'help' target
|
||||
#
|
||||
# Targets beginning with '.' are not intended to be called on their own.
|
||||
#
|
||||
# Main targets can be executed directly, and they are:
|
||||
#
|
||||
# build build a specific configuration
|
||||
# clean remove built files from a configuration
|
||||
# clobber remove all built files
|
||||
# all build all configurations
|
||||
# help print help mesage
|
||||
#
|
||||
# Targets .build-impl, .clean-impl, .clobber-impl, .all-impl, and
|
||||
# .help-impl are implemented in nbproject/makefile-impl.mk.
|
||||
#
|
||||
# Available make variables:
|
||||
#
|
||||
# CND_BASEDIR base directory for relative paths
|
||||
# CND_DISTDIR default top distribution directory (build artifacts)
|
||||
# CND_BUILDDIR default top build directory (object files, ...)
|
||||
# CONF name of current configuration
|
||||
# CND_ARTIFACT_DIR_${CONF} directory of build artifact (current configuration)
|
||||
# CND_ARTIFACT_NAME_${CONF} name of build artifact (current configuration)
|
||||
# CND_ARTIFACT_PATH_${CONF} path to build artifact (current configuration)
|
||||
# CND_PACKAGE_DIR_${CONF} directory of package (current configuration)
|
||||
# CND_PACKAGE_NAME_${CONF} name of package (current configuration)
|
||||
# CND_PACKAGE_PATH_${CONF} path to package (current configuration)
|
||||
#
|
||||
# NOCDDL
|
||||
|
||||
|
||||
# Environment
|
||||
MKDIR=mkdir
|
||||
CP=cp
|
||||
CCADMIN=CCadmin
|
||||
RANLIB=ranlib
|
||||
|
||||
|
||||
# build
|
||||
build: .build-post
|
||||
|
||||
.build-pre:
|
||||
# Add your pre 'build' code here...
|
||||
|
||||
.build-post: .build-impl
|
||||
# Add your post 'build' code here...
|
||||
|
||||
|
||||
# clean
|
||||
clean: .clean-post
|
||||
|
||||
.clean-pre:
|
||||
# Add your pre 'clean' code here...
|
||||
# WARNING: the IDE does not call this target since it takes a long time to
|
||||
# simply run make. Instead, the IDE removes the configuration directories
|
||||
# under build and dist directly without calling make.
|
||||
# This target is left here so people can do a clean when running a clean
|
||||
# outside the IDE.
|
||||
|
||||
.clean-post: .clean-impl
|
||||
# Add your post 'clean' code here...
|
||||
|
||||
|
||||
# clobber
|
||||
clobber: .clobber-post
|
||||
|
||||
.clobber-pre:
|
||||
# Add your pre 'clobber' code here...
|
||||
|
||||
.clobber-post: .clobber-impl
|
||||
# Add your post 'clobber' code here...
|
||||
|
||||
|
||||
# all
|
||||
all: .all-post
|
||||
|
||||
.all-pre:
|
||||
# Add your pre 'all' code here...
|
||||
|
||||
.all-post: .all-impl
|
||||
# Add your post 'all' code here...
|
||||
|
||||
|
||||
# help
|
||||
help: .help-post
|
||||
|
||||
.help-pre:
|
||||
# Add your pre 'help' code here...
|
||||
|
||||
.help-post: .help-impl
|
||||
# Add your post 'help' code here...
|
||||
|
||||
|
||||
|
||||
# include project implementation makefile
|
||||
include nbproject/Makefile-impl.mk
|
||||
|
||||
# include project make variables
|
||||
include nbproject/Makefile-variables.mk
|
||||
+31294
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+9
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|
||||
#
|
||||
#Sat Sep 12 19:52:29 BST 2015
|
||||
default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=a29d9df60dd9a7849837c8f5ca17a004
|
||||
default.languagetoolchain.dir=C\:\\DevTools\\Microchip\\xc32\\v1.33\\bin
|
||||
configurations-xml=1488628682f58c9c6bf4eb01175324a8
|
||||
com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=47805b5596804b87cda41e61096929be
|
||||
default.languagetoolchain.version=1.33
|
||||
host.platform=windows
|
||||
conf.ids=default
|
||||
@@ -0,0 +1,69 @@
|
||||
#
|
||||
# Generated Makefile - do not edit!
|
||||
#
|
||||
# Edit the Makefile in the project folder instead (../Makefile). Each target
|
||||
# has a pre- and a post- target defined where you can add customization code.
|
||||
#
|
||||
# This makefile implements macros and targets common to all configurations.
|
||||
#
|
||||
# NOCDDL
|
||||
|
||||
|
||||
# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
|
||||
# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
|
||||
# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
|
||||
# and .clean-reqprojects-conf unless SUB has the value 'no'
|
||||
SUB_no=NO
|
||||
SUBPROJECTS=${SUB_${SUB}}
|
||||
BUILD_SUBPROJECTS_=.build-subprojects
|
||||
BUILD_SUBPROJECTS_NO=
|
||||
BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
|
||||
CLEAN_SUBPROJECTS_=.clean-subprojects
|
||||
CLEAN_SUBPROJECTS_NO=
|
||||
CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
|
||||
|
||||
|
||||
# Project Name
|
||||
PROJECTNAME=PIC32MEC14xx_RTOSDemo.X
|
||||
|
||||
# Active Configuration
|
||||
DEFAULTCONF=default
|
||||
CONF=${DEFAULTCONF}
|
||||
|
||||
# All Configurations
|
||||
ALLCONFS=default
|
||||
|
||||
|
||||
# build
|
||||
.build-impl: .build-pre
|
||||
${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
|
||||
|
||||
|
||||
# clean
|
||||
.clean-impl: .clean-pre
|
||||
${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
|
||||
|
||||
# clobber
|
||||
.clobber-impl: .clobber-pre .depcheck-impl
|
||||
${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
|
||||
|
||||
|
||||
|
||||
# all
|
||||
.all-impl: .all-pre .depcheck-impl
|
||||
${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
|
||||
|
||||
|
||||
|
||||
# dependency checking support
|
||||
.depcheck-impl:
|
||||
# @echo "# This code depends on make tool being used" >.dep.inc
|
||||
# @if [ -n "${MAKE_VERSION}" ]; then \
|
||||
# echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
|
||||
# echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
|
||||
# echo "include \$${DEPFILES}" >>.dep.inc; \
|
||||
# echo "endif" >>.dep.inc; \
|
||||
# else \
|
||||
# echo ".KEEP_STATE:" >>.dep.inc; \
|
||||
# echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
|
||||
# fi
|
||||
+37
@@ -0,0 +1,37 @@
|
||||
#
|
||||
# Generated Makefile - do not edit!
|
||||
#
|
||||
#
|
||||
# This file contains information about the location of compilers and other tools.
|
||||
# If you commmit this file into your revision control server, you will be able to
|
||||
# to checkout the project and build it from the command line with make. However,
|
||||
# if more than one person works on the same project, then this file might show
|
||||
# conflicts since different users are bound to have compilers in different places.
|
||||
# In that case you might choose to not commit this file and let MPLAB X recreate this file
|
||||
# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
|
||||
# least once so the file gets created and the project can be built. Finally, you can also
|
||||
# avoid using this file at all if you are only building from the command line with make.
|
||||
# You can invoke make with the values of the macros:
|
||||
# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...
|
||||
#
|
||||
SHELL=cmd.exe
|
||||
PATH_TO_IDE_BIN=C:/DevTools/Microchip/MPLABX/v3.05/mplab_ide/mplab_ide/modules/../../bin/
|
||||
# Adding MPLAB X bin directory to path.
|
||||
PATH:=C:/DevTools/Microchip/MPLABX/v3.05/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
|
||||
# Path to java used to run MPLAB X when this makefile was created
|
||||
MP_JAVA_PATH="C:\DevTools\Microchip\MPLABX\v3.05\sys\java\jre1.7.0_67/bin/"
|
||||
OS_CURRENT="$(shell uname -s)"
|
||||
MP_CC="C:\DevTools\Microchip\xc32\v1.33\bin\xc32-gcc.exe"
|
||||
MP_CPPC="C:\DevTools\Microchip\xc32\v1.33\bin\xc32-g++.exe"
|
||||
# MP_BC is not defined
|
||||
MP_AS="C:\DevTools\Microchip\xc32\v1.33\bin\xc32-as.exe"
|
||||
MP_LD="C:\DevTools\Microchip\xc32\v1.33\bin\xc32-ld.exe"
|
||||
MP_AR="C:\DevTools\Microchip\xc32\v1.33\bin\xc32-ar.exe"
|
||||
DEP_GEN=${MP_JAVA_PATH}java -jar "C:/DevTools/Microchip/MPLABX/v3.05/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar"
|
||||
MP_CC_DIR="C:\DevTools\Microchip\xc32\v1.33\bin"
|
||||
MP_CPPC_DIR="C:\DevTools\Microchip\xc32\v1.33\bin"
|
||||
# MP_BC_DIR is not defined
|
||||
MP_AS_DIR="C:\DevTools\Microchip\xc32\v1.33\bin"
|
||||
MP_LD_DIR="C:\DevTools\Microchip\xc32\v1.33\bin"
|
||||
MP_AR_DIR="C:\DevTools\Microchip\xc32\v1.33\bin"
|
||||
# MP_BC_DIR is not defined
|
||||
+13
@@ -0,0 +1,13 @@
|
||||
#
|
||||
# Generated - do not edit!
|
||||
#
|
||||
# NOCDDL
|
||||
#
|
||||
CND_BASEDIR=`pwd`
|
||||
# default configuration
|
||||
CND_ARTIFACT_DIR_default=dist/default/production
|
||||
CND_ARTIFACT_NAME_default=PIC32MEC14xx_RTOSDemo.X.production.hex
|
||||
CND_ARTIFACT_PATH_default=dist/default/production/PIC32MEC14xx_RTOSDemo.X.production.hex
|
||||
CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
|
||||
CND_PACKAGE_NAME_default=pic32mec14xxrtosdemo.x.tar
|
||||
CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/pic32mec14xxrtosdemo.x.tar
|
||||
+73
@@ -0,0 +1,73 @@
|
||||
#!/bin/bash -x
|
||||
|
||||
#
|
||||
# Generated - do not edit!
|
||||
#
|
||||
|
||||
# Macros
|
||||
TOP=`pwd`
|
||||
CND_CONF=default
|
||||
CND_DISTDIR=dist
|
||||
TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
|
||||
TMPDIRNAME=tmp-packaging
|
||||
OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/PIC32MEC14xx_RTOSDemo.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
|
||||
OUTPUT_BASENAME=PIC32MEC14xx_RTOSDemo.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
|
||||
PACKAGE_TOP_DIR=pic32mec14xxrtosdemo.x/
|
||||
|
||||
# Functions
|
||||
function checkReturnCode
|
||||
{
|
||||
rc=$?
|
||||
if [ $rc != 0 ]
|
||||
then
|
||||
exit $rc
|
||||
fi
|
||||
}
|
||||
function makeDirectory
|
||||
# $1 directory path
|
||||
# $2 permission (optional)
|
||||
{
|
||||
mkdir -p "$1"
|
||||
checkReturnCode
|
||||
if [ "$2" != "" ]
|
||||
then
|
||||
chmod $2 "$1"
|
||||
checkReturnCode
|
||||
fi
|
||||
}
|
||||
function copyFileToTmpDir
|
||||
# $1 from-file path
|
||||
# $2 to-file path
|
||||
# $3 permission
|
||||
{
|
||||
cp "$1" "$2"
|
||||
checkReturnCode
|
||||
if [ "$3" != "" ]
|
||||
then
|
||||
chmod $3 "$2"
|
||||
checkReturnCode
|
||||
fi
|
||||
}
|
||||
|
||||
# Setup
|
||||
cd "${TOP}"
|
||||
mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
|
||||
rm -rf ${TMPDIR}
|
||||
mkdir -p ${TMPDIR}
|
||||
|
||||
# Copy files and create directories and links
|
||||
cd "${TOP}"
|
||||
makeDirectory ${TMPDIR}/pic32mec14xxrtosdemo.x/bin
|
||||
copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}bin/${OUTPUT_BASENAME}" 0755
|
||||
|
||||
|
||||
# Generate tar file
|
||||
cd "${TOP}"
|
||||
rm -f ${CND_DISTDIR}/${CND_CONF}/package/pic32mec14xxrtosdemo.x.tar
|
||||
cd ${TMPDIR}
|
||||
tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/pic32mec14xxrtosdemo.x.tar *
|
||||
checkReturnCode
|
||||
|
||||
# Cleanup
|
||||
cd "${TOP}"
|
||||
rm -rf ${TMPDIR}
|
||||
+626
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Load Diff
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|
||||
#
|
||||
#Tue Aug 25 11:11:09 BST 2015
|
||||
mdbDebugger/MEMORY_VIEW_LAST_HW_BP_RESOURCE_WARN=false
|
||||
pkobskde/CHECK_4_HIGH_VOLTAGE_VPP=false
|
||||
pk3/DEVID_MISMATCH=false
|
||||
mdbDebugger/NO_HW_COMBINER_RESOURCES_WARNING=false
|
||||
mdbDebugger/NO_HW_BP_RESOURCES_WARN=false
|
||||
icd3/CAL_WARNING=false
|
||||
mdbDebugger/MEMORY_VIEW_NO_HW_BP_RESOURCES_WARN=false
|
||||
pk3/CHECK_CLOCK=false
|
||||
mdbDebugger/LAST_HW_BP_RESOURCE_WARN=false
|
||||
pk3/CHECK_4_HIGH_VOLTAGE_VPP=false
|
||||
icd3/DEVID_MISMATCH=true
|
||||
realice/DEVID_MISMATCH=true
|
||||
realice/CHECK_CLOCK=false
|
||||
pkoblicdbgr/DEVID_MISMATCH=false
|
||||
pkoblicdbgr/CHECK_CLOCK=false
|
||||
pkobskde/DEVID_MISMATCH=false
|
||||
icd3/CHECK_CLOCK=false
|
||||
realice/CHECK_4_HIGH_VOLTAGE_VPP=false
|
||||
pkoblicdbgr/CHECK_4_HIGH_VOLTAGE_VPP=false
|
||||
pk3/CAL_WARNING=false
|
||||
icd3/CHECK_4_HIGH_VOLTAGE_VPP=false
|
||||
pkobskde/CHECK_CLOCK=false
|
||||
realice/CAL_WARNING=false
|
||||
+25
@@ -0,0 +1,25 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<configurationDescriptor version="62">
|
||||
<projectmakefile>Makefile</projectmakefile>
|
||||
<defaultConf>0</defaultConf>
|
||||
<confs>
|
||||
<conf name="default" type="2">
|
||||
<platformToolSN>:=MPLABComm-USB-Microchip:=<vid>04D8:=<pid>9009:=<rev>0100:=<man>Microchip Technology, Inc. (www.microchip.com):=<prod>MPLAB ICD3 tm (www.microchip.com):=<sn>JIT112942201:=<drv>x:=<xpt>b:=end</platformToolSN>
|
||||
<languageToolchainDir>C:\DevTools\Microchip\xc32\v1.33\bin</languageToolchainDir>
|
||||
<mdbdebugger version="1">
|
||||
<placeholder1>place holder 1</placeholder1>
|
||||
<placeholder2>place holder 2</placeholder2>
|
||||
</mdbdebugger>
|
||||
<runprofile version="6">
|
||||
<args></args>
|
||||
<rundir></rundir>
|
||||
<buildfirst>true</buildfirst>
|
||||
<console-type>0</console-type>
|
||||
<terminal-type>0</terminal-type>
|
||||
<remove-instrumentation>0</remove-instrumentation>
|
||||
<environment>
|
||||
</environment>
|
||||
</runprofile>
|
||||
</conf>
|
||||
</confs>
|
||||
</configurationDescriptor>
|
||||
+30
@@ -0,0 +1,30 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<project-private xmlns="http://www.netbeans.org/ns/project-private/1">
|
||||
<editor-bookmarks xmlns="http://www.netbeans.org/ns/editor-bookmarks/1"/>
|
||||
<editor-bookmarks xmlns="http://www.netbeans.org/ns/editor-bookmarks/2" lastBookmarkId="0"/>
|
||||
<open-files xmlns="http://www.netbeans.org/ns/projectui-open-files/2">
|
||||
<group>
|
||||
<file>file:/C:/Users/m91145/Documents/OS%20IDE%20Specialist%20Team/FreeRTOS%20MEC%20Port/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/MEC14xx/interrupts/girq23d.S</file>
|
||||
<file>file:/C:/Users/m91145/Documents/OS%20IDE%20Specialist%20Team/FreeRTOS%20MEC%20Port/FreeRTOS/Source/tasks.c</file>
|
||||
<file>file:/C:/Users/m91145/Documents/OS%20IDE%20Specialist%20Team/FreeRTOS%20MEC%20Port/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.c</file>
|
||||
<file>file:/C:/Users/m91145/Documents/OS%20IDE%20Specialist%20Team/FreeRTOS%20MEC%20Port/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/MEC14xx/interrupts/girq23.c</file>
|
||||
<file>file:/C:/Users/m91145/Documents/OS%20IDE%20Specialist%20Team/FreeRTOS%20MEC%20Port/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/main.c</file>
|
||||
<file>file:/C:/Users/m91145/Documents/OS%20IDE%20Specialist%20Team/FreeRTOS%20MEC%20Port/FreeRTOS/Demo/Common/Minimal/IntQueue.c</file>
|
||||
<file>file:/C:/Users/m91145/Documents/OS%20IDE%20Specialist%20Team/FreeRTOS%20MEC%20Port/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.c</file>
|
||||
<file>file:/C:/Users/m91145/Documents/OS%20IDE%20Specialist%20Team/FreeRTOS%20MEC%20Port/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/main_full.c</file>
|
||||
<file>file:/C:/Users/m91145/Documents/OS%20IDE%20Specialist%20Team/FreeRTOS%20MEC%20Port/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/port.c</file>
|
||||
<file>file:/C:/Users/m91145/Documents/OS%20IDE%20Specialist%20Team/FreeRTOS%20MEC%20Port/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer_isr.S</file>
|
||||
</group>
|
||||
<group name="Masters19024">
|
||||
<file>file:/C:/E/Dev/FreeRTOS/WorkingCopy/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/MEC14xx/startup/MPLAB/default-on-bootstrap.c</file>
|
||||
<file>file:/C:/E/Dev/FreeRTOS/WorkingCopy/FreeRTOS/Source/tasks.c</file>
|
||||
<file>file:/C:/E/Dev/FreeRTOS/WorkingCopy/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/MEC14xx/startup/MPLAB/crt0.S</file>
|
||||
<file>file:/C:/E/Dev/FreeRTOS/WorkingCopy/FreeRTOS/Source/list.c</file>
|
||||
<file>file:/C:/E/Dev/FreeRTOS/WorkingCopy/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/MEC14xx/startup/MPLAB/on_reset.c</file>
|
||||
<file>file:/C:/E/Dev/FreeRTOS/WorkingCopy/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/MEC14xx/startup/MPLAB/crti.S</file>
|
||||
<file>file:/C:/E/Dev/FreeRTOS/WorkingCopy/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/main.c</file>
|
||||
<file>file:/C:/E/Dev/FreeRTOS/WorkingCopy/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/MEC14xx/startup/MPLAB/crtn.S</file>
|
||||
<file>file:/C:/E/Dev/FreeRTOS/WorkingCopy/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Blinky_Demo/main_blinky.c</file>
|
||||
</group>
|
||||
</open-files>
|
||||
</project-private>
|
||||
@@ -0,0 +1,17 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<project xmlns="http://www.netbeans.org/ns/project/1">
|
||||
<type>com.microchip.mplab.nbide.embedded.makeproject</type>
|
||||
<configuration>
|
||||
<data xmlns="http://www.netbeans.org/ns/make-project/1">
|
||||
<name>PIC32MEC14xx_RTOSDemo</name>
|
||||
<creation-uuid>ae050a6a-b5b0-45c7-b21f-96b074d910a4</creation-uuid>
|
||||
<make-project-type>0</make-project-type>
|
||||
<c-extensions>c</c-extensions>
|
||||
<cpp-extensions/>
|
||||
<header-extensions>h</header-extensions>
|
||||
<asminc-extensions/>
|
||||
<sourceEncoding>ISO-8859-1</sourceEncoding>
|
||||
<make-dep-projects/>
|
||||
</data>
|
||||
</configuration>
|
||||
</project>
|
||||
BIN
Binary file not shown.
@@ -0,0 +1,481 @@
|
||||
/*--------------------------------------------------------------------------
|
||||
* MPLAB XC Compiler - MEC1404 linker script
|
||||
* Build date : Jul 14 2014
|
||||
*
|
||||
* This software is developed by Microchip Technology Inc. and its
|
||||
* subsidiaries ("Microchip").
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above
|
||||
* copyright notice, this list of conditions and the following
|
||||
* disclaimer in the documentation and/or other materials provided
|
||||
* with the distribution.
|
||||
* 3. Microchip's name may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written
|
||||
* permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY MICROCHIP "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR PURPOSE ARE DISCLAIMED. IN NO EVENT
|
||||
* SHALL MICROCHIP BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING BUT NOT LIMITED TO
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWSOEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*-------------------------------------------------------------------------*/
|
||||
|
||||
/* Default linker script, for normal executables */
|
||||
|
||||
OUTPUT_FORMAT("elf32-tradlittlemips")
|
||||
OUTPUT_ARCH(pic32mx)
|
||||
ENTRY(_reset)
|
||||
/*
|
||||
* Provide for a minimum stack and heap size
|
||||
* - _min_stack_size - represents the minimum space that must be made
|
||||
* available for the stack. Can be overridden from
|
||||
* the command line using the linker's --defsym option.
|
||||
* - _min_heap_size - represents the minimum space that must be made
|
||||
* available for the heap. Must be specified on
|
||||
* the command line using the linker's --defsym option.
|
||||
*/
|
||||
EXTERN (_min_stack_size _min_heap_size)
|
||||
PROVIDE(_min_stack_size = 0x400) ;
|
||||
PROVIDE(_min_heap_size = 0x400) ;
|
||||
|
||||
/*************************************************************************
|
||||
* Processor-specific object file. Contains SFR definitions.
|
||||
*************************************************************************/
|
||||
INPUT("processor.o")
|
||||
|
||||
/*************************************************************************
|
||||
* For interrupt vector handling
|
||||
*************************************************************************/
|
||||
PROVIDE(_vector_spacing = 0x00000001);
|
||||
PROVIDE(_ebase_address = 0xBFD00000);
|
||||
|
||||
/*************************************************************************
|
||||
* Memory Address Equates
|
||||
* _RESET_ADDR -- Reset Vector
|
||||
* _GEN_EXCPT_ADDR -- General Exception Vector
|
||||
*************************************************************************/
|
||||
_RESET_ADDR = 0xBFD00000;
|
||||
_GEN_EXCPT_ADDR = _ebase_address + 0x180;
|
||||
|
||||
/*************************************************************************
|
||||
* Memory Regions
|
||||
*
|
||||
* Memory regions without attributes cannot be used for orphaned sections.
|
||||
* Only sections specifically assigned to these regions can be allocated
|
||||
* into these regions.
|
||||
*************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
rom (rx) : ORIGIN = 0xBFC00000, LENGTH = 0x10000
|
||||
kseg0_program_mem (rx) : ORIGIN = 0xBFD00000, LENGTH = 0x18000
|
||||
sfrs : ORIGIN = 0xBFBFEFF0, LENGTH = 0x100000
|
||||
kseg1_data_mem (rwx) : ORIGIN = 0xBFD18000, LENGTH = 0x8000
|
||||
}
|
||||
SECTIONS
|
||||
{
|
||||
.reset _RESET_ADDR :
|
||||
{
|
||||
KEEP(*(.reset))
|
||||
} > kseg0_program_mem
|
||||
|
||||
.app_excpt _GEN_EXCPT_ADDR :
|
||||
{
|
||||
KEEP(*(.gen_handler))
|
||||
} > kseg0_program_mem
|
||||
|
||||
/* MEC14x4 JTVIC has 19 aggregated interrupt sources in its
|
||||
* power-on-reset configuration. MEC14xx data sheet uses nomenclature
|
||||
* GIRQ00 - GIRQ18.
|
||||
* MEC14x4 M14K core was built to support EIC Mode 2 only. The JTVIC
|
||||
* supplies a 17-bit offset to the M14K core. The M14K combines this
|
||||
* 17-bit offset with EBASE to produce the final vector location.
|
||||
* Similar to the PIC32MZ EVIC, the JTVIC has a register for each
|
||||
* GIRQx containing the 17-bit value supplied to the M14K core.
|
||||
* This means ISR's can be located anywhere above EBASE except for
|
||||
* the fixed location of the General Exception at EBASE + 0x180.
|
||||
* To avoid overhead of XC32 .vector_N long jumps we will program
|
||||
* the address of the C ISR directly into the JTVIC. All ISR's
|
||||
* can be in .text
|
||||
* C ISR's must also be marked with the interrupt(XXX_IPL) attribute
|
||||
* so the compiler knows about priority, etc.
|
||||
*/
|
||||
.vectors _ebase_address + 0x200 :
|
||||
{
|
||||
/*
|
||||
KEEP (*(.vector_0))
|
||||
KEEP (*(.vector_1))
|
||||
KEEP (*(.vector_2))
|
||||
KEEP (*(.vector_3))
|
||||
KEEP (*(.vector_4))
|
||||
KEEP (*(.vector_5))
|
||||
KEEP (*(.vector_6))
|
||||
KEEP (*(.vector_7))
|
||||
KEEP (*(.vector_8))
|
||||
KEEP (*(.vector_9))
|
||||
KEEP (*(.vector_10))
|
||||
KEEP (*(.vector_11))
|
||||
KEEP (*(.vector_12))
|
||||
KEEP (*(.vector_13))
|
||||
KEEP (*(.vector_14))
|
||||
KEEP (*(.vector_15))
|
||||
KEEP (*(.vector_16))
|
||||
KEEP (*(.vector_17))
|
||||
KEEP (*(.vector_18))
|
||||
*/
|
||||
KEEP (SORT_BY_NAME(*)(.girqs.*))
|
||||
KEEP (*(.vec_default))
|
||||
} > kseg0_program_mem
|
||||
|
||||
/* The startup code is in the .reset.startup section.
|
||||
* SRAM Application startup code does NOT need to be
|
||||
* located at the beginning of CODE SRAM. A processor/chip
|
||||
* reset will go to the BootROM reset/startup code and
|
||||
* begin the BootROM SPI application load sequence.
|
||||
* Upon a successful SPI load and verification, BootROM
|
||||
* will jump into the Application. We expect the jump address
|
||||
* to be .startup(reset handler) of the application because
|
||||
* .startup runs the XC32 startup code and calls C main.
|
||||
* Since application .startup is never entered on a real HW
|
||||
* reset/nmi/soft-reset it can be located anywhere in SRAM
|
||||
* CODE space.
|
||||
*/
|
||||
.startup :
|
||||
{
|
||||
KEEP(*(.startup))
|
||||
KEEP(*(.reset.startup))
|
||||
} > kseg0_program_mem
|
||||
|
||||
/* Code Sections - Note that input sections *(.text) and *(.text.*)
|
||||
* are not mapped here. The best-fit allocator locates them,
|
||||
* so that .text may flow around absolute sections as needed.
|
||||
*/
|
||||
.text :
|
||||
{
|
||||
*(.stub .gnu.linkonce.t.*)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
*(.gnu.warning)
|
||||
. = ALIGN(4) ;
|
||||
} >kseg0_program_mem
|
||||
/* Global-namespace object initialization */
|
||||
.init :
|
||||
{
|
||||
KEEP (*crti.o(.init))
|
||||
KEEP (*crtbegin.o(.init))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o *crtn.o ).init))
|
||||
KEEP (*crtend.o(.init))
|
||||
KEEP (*crtn.o(.init))
|
||||
. = ALIGN(4) ;
|
||||
} >kseg0_program_mem
|
||||
.fini :
|
||||
{
|
||||
KEEP (*(.fini))
|
||||
. = ALIGN(4) ;
|
||||
} >kseg0_program_mem
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(4) ;
|
||||
} >kseg0_program_mem
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(4) ;
|
||||
} >kseg0_program_mem
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(4) ;
|
||||
} >kseg0_program_mem
|
||||
.ctors :
|
||||
{
|
||||
/* XC32 uses crtbegin.o to find the start of
|
||||
the constructors, so we make sure it is
|
||||
first. Because this is a wildcard, it
|
||||
doesn't matter if the user does not
|
||||
actually link against crtbegin.o; the
|
||||
linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it
|
||||
doesn't matter which directory crtbegin.o
|
||||
is in. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*crtbegin?.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
end of ctors marker and it must be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
. = ALIGN(4) ;
|
||||
} >kseg0_program_mem
|
||||
.dtors :
|
||||
{
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*crtbegin?.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
. = ALIGN(4) ;
|
||||
} >kseg0_program_mem
|
||||
/* Read-only sections */
|
||||
.rodata :
|
||||
{
|
||||
*( .gnu.linkonce.r.*)
|
||||
*(.rodata1)
|
||||
. = ALIGN(4) ;
|
||||
} >kseg0_program_mem
|
||||
/*
|
||||
* Small initialized constant global and static data can be placed in the
|
||||
* .sdata2 section. This is different from .sdata, which contains small
|
||||
* initialized non-constant global and static data.
|
||||
*/
|
||||
.sdata2 ALIGN(4) :
|
||||
{
|
||||
*(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
|
||||
. = ALIGN(4) ;
|
||||
} >kseg0_program_mem
|
||||
/*
|
||||
* Uninitialized constant global and static data (i.e., variables which will
|
||||
* always be zero). Again, this is different from .sbss, which contains
|
||||
* small non-initialized, non-constant global and static data.
|
||||
*/
|
||||
.sbss2 ALIGN(4) :
|
||||
{
|
||||
*(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
|
||||
. = ALIGN(4) ;
|
||||
} >kseg0_program_mem
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} >kseg0_program_mem
|
||||
. = ALIGN(4) ;
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
KEEP (*(.eh_frame))
|
||||
} >kseg0_program_mem
|
||||
. = ALIGN(4) ;
|
||||
.gcc_except_table : ONLY_IF_RO
|
||||
{
|
||||
*(.gcc_except_table .gcc_except_table.*)
|
||||
} >kseg0_program_mem
|
||||
. = ALIGN(4) ;
|
||||
.persist :
|
||||
{
|
||||
_persist_begin = .;
|
||||
*(.persist .persist.*)
|
||||
*(.pbss .pbss.*)
|
||||
. = ALIGN(4) ;
|
||||
_persist_end = .;
|
||||
} >kseg1_data_mem
|
||||
.jcr :
|
||||
{
|
||||
KEEP (*(.jcr))
|
||||
. = ALIGN(4) ;
|
||||
} >kseg1_data_mem
|
||||
.eh_frame : ONLY_IF_RW
|
||||
{
|
||||
KEEP (*(.eh_frame))
|
||||
} >kseg1_data_mem
|
||||
. = ALIGN(4) ;
|
||||
.gcc_except_table : ONLY_IF_RW
|
||||
{
|
||||
*(.gcc_except_table .gcc_except_table.*)
|
||||
} >kseg1_data_mem
|
||||
. = ALIGN(4) ;
|
||||
/* Persistent data - Use the new C 'persistent' attribute instead. */
|
||||
/*
|
||||
.persist :
|
||||
{
|
||||
_persist_begin = .;
|
||||
*(.persist .persist.*)
|
||||
*(.pbss .pbss.*)
|
||||
. = ALIGN(4) ;
|
||||
_persist_end = .;
|
||||
} >kseg1_data_mem
|
||||
*/
|
||||
/*
|
||||
* Note that input sections named .data* are not mapped here.
|
||||
* The best-fit allocator locates them, so that they may flow
|
||||
* around absolute sections as needed.
|
||||
*/
|
||||
.data :
|
||||
{
|
||||
*( .gnu.linkonce.d.*)
|
||||
SORT(CONSTRUCTORS)
|
||||
*(.data1)
|
||||
. = ALIGN(4) ;
|
||||
} >kseg1_data_mem
|
||||
. = .;
|
||||
_gp = ALIGN(16) + 0x7ff0;
|
||||
.got ALIGN(4) :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
. = ALIGN(4) ;
|
||||
} >kseg1_data_mem /* AT>kseg0_program_mem */
|
||||
/*
|
||||
* Note that 'small' data sections are still mapped in the linker
|
||||
* script. This ensures that they are grouped together for
|
||||
* gp-relative addressing. Absolute sections are allocated after
|
||||
* the 'small' data sections so small data cannot flow around them.
|
||||
*/
|
||||
/*
|
||||
* We want the small data sections together, so single-instruction offsets
|
||||
* can access them all, and initialized data all before uninitialized, so
|
||||
* we can shorten the on-disk segment size.
|
||||
*/
|
||||
.sdata ALIGN(4) :
|
||||
{
|
||||
_sdata_begin = . ;
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
. = ALIGN(4) ;
|
||||
_sdata_end = . ;
|
||||
} >kseg1_data_mem
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} >kseg1_data_mem
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
} >kseg1_data_mem
|
||||
. = ALIGN (4) ;
|
||||
_data_end = . ;
|
||||
_bss_begin = . ;
|
||||
.sbss ALIGN(4) :
|
||||
{
|
||||
_sbss_begin = . ;
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
_sbss_end = . ;
|
||||
. = ALIGN(4) ;
|
||||
} >kseg1_data_mem
|
||||
/*
|
||||
* Align here to ensure that the .bss section occupies space up to
|
||||
* _end. Align after .bss to ensure correct alignment even if the
|
||||
* .bss section disappears because there are no input sections.
|
||||
*
|
||||
* Note that input sections named .bss* are no longer mapped here.
|
||||
* The best-fit allocator locates them, so that they may flow
|
||||
* around absolute sections as needed.
|
||||
*
|
||||
*/
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(COMMON)
|
||||
/* Align here to ensure that the .bss section occupies space up to
|
||||
_end. Align after .bss to ensure correct alignment even if the
|
||||
.bss section disappears because there are no input sections. */
|
||||
. = ALIGN(. != 0 ? 4 : 1);
|
||||
} >kseg1_data_mem
|
||||
. = ALIGN(4) ;
|
||||
_end = . ;
|
||||
_bss_end = . ;
|
||||
/*
|
||||
* The heap and stack are best-fit allocated by the linker after other
|
||||
* data and bss sections have been allocated.
|
||||
*/
|
||||
/* MCHP - disable best-fit allocation of stack & heap */
|
||||
|
||||
.heap ALIGN(16) :
|
||||
{
|
||||
_heap_bottom = .;
|
||||
. += _min_heap_size;
|
||||
_heap_top = .;
|
||||
} >kseg1_data_mem
|
||||
.stack ALIGN(16) :
|
||||
{
|
||||
_stack_bottom = .;
|
||||
. += _min_stack_size;
|
||||
. = ALIGN(16);
|
||||
_stack_top = .;
|
||||
} >kseg1_data_mem
|
||||
PROVIDE( _heap = _heap_bottom );
|
||||
PROVIDE( _stack = _stack_top );
|
||||
PROVIDE( _stack_start = _stack_bottom );
|
||||
/*
|
||||
* RAM functions go at the end of our stack and heap allocation.
|
||||
* Alignment of 2K required by the boundary register (BMXDKPBA).
|
||||
*
|
||||
* RAM functions are now allocated by the linker. The linker generates
|
||||
* _ramfunc_begin and _bmxdkpba_address symbols depending on the
|
||||
* location of RAM functions.
|
||||
*/
|
||||
_bmxdudba_address = LENGTH(kseg1_data_mem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_data_mem) ;
|
||||
/* The .pdr section belongs in the absolute section */
|
||||
/DISCARD/ : { *(.pdr) }
|
||||
.gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
|
||||
.gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
|
||||
.mdebug.abi32 : { KEEP(*(.mdebug.abi32)) }
|
||||
.mdebug.abiN32 : { KEEP(*(.mdebug.abiN32)) }
|
||||
.mdebug.abi64 : { KEEP(*(.mdebug.abi64)) }
|
||||
.mdebug.abiO64 : { KEEP(*(.mdebug.abiO64)) }
|
||||
.mdebug.eabi32 : { KEEP(*(.mdebug.eabi32)) }
|
||||
.mdebug.eabi64 : { KEEP(*(.mdebug.eabi64)) }
|
||||
.gcc_compiled_long32 : { KEEP(*(.gcc_compiled_long32)) }
|
||||
.gcc_compiled_long64 : { KEEP(*(.gcc_compiled_long64)) }
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections used by MPLAB X for source-level debugging.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.debug_pubtypes 0 : { *(.debug_pubtypes) }
|
||||
.debug_ranges 0 : { *(.debug_ranges) }
|
||||
/DISCARD/ : { *(.rel.dyn) }
|
||||
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) *(.discard) }
|
||||
}
|
||||
|
||||
@@ -0,0 +1,290 @@
|
||||
/*
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
* NOTE 1: This project provides two demo applications. A simple blinky style
|
||||
* project, and a more comprehensive test and demo application. The
|
||||
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select
|
||||
* between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY
|
||||
* in main.c. This file implements the simply blinky style version.
|
||||
*
|
||||
* NOTE 2: This file only contains the source code that is specific to the
|
||||
* basic demo. Generic functions, such FreeRTOS hook functions, and functions
|
||||
* required to configure the hardware, are defined in main.c.
|
||||
******************************************************************************
|
||||
*
|
||||
* main_blinky() creates one queue, two tasks, and one software timer. It then
|
||||
* starts the scheduler.
|
||||
*
|
||||
* The Blinky Software Timer:
|
||||
* This demonstrates an auto-reload software timer. The timer callback function
|
||||
* does nothing but toggle an LED.
|
||||
*
|
||||
* The Queue Send Task:
|
||||
* The queue send task is implemented by prvQueueSendTask() in main_blinky.c.
|
||||
* prvQueueSendTask() repeatedly blocks for 200 milliseconds before sending the
|
||||
* value 100 to the queue that was created in main_blinky().
|
||||
*
|
||||
* The Queue Receive Task:
|
||||
* The queue receive task is implemented by prvQueueReceiveTask() in
|
||||
* main_blinky.c. prvQueueReceiveTask() repeatedly blocks on attempts to read
|
||||
* from the queue that was created in main_blinky(), toggling an LED each time
|
||||
* data is received. The queue send task sends data to the queue every 200
|
||||
* milliseconds, so the LED will toggle every 200 milliseconds.
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
#include <stdio.h>
|
||||
|
||||
/* Kernel includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "queue.h"
|
||||
#include "timers.h"
|
||||
|
||||
/* Priorities at which the tasks are created. */
|
||||
#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
|
||||
#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
|
||||
|
||||
/* The rate at which data is sent to the queue. The 200ms value is converted
|
||||
to ticks using the portTICK_PERIOD_MS constant. */
|
||||
#define mainQUEUE_SEND_FREQUENCY_MS ( 200 / portTICK_PERIOD_MS )
|
||||
|
||||
/* The number of items the queue can hold. This is 1 as the receive task
|
||||
will remove items as they are added, meaning the send task should always find
|
||||
the queue empty. */
|
||||
#define mainQUEUE_LENGTH ( 1 )
|
||||
|
||||
/* Values passed to the two tasks just to check the task parameter
|
||||
functionality. */
|
||||
#define mainQUEUE_SEND_PARAMETER ( 0x1111UL )
|
||||
#define mainQUEUE_RECEIVE_PARAMETER ( 0x22UL )
|
||||
|
||||
/* The period of the blinky software timer. The period is specified in ms and
|
||||
converted to ticks using the portTICK_PERIOD_MS constant. */
|
||||
#define mainBLINKY_TIMER_PERIOD ( 50 / portTICK_PERIOD_MS )
|
||||
|
||||
/* The LED used by the communicating tasks and the blinky timer respectively. */
|
||||
#define mainTASKS_LED ( 0 )
|
||||
#define mainTIMER_LED ( 1 )
|
||||
|
||||
/* Misc. */
|
||||
#define mainDONT_BLOCK ( 0 )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* The tasks as described in the comments at the top of this file.
|
||||
*/
|
||||
static void prvQueueReceiveTask( void *pvParameters );
|
||||
static void prvQueueSendTask( void *pvParameters );
|
||||
|
||||
/*
|
||||
* The callback function for the blinky software timer, as described at the top
|
||||
* of this file.
|
||||
*/
|
||||
static void prvBlinkyTimerCallback( TimerHandle_t xTimer );
|
||||
|
||||
/*
|
||||
* Called by main() to create the simply blinky style application if
|
||||
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.
|
||||
*/
|
||||
void main_blinky( void );
|
||||
|
||||
/*
|
||||
* LED toggle function that uses a critical section to ensure thread safety.
|
||||
*/
|
||||
extern void vToggleLED( uint8_t ucLED );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The queue used by both tasks. */
|
||||
static QueueHandle_t xQueue = NULL;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void main_blinky( void )
|
||||
{
|
||||
TimerHandle_t xTimer;
|
||||
|
||||
/* Create the queue. */
|
||||
xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) );
|
||||
configASSERT( xQueue );
|
||||
|
||||
if( xQueue != NULL )
|
||||
{
|
||||
/* Create the two tasks as described in the comments at the top of this
|
||||
file. */
|
||||
xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */
|
||||
"Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */
|
||||
configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */
|
||||
( void * ) mainQUEUE_RECEIVE_PARAMETER, /* The parameter passed to the task - just to check the functionality. */
|
||||
mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */
|
||||
NULL ); /* The task handle is not required, so NULL is passed. */
|
||||
|
||||
xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, ( void * ) mainQUEUE_SEND_PARAMETER, mainQUEUE_SEND_TASK_PRIORITY, NULL );
|
||||
|
||||
|
||||
/* Create the blinky software timer as described at the top of this file. */
|
||||
xTimer = xTimerCreate( "Blinky", /* A text name, purely to help debugging. */
|
||||
( mainBLINKY_TIMER_PERIOD ),/* The timer period. */
|
||||
pdTRUE, /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */
|
||||
( void * ) 0, /* The ID is not used, so can be set to anything. */
|
||||
prvBlinkyTimerCallback ); /* The callback function that inspects the status of all the other tasks. */
|
||||
configASSERT( xTimer );
|
||||
|
||||
if( xTimer != NULL )
|
||||
{
|
||||
xTimerStart( xTimer, mainDONT_BLOCK );
|
||||
}
|
||||
|
||||
/* Start the tasks and timer running. */
|
||||
vTaskStartScheduler();
|
||||
}
|
||||
|
||||
/* If all is well, the scheduler will now be running, and the following
|
||||
line will never be reached. If the following line does execute, then
|
||||
there was insufficient FreeRTOS heap memory available for the idle and/or
|
||||
timer tasks to be created. See the memory management section on the
|
||||
FreeRTOS web site for more details. http://www.freertos.org/a00111.html */
|
||||
for( ;; );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvQueueSendTask( void *pvParameters )
|
||||
{
|
||||
TickType_t xNextWakeTime;
|
||||
const unsigned long ulValueToSend = 100UL;
|
||||
|
||||
/* Remove compiler warnings in the case that configASSERT() is not defined. */
|
||||
( void ) pvParameters;
|
||||
|
||||
/* Check the task parameter is as expected. */
|
||||
configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_SEND_PARAMETER );
|
||||
|
||||
/* Initialise xNextWakeTime - this only needs to be done once. */
|
||||
xNextWakeTime = xTaskGetTickCount();
|
||||
|
||||
for( ;; )
|
||||
{
|
||||
/* Place this task in the blocked state until it is time to run again.
|
||||
The block time is specified in ticks, the constant used converts ticks
|
||||
to ms. While in the Blocked state this task will not consume any CPU
|
||||
time. */
|
||||
vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );
|
||||
|
||||
/* Send to the queue - causing the queue receive task to unblock and
|
||||
toggle the LED. 0 is used as the block time so the sending operation
|
||||
will not block - it shouldn't need to block as the queue should always
|
||||
be empty at this point in the code. */
|
||||
xQueueSend( xQueue, &ulValueToSend, 0U );
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvQueueReceiveTask( void *pvParameters )
|
||||
{
|
||||
unsigned long ulReceivedValue;
|
||||
|
||||
/* Remove compiler warnings in the case where configASSERT() is not defined. */
|
||||
( void ) pvParameters;
|
||||
|
||||
/* Check the task parameter is as expected. */
|
||||
configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_RECEIVE_PARAMETER );
|
||||
|
||||
for( ;; )
|
||||
{
|
||||
/* Wait until something arrives in the queue - this task will block
|
||||
indefinitely provided INCLUDE_vTaskSuspend is set to 1 in
|
||||
FreeRTOSConfig.h. */
|
||||
xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
|
||||
|
||||
/* To get here something must have been received from the queue, but
|
||||
is it the expected value? If it is, toggle the LED. */
|
||||
if( ulReceivedValue == 100UL )
|
||||
{
|
||||
vToggleLED( mainTASKS_LED );
|
||||
ulReceivedValue = 0U;
|
||||
}
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvBlinkyTimerCallback( TimerHandle_t xTimer )
|
||||
{
|
||||
/* Avoid compiler warnings. */
|
||||
( void ) xTimer;
|
||||
|
||||
/* This function is called when the blinky software time expires. All the
|
||||
function does is toggle the LED. LED mainTIMER_LED should therefore toggle
|
||||
with the period set by mainBLINKY_TIMER_PERIOD. */
|
||||
vToggleLED( mainTIMER_LED );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
@@ -0,0 +1,184 @@
|
||||
/*
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
#ifdef __XC32__
|
||||
#include <xc.h>
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||
*
|
||||
* See http://www.freertos.org/a00110.html.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/* The MEC14xx controller allows interrupts to be aggregated into a single
|
||||
* signal which triggers a single interrupt with a fixed priority for all
|
||||
* interrupt levels. Alternatively the signals can be disaggregated into unique
|
||||
* interrupt events which can be vectored via a dispatch table to unique
|
||||
* handlers for each interrupt source. This mechanism allows, for instance, a
|
||||
* single interrupt handler for a large number of IO pins yet unique handlers
|
||||
* for timers and other signals.
|
||||
*
|
||||
* When operating in disaggregated mode certain restrictions apply. The
|
||||
* interrupt event and status registers are shared between timers due to their
|
||||
* proximity in the memory map. Similarly the software interrupt control
|
||||
* registers are shared with other interrupt sources. The JTVIC maps interrupt
|
||||
* levels into MIPs core interrupt levels consequently JTVIC priorities of 0, 1,
|
||||
* 3, and 4 map to the MIPs core values of 1, 3, 5, and 7. The parameter
|
||||
* configTIMERS_DISAGGREGATED_ISRS is used to control if the timers in register
|
||||
* GIRQ23 are operating in disaggregated mode. Similarly
|
||||
* configCPU_DISAGGREGATED_ISRS controls the mode for GIRQ24.
|
||||
*
|
||||
* Note:
|
||||
* Disaggregated mode is the more natural manner in which to operate the ISRs
|
||||
* and currently only this mode has been tested with the demo application. If
|
||||
* you wish to use aggregated mode then an alternative interrupt handler scheme
|
||||
* will need to be used that marshals all interrupts from a single GIRQ through
|
||||
* a common handler function that tests which interrupt occurred and dispatches
|
||||
* to the relevant handlers.
|
||||
*/
|
||||
#define configTIMERS_DISAGGREGATED_ISRS 1
|
||||
#define configCPU_DISAGGREGATED_ISRS 1
|
||||
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
||||
#define configUSE_QUEUE_SETS 1
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
|
||||
#define configCPU_CLOCK_HZ ( 48000000UL )
|
||||
#define configPERIPHERAL_CLOCK_HZ ( 48000000UL )
|
||||
#define configMAX_PRIORITIES ( 5UL )
|
||||
#define configMINIMAL_STACK_SIZE ( 190 )
|
||||
|
||||
/* MEC14xx JTVIC HW implements 4 priority levels. */
|
||||
#define configISR_STACK_SIZE ( 4 * configMINIMAL_STACK_SIZE )
|
||||
#define configTOTAL_HEAP_SIZE ( ( size_t ) 22800 )
|
||||
#define configMAX_TASK_NAME_LEN ( 8 )
|
||||
#define configUSE_TRACE_FACILITY 0
|
||||
#define configUSE_16_BIT_TICKS 0
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 3
|
||||
#define configQUEUE_REGISTRY_SIZE 0
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_MALLOC_FAILED_HOOK 1
|
||||
#define configUSE_APPLICATION_TASK_TAG 0
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
|
||||
/* Co-routine definitions. */
|
||||
#define configUSE_CO_ROUTINES 0
|
||||
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
|
||||
|
||||
/* Software timer definitions. */
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY ( 2 )
|
||||
#define configTIMER_QUEUE_LENGTH 5
|
||||
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 )
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
to exclude the API function. */
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 0
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 1
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
#define INCLUDE_xTimerPendFunctionCall 1
|
||||
|
||||
/* The priority at which the tick interrupt runs.
|
||||
* Use interrupt controller priority 1 */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY 0x01
|
||||
|
||||
/* The maximum interrupt priority from which FreeRTOS.org API functions can
|
||||
be called. Only API functions that end in ...FromISR() can be used within
|
||||
interrupts. This describes the interrupt in a numeric range from 1 to 7 however
|
||||
only values 1, 3, 5, and 7 are valid */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 0x03
|
||||
|
||||
/* Prevent C specific syntax being included in assembly files. */
|
||||
#ifndef __LANGUAGE_ASSEMBLY
|
||||
extern void vAssertCalled( const char * pcFile, unsigned long ulLine );
|
||||
#define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled( __FILE__, __LINE__ )
|
||||
#endif
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
@@ -0,0 +1,151 @@
|
||||
/*
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/* FreeRTOS includes. */
|
||||
#include "FreeRTOS.h"
|
||||
|
||||
/* Standard demo includes. */
|
||||
#include "IntQueueTimer.h"
|
||||
#include "IntQueue.h"
|
||||
|
||||
/* Microchip includes. */
|
||||
#include "MEC14xx/mec14xx_timers.h"
|
||||
#include "MEC14xx/mec14xx_jtvic.h"
|
||||
#include "MEC14xx/mec14xx.h"
|
||||
|
||||
/* The frequency of the two timers is offset so the time between the timers
|
||||
expiring is not always the same. */
|
||||
#define timerINTERRUPT0_FREQUENCY ( 2000UL )
|
||||
#define timerINTERRUPT1_FREQUENCY ( 2221UL )
|
||||
|
||||
/* MEC14xx JTVIC external interrupt controller is mapped to M14K closely-coupled
|
||||
peripheral space. */
|
||||
#define portMMCR_JTVIC_GIRQ23_PRIA *((volatile uint32_t *)(0xBFFFC3F0ul))
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* These are the C handlers called from the asm wrappers. */
|
||||
void vT0InterruptHandler( void );
|
||||
void vT1InterruptHandler( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vInitialiseTimerForIntQueueTest( void )
|
||||
{
|
||||
/* Timer RT is used for the tick interrupt, timer 3 is used for the high
|
||||
frequency interrupt test. This file therefore uses timers 0 and 1. */
|
||||
uint32_t ulPreload = ( unsigned short ) ( ( configPERIPHERAL_CLOCK_HZ / ( unsigned long ) timerINTERRUPT0_FREQUENCY ) );
|
||||
|
||||
btmr_sleep_en( BTMR0_ID, 0 );
|
||||
btmr_init( BTMR0_ID, BTMR_COUNT_DOWN + BTMR_AUTO_RESTART + BTMR_INT_EN, 0, ulPreload, ulPreload );
|
||||
btmr_start( BTMR0_ID );
|
||||
|
||||
jtvic_clr_source( MEC14xx_GIRQ23_ID, 0 );
|
||||
portMMCR_JTVIC_GIRQ23_PRIA &= ~( 0x0Ful << 0 );
|
||||
portMMCR_JTVIC_GIRQ23_PRIA |= ( ( portIPL_TO_CODE( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ) << 0 );
|
||||
jtvic_en_source( MEC14xx_GIRQ23_ID, 0, pdTRUE );
|
||||
|
||||
ulPreload = ( unsigned short ) ( ( configPERIPHERAL_CLOCK_HZ / ( unsigned long ) timerINTERRUPT1_FREQUENCY ) );
|
||||
btmr_sleep_en( BTMR1_ID, 0 );
|
||||
btmr_init( BTMR1_ID, BTMR_COUNT_DOWN + BTMR_AUTO_RESTART + BTMR_INT_EN, 0, ulPreload, ulPreload );
|
||||
btmr_start( BTMR1_ID );
|
||||
|
||||
jtvic_clr_source( MEC14xx_GIRQ23_ID, 1 );
|
||||
portMMCR_JTVIC_GIRQ23_PRIA &= ~( 0x0Ful << 4 );
|
||||
portMMCR_JTVIC_GIRQ23_PRIA |= ( ( portIPL_TO_CODE( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ) << 4 );
|
||||
jtvic_en_source( MEC14xx_GIRQ23_ID, 1, pdTRUE );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vT0InterruptHandler( void )
|
||||
{
|
||||
/* Disable all interrupts because the source bit is shared with a bit used
|
||||
by the other timer and the high frequency timer test. */
|
||||
__asm volatile( "di" );
|
||||
/* Clear the timer interrupt. */
|
||||
jtvic_clr_source( MEC14xx_GIRQ23_ID, 0 );
|
||||
__asm volatile( "ei" );
|
||||
|
||||
portEND_SWITCHING_ISR( xFirstTimerHandler() );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vT1InterruptHandler( void )
|
||||
{
|
||||
/* Disable all interrupts because the source bit is shared with a bit used
|
||||
by the other timer and the high frequency timer test. */
|
||||
__asm volatile( "di" );
|
||||
/* Clear the timer interrupt. */
|
||||
jtvic_clr_source( MEC14xx_GIRQ23_ID, 1 );
|
||||
__asm volatile( "ei" );
|
||||
|
||||
portEND_SWITCHING_ISR( xSecondTimerHandler() );
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,78 @@
|
||||
/*
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef INT_QUEUE_TIMER_H
|
||||
#define INT_QUEUE_TIMER_H
|
||||
|
||||
void vInitialiseTimerForIntQueueTest( void );
|
||||
portBASE_TYPE xTimer0Handler( void );
|
||||
portBASE_TYPE xTimer1Handler( void );
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,123 @@
|
||||
/*
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#include <xc.h>
|
||||
#include <sys/asm.h>
|
||||
#include "ISR_Support.h"
|
||||
|
||||
#define portEXC_CODE_MASK ( 0x1f << 2 )
|
||||
|
||||
|
||||
.extern vT0InterruptHandler
|
||||
.extern vT1InterruptHandler
|
||||
|
||||
.global vT0InterruptWrapper
|
||||
.global vT1InterruptWrapper
|
||||
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
.set micromips
|
||||
.set noreorder
|
||||
.set noat
|
||||
.ent vT0InterruptWrapper
|
||||
.global girq23_b0
|
||||
|
||||
girq23_b0:
|
||||
vT0InterruptWrapper:
|
||||
|
||||
portSAVE_CONTEXT
|
||||
|
||||
jal vT0InterruptHandler
|
||||
nop
|
||||
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
.end vT0InterruptWrapper
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
.set micromips
|
||||
.set noreorder
|
||||
.set noat
|
||||
.ent vT1InterruptWrapper
|
||||
.global girq23_b1
|
||||
|
||||
girq23_b1:
|
||||
vT1InterruptWrapper:
|
||||
|
||||
portSAVE_CONTEXT
|
||||
|
||||
jal vT1InterruptHandler
|
||||
nop
|
||||
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
.end vT1InterruptWrapper
|
||||
|
||||
@@ -0,0 +1,257 @@
|
||||
/*
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
#include <xc.h>
|
||||
#include <sys/asm.h>
|
||||
|
||||
|
||||
.global vRegTest1
|
||||
.global vRegTest2
|
||||
|
||||
/* Reg test macro helper. Test a register for a known value branching to
|
||||
error_loop if not correct otherwise continuing on */
|
||||
.macro portREG_TEST work_reg, test_reg, test_value
|
||||
.set micromips
|
||||
.set noreorder
|
||||
.set noat
|
||||
|
||||
/* Check each register maintains the value assigned to it for the lifetime
|
||||
of the task. */
|
||||
addiu \work_reg, $0, 0x00
|
||||
addiu \work_reg, \test_reg, -\test_value
|
||||
beq \work_reg, $0, 1f
|
||||
nop
|
||||
/* The register value was not that expected. Jump to the error loop so the
|
||||
cycle counter stops incrementing. */
|
||||
b error_loop
|
||||
nop
|
||||
1:
|
||||
.endm
|
||||
|
||||
|
||||
.set micromips
|
||||
.set noreorder
|
||||
.set noat
|
||||
.ent error_loop
|
||||
|
||||
/* Reg test tasks call the error loop when they find an error. Sitting in the
|
||||
tight error loop prevents them incrementing their ulRegTestnCycles counter, and
|
||||
so allows the check softwate timer to know an error has been found. */
|
||||
error_loop:
|
||||
b error_loop
|
||||
nop
|
||||
|
||||
.end error_loop
|
||||
|
||||
|
||||
.set micromips
|
||||
.set noreorder
|
||||
.set noat
|
||||
.ent vRegTest1
|
||||
|
||||
vRegTest1:
|
||||
/* Fill the registers with known values. */
|
||||
addiu $1, $0, 0x11
|
||||
addiu $2, $0, 0x12
|
||||
addiu $3, $0, 0x13
|
||||
/* $4 contains the address of the loop counter - don't mess with $4. */
|
||||
addiu $5, $0, 0x15
|
||||
addiu $6, $0, 0x16
|
||||
addiu $7, $0, 0x17
|
||||
addiu $8, $0, 0x18
|
||||
addiu $9, $0, 0x19
|
||||
addiu $10, $0, 0x110
|
||||
addiu $11, $0, 0x111
|
||||
addiu $12, $0, 0x112
|
||||
addiu $13, $0, 0x113
|
||||
addiu $14, $0, 0x114
|
||||
addiu $15, $0, 0x115
|
||||
addiu $16, $0, 0x116
|
||||
addiu $17, $0, 0x117
|
||||
addiu $18, $0, 0x118
|
||||
addiu $19, $0, 0x119
|
||||
addiu $20, $0, 0x120
|
||||
addiu $21, $0, 0x121
|
||||
addiu $23, $0, 0x123
|
||||
addiu $24, $0, 0x124
|
||||
addiu $25, $0, 0x125
|
||||
addiu $30, $0, 0x130
|
||||
addiu $22, $0, 0x131
|
||||
|
||||
vRegTest1Loop:
|
||||
portREG_TEST $22, $1, 0x11
|
||||
portREG_TEST $22, $2, 0x12
|
||||
portREG_TEST $22, $3, 0x13
|
||||
portREG_TEST $22, $5, 0x15
|
||||
portREG_TEST $22, $6, 0x16
|
||||
portREG_TEST $22, $7, 0x17
|
||||
portREG_TEST $22, $8, 0x18
|
||||
portREG_TEST $22, $9, 0x19
|
||||
portREG_TEST $22, $10, 0x110
|
||||
portREG_TEST $22, $11, 0x111
|
||||
portREG_TEST $22, $12, 0x112
|
||||
portREG_TEST $22, $13, 0x113
|
||||
portREG_TEST $22, $14, 0x114
|
||||
portREG_TEST $22, $15, 0x115
|
||||
portREG_TEST $22, $16, 0x116
|
||||
portREG_TEST $22, $17, 0x117
|
||||
portREG_TEST $22, $18, 0x118
|
||||
portREG_TEST $22, $19, 0x119
|
||||
portREG_TEST $22, $20, 0x120
|
||||
portREG_TEST $22, $21, 0x121
|
||||
portREG_TEST $22, $23, 0x123
|
||||
portREG_TEST $22, $24, 0x124
|
||||
portREG_TEST $22, $25, 0x125
|
||||
portREG_TEST $22, $30, 0x130
|
||||
|
||||
/* No errors detected. Increment the loop count so the check timer knows
|
||||
this task is still running without error, then loop back to do it all
|
||||
again. The address of the loop counter is in $4. */
|
||||
lw $22, 0( $4 )
|
||||
addiu $22, $22, 0x01
|
||||
sw $22, 0( $4 )
|
||||
b vRegTest1Loop
|
||||
nop
|
||||
|
||||
.end vRegTest1
|
||||
|
||||
|
||||
.set micromips
|
||||
.set noreorder
|
||||
.set noat
|
||||
.ent vRegTest2
|
||||
|
||||
vRegTest2:
|
||||
addiu $1, $0, 0x21
|
||||
addiu $2, $0, 0x22
|
||||
addiu $3, $0, 0x23
|
||||
/* $4 contains the address of the loop counter - don't mess with $4. */
|
||||
addiu $5, $0, 0x25
|
||||
addiu $6, $0, 0x26
|
||||
addiu $7, $0, 0x27
|
||||
addiu $8, $0, 0x28
|
||||
addiu $9, $0, 0x29
|
||||
addiu $10, $0, 0x210
|
||||
addiu $11, $0, 0x211
|
||||
addiu $12, $0, 0x212
|
||||
addiu $13, $0, 0x213
|
||||
addiu $14, $0, 0x214
|
||||
addiu $15, $0, 0x215
|
||||
addiu $16, $0, 0x216
|
||||
addiu $17, $0, 0x217
|
||||
addiu $18, $0, 0x218
|
||||
addiu $19, $0, 0x219
|
||||
addiu $20, $0, 0x220
|
||||
addiu $21, $0, 0x221
|
||||
addiu $23, $0, 0x223
|
||||
addiu $24, $0, 0x224
|
||||
addiu $25, $0, 0x225
|
||||
addiu $30, $0, 0x230
|
||||
addiu $22, $0, 0x231
|
||||
|
||||
vRegTest2Loop:
|
||||
portREG_TEST $22, $1, 0x21
|
||||
portREG_TEST $22, $2, 0x22
|
||||
portREG_TEST $22, $3, 0x23
|
||||
portREG_TEST $22, $5, 0x25
|
||||
portREG_TEST $22, $6, 0x26
|
||||
portREG_TEST $22, $7, 0x27
|
||||
portREG_TEST $22, $8, 0x28
|
||||
portREG_TEST $22, $9, 0x29
|
||||
portREG_TEST $22, $10, 0x210
|
||||
portREG_TEST $22, $11, 0x211
|
||||
portREG_TEST $22, $12, 0x212
|
||||
portREG_TEST $22, $13, 0x213
|
||||
portREG_TEST $22, $14, 0x214
|
||||
portREG_TEST $22, $15, 0x215
|
||||
portREG_TEST $22, $16, 0x216
|
||||
portREG_TEST $22, $17, 0x217
|
||||
portREG_TEST $22, $18, 0x218
|
||||
portREG_TEST $22, $19, 0x219
|
||||
portREG_TEST $22, $20, 0x220
|
||||
portREG_TEST $22, $21, 0x221
|
||||
portREG_TEST $22, $23, 0x223
|
||||
portREG_TEST $22, $24, 0x224
|
||||
portREG_TEST $22, $25, 0x225
|
||||
portREG_TEST $22, $30, 0x230
|
||||
|
||||
/* No errors detected. Increment the loop count so the check timer knows
|
||||
this task is still running without error, then loop back to do it all
|
||||
again. The address of the loop counter is in $4. */
|
||||
lw $22, 0( $4 )
|
||||
addiu $22, $22, 0x01
|
||||
sw $22, 0( $4 )
|
||||
b vRegTest2Loop
|
||||
nop
|
||||
|
||||
.end vRegTest2
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,378 @@
|
||||
/*
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
* NOTE 1: This project provides two demo applications. A simple blinky style
|
||||
* project, and a more comprehensive test and demo application. The
|
||||
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select
|
||||
* between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY
|
||||
* in main.c. This file implements the comprehensive test and demo version.
|
||||
*
|
||||
* NOTE 2: This file only contains the source code that is specific to the
|
||||
* full demo. Generic functions, such as FreeRTOS hook functions, and functions
|
||||
* required to configure the hardware, are defined in main.c.
|
||||
******************************************************************************
|
||||
*
|
||||
* main_full() creates all the demo application tasks and software timers, then
|
||||
* starts the scheduler. The WEB documentation provides more details of the
|
||||
* standard demo application tasks. In addition to the standard demo tasks, the
|
||||
* following tasks and tests are also defined:
|
||||
*
|
||||
* "Register test" tasks - These tasks are used in part to test the kernel port.
|
||||
* They set each processor register to a known value, then check that the
|
||||
* register still contains that value. Each of the tasks sets the registers
|
||||
* to different values, and will get swapping in and out between setting and
|
||||
* then subsequently checking the register values. Discovery of an incorrect
|
||||
* value would be indicative of an error in the task switching mechanism.
|
||||
*
|
||||
* "High Frequency Timer Test" - The high frequency timer is created to test
|
||||
* the interrupt nesting method. The standard demo interrupt nesting test tasks
|
||||
* are created with priorities at or below configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
* because they use interrupt safe FreeRTOS API functions. The high frequency
|
||||
* time is created with a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY,
|
||||
* so cannot us the same API functions.
|
||||
*
|
||||
* "Check" timer - The check software timer period is initially set to three
|
||||
* seconds. The callback function associated with the check software timer
|
||||
* checks that all the standard demo tasks, and the register check tasks, are
|
||||
* not only still executing, but are executing without reporting any errors. If
|
||||
* the check software timer discovers that a task has either stalled, or
|
||||
* reported an error, then it changes its own execution period from the initial
|
||||
* three seconds, to just 200ms. The check software timer also toggle LED
|
||||
* mainCHECK_LED; If mainCHECK_LED toggles every 3 seconds, no errors have
|
||||
* been detected. If mainCHECK_LED toggles every 200ms then an error has been
|
||||
* detected in at least one task.
|
||||
*
|
||||
*/
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "queue.h"
|
||||
#include "semphr.h"
|
||||
#include "timers.h"
|
||||
|
||||
/* Demo application includes. */
|
||||
#include "blocktim.h"
|
||||
#include "semtest.h"
|
||||
#include "GenQTest.h"
|
||||
#include "IntQueue.h"
|
||||
#include "countsem.h"
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The period after which the check timer will expire, in ms, provided no errors
|
||||
have been reported by any of the standard demo tasks. ms are converted to the
|
||||
equivalent in ticks using the portTICK_PERIOD_MS constant. */
|
||||
#define mainCHECK_TIMER_PERIOD_MS pdMS_TO_TICKS( 3000UL )
|
||||
|
||||
/* The period at which the check timer will expire, in ms, if an error has been
|
||||
reported in one of the standard demo tasks. ms are converted to the equivalent
|
||||
in ticks using the portTICK_PERIOD_MS constant. */
|
||||
#define mainERROR_CHECK_TIMER_PERIOD_MS pdMS_TO_TICKS( 200UL )
|
||||
|
||||
/* The priorities of the various demo application tasks. */
|
||||
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
|
||||
#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY )
|
||||
|
||||
/* The LED controlled by the 'check' software timer. */
|
||||
#define mainCHECK_LED ( 2 )
|
||||
|
||||
/* Misc. */
|
||||
#define mainDONT_BLOCK ( 0 )
|
||||
|
||||
/* The frequency at which the "high frequency interrupt" interrupt will
|
||||
occur. */
|
||||
#define mainTEST_INTERRUPT_FREQUENCY ( 20000 )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* The check timer callback function, as described at the top of this file.
|
||||
*/
|
||||
static void prvCheckTimerCallback( TimerHandle_t xTimer );
|
||||
|
||||
/*
|
||||
* It is important to ensure the high frequency timer test does not start before
|
||||
* the kernel. It is therefore started from inside a software timer callback
|
||||
* function, which will not execute until the timer service/daemon task is
|
||||
* executing. A one-shot timer is used, so the callback function will only
|
||||
* execute once (unless it is manually reset/restarted).
|
||||
*/
|
||||
static void prvSetupHighFrequencyTimerTest( TimerHandle_t xTimer );
|
||||
|
||||
/*
|
||||
* Tasks that test the context switch mechanism by filling the processor
|
||||
* registers with known values, then checking that the values contained
|
||||
* within the registers is as expected. The tasks are likely to get swapped
|
||||
* in and out between setting the register values and checking the register
|
||||
* values.
|
||||
*/
|
||||
static void prvRegTestTask1( void *pvParameters );
|
||||
static void prvRegTestTask2( void *pvParameters );
|
||||
|
||||
/*
|
||||
* LED toggle function that uses a critical section to ensure thread safety.
|
||||
*/
|
||||
extern void vToggleLED( uint8_t ucLED );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Variables incremented by prvRegTestTask1() and prvRegTestTask2() respectively
|
||||
on each iteration of their function. These are used to detect errors in the
|
||||
reg test tasks. */
|
||||
volatile unsigned long ulRegTest1Cycles = 0, ulRegTest2Cycles = 0;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Create the demo tasks then start the scheduler.
|
||||
*/
|
||||
int main_full( void )
|
||||
{
|
||||
TimerHandle_t xTimer = NULL;
|
||||
|
||||
/* Create all the other standard demo tasks. */
|
||||
vCreateBlockTimeTasks();
|
||||
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
|
||||
vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );
|
||||
vStartInterruptQueueTasks();
|
||||
vStartCountingSemaphoreTasks();
|
||||
|
||||
/* Create the tasks defined within this file. */
|
||||
xTaskCreate( prvRegTestTask1, /* The function that implements the task. */
|
||||
"Reg1", /* Text name for the task to assist debugger - not used by FreeRTOS itself. */
|
||||
configMINIMAL_STACK_SIZE, /* The stack size to allocate for the task - specified in words not bytes. */
|
||||
NULL, /* The parameter to pass into the task - not used in this case so set to NULL. */
|
||||
tskIDLE_PRIORITY, /* The priority to assign to the task. */
|
||||
NULL ); /* Used to obtain a handle to the task being created - not used in this case so set to NULL. */
|
||||
|
||||
xTaskCreate( prvRegTestTask2, "Reg2", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
|
||||
|
||||
/* Create the software timer that performs the 'check' functionality, as
|
||||
described at the top of this file. */
|
||||
xTimer = xTimerCreate( "CheckTimer",/* A text name, purely to help debugging. */
|
||||
( mainCHECK_TIMER_PERIOD_MS ), /* The timer period, in this case 3000ms (3s). */
|
||||
pdTRUE, /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */
|
||||
( void * ) 0, /* The ID is not used, so can be set to anything. */
|
||||
prvCheckTimerCallback ); /* The callback function that inspects the status of all the other tasks. */
|
||||
|
||||
if( xTimer != NULL )
|
||||
{
|
||||
xTimerStart( xTimer, mainDONT_BLOCK );
|
||||
}
|
||||
|
||||
/* A software timer is also used to start the high frequency timer test.
|
||||
This is to ensure the test does not start before the kernel. This time a
|
||||
one shot software timer is used. */
|
||||
xTimer = xTimerCreate( "HighHzTimerSetup", 1, pdFALSE, ( void * ) 0, prvSetupHighFrequencyTimerTest );
|
||||
if( xTimer != NULL )
|
||||
{
|
||||
xTimerStart( xTimer, mainDONT_BLOCK );
|
||||
}
|
||||
|
||||
/* Finally start the scheduler. */
|
||||
vTaskStartScheduler();
|
||||
|
||||
/* If all is well, the scheduler will now be running, and the following line
|
||||
will never be reached. If the following line does execute, then there was
|
||||
insufficient FreeRTOS heap memory available for the idle and/or timer tasks
|
||||
to be created. See the memory management section on the FreeRTOS web site
|
||||
for more details. http://www.freertos.org/a00111.html */
|
||||
for( ;; );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvRegTestTask1( void *pvParameters )
|
||||
{
|
||||
extern void vRegTest1( volatile unsigned long * );
|
||||
|
||||
/* Avoid compiler warnings. */
|
||||
( void ) pvParameters;
|
||||
|
||||
/* Pass the address of the RegTest1 loop counter into the test function,
|
||||
which is necessarily implemented in assembler. */
|
||||
vRegTest1( &ulRegTest1Cycles );
|
||||
|
||||
/* vRegTest1 should never exit! */
|
||||
vTaskDelete( NULL );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvRegTestTask2( void *pvParameters )
|
||||
{
|
||||
extern void vRegTest2( volatile unsigned long * );
|
||||
|
||||
/* Avoid compiler warnings. */
|
||||
( void ) pvParameters;
|
||||
|
||||
/* Pass the address of the RegTest2 loop counter into the test function,
|
||||
which is necessarily implemented in assembler. */
|
||||
vRegTest2( &ulRegTest2Cycles );
|
||||
|
||||
/* vRegTest1 should never exit! */
|
||||
vTaskDelete( NULL );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvCheckTimerCallback( TimerHandle_t xTimer )
|
||||
{
|
||||
static long lChangedTimerPeriodAlready = pdFALSE;
|
||||
static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0, ulLastHighFrequencyTimerInterrupts = 0;
|
||||
static const unsigned long ulExpectedHighFrequencyInterrupts = ( ( mainTEST_INTERRUPT_FREQUENCY / 1000UL ) * mainCHECK_TIMER_PERIOD_MS ) - 10; /* 10 allows for a margin of error. */
|
||||
unsigned long ulErrorOccurred = pdFALSE;
|
||||
/* The count of the high frequency timer interrupts. */
|
||||
extern unsigned long ulHighFrequencyTimerInterrupts;
|
||||
|
||||
/* Avoid compiler warnings. */
|
||||
( void ) xTimer;
|
||||
|
||||
/* Check that the register test 1 task is still running. */
|
||||
if( ulLastRegTest1Value == ulRegTest1Cycles )
|
||||
{
|
||||
ulErrorOccurred |= ( 0x01UL << 1UL );
|
||||
}
|
||||
ulLastRegTest1Value = ulRegTest1Cycles;
|
||||
|
||||
/* Check that the register test 2 task is still running. */
|
||||
if( ulLastRegTest2Value == ulRegTest2Cycles )
|
||||
{
|
||||
ulErrorOccurred |= ( 0x01UL << 2UL );
|
||||
}
|
||||
ulLastRegTest2Value = ulRegTest2Cycles;
|
||||
|
||||
/* Have any of the standard demo tasks detected an error in their
|
||||
operation? */
|
||||
if( xAreGenericQueueTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorOccurred |= ( 0x01UL << 3UL );
|
||||
}
|
||||
else if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorOccurred |= ( 0x01UL << 4UL );
|
||||
}
|
||||
else if( xAreSemaphoreTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorOccurred |= ( 0x01UL << 5UL );
|
||||
}
|
||||
else if( xAreIntQueueTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorOccurred |= ( 0x01UL << 6UL );
|
||||
}
|
||||
else if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorOccurred |= ( 0x01UL << 7UL );
|
||||
}
|
||||
|
||||
/* Ensure the expected number of high frequency interrupts have occurred. */
|
||||
if( ulLastHighFrequencyTimerInterrupts != 0 )
|
||||
{
|
||||
if( ( ulHighFrequencyTimerInterrupts - ulLastHighFrequencyTimerInterrupts ) < ulExpectedHighFrequencyInterrupts )
|
||||
{
|
||||
ulErrorOccurred |= ( 0x01UL << 8UL );
|
||||
}
|
||||
}
|
||||
ulLastHighFrequencyTimerInterrupts = ulHighFrequencyTimerInterrupts;
|
||||
|
||||
if( ulErrorOccurred != pdFALSE )
|
||||
{
|
||||
/* An error occurred. Increase the frequency at which the check timer
|
||||
toggles its LED to give visual feedback of the potential error
|
||||
condition. */
|
||||
if( lChangedTimerPeriodAlready == pdFALSE )
|
||||
{
|
||||
lChangedTimerPeriodAlready = pdTRUE;
|
||||
|
||||
/* This call to xTimerChangePeriod() uses a zero block time.
|
||||
Functions called from inside of a timer callback function must
|
||||
*never* attempt to block as to do so could impact other software
|
||||
timers. */
|
||||
xTimerChangePeriod( xTimer, ( mainERROR_CHECK_TIMER_PERIOD_MS ), mainDONT_BLOCK );
|
||||
}
|
||||
}
|
||||
|
||||
vToggleLED( mainCHECK_LED );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupHighFrequencyTimerTest( TimerHandle_t xTimer )
|
||||
{
|
||||
void vSetupTimerTest( unsigned short usFrequencyHz );
|
||||
|
||||
/* Prevent compiler warnings */
|
||||
(void) xTimer;
|
||||
|
||||
/* Setup the high frequency, high priority, timer test. It is setup in this
|
||||
software timer callback to ensure it does not start before the kernel does.
|
||||
This is a one shot timer - so the setup routine will only be executed once. */
|
||||
|
||||
vSetupTimerTest( mainTEST_INTERRUPT_FREQUENCY );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
@@ -0,0 +1,144 @@
|
||||
/*
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that has become a de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly and support the FreeRTOS *
|
||||
* project by purchasing a FreeRTOS tutorial book, reference *
|
||||
* manual, or both from: http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
* Thank you! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available from the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
* not run, what could be wrong?" *
|
||||
* *
|
||||
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||
license and Real Time Engineers Ltd. contact details.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/* High speed timer test as described in main.c. */
|
||||
|
||||
/* System port includes */
|
||||
#include "appcfg.h"
|
||||
#include "platform.h"
|
||||
#include "MEC14xx/mec14xx.h"
|
||||
#include "MEC14xx/mec14xx_girqs.h"
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
|
||||
/* The priority of the high speed timer interrupt. */
|
||||
#define timerTEST_INT_PRIORITY ( 7 )
|
||||
|
||||
/* MEC14xx Timer 3 Timer MMCR's */
|
||||
#define portMMCR_TMR3_COUNT *((volatile uint32_t *)(0xA0000C60ul))
|
||||
#define portMMCR_TMR3_PRELOAD *((volatile uint32_t *)(0xA0000C64ul))
|
||||
#define portMMCR_TMR3_STATUS *((volatile uint32_t *)(0xA0000C68ul))
|
||||
#define portMMCR_TMR3_INTEN *((volatile uint32_t *)(0xA0000C6Cul))
|
||||
#define portMMCR_TMR3_CONTROL *((volatile uint32_t *)(0xA0000C70ul))
|
||||
|
||||
/* MEC14xx JTVIC external interrupt controller
|
||||
* is mapped to M14K closely-coupled peripheral space.
|
||||
*/
|
||||
#define portGIRQ23_TMR3_TIMER_BITPOS (3)
|
||||
#define portGIRQ23_TMR3_TIMER_MASK (1ul << (portGIRQ23_TMR3_TIMER_BITPOS))
|
||||
#define portMMCR_JTVIC_GIRQ23_SRC *((volatile uint32_t *)(0xBFFFC0F0ul))
|
||||
#define portMMCR_JTVIC_GIRQ23_SETEN *((volatile uint32_t *)(0xBFFFC0F4ul))
|
||||
#define portMMCR_JTVIC_GIRQ23_PRIA *((volatile uint32_t *)(0xBFFFC3F0ul))
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Incremented every 20,000 interrupts, so should count in seconds. */
|
||||
unsigned long ulHighFrequencyTimerInterrupts = 0;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vSetupTimerTest( unsigned short usFrequencyHz )
|
||||
{
|
||||
/* Timer 3 is going to interrupt at usFrequencyHz Hz. */
|
||||
const uint32_t ulPreload = ( unsigned short ) ( ( configPERIPHERAL_CLOCK_HZ / ( unsigned long ) usFrequencyHz ) - 1 );
|
||||
|
||||
/* Timer 3 is used to generate interrupts above the kernel and max syscall
|
||||
interrupt priorities. No system library calls are used here as they are not
|
||||
guaranteed to be re-entrant. */
|
||||
portMMCR_TMR3_CONTROL = 1ul;
|
||||
portMMCR_TMR3_PRELOAD = ulPreload;
|
||||
portMMCR_TMR3_COUNT = ulPreload;
|
||||
portMMCR_TMR3_INTEN = 0x0001ul;
|
||||
portMMCR_TMR3_STATUS = 0x0001ul;
|
||||
/* Enable Timer 3, and set for auto restart, counting down. */
|
||||
portMMCR_TMR3_CONTROL |= 0x0008;
|
||||
portMMCR_TMR3_CONTROL |= 0x0020;
|
||||
|
||||
/* Configure interrupts from the Timer 3. */
|
||||
portMMCR_JTVIC_GIRQ23_SRC = ( portGIRQ23_TMR3_TIMER_MASK );
|
||||
portMMCR_JTVIC_GIRQ23_PRIA &= ~( 0x0Ful << 12 );
|
||||
portMMCR_JTVIC_GIRQ23_PRIA |= ( ( portIPL_TO_CODE( timerTEST_INT_PRIORITY ) ) << 12 );
|
||||
portMMCR_JTVIC_GIRQ23_SETEN = ( portGIRQ23_TMR3_TIMER_MASK );
|
||||
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Interrupt handler for Timer 3 interrupts, no library functions are used
|
||||
here as they may not be re-entrant. */
|
||||
void __attribute__((interrupt, nomips16)) girq23_b3( void )
|
||||
{
|
||||
ulHighFrequencyTimerInterrupts++;
|
||||
|
||||
/* The interrupt flag registered is shared with the lower priority timer
|
||||
interrupts and the RTOS timer so disable interrupts here. This is not
|
||||
strictly necessary since this is the highest priority interrupt. */
|
||||
__asm volatile( "di" );
|
||||
/* Clear the timer interrupt. */
|
||||
portMMCR_JTVIC_GIRQ23_SRC = portGIRQ23_TMR3_TIMER_MASK;
|
||||
__asm volatile( "ei" );
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,75 @@
|
||||
/*
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that has become a de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly and support the FreeRTOS *
|
||||
* project by purchasing a FreeRTOS tutorial book, reference *
|
||||
* manual, or both from: http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
* Thank you! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available from the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
* not run, what could be wrong?" *
|
||||
* *
|
||||
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||
license and Real Time Engineers Ltd. contact details.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef TIMER_TEST_H
|
||||
#define TIMER_TEST_H
|
||||
|
||||
/* Setup the high frequency timer interrupt. */
|
||||
void vSetupTimerTest( unsigned short usFrequencyHz );
|
||||
|
||||
#endif /* TIMER_TEST_H */
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,97 @@
|
||||
/*****************************************************************************
|
||||
* (c) 2014 Microchip Technology Inc. and its subsidiaries.
|
||||
* You may use this software and any derivatives exclusively with
|
||||
* Microchip products.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".
|
||||
* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP
|
||||
* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
|
||||
* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
|
||||
* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
|
||||
* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
|
||||
* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.
|
||||
* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL
|
||||
* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF
|
||||
* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE
|
||||
* OF THESE TERMS.
|
||||
*****************************************************************************/
|
||||
|
||||
/** @file general_exception.c
|
||||
*MEC14xx General Exception Handler
|
||||
*/
|
||||
/** @defgroup MEC14xx Exceptions
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
#include "appcfg.h"
|
||||
#include "platform.h"
|
||||
#include "MEC14xx/mec14xx.h"
|
||||
#include "MEC14xx/mec14xx_trace_inline.h"
|
||||
|
||||
typedef struct gen_except_capture
|
||||
{
|
||||
uint32_t stack_ptr;
|
||||
uint32_t cp0_status;
|
||||
uint32_t cp0_cause;
|
||||
uint32_t cp0_epc;
|
||||
uint32_t cp0_error_epc;
|
||||
uint32_t cp0_nexc;
|
||||
uint32_t cp0_nepc;
|
||||
uint32_t cp0_badvaddr;
|
||||
uint32_t ahb_err;
|
||||
} GEN_EXCEPT_CAPTURE;
|
||||
|
||||
GEN_EXCEPT_CAPTURE gexc_cap;
|
||||
|
||||
void
|
||||
__attribute__((nomips16, noreturn)) _general_exception_handler (void)
|
||||
{
|
||||
/*
|
||||
* MEC14xx Application General Exception handler
|
||||
*/
|
||||
uint32_t e;
|
||||
|
||||
/* Get current Stack Pointer. Note: this is not SP at
|
||||
* exception. XC32 wraps _general_exception_handler in
|
||||
* assembly code which saves state resulting is a
|
||||
* modified SP. Wrapper allocates 88 bytes for context
|
||||
* save. Original SP = SPcurrent + 88.
|
||||
*/
|
||||
__asm__ __volatile (
|
||||
"move %0,$sp \n\t"
|
||||
"nop \n\t"
|
||||
:"=r" (e)
|
||||
::);
|
||||
gexc_cap.stack_ptr = e;
|
||||
|
||||
gexc_cap.cp0_status = _CP0_GET_STATUS();
|
||||
gexc_cap.cp0_cause = _CP0_GET_CAUSE();
|
||||
gexc_cap.cp0_epc = _CP0_GET_EPC();
|
||||
gexc_cap.cp0_error_epc = _CP0_GET_ERROREPC();
|
||||
gexc_cap.cp0_nexc = _CP0_GET_NESTEDEXC();
|
||||
gexc_cap.cp0_nepc = _CP0_GET_NESTEDEPC();
|
||||
gexc_cap.cp0_badvaddr = _CP0_GET_BADVADDR();
|
||||
|
||||
trace0(0, AP3GENEXCEPT, 0, "Application General Exception Handler (BEV=0)");
|
||||
TRACE11(601, AP3GENEXCEPT, 0, "Current SP = 0x%08x",gexc_cap.stack_ptr);
|
||||
TRACE11(602, AP3GENEXCEPT, 0, "CP0 STATUS = 0x%08x",gexc_cap.cp0_status);
|
||||
TRACE11(603, AP3GENEXCEPT, 0, "CP0 CAUSE = 0x%08x",gexc_cap.cp0_cause);
|
||||
TRACE11(604, AP3GENEXCEPT, 0, "CP0 EPC = 0x%08x",gexc_cap.cp0_epc);
|
||||
TRACE11(605, AP3GENEXCEPT, 0, "CP0 ERROREPC = 0x%08x",gexc_cap.cp0_error_epc);
|
||||
TRACE11(606, AP3GENEXCEPT, 0, "CP0 NEXC = 0x%08x",gexc_cap.cp0_nexc);
|
||||
TRACE11(607, AP3GENEXCEPT, 0, "CP0 NEPC = 0x%08x",gexc_cap.cp0_nepc);
|
||||
TRACE11(608, AP3GENEXCEPT, 0, "CP0 BADVADDR = 0x%08x",gexc_cap.cp0_badvaddr);
|
||||
|
||||
for (;;) {
|
||||
__asm__ __volatile ("%(ssnop%)" : :);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* end general_exception.c */
|
||||
/** @}
|
||||
*/
|
||||
|
||||
+128
@@ -0,0 +1,128 @@
|
||||
/*********************************************************************
|
||||
*
|
||||
* General Exception
|
||||
*
|
||||
*********************************************************************
|
||||
* Filename: general-exception.S
|
||||
*
|
||||
* Processor: PIC32
|
||||
*
|
||||
* Compiler: MPLAB XC32 v1.00
|
||||
* MPLAB X IDE
|
||||
* Company: Microchip Technology Inc.
|
||||
*
|
||||
* Software License Agreement
|
||||
*
|
||||
* This software is developed by Microchip Technology Inc. and its
|
||||
* subsidiaries ("Microchip").
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Microchip's name may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY MICROCHIP "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
|
||||
* MICROCHIP BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING BUT NOT LIMITED TO
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWSOEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
********************************************************************/
|
||||
|
||||
#include <xc.h>
|
||||
#ifdef __LIBBUILD__
|
||||
.file 1 "general-exception.S"
|
||||
.loc 1 0
|
||||
#endif
|
||||
###################
|
||||
# Default general exception handler
|
||||
###################
|
||||
|
||||
.extern _general_exception_handler
|
||||
|
||||
.section .text.general_exception, code
|
||||
.set noreorder
|
||||
.set noat
|
||||
.set nomips16
|
||||
.globl _general_exception_context
|
||||
.ent _general_exception_context
|
||||
|
||||
_general_exception_context:
|
||||
|
||||
# Save off the non-callee saved registers that may get mucked with
|
||||
addiu sp, sp, -88
|
||||
sw $1, 4(sp)
|
||||
sw v0, 8(sp)
|
||||
sw v1, 12(sp)
|
||||
sw a0, 16(sp)
|
||||
sw a1, 20(sp)
|
||||
sw a2, 24(sp)
|
||||
sw a3, 28(sp)
|
||||
sw t0, 32(sp)
|
||||
sw t1, 36(sp)
|
||||
sw t2, 40(sp)
|
||||
sw t3, 44(sp)
|
||||
sw t4, 48(sp)
|
||||
sw t5, 52(sp)
|
||||
sw t6, 56(sp)
|
||||
sw t7, 60(sp)
|
||||
sw t8, 64(sp)
|
||||
sw t9, 68(sp)
|
||||
sw ra, 72(sp)
|
||||
mflo t0
|
||||
sw t0, 76(sp)
|
||||
mfhi t0
|
||||
sw t0, 80(sp)
|
||||
|
||||
la k0,_general_exception_handler
|
||||
nop
|
||||
|
||||
# Pass Cause and Status to the handler function
|
||||
mfc0 a0, _CP0_CAUSE
|
||||
mfc0 a1, _CP0_STATUS
|
||||
jalr k0
|
||||
nop
|
||||
|
||||
lw t0, 80(sp)
|
||||
mthi t0
|
||||
lw t0, 76(sp)
|
||||
mtlo t0
|
||||
|
||||
lw $1, 4(sp)
|
||||
lw v0, 8(sp)
|
||||
lw v1, 12(sp)
|
||||
lw a0, 16(sp)
|
||||
lw a1, 20(sp)
|
||||
lw a2, 24(sp)
|
||||
lw a3, 28(sp)
|
||||
lw t0, 32(sp)
|
||||
lw t1, 36(sp)
|
||||
lw t2, 40(sp)
|
||||
lw t3, 44(sp)
|
||||
lw t4, 48(sp)
|
||||
lw t5, 52(sp)
|
||||
lw t6, 56(sp)
|
||||
lw t7, 60(sp)
|
||||
lw t8, 64(sp)
|
||||
lw t9, 68(sp)
|
||||
lw ra, 72(sp)
|
||||
addiu sp, sp, 88
|
||||
|
||||
ehb
|
||||
eret
|
||||
|
||||
.end _general_exception_context
|
||||
|
||||
@@ -0,0 +1,224 @@
|
||||
/*****************************************************************************
|
||||
* Copyright 2014 Microchip Technology Inc. and its subsidiaries.
|
||||
* You may use this software and any derivatives exclusively with
|
||||
* Microchip products.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".
|
||||
* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP
|
||||
* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
|
||||
* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
|
||||
* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
|
||||
* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
|
||||
* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.
|
||||
* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL
|
||||
* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF
|
||||
* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE
|
||||
* OF THESE TERMS.
|
||||
*****************************************************************************/
|
||||
|
||||
/** @file girq08.c
|
||||
*Interrupt service routines for MIPS using vanilla GCC and MCHP XC32
|
||||
*/
|
||||
/** @defgroup MEC14xx ISR
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "appcfg.h"
|
||||
#include "platform.h"
|
||||
#include "MEC14xx/mec14xx.h"
|
||||
#include "MEC14xx/mec14xx_girqs.h"
|
||||
#include "MEC14xx/mec14xx_gpio.h"
|
||||
#include "MEC14xx/mec14xx_trace_func.h"
|
||||
|
||||
|
||||
|
||||
#if GIRQ08_DISAGG == 0
|
||||
|
||||
/*
|
||||
* Aggregated mode handler, must handle all enabled
|
||||
* GIRQ08 sources.
|
||||
*/
|
||||
void __attribute__((weak, interrupt, nomips16, section(".girqs")))
|
||||
girq08_isr( void )
|
||||
{
|
||||
JTVIC_GROUP_EN_CLR->w = (1ul<<0);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
/*
|
||||
* Disaggregated GIRQ08 subhandlers, one for each
|
||||
* source. Called by assembly language wrapper.
|
||||
*/
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b0(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 0);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b1(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 1);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b2(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 2);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b3(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 3);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b4(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 4);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b5(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 5);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b6(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 6);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b7(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 7);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b8(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 8);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b9(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 9);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b10(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 10);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b11(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 11);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b12(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 12);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b13(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 13);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b14(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 14);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b15(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 15);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b16(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 16);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b17(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 17);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b18(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 18);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b19(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 19);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b20(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 20);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b21(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 21);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq08_b22(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ08_ID, 22);
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/* end girq08.c */
|
||||
/** @}
|
||||
*/
|
||||
|
||||
@@ -0,0 +1,166 @@
|
||||
/*
|
||||
Copyright (C) 2014 Microchip Inc.
|
||||
All rights reserved
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifdef __XC32
|
||||
#include <xc.h>
|
||||
#include <sys/asm.h>
|
||||
#else
|
||||
#include "Regs.S"
|
||||
#endif
|
||||
|
||||
#include "MEC14xx/mec14xx_girqm.h"
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
/***************************************************************
|
||||
* MEC14xx GIRQ08 Disaggregated Vector Jump table
|
||||
*
|
||||
***************************************************************/
|
||||
|
||||
.extern girq08_b0
|
||||
.extern girq08_b1
|
||||
.extern girq08_b2
|
||||
.extern girq08_b3
|
||||
.extern girq08_b4
|
||||
.extern girq08_b5
|
||||
.extern girq08_b6
|
||||
.extern girq08_b7
|
||||
.extern girq08_b8
|
||||
.extern girq08_b9
|
||||
.extern girq08_b10
|
||||
.extern girq08_b11
|
||||
.extern girq08_b12
|
||||
.extern girq08_b13
|
||||
.extern girq08_b14
|
||||
.extern girq08_b15
|
||||
.extern girq08_b16
|
||||
.extern girq08_b17
|
||||
.extern girq08_b18
|
||||
.extern girq08_b19
|
||||
.extern girq08_b20
|
||||
.extern girq08_b21
|
||||
.extern girq08_b22
|
||||
|
||||
#if GIRQ08_DISAGG != 0
|
||||
|
||||
/*
|
||||
* Disaggregated girq08v
|
||||
* Program address of this version of girq23v into JTVIC GIRQ08
|
||||
* Aggregator Control register with bit[0] = 1.
|
||||
*/
|
||||
.insn
|
||||
#ifdef __XC32
|
||||
.section .girqs.girq08_isr,code
|
||||
#else
|
||||
.section .girqs.girq08_isr,"x"
|
||||
#endif
|
||||
.set nomips16
|
||||
.set micromips
|
||||
.set noreorder
|
||||
.set noat
|
||||
.global girq08_isr
|
||||
.ent girq08_isr
|
||||
.align 2
|
||||
|
||||
girq08_isr:
|
||||
J girq08_b0
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b1
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b2
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b3
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b4
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b5
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b6
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b7
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b8
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b9
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b10
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b11
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b12
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b13
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b14
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b15
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b16
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b17
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b18
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b19
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b20
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b21
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq08_b22
|
||||
NOP
|
||||
|
||||
.end girq08_isr
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,275 @@
|
||||
/*****************************************************************************
|
||||
* Copyright 2014 Microchip Technology Inc. and its subsidiaries.
|
||||
* You may use this software and any derivatives exclusively with
|
||||
* Microchip products.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".
|
||||
* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP
|
||||
* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
|
||||
* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
|
||||
* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
|
||||
* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
|
||||
* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.
|
||||
* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL
|
||||
* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF
|
||||
* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE
|
||||
* OF THESE TERMS.
|
||||
*****************************************************************************/
|
||||
|
||||
/** @file girq09.c
|
||||
*Interrupt service routines for MIPS using vanilla GCC and MCHP XC32
|
||||
*/
|
||||
/** @defgroup MEC14xx ISR
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#include "appcfg.h"
|
||||
#include "platform.h"
|
||||
#include "MEC14xx/mec14xx.h"
|
||||
#include "MEC14xx/mec14xx_girqs.h"
|
||||
#include "MEC14xx/mec14xx_gpio.h"
|
||||
#include "MEC14xx/mec14xx_trace_func.h"
|
||||
|
||||
|
||||
#if GIRQ09_DISAGG == 0
|
||||
|
||||
/*
|
||||
* Aggregated mode handler, must handle all enabled
|
||||
* GIRQ08 sources.
|
||||
*/
|
||||
void __attribute__((weak, interrupt, nomips16, section(".girqs")))
|
||||
girq09_isr( void )
|
||||
{
|
||||
JTVIC_GROUP_EN_CLR->w = (1ul<<1);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b0(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 0);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 0);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b1(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 1);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 1);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b2(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 2);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 2);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b3(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 3);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 3);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b4(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 4);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 4);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b5(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 5);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 5);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b6(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 6);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 6);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b7(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 7);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 7);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b8(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 8);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 8);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b9(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 9);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 9);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b10(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 10);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 10);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b11(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 11);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 11);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b12(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 12);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 12);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b13(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 13);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 13);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b14(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 14);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 14);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b15(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 15);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 15);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b16(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 16);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 16);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b17(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 17);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 17);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b18(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 18);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 18);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b19(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 19);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 19);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b20(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 20);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 20);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b21(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 21);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 21);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b22(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 22);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 22);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b23(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 23);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 23);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b24(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 24);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 24);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b25(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 25);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 25);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b26(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 26);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 26);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b27(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 27);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 27);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b28(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 28);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 28);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b29(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 29);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 29);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq09_b30(void)
|
||||
{
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].EN_CLR = (1ul << 30);
|
||||
JTVIC_GIRQ->REGS[MEC14xx_GIRQ09_ID].SOURCE = (1ul << 30);
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
/* end girq09.c */
|
||||
/** @}
|
||||
*/
|
||||
|
||||
@@ -0,0 +1,209 @@
|
||||
/*
|
||||
Copyright (C) 2014 Microchip Inc.
|
||||
All rights reserved
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifdef __XC32
|
||||
#include <xc.h>
|
||||
#include <sys/asm.h>
|
||||
#else
|
||||
#include "Regs.S"
|
||||
#endif
|
||||
|
||||
#include "MEC14xx/mec14xx_girqm.h"
|
||||
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
/***************************************************************
|
||||
* MEC14xx GIRQ09 Disaggregated Vector Jump table
|
||||
*
|
||||
***************************************************************/
|
||||
|
||||
.extern girq09_b0
|
||||
.extern girq09_b1
|
||||
.extern girq09_b2
|
||||
.extern girq09_b3
|
||||
.extern girq09_b4
|
||||
.extern girq09_b5
|
||||
.extern girq09_b6
|
||||
.extern girq09_b7
|
||||
.extern girq09_b8
|
||||
.extern girq09_b9
|
||||
.extern girq09_b10
|
||||
.extern girq09_b11
|
||||
.extern girq09_b12
|
||||
.extern girq09_b13
|
||||
.extern girq09_b14
|
||||
.extern girq09_b15
|
||||
.extern girq09_b16
|
||||
.extern girq09_b17
|
||||
.extern girq09_b18
|
||||
.extern girq09_b19
|
||||
.extern girq09_b20
|
||||
.extern girq09_b21
|
||||
.extern girq09_b22
|
||||
.extern girq09_b23
|
||||
.extern girq09_b24
|
||||
.extern girq09_b25
|
||||
.extern girq09_b26
|
||||
.extern girq09_b27
|
||||
.extern girq09_b28
|
||||
.extern girq09_b29
|
||||
.extern girq09_b30
|
||||
|
||||
#if GIRQ09_DISAGG != 0
|
||||
|
||||
/*
|
||||
* Disaggregated girq09v
|
||||
* Program address of this version of girq23v into JTVIC GIRQ09
|
||||
* Aggregator Control register with bit[0] = 1.
|
||||
*/
|
||||
.insn
|
||||
#ifdef __XC32
|
||||
.section .girqs.girq09_isr, code
|
||||
#else
|
||||
.section .girqs.girq09_isr,"x"
|
||||
#endif
|
||||
.set nomips16
|
||||
.set micromips
|
||||
.set noreorder
|
||||
.set noat
|
||||
.global girq09_isr
|
||||
.ent girq09_isr
|
||||
.align 2
|
||||
|
||||
girq09_isr:
|
||||
J girq09_b0
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b1
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b2
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b3
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b4
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b5
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b6
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b7
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b8
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b9
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b10
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b11
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b12
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b13
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b14
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b15
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b16
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b17
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b18
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b19
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b20
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b21
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b22
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b23
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b24
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b25
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b26
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b27
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b28
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b29
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq09_b30
|
||||
NOP
|
||||
|
||||
.end girq09_isr
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
|
||||
@@ -0,0 +1,197 @@
|
||||
/*****************************************************************************
|
||||
* Copyright 2014 Microchip Technology Inc. and its subsidiaries.
|
||||
* You may use this software and any derivatives exclusively with
|
||||
* Microchip products.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".
|
||||
* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP
|
||||
* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
|
||||
* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
|
||||
* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
|
||||
* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
|
||||
* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.
|
||||
* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL
|
||||
* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF
|
||||
* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE
|
||||
* OF THESE TERMS.
|
||||
*****************************************************************************/
|
||||
|
||||
/** @file girq10.c
|
||||
*Interrupt service routines for MIPS using vanilla GCC and MCHP XC32
|
||||
*/
|
||||
/** @defgroup MEC14xx ISR
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
#include "appcfg.h"
|
||||
#include "platform.h"
|
||||
#include "MEC14xx/mec14xx.h"
|
||||
#include "MEC14xx/mec14xx_girqs.h"
|
||||
#include "MEC14xx/mec14xx_gpio.h"
|
||||
#include "MEC14xx/mec14xx_trace_func.h"
|
||||
|
||||
|
||||
#if GIRQ10_DISAGG == 0
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16, section(".girqs")))
|
||||
girq10_isr(void)
|
||||
{
|
||||
JTVIC_GROUP_EN_CLR->w = (1ul<<2);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b0(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 0, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b1(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 1, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b2(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 2, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b3(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 3, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b4(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 4, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b5(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 5, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b6(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 6, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b7(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 7, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b8(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 8, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b9(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 9, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b10(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 10, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b11(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 11, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b12(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 12, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b13(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 13, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b14(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 14, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b15(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 15, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b16(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 16, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b17(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 17, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b18(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 18, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b19(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 19, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b20(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 20, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b21(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 21, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b22(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 22, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq10_b23(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ10_ID, 23, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/* end girq10.c */
|
||||
/** @}
|
||||
*/
|
||||
|
||||
@@ -0,0 +1,173 @@
|
||||
/*
|
||||
Copyright (C) 2014 Microchip Inc.
|
||||
All rights reserved
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifdef __XC32
|
||||
#include <xc.h>
|
||||
#include <sys/asm.h>
|
||||
#else
|
||||
#include "Regs.S"
|
||||
#endif
|
||||
|
||||
#include "MEC14xx/mec14xx_girqm.h"
|
||||
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
/***************************************************************
|
||||
* MEC14xx GIRQ10 Disaggregated Vector Jump table
|
||||
*
|
||||
***************************************************************/
|
||||
|
||||
.extern girq10_b0
|
||||
.extern girq10_b1
|
||||
.extern girq10_b2
|
||||
.extern girq10_b3
|
||||
.extern girq10_b4
|
||||
.extern girq10_b5
|
||||
.extern girq10_b6
|
||||
.extern girq10_b7
|
||||
.extern girq10_b8
|
||||
.extern girq10_b9
|
||||
.extern girq10_b10
|
||||
.extern girq10_b11
|
||||
.extern girq10_b12
|
||||
.extern girq10_b13
|
||||
.extern girq10_b14
|
||||
.extern girq10_b15
|
||||
.extern girq10_b16
|
||||
.extern girq10_b17
|
||||
.extern girq10_b18
|
||||
.extern girq10_b19
|
||||
.extern girq10_b20
|
||||
.extern girq10_b21
|
||||
.extern girq10_b22
|
||||
.extern girq10_b23
|
||||
|
||||
#if GIRQ10_DISAGG != 0
|
||||
|
||||
/*
|
||||
* Disaggregated girq10_isr
|
||||
* Program address of this version of girq23_isr into JTVIC GIRQ09
|
||||
* Aggregator Control register with bit[0] = 1.
|
||||
*/
|
||||
.insn
|
||||
#ifdef __XC32
|
||||
.section .girqs.girq10_isr, code
|
||||
#else
|
||||
.section .girqs.girq10_isr,"x"
|
||||
#endif
|
||||
.set nomips16
|
||||
.set micromips
|
||||
.set noreorder
|
||||
.set noat
|
||||
.ent girq10_isr
|
||||
.global girq10_isr
|
||||
.align 2
|
||||
|
||||
girq10_isr:
|
||||
J girq10_b0
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b1
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b2
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b3
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b4
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b5
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b6
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b7
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b8
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b9
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b10
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b11
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b12
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b13
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b14
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b15
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b16
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b17
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b18
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b19
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b20
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b21
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b22
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq10_b23
|
||||
NOP
|
||||
|
||||
.end girq10_isr
|
||||
|
||||
#endif
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
|
||||
@@ -0,0 +1,238 @@
|
||||
/*****************************************************************************
|
||||
* Copyright 2014 Microchip Technology Inc. and its subsidiaries.
|
||||
* You may use this software and any derivatives exclusively with
|
||||
* Microchip products.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".
|
||||
* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP
|
||||
* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
|
||||
* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
|
||||
* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
|
||||
* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
|
||||
* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.
|
||||
* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL
|
||||
* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF
|
||||
* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE
|
||||
* OF THESE TERMS.
|
||||
*****************************************************************************/
|
||||
|
||||
/** @file girq11.c
|
||||
*Interrupt service routines for MIPS using vanilla GCC and MCHP XC32
|
||||
*/
|
||||
/** @defgroup MEC14xx ISR
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
#include "appcfg.h"
|
||||
#include "platform.h"
|
||||
#include "MEC14xx/mec14xx.h"
|
||||
#include "MEC14xx/mec14xx_girqs.h"
|
||||
#include "MEC14xx/mec14xx_gpio.h"
|
||||
#include "MEC14xx/mec14xx_trace_func.h"
|
||||
|
||||
|
||||
#if GIRQ11_DISAGG == 0
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16, section(".girqs")))
|
||||
girq11_isr(void)
|
||||
{
|
||||
JTVIC_GROUP_EN_CLR->w = (1ul<<3);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b0(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b1(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 1, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b2(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 2, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b3(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 3, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b4(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 4, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b5(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 5, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b6(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 6, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b7(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 7, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b8(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 8, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b9(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 9, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b10(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 10, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b11(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 11, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b12(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 12, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b13(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 13, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b14(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 14, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b15(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 15, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b16(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 16, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b17(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 17, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b18(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 18, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b19(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 19, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b20(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 20, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b21(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 21, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b22(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 22, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b23(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 23, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b24(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 24, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b25(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 25, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b26(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 26, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b27(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 27, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b28(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 28, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b29(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 29, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq11_b30(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ11_ID, 30, JTVIC_CLR_SRC);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/* end girq11.c */
|
||||
/** @}
|
||||
*/
|
||||
|
||||
@@ -0,0 +1,211 @@
|
||||
/*
|
||||
Copyright (C) 2014 Microchip Inc.
|
||||
All rights reserved
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifdef __XC32
|
||||
#include <xc.h>
|
||||
#include <sys/asm.h>
|
||||
#else
|
||||
#include "Regs.S"
|
||||
#endif
|
||||
|
||||
#include "MEC14xx/mec14xx_girqm.h"
|
||||
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
/***************************************************************
|
||||
* MEC14xx GIRQ11 Disaggregated Vector Jump table
|
||||
*
|
||||
***************************************************************/
|
||||
|
||||
.extern girq11_b0
|
||||
.extern girq11_b1
|
||||
.extern girq11_b2
|
||||
.extern girq11_b3
|
||||
.extern girq11_b4
|
||||
.extern girq11_b5
|
||||
.extern girq11_b6
|
||||
.extern girq11_b7
|
||||
.extern girq11_b8
|
||||
.extern girq11_b9
|
||||
.extern girq11_b10
|
||||
.extern girq11_b11
|
||||
.extern girq11_b12
|
||||
.extern girq11_b13
|
||||
.extern girq11_b14
|
||||
.extern girq11_b15
|
||||
.extern girq11_b16
|
||||
.extern girq11_b17
|
||||
.extern girq11_b18
|
||||
.extern girq11_b19
|
||||
.extern girq11_b20
|
||||
.extern girq11_b21
|
||||
.extern girq11_b22
|
||||
.extern girq11_b23
|
||||
.extern girq11_b24
|
||||
.extern girq11_b25
|
||||
.extern girq11_b26
|
||||
.extern girq11_b27
|
||||
.extern girq11_b28
|
||||
.extern girq11_b30
|
||||
|
||||
#if GIRQ11_DISAGG != 0
|
||||
|
||||
/*
|
||||
* Disaggregated girq11_isr
|
||||
* Program address of this version of girq23v into JTVIC GIRQ11
|
||||
* Aggregator Control register with bit[0] = 1.
|
||||
*/
|
||||
.insn
|
||||
#ifdef __XC32
|
||||
.section .girqs.girq11_isr, code
|
||||
#else
|
||||
.section .girqs.girq11_isr,"x"
|
||||
#endif
|
||||
.set nomips16
|
||||
.set micromips
|
||||
.set noreorder
|
||||
.set noat
|
||||
.ent girq11_isr
|
||||
.global girq11_isr
|
||||
.align 2
|
||||
|
||||
girq11_isr:
|
||||
#if 1
|
||||
J girq11_b0
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b1
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b2
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b3
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b4
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b5
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b6
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b7
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b8
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b9
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b10
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b11
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b12
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b13
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b14
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b15
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b16
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b17
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b18
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b19
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b20
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b21
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b22
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b23
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b24
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b25
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b26
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b27
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b28
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b29
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq11_b30
|
||||
NOP
|
||||
|
||||
.end girq11_isr
|
||||
#else
|
||||
gen_jump_table 11,0,30
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
|
||||
@@ -0,0 +1,70 @@
|
||||
/*****************************************************************************
|
||||
* (c) 2014 Microchip Technology Inc. and its subsidiaries.
|
||||
* You may use this software and any derivatives exclusively with
|
||||
* Microchip products.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".
|
||||
* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP
|
||||
* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
|
||||
* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
|
||||
* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
|
||||
* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
|
||||
* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.
|
||||
* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL
|
||||
* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF
|
||||
* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE
|
||||
* OF THESE TERMS.
|
||||
*****************************************************************************/
|
||||
|
||||
/** @file girq12.c
|
||||
*Interrupt service routines for MIPS using vanilla GCC and MCHP XC32
|
||||
*/
|
||||
/** @defgroup MEC14xx ISR
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
#include "appcfg.h"
|
||||
#include "platform.h"
|
||||
#include "MEC14xx/mec14xx.h"
|
||||
#include "MEC14xx/mec14xx_girqs.h"
|
||||
#include "MEC14xx/mec14xx_gpio.h"
|
||||
#include "MEC14xx/mec14xx_trace_func.h"
|
||||
|
||||
|
||||
#if GIRQ12_DISAGG == 0
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16, section(".girqs")))
|
||||
girq12_isr(void)
|
||||
{
|
||||
JTVIC_GROUP_EN_CLR->w = (1ul<<4);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq12_b0(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ12_ID, 0);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq12_b1(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ12_ID, 1);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq12_b2(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ12_ID, 2);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/* end girq12.c */
|
||||
/** @}
|
||||
*/
|
||||
|
||||
@@ -0,0 +1,68 @@
|
||||
/*
|
||||
Copyright (C) 2014 Microchip Inc.
|
||||
All rights reserved
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifdef __XC32
|
||||
#include <xc.h>
|
||||
#include <sys/asm.h>
|
||||
#else
|
||||
#include "Regs.S"
|
||||
#endif
|
||||
|
||||
#include "MEC14xx/mec14xx_girqm.h"
|
||||
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
/***************************************************************
|
||||
* MEC14xx GIRQ12 Disaggregated Vector Jump table
|
||||
*
|
||||
***************************************************************/
|
||||
|
||||
.extern girq12_b0
|
||||
.extern girq12_b1
|
||||
.extern girq12_b2
|
||||
|
||||
#if GIRQ12_DISAGG != 0
|
||||
|
||||
/*
|
||||
* Disaggregated girq12_isr
|
||||
* Program address of this version of girq23v into JTVIC GIRQ12
|
||||
* Aggregator Control register with bit[0] = 1.
|
||||
*/
|
||||
.insn
|
||||
#ifdef __XC32
|
||||
.section .girqs.girq12_isr, code
|
||||
#else
|
||||
.section .girqs.girq12_isr,"x"
|
||||
#endif
|
||||
.set nomips16
|
||||
.set micromips
|
||||
.set noreorder
|
||||
.set noat
|
||||
.ent girq12_isr
|
||||
.global girq12_isr
|
||||
.align 2
|
||||
|
||||
girq12_isr:
|
||||
J girq12_b0
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq12_b1
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq12_b2
|
||||
NOP
|
||||
|
||||
.end girq12_isr
|
||||
|
||||
#endif
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
|
||||
@@ -0,0 +1,93 @@
|
||||
/*****************************************************************************
|
||||
* (c) 2014 Microchip Technology Inc. and its subsidiaries.
|
||||
* You may use this software and any derivatives exclusively with
|
||||
* Microchip products.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".
|
||||
* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP
|
||||
* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
|
||||
* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
|
||||
* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
|
||||
* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
|
||||
* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.
|
||||
* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL
|
||||
* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF
|
||||
* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE
|
||||
* OF THESE TERMS.
|
||||
*****************************************************************************/
|
||||
|
||||
/** @file girq13.c
|
||||
*Interrupt service routines for MIPS using vanilla GCC and MCHP XC32
|
||||
*/
|
||||
/** @defgroup MEC14xx ISR
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "appcfg.h"
|
||||
#include "platform.h"
|
||||
#include "MEC14xx/mec14xx.h"
|
||||
#include "MEC14xx/mec14xx_girqs.h"
|
||||
#include "MEC14xx/mec14xx_gpio.h"
|
||||
#include "MEC14xx/mec14xx_trace_func.h"
|
||||
|
||||
|
||||
#if GIRQ13_DISAGG == 0
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16, section(".girqs")))
|
||||
girq13_isr(void)
|
||||
{
|
||||
JTVIC_GROUP_EN_CLR->w = (1ul<<5);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq13_b0(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ13_ID, 0);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq13_b1(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ13_ID, 1);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq13_b2(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ13_ID, 2);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq13_b3(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ13_ID, 3);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq13_b4(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ13_ID, 4);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq13_b5(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ13_ID, 5);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq13_b6(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ13_ID, 6);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/* end girq13.c */
|
||||
/** @}
|
||||
*/
|
||||
|
||||
@@ -0,0 +1,88 @@
|
||||
/*
|
||||
Copyright (C) 2014 Microchip Inc.
|
||||
All rights reserved
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifdef __XC32
|
||||
#include <xc.h>
|
||||
#include <sys/asm.h>
|
||||
#else
|
||||
#include "Regs.S"
|
||||
#endif
|
||||
|
||||
#include "MEC14xx/mec14xx_girqm.h"
|
||||
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
/***************************************************************
|
||||
* MEC14xx GIRQ13 Disaggregated Vector Jump table
|
||||
*
|
||||
***************************************************************/
|
||||
|
||||
.extern girq13_b0
|
||||
.extern girq13_b1
|
||||
.extern girq13_b2
|
||||
.extern girq13_b3
|
||||
.extern girq13_b4
|
||||
.extern girq13_b5
|
||||
.extern girq13_b6
|
||||
|
||||
#if GIRQ13_DISAGG != 0
|
||||
|
||||
/*
|
||||
* Disaggregated girq13_isr
|
||||
* Program address of this version of girq23v into JTVIC GIRQ13
|
||||
* Aggregator Control register with bit[0] = 1.
|
||||
*/
|
||||
.insn
|
||||
#ifdef __XC32
|
||||
.section .girqs.girq13_isr, code
|
||||
#else
|
||||
.section .girqs.girq13_isr,"x"
|
||||
#endif
|
||||
.set nomips16
|
||||
.set micromips
|
||||
.set noreorder
|
||||
.set noat
|
||||
.ent girq13_isr
|
||||
.global girq13_isr
|
||||
.align 2
|
||||
|
||||
girq13_isr:
|
||||
J girq13_b0
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq13_b1
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq13_b2
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq13_b3
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq13_b4
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq13_b5
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq13_b6
|
||||
NOP
|
||||
|
||||
.end girq13_isr
|
||||
|
||||
#endif
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
|
||||
@@ -0,0 +1,88 @@
|
||||
/*****************************************************************************
|
||||
* (c) 2014 Microchip Technology Inc. and its subsidiaries.
|
||||
* You may use this software and any derivatives exclusively with
|
||||
* Microchip products.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".
|
||||
* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP
|
||||
* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
|
||||
* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
|
||||
* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
|
||||
* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
|
||||
* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.
|
||||
* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL
|
||||
* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF
|
||||
* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE
|
||||
* OF THESE TERMS.
|
||||
*****************************************************************************/
|
||||
|
||||
/** @file girq14.c
|
||||
*Interrupt service routines for MIPS using vanilla GCC and MCHP XC32
|
||||
*/
|
||||
/** @defgroup MEC14xx ISR
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "appcfg.h"
|
||||
#include "platform.h"
|
||||
#include "MEC14xx/mec14xx.h"
|
||||
#include "MEC14xx/mec14xx_girqs.h"
|
||||
#include "MEC14xx/mec14xx_gpio.h"
|
||||
#include "MEC14xx/mec14xx_trace_func.h"
|
||||
|
||||
|
||||
#if GIRQ14_DISAGG == 0
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16, section(".girqs")))
|
||||
girq14_isr(void)
|
||||
{
|
||||
JTVIC_GROUP_EN_CLR->w = (1ul<<6);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq14_b0(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ14_ID, 0);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq14_b1(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ14_ID, 1);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq14_b2(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ14_ID, 2);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq14_b3(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ14_ID, 3);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq14_b4(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ14_ID, 4);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq14_b5(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ14_ID, 5);
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
/* end girq14.c */
|
||||
/** @}
|
||||
*/
|
||||
|
||||
@@ -0,0 +1,83 @@
|
||||
/*
|
||||
Copyright (C) 2014 Microchip Inc.
|
||||
All rights reserved
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifdef __XC32
|
||||
#include <xc.h>
|
||||
#include <sys/asm.h>
|
||||
#else
|
||||
#include "Regs.S"
|
||||
#endif
|
||||
|
||||
#include "MEC14xx/mec14xx_girqm.h"
|
||||
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
/***************************************************************
|
||||
* MEC14xx GIRQ14 Disaggregated Vector Jump table
|
||||
*
|
||||
***************************************************************/
|
||||
|
||||
.extern girq14_b0
|
||||
.extern girq14_b1
|
||||
.extern girq14_b2
|
||||
.extern girq14_b3
|
||||
.extern girq14_b4
|
||||
.extern girq14_b5
|
||||
|
||||
#if GIRQ14_DISAGG != 0
|
||||
|
||||
/*
|
||||
* Disaggregated girq14_isr
|
||||
* Program address of this version of girq14_isr into JTVIC GIRQ14
|
||||
* Aggregator Control register with bit[0] = 1.
|
||||
*/
|
||||
.insn
|
||||
#ifdef __XC32
|
||||
.section .girqs.girq14_isr, code
|
||||
#else
|
||||
.section .girqs.girq14_isr,"x"
|
||||
#endif
|
||||
.set nomips16
|
||||
.set micromips
|
||||
.set noreorder
|
||||
.set noat
|
||||
.ent girq14_isr
|
||||
.global girq14_isr
|
||||
.align 2
|
||||
|
||||
girq14_isr:
|
||||
J girq14_b0
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq14_b1
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq14_b2
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq14_b3
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq14_b4
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq14_b5
|
||||
NOP
|
||||
|
||||
.end girq14_isr
|
||||
|
||||
#endif
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
|
||||
@@ -0,0 +1,166 @@
|
||||
/*****************************************************************************
|
||||
* (c) 2014 Microchip Technology Inc. and its subsidiaries.
|
||||
* You may use this software and any derivatives exclusively with
|
||||
* Microchip products.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".
|
||||
* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP
|
||||
* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
|
||||
* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
|
||||
* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
|
||||
* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
|
||||
* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.
|
||||
* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL
|
||||
* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF
|
||||
* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE
|
||||
* OF THESE TERMS.
|
||||
*****************************************************************************/
|
||||
|
||||
/** @file girq15.c
|
||||
*Interrupt service routines for MIPS using vanilla GCC and MCHP XC32
|
||||
*/
|
||||
/** @defgroup MEC14xx ISR
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "appcfg.h"
|
||||
#include "platform.h"
|
||||
#include "MEC14xx/mec14xx.h"
|
||||
#include "MEC14xx/mec14xx_girqs.h"
|
||||
#include "MEC14xx/mec14xx_gpio.h"
|
||||
#include "MEC14xx/mec14xx_trace_func.h"
|
||||
|
||||
|
||||
#if GIRQ15_DISAGG == 0
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16, section(".girqs")))
|
||||
girq15_isr(void)
|
||||
{
|
||||
JTVIC_GROUP_EN_CLR->w = (1ul<<7);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b0(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 0);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b1(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 1);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b2(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 2);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b3(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 3);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b4(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 4);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b5(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 5);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b6(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 6);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b7(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 7);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b8(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 8);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b9(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 9);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b10(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 10);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b11(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 11);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b12(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 12);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b13(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 13);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b14(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 14);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b15(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 15);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b16(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 16);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b17(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 17);
|
||||
}
|
||||
|
||||
void __attribute__((weak, interrupt, nomips16))
|
||||
girq15_b18(void)
|
||||
{
|
||||
jtvic_dis_clr_source(MEC14xx_GIRQ15_ID, 18);
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
/* end girq15.c */
|
||||
/** @}
|
||||
*/
|
||||
|
||||
@@ -0,0 +1,147 @@
|
||||
/*
|
||||
Copyright (C) 2014 Microchip Inc.
|
||||
All rights reserved
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifdef __XC32
|
||||
#include <xc.h>
|
||||
#include <sys/asm.h>
|
||||
#else
|
||||
#include "Regs.S"
|
||||
#endif
|
||||
|
||||
#include "MEC14xx/mec14xx_girqm.h"
|
||||
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
/***************************************************************
|
||||
* MEC14xx GIRQ15 Disaggregated Vector Jump table
|
||||
*
|
||||
***************************************************************/
|
||||
.extern girq15_b0
|
||||
.extern girq15_b1
|
||||
.extern girq15_b2
|
||||
.extern girq15_b3
|
||||
.extern girq15_b4
|
||||
.extern girq15_b5
|
||||
.extern girq15_b6
|
||||
.extern girq15_b7
|
||||
.extern girq15_b8
|
||||
.extern girq15_b9
|
||||
.extern girq15_b10
|
||||
.extern girq15_b11
|
||||
.extern girq15_b12
|
||||
.extern girq15_b13
|
||||
.extern girq15_b14
|
||||
.extern girq15_b15
|
||||
.extern girq15_b16
|
||||
.extern girq15_b17
|
||||
.extern girq15_b18
|
||||
|
||||
#if GIRQ15_DISAGG != 0
|
||||
|
||||
/*
|
||||
* Disaggregated girq15_isr
|
||||
* Program address of this version of girq15_isr into JTVIC GIRQ15
|
||||
* Aggregator Control register with bit[0] = 1.
|
||||
*/
|
||||
.insn
|
||||
#ifdef __XC32
|
||||
.section .girqs.girq15_isr, code
|
||||
#else
|
||||
.section .girqs.girq15_isr,"x"
|
||||
#endif
|
||||
.set nomips16
|
||||
.set micromips
|
||||
.set noreorder
|
||||
.set noat
|
||||
.ent girq15_isr
|
||||
.global girq15_isr
|
||||
.align 2
|
||||
|
||||
girq15_isr:
|
||||
J girq15_b0
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b1
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b2
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b3
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b4
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b5
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b6
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b7
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b8
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b9
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b10
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b11
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b12
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b13
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b14
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b15
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b16
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b17
|
||||
NOP
|
||||
|
||||
.align 2
|
||||
J girq15_b18
|
||||
NOP
|
||||
|
||||
.end girq15_isr
|
||||
|
||||
#endif
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user