mirror of
https://github.com/FreeRTOS/FreeRTOS.git
synced 2026-09-28 16:16:47 +08:00
Combine the SmartFusion2 starter kit and development kits demos into a single directory.
This commit is contained in:
Richard Barry
-65
@@ -1,65 +0,0 @@
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REM This file should be executed from the command line prior to the first
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REM build. It will be necessary to refresh the Eclipse project once the
|
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REM .bat file has been executed (normally just press F5 to refresh).
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||||
REM Copies all the required files from their location within the standard
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REM FreeRTOS directory structure to under the Eclipse project directory.
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REM This permits the Eclipse project to be used in 'managed' mode and without
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REM having to setup any linked resources.
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REM Standard paths
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SET FREERTOS_SOURCE=..\..\Source
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SET COMMON_SOURCE=..\Common\minimal
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SET COMMON_INCLUDE=..\Common\include
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SET CLI_SOURCE=..\..\..\FreeRTOS-Plus\Source\FreeRTOS-Plus-CLI
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SET FAT_SOURCE=..\..\..\FreeRTOS-Plus\Source\FreeRTOS-Plus-FAT-SL
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||||
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REM Have the files already been copied?
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IF EXIST RTOSDemo\FreeRTOS-Source Goto END
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REM Create the required directory structure.
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MD RTOSDemo\FreeRTOS-Source
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MD RTOSDemo\FreeRTOS-Source\include
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MD RTOSDemo\FreeRTOS-Source\portable
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MD RTOSDemo\FreeRTOS-Source\portable\GCC
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MD RTOSDemo\FreeRTOS-Source\portable\GCC\ARM_CM3
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MD RTOSDemo\FreeRTOS-Source\portable\MemMang
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REM Copy the core kernel files into the project directory
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copy %FREERTOS_SOURCE%\tasks.c RTOSDemo\FreeRTOS-Source
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copy %FREERTOS_SOURCE%\queue.c RTOSDemo\FreeRTOS-Source
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copy %FREERTOS_SOURCE%\list.c RTOSDemo\FreeRTOS-Source
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copy %FREERTOS_SOURCE%\timers.c RTOSDemo\FreeRTOS-Source
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REM Copy the common header files into the project directory
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copy %FREERTOS_SOURCE%\include\*.* RTOSDemo\FreeRTOS-Source\include
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REM Copy the portable layer files into the project directory
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copy %FREERTOS_SOURCE%\portable\GCC\ARM_CM3\*.* RTOSDemo\FreeRTOS-Source\portable\GCC\ARM_CM3
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REM Copy the memory allocation files into the project directory
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copy %FREERTOS_SOURCE%\portable\MemMang\heap_4.c RTOSDemo\FreeRTOS-Source\portable\MemMang
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REM Copy the files that define the common demo tasks.
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copy %COMMON_SOURCE%\dynamic.c RTOSDemo\Full-Demo\Common-Demo-Source
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copy %COMMON_SOURCE%\BlockQ.c RTOSDemo\Full-Demo\Common-Demo-Source
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copy %COMMON_SOURCE%\flash_timer.c RTOSDemo\Full-Demo\Common-Demo-Source
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copy %COMMON_SOURCE%\death.c RTOSDemo\Full-Demo\Common-Demo-Source
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copy %COMMON_SOURCE%\blocktim.c RTOSDemo\Full-Demo\Common-Demo-Source
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copy %COMMON_SOURCE%\semtest.c RTOSDemo\Full-Demo\Common-Demo-Source
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copy %COMMON_SOURCE%\PollQ.c RTOSDemo\Full-Demo\Common-Demo-Source
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copy %COMMON_SOURCE%\GenQTest.c RTOSDemo\Full-Demo\Common-Demo-Source
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copy %COMMON_SOURCE%\recmutex.c RTOSDemo\Full-Demo\Common-Demo-Source
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copy %COMMON_SOURCE%\countsem.c RTOSDemo\Full-Demo\Common-Demo-Source
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copy %COMMON_SOURCE%\integer.c RTOSDemo\Full-Demo\Common-Demo-Source
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REM Copy the common demo file headers.
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copy %COMMON_INCLUDE%\*.h RTOSDemo\Full-Demo\Common-Demo-Source\include
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REM Copy the FreeRTOS+CLI source.
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copy %CLI_SOURCE%\*.* RTOSDemo\Full-Demo\FreeRTOS-Plus-CLI-Source
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REM Copy the FreeRTOS+FAT SL source.
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xcopy %FAT_SOURCE%\*.* RTOSDemo\Full-Demo\FreeRTOS-Plus-FAT-SL-Source /S
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: END
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-49148
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@@ -1,81 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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||||
<projectDescription>
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||||
<name>RTOSDemo</name>
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||||
<comment></comment>
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||||
<projects>
|
||||
<project> RTOSDemo_Hardware_Platform </project>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<arguments>
|
||||
<dictionary>
|
||||
<key>?name?</key>
|
||||
<value></value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.append_environment</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.autoBuildTarget</key>
|
||||
<value>all</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.buildArguments</key>
|
||||
<value></value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.buildCommand</key>
|
||||
<value>make</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.buildLocation</key>
|
||||
<value>${workspace_loc:/RTOSDemo/Debug}</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
|
||||
<value>clean</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.contents</key>
|
||||
<value>org.eclipse.cdt.make.core.activeConfigSettings</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableFullBuild</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.fullBuildTarget</key>
|
||||
<value>all</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.stopOnError</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
</projectDescription>
|
||||
-245
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Load Diff
@@ -1,191 +0,0 @@
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||||
/*
|
||||
FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||
|
||||
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
|
||||
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||
* Complete, revised, and edited pdf reference manuals are also *
|
||||
* available. *
|
||||
* *
|
||||
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||
* ensuring you get running as quickly as possible and with an *
|
||||
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||
* the FreeRTOS project to continue with its mission of providing *
|
||||
* professional grade, cross platform, de facto standard solutions *
|
||||
* for microcontrollers - completely free of charge! *
|
||||
* *
|
||||
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||
* *
|
||||
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
|
||||
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
|
||||
distribute a combined work that includes FreeRTOS without being obliged to
|
||||
provide the source code for proprietary components outside of the FreeRTOS
|
||||
kernel.
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
|
||||
details. You should have received a copy of the GNU General Public License
|
||||
and the FreeRTOS license exception along with FreeRTOS; if not it can be
|
||||
viewed here: http://www.freertos.org/a00114.html and also obtained by
|
||||
writing to Real Time Engineers Ltd., contact details for whom are available
|
||||
on the FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
* not run, what could be wrong?" *
|
||||
* *
|
||||
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||
license and Real Time Engineers Ltd. contact details.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||
fully thread aware and reentrant UDP/IP stack.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||
Integrity Systems, who sell the code with commercial support,
|
||||
indemnification and middleware, under the OpenRTOS brand.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
/*
|
||||
* The following #error directive is to remind users that a batch file must be
|
||||
* executed prior to this project being built. Once it has been executed
|
||||
* remove the #error line below.
|
||||
*/
|
||||
//#error Ensure CreateProjectDirectoryStructure.bat has been executed before building. See comment immediately above.
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||
*
|
||||
* See http://www.freertos.org/a00110.html.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
#include <stdint.h>
|
||||
extern uint32_t SystemCoreClock;
|
||||
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_IDLE_HOOK 1
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configCPU_CLOCK_HZ ( SystemCoreClock )
|
||||
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
|
||||
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )
|
||||
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 80 )
|
||||
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 25000 ) )
|
||||
#define configMAX_TASK_NAME_LEN ( 10 )
|
||||
#define configUSE_TRACE_FACILITY 1
|
||||
#define configUSE_16_BIT_TICKS 0
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configQUEUE_REGISTRY_SIZE 0
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_MALLOC_FAILED_HOOK 1
|
||||
#define configUSE_APPLICATION_TASK_TAG 0
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
|
||||
/* Co-routine definitions. */
|
||||
#define configUSE_CO_ROUTINES 0
|
||||
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
|
||||
|
||||
/* Software timer definitions. */
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY ( 2 )
|
||||
#define configTIMER_QUEUE_LENGTH 5
|
||||
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 )
|
||||
|
||||
/* Run time stats gathering definitions. */
|
||||
void vConfigureTimerForRunTimeStats( void );
|
||||
uint32_t ulGetRunTimeCounterValue( void );
|
||||
#define configGENERATE_RUN_TIME_STATS 1
|
||||
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() vConfigureTimerForRunTimeStats()
|
||||
#define portGET_RUN_TIME_COUNTER_VALUE() ulGetRunTimeCounterValue()
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
to exclude the API function. */
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 1
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
|
||||
/* The size of the global output buffer that is available for use when there
|
||||
are multiple command interpreters running at once (for example, one on a UART
|
||||
and one on TCP/IP). This is done to prevent an output buffer being defined by
|
||||
each implementation - which would waste RAM. In this case, there is only one
|
||||
command interpreter running. */
|
||||
#define configCOMMAND_INT_MAX_OUTPUT_SIZE 2048
|
||||
|
||||
/* Cortex-M specific definitions. */
|
||||
#ifdef __NVIC_PRIO_BITS
|
||||
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
|
||||
#define configPRIO_BITS __NVIC_PRIO_BITS
|
||||
#else
|
||||
#define configPRIO_BITS 4 /* 15 priority levels */
|
||||
#endif
|
||||
|
||||
/* The lowest interrupt priority that can be used in a call to a "set priority"
|
||||
function. */
|
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x0f
|
||||
|
||||
/* The highest interrupt priority that can be used by any interrupt service
|
||||
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
|
||||
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
|
||||
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
|
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 10
|
||||
|
||||
/* Interrupt priorities used by the kernel port layer itself. These are generic
|
||||
to all Cortex-M ports, and do not rely on any particular library functions. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
|
||||
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
|
||||
/* Normal assert() semantics without relying on the provision of an assert.h
|
||||
header file. */
|
||||
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
|
||||
|
||||
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
|
||||
standard names. */
|
||||
#define vPortSVCHandler SVC_Handler
|
||||
#define xPortPendSVHandler PendSV_Handler
|
||||
#define xPortSysTickHandler SysTick_Handler
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
|
||||
-1
@@ -1 +0,0 @@
|
||||
Run the CreateProjectDirectoryStructure.bat batch file to populate this directory before building the demo.
|
||||
-1
@@ -1 +0,0 @@
|
||||
Run the CreateProjectDirectoryStructure.bat batch file to populate this directory before building the demo.
|
||||
-575
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Load Diff
-384
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Load Diff
-1
@@ -1 +0,0 @@
|
||||
Run the CreateProjectDirectoryStructure.bat batch file to populate this directory before building the demo.
|
||||
@@ -1 +0,0 @@
|
||||
Run the CreateProjectDirectoryStructure.bat batch file to populate this directory before building the demo.
|
||||
-426
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Load Diff
-290
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Load Diff
-87
@@ -1,87 +0,0 @@
|
||||
/*
|
||||
FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||
|
||||
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
|
||||
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||
* Complete, revised, and edited pdf reference manuals are also *
|
||||
* available. *
|
||||
* *
|
||||
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||
* ensuring you get running as quickly as possible and with an *
|
||||
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||
* the FreeRTOS project to continue with its mission of providing *
|
||||
* professional grade, cross platform, de facto standard solutions *
|
||||
* for microcontrollers - completely free of charge! *
|
||||
* *
|
||||
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||
* *
|
||||
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
|
||||
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
|
||||
distribute a combined work that includes FreeRTOS without being obliged to
|
||||
provide the source code for proprietary components outside of the FreeRTOS
|
||||
kernel.
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
|
||||
details. You should have received a copy of the GNU General Public License
|
||||
and the FreeRTOS license exception along with FreeRTOS; if not it can be
|
||||
viewed here: http://www.freertos.org/a00114.html and also obtained by
|
||||
writing to Real Time Engineers Ltd., contact details for whom are available
|
||||
on the FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
* not run, what could be wrong?" *
|
||||
* *
|
||||
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||
license and Real Time Engineers Ltd. contact details.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||
fully thread aware and reentrant UDP/IP stack.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||
Integrity Systems, who sell the code with commercial support,
|
||||
indemnification and middleware, under the OpenRTOS brand.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
*/
|
||||
|
||||
#ifndef UART_COMMAND_CONSOLE_H
|
||||
#define UART_COMMAND_CONSOLE_H
|
||||
|
||||
/*
|
||||
* Create the task that implements a command console using the USB virtual com
|
||||
* port driver for intput and output.
|
||||
*/
|
||||
void vUARTCommandConsoleStart( uint16_t usStackSize, unsigned portBASE_TYPE uxPriority );
|
||||
|
||||
#endif /* UART_COMMAND_CONSOLE_H */
|
||||
|
||||
|
||||
|
||||
-67
@@ -1,67 +0,0 @@
|
||||
/*
|
||||
* FreeRTOS+FAT FS V1.0.0 (C) 2013 HCC Embedded
|
||||
*
|
||||
* FreeRTOS+FAT SL is an complementary component provided to Real Time Engineers
|
||||
* Ltd. by HCC Embedded for use with FreeRTOS. It is not, in itself, part of
|
||||
* the FreeRTOS kernel. FreeRTOS+FAT SL is licensed separately from FreeRTOS,
|
||||
* and uses a different license to FreeRTOS. FreeRTOS+FAT SL uses a dual
|
||||
* license model, information on which is provided below:
|
||||
*
|
||||
* - Open source licensing -
|
||||
* FreeRTOS+FAT SL is a free download and may be used, modified and distributed
|
||||
* without charge provided the user adheres to version two of the GNU General
|
||||
* Public license (GPL) and does not remove the copyright notice or this text.
|
||||
* The GPL V2 text is available on the gnu.org web site, and on the following
|
||||
* URL: http://www.FreeRTOS.org/gpl-2.0.txt
|
||||
*
|
||||
* - Commercial licensing -
|
||||
* Businesses and individuals who wish to incorporate FreeRTOS+FAT SL into
|
||||
* proprietary software for redistribution in any form must first obtain a
|
||||
* commercial license - and in-so-doing support the maintenance, support and
|
||||
* further development of the FreeRTOS+FAT SL product. Commercial licenses can
|
||||
* be obtained from http://shop.freertos.org and do not require any source files
|
||||
* to be changed.
|
||||
*
|
||||
* FreeRTOS+FAT SL is distributed in the hope that it will be useful. You
|
||||
* cannot use FreeRTOS+FAT SL unless you agree that you use the software 'as
|
||||
* is'. FreeRTOS+FAT SL is provided WITHOUT ANY WARRANTY; without even the
|
||||
* implied warranties of NON-INFRINGEMENT, MERCHANTABILITY or FITNESS FOR A
|
||||
* PARTICULAR PURPOSE. Real Time Engineers Ltd. and HCC Embedded disclaims all
|
||||
* conditions and terms, be they implied, expressed, or statutory.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://www.FreeRTOS.org/FreeRTOS-Plus
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _CONFIG_FAT_SL_H
|
||||
#define _CONFIG_FAT_SL_H
|
||||
|
||||
#include "../version/ver_fat_sl.h"
|
||||
#if VER_FAT_SL_MAJOR != 3 || VER_FAT_SL_MINOR != 2
|
||||
#error Incompatible FAT_SL version number!
|
||||
#endif
|
||||
|
||||
#include "../api/api_mdriver.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/**************************************************************************
|
||||
**
|
||||
** FAT SL user settings
|
||||
**
|
||||
**************************************************************************/
|
||||
#define F_SECTOR_SIZE 512u /* Disk sector size. */
|
||||
#define F_FS_THREAD_AWARE 1 /* Set to one if the file system will be access from more than one task. */
|
||||
#define F_MAXPATH 64 /* Maximum length a file name (including its full path) can be. */
|
||||
#define F_MAX_LOCK_WAIT_TICKS 20 /* The maximum number of RTOS ticks to wait when attempting to obtain a lock on the file system when F_FS_THREAD_AWARE is set to 1. */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _CONFIG_FAT_SL_H */
|
||||
|
||||
-52
@@ -1,52 +0,0 @@
|
||||
/*
|
||||
* FreeRTOS+FAT FS V1.0.0 (C) 2013 HCC Embedded
|
||||
*
|
||||
* FreeRTOS+FAT SL is an complementary component provided to Real Time Engineers
|
||||
* Ltd. by HCC Embedded for use with FreeRTOS. It is not, in itself, part of
|
||||
* the FreeRTOS kernel. FreeRTOS+FAT SL is licensed separately from FreeRTOS,
|
||||
* and uses a different license to FreeRTOS. FreeRTOS+FAT SL uses a dual
|
||||
* license model, information on which is provided below:
|
||||
*
|
||||
* - Open source licensing -
|
||||
* FreeRTOS+FAT SL is a free download and may be used, modified and distributed
|
||||
* without charge provided the user adheres to version two of the GNU General
|
||||
* Public license (GPL) and does not remove the copyright notice or this text.
|
||||
* The GPL V2 text is available on the gnu.org web site, and on the following
|
||||
* URL: http://www.FreeRTOS.org/gpl-2.0.txt
|
||||
*
|
||||
* - Commercial licensing -
|
||||
* Businesses and individuals who wish to incorporate FreeRTOS+FAT SL into
|
||||
* proprietary software for redistribution in any form must first obtain a
|
||||
* commercial license - and in-so-doing support the maintenance, support and
|
||||
* further development of the FreeRTOS+FAT SL product. Commercial licenses can
|
||||
* be obtained from http://shop.freertos.org and do not require any source files
|
||||
* to be changed.
|
||||
*
|
||||
* FreeRTOS+FAT SL is distributed in the hope that it will be useful. You
|
||||
* cannot use FreeRTOS+FAT SL unless you agree that you use the software 'as
|
||||
* is'. FreeRTOS+FAT SL is provided WITHOUT ANY WARRANTY; without even the
|
||||
* implied warranties of NON-INFRINGEMENT, MERCHANTABILITY or FITNESS FOR A
|
||||
* PARTICULAR PURPOSE. Real Time Engineers Ltd. and HCC Embedded disclaims all
|
||||
* conditions and terms, be they implied, expressed, or statutory.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://www.FreeRTOS.org/FreeRTOS-Plus
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _CONFIG_MDRIVER_RAM_H_
|
||||
#define _CONFIG_MDRIVER_RAM_H_
|
||||
|
||||
#include "../version/ver_mdriver_ram.h"
|
||||
#if VER_MDRIVER_RAM_MAJOR != 1 || VER_MDRIVER_RAM_MINOR != 2
|
||||
#error Incompatible MDRIVER_RAM version number!
|
||||
#endif
|
||||
|
||||
#define MDRIVER_RAM_SECTOR_SIZE 512 /* Sector size */
|
||||
|
||||
#define MDRIVER_RAM_VOLUME0_SIZE (28 * 1024) /* defintion for size of ramdrive0 */
|
||||
|
||||
#define MDRIVER_MEM_LONG_ACCESS 1 /* set this value to 1 if 32bit access available */
|
||||
|
||||
#endif /* ifndef _CONFIG_MDRIVER_RAM_H_ */
|
||||
|
||||
-367
File diff suppressed because it is too large
Load Diff
@@ -1,153 +0,0 @@
|
||||
/*
|
||||
FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||
|
||||
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
|
||||
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||
* Complete, revised, and edited pdf reference manuals are also *
|
||||
* available. *
|
||||
* *
|
||||
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||
* ensuring you get running as quickly as possible and with an *
|
||||
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||
* the FreeRTOS project to continue with its mission of providing *
|
||||
* professional grade, cross platform, de facto standard solutions *
|
||||
* for microcontrollers - completely free of charge! *
|
||||
* *
|
||||
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||
* *
|
||||
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
|
||||
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
|
||||
distribute a combined work that includes FreeRTOS without being obliged to
|
||||
provide the source code for proprietary components outside of the FreeRTOS
|
||||
kernel.
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
|
||||
details. You should have received a copy of the GNU General Public License
|
||||
and the FreeRTOS license exception along with FreeRTOS; if not it can be
|
||||
viewed here: http://www.freertos.org/a00114.html and also obtained by
|
||||
writing to Real Time Engineers Ltd., contact details for whom are available
|
||||
on the FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
* not run, what could be wrong?" *
|
||||
* *
|
||||
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||
license and Real Time Engineers Ltd. contact details.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||
fully thread aware and reentrant UDP/IP stack.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||
Integrity Systems, who sell the code with commercial support,
|
||||
indemnification and middleware, under the OpenRTOS brand.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Simple IO routines to control the LEDs.
|
||||
* This file is called ParTest.c for historic reasons. Originally it stood for
|
||||
* PARallel port TEST.
|
||||
*-----------------------------------------------------------*/
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
/* Demo includes. */
|
||||
#include "partest.h"
|
||||
|
||||
/* Library includes. */
|
||||
#include "drivers/mss_gpio/mss_gpio.h"
|
||||
#include "CMSIS/system_m2sxxx.h"
|
||||
|
||||
#define partstNUM_LEDS 2
|
||||
|
||||
/* Remember the state of the outputs for easy toggling. */
|
||||
static unsigned char ucPortState = 0;
|
||||
|
||||
static const mss_gpio_id_t ucLEDs[ partstNUM_LEDS ] = { MSS_GPIO_14, MSS_GPIO_15 };
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vParTestInitialise( void )
|
||||
{
|
||||
long x;
|
||||
|
||||
/* Initialise MSS GPIOs. */
|
||||
MSS_GPIO_init();
|
||||
|
||||
/* Ensure the LEDs are outputs and off to start. */
|
||||
for( x = 0; x < partstNUM_LEDS; x++ )
|
||||
{
|
||||
MSS_GPIO_config( ucLEDs[ x ], MSS_GPIO_OUTPUT_MODE );
|
||||
vParTestSetLED( x, pdFALSE );
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
|
||||
{
|
||||
if( uxLED < partstNUM_LEDS )
|
||||
{
|
||||
taskENTER_CRITICAL();
|
||||
{
|
||||
MSS_GPIO_set_output( ucLEDs[ uxLED ], xValue );
|
||||
|
||||
/* Remember the new output state. */
|
||||
if( xValue == 0 )
|
||||
{
|
||||
ucPortState &= ~( 1 << uxLED );
|
||||
}
|
||||
else
|
||||
{
|
||||
ucPortState |= ( 1 << uxLED );
|
||||
}
|
||||
}
|
||||
taskEXIT_CRITICAL();
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
|
||||
{
|
||||
if( uxLED < partstNUM_LEDS )
|
||||
{
|
||||
taskENTER_CRITICAL();
|
||||
{
|
||||
vParTestSetLED( uxLED, !( ucPortState & ( 1 << uxLED ) ) );
|
||||
}
|
||||
taskEXIT_CRITICAL();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -1,138 +0,0 @@
|
||||
/*
|
||||
FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||
|
||||
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
|
||||
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||
* Complete, revised, and edited pdf reference manuals are also *
|
||||
* available. *
|
||||
* *
|
||||
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||
* ensuring you get running as quickly as possible and with an *
|
||||
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||
* the FreeRTOS project to continue with its mission of providing *
|
||||
* professional grade, cross platform, de facto standard solutions *
|
||||
* for microcontrollers - completely free of charge! *
|
||||
* *
|
||||
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||
* *
|
||||
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
|
||||
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
|
||||
distribute a combined work that includes FreeRTOS without being obliged to
|
||||
provide the source code for proprietary components outside of the FreeRTOS
|
||||
kernel.
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
|
||||
details. You should have received a copy of the GNU General Public License
|
||||
and the FreeRTOS license exception along with FreeRTOS; if not it can be
|
||||
viewed here: http://www.freertos.org/a00114.html and also obtained by
|
||||
writing to Real Time Engineers Ltd., contact details for whom are available
|
||||
on the FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
* not run, what could be wrong?" *
|
||||
* *
|
||||
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||
license and Real Time Engineers Ltd. contact details.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||
fully thread aware and reentrant UDP/IP stack.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||
Integrity Systems, who sell the code with commercial support,
|
||||
indemnification and middleware, under the OpenRTOS brand.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
*/
|
||||
|
||||
/* FreeRTOS includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
/* Utility functions to implement run time stats on Cortex-M CPUs. The collected
|
||||
run time data can be viewed through the CLI interface. See the following URL for
|
||||
more information on run time stats:
|
||||
http://www.freertos.org/rtos-run-time-stats.html */
|
||||
|
||||
/* Used in the run time stats calculations. */
|
||||
static uint32_t ulClocksPer10thOfAMilliSecond = 0UL;
|
||||
|
||||
|
||||
void vConfigureTimerForRunTimeStats( void )
|
||||
{
|
||||
/* How many clocks are there per tenth of a millisecond? */
|
||||
ulClocksPer10thOfAMilliSecond = configCPU_CLOCK_HZ / 10000UL;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
uint32_t ulGetRunTimeCounterValue( void )
|
||||
{
|
||||
uint32_t ulSysTickCounts, ulTickCount, ulReturn;
|
||||
const uint32_t ulSysTickReloadValue = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
volatile uint32_t * const pulCurrentSysTickCount = ( ( volatile uint32_t *) 0xe000e018 );
|
||||
volatile uint32_t * const pulInterruptCTRLState = ( ( volatile uint32_t *) 0xe000ed04 );
|
||||
const uint32_t ulSysTickPendingBit = 0x04000000UL;
|
||||
|
||||
/* NOTE: There are potentially race conditions here. However, it is used
|
||||
anyway to keep the examples simple, and to avoid reliance on a separate
|
||||
timer peripheral. */
|
||||
|
||||
|
||||
/* The SysTick is a down counter. How many clocks have passed since it was
|
||||
last reloaded? */
|
||||
ulSysTickCounts = ulSysTickReloadValue - *pulCurrentSysTickCount;
|
||||
|
||||
/* How many times has it overflowed? */
|
||||
ulTickCount = xTaskGetTickCountFromISR();
|
||||
|
||||
/* Is there a SysTick interrupt pending? */
|
||||
if( ( *pulInterruptCTRLState & ulSysTickPendingBit ) != 0UL )
|
||||
{
|
||||
/* There is a SysTick interrupt pending, so the SysTick has overflowed
|
||||
but the tick count not yet incremented. */
|
||||
ulTickCount++;
|
||||
|
||||
/* Read the SysTick again, as the overflow might have occurred since
|
||||
it was read last. */
|
||||
ulSysTickCounts = ulSysTickReloadValue - *pulCurrentSysTickCount;
|
||||
}
|
||||
|
||||
/* Convert the tick count into tenths of a millisecond. THIS ASSUMES
|
||||
configTICK_RATE_HZ is 1000! */
|
||||
ulReturn = ( ulTickCount * 10UL ) ;
|
||||
|
||||
/* Add on the number of tenths of a millisecond that have passed since the
|
||||
tick count last got updated. */
|
||||
ulReturn += ( ulSysTickCounts / ulClocksPer10thOfAMilliSecond );
|
||||
|
||||
return ulReturn;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
-320
File diff suppressed because it is too large
Load Diff
-80
@@ -1,80 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>RTOSDemo_Hardware_Platform</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<arguments>
|
||||
<dictionary>
|
||||
<key>?name?</key>
|
||||
<value></value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.append_environment</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.autoBuildTarget</key>
|
||||
<value>all</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.buildArguments</key>
|
||||
<value></value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.buildCommand</key>
|
||||
<value>make</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.buildLocation</key>
|
||||
<value>${workspace_loc:/RTOSDemo_Hardware_Platform/Debug}</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
|
||||
<value>clean</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.contents</key>
|
||||
<value>org.eclipse.cdt.make.core.activeConfigSettings</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableFullBuild</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.fullBuildTarget</key>
|
||||
<value>all</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.stopOnError</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
</projectDescription>
|
||||
-113
@@ -1,113 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2011-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SmartFusion2 Cortex Microcontroller Software Interface - Peripheral
|
||||
* Access Layer.
|
||||
*
|
||||
* This file provides interfaces to perform register and register bit level
|
||||
* read / write operations. These interfaces support bit-banding in case of
|
||||
* Cortex-M3 CPU.
|
||||
*
|
||||
* SVN $Revision: 5263 $
|
||||
* SVN $Date: 2013-03-21 14:44:58 +0000 (Thu, 21 Mar 2013) $
|
||||
*/
|
||||
|
||||
#ifndef HW_REG_IO_H_
|
||||
#define HW_REG_IO_H_
|
||||
|
||||
#include <stdint.h> /* Include standard types */
|
||||
|
||||
#if defined ( __CC_ARM )
|
||||
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
#define __INLINE inline /*!< inline keyword for GNU Compiler */
|
||||
#endif
|
||||
|
||||
/*****************************************************************************************
|
||||
* Definitions for register access
|
||||
*/
|
||||
|
||||
#define HW_REG(addr) (*((volatile uint32_t *) (addr)))
|
||||
|
||||
static __INLINE void write_reg32(volatile uint32_t * reg, uint32_t val)
|
||||
{
|
||||
HW_REG(reg) = val;
|
||||
}
|
||||
static __INLINE void write_reg16(volatile uint16_t * reg, uint16_t val)
|
||||
{
|
||||
HW_REG(reg) = val;
|
||||
}
|
||||
static __INLINE void write_reg8(volatile uint8_t * reg, uint8_t val)
|
||||
{
|
||||
HW_REG(reg) = val;
|
||||
}
|
||||
|
||||
static __INLINE uint32_t read_reg32(volatile uint32_t * reg)
|
||||
{
|
||||
return ( HW_REG(reg) );
|
||||
}
|
||||
static __INLINE uint16_t read_reg16(volatile uint16_t * reg)
|
||||
{
|
||||
return ( HW_REG(reg) );
|
||||
}
|
||||
static __INLINE uint8_t read_reg8(volatile uint8_t * reg)
|
||||
{
|
||||
return ( HW_REG(reg) );
|
||||
}
|
||||
/*****************************************************************************************
|
||||
* Definitions for register bits access using bit-band aliases for Cortex-M3
|
||||
*/
|
||||
#define BITBAND(addr,bitnum) (((uint32_t)addr & 0xF0000000)+0x02000000+(((uint32_t)addr & 0xFFFFF)<<5)+(bitnum<<2))
|
||||
#define HW_REG_BIT(reg,bitnum) (*(volatile unsigned int *)((BITBAND(reg,bitnum))))
|
||||
|
||||
/*****************************************************************************************
|
||||
* Functions to set a bit field in Cortex-M3
|
||||
*/
|
||||
static __INLINE void set_bit_reg32(volatile uint32_t * reg, uint8_t bit)
|
||||
{
|
||||
HW_REG_BIT(reg,bit) = 0x1;
|
||||
}
|
||||
static __INLINE void set_bit_reg16(volatile uint16_t * reg, uint8_t bit)
|
||||
{
|
||||
HW_REG_BIT(reg,bit) = 0x1;
|
||||
}
|
||||
static __INLINE void set_bit_reg8(volatile uint8_t * reg, uint8_t bit)
|
||||
{
|
||||
HW_REG_BIT(reg,bit) = 0x1;
|
||||
}
|
||||
/*****************************************************************************************
|
||||
* Functions to clear a bit field in Cortex-M3
|
||||
*/
|
||||
static __INLINE void clear_bit_reg32(volatile uint32_t * reg, uint8_t bit)
|
||||
{
|
||||
HW_REG_BIT(reg,bit) = 0x0;
|
||||
}
|
||||
static __INLINE void clear_bit_reg16(volatile uint16_t * reg, uint8_t bit)
|
||||
{
|
||||
HW_REG_BIT(reg,bit) = 0x0;
|
||||
}
|
||||
static __INLINE void clear_bit_reg8(volatile uint8_t * reg, uint8_t bit)
|
||||
{
|
||||
HW_REG_BIT(reg,bit) = 0x0;
|
||||
}
|
||||
/*****************************************************************************************
|
||||
* Functions to read a bit field in Cortex-M3
|
||||
*/
|
||||
static __INLINE uint8_t read_bit_reg32(volatile uint32_t * reg, uint8_t bit)
|
||||
{
|
||||
return (HW_REG_BIT(reg,bit));
|
||||
}
|
||||
static __INLINE uint8_t read_bit_reg16(volatile uint16_t * reg, uint8_t bit)
|
||||
{
|
||||
return (HW_REG_BIT(reg,bit));
|
||||
}
|
||||
static __INLINE uint8_t read_bit_reg8(volatile uint8_t * reg, uint8_t bit)
|
||||
{
|
||||
return (HW_REG_BIT(reg,bit));
|
||||
}
|
||||
|
||||
#endif /* HW_REG_IO_H_ */
|
||||
-2749
File diff suppressed because it is too large
Load Diff
-61
@@ -1,61 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2009-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* Assertion implementation.
|
||||
*
|
||||
* This file provides the implementation of the ASSERT macro. This file can be
|
||||
* modified to cater for project specific requirements regarding the way
|
||||
* assertions are handled.
|
||||
*
|
||||
* SVN $Revision: 5279 $
|
||||
* SVN $Date: 2013-03-22 20:48:38 +0000 (Fri, 22 Mar 2013) $
|
||||
*/
|
||||
#ifndef __MSS_ASSERT_H_
|
||||
#define __MSS_ASSERT_H_
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
|
||||
#if defined(NDEBUG)
|
||||
|
||||
#define ASSERT(CHECK)
|
||||
|
||||
#else /* NDEBUG */
|
||||
/*
|
||||
* SoftConsole assertion handling
|
||||
*/
|
||||
#define ASSERT(CHECK) \
|
||||
do { \
|
||||
if (!(CHECK)) \
|
||||
{ \
|
||||
__asm volatile ("BKPT\n\t"); \
|
||||
} \
|
||||
} while (0);
|
||||
|
||||
#endif /* NDEBUG */
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
/*
|
||||
* IAR Embedded Workbench assertion handling.
|
||||
* Call C library assert function which should result in error message
|
||||
* displayed in debugger.
|
||||
*/
|
||||
#define ASSERT(X) assert(X)
|
||||
|
||||
#else
|
||||
/*
|
||||
* Keil assertion handling.
|
||||
* Call C library assert function which should result in error message
|
||||
* displayed in debugger.
|
||||
*/
|
||||
|
||||
#ifndef __MICROLIB
|
||||
#define ASSERT(X) assert(X)
|
||||
#else
|
||||
#define ASSERT(X)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* __MSS_ASSERT_H_ */
|
||||
-186
@@ -1,186 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2012-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
|
||||
* debug image executing in SmartFusion2 development board external RAM.
|
||||
*
|
||||
* SVN $Revision: 5269 $
|
||||
* SVN $Date: 2013-03-21 20:53:38 +0000 (Thu, 21 Mar 2013) $
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
|
||||
"elf32-littlearm")
|
||||
GROUP(-lc -lgcc -lm)
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(Reset_Handler)
|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
/* SmartFusion2 internal eSRAM */
|
||||
esram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
|
||||
/* SmartFusion2 development board external RAM */
|
||||
external_ram (rwx) : ORIGIN = 0x70000000, LENGTH = 2M
|
||||
}
|
||||
|
||||
RAM_START_ADDRESS = 0x70000000; /* Must be the same value MEMORY region ram ORIGIN above. */
|
||||
RAM_SIZE = 64k; /* Must be the same value MEMORY region ram LENGTH above. */
|
||||
MAIN_STACK_SIZE = 8k; /* Cortex main stack size. */
|
||||
PROCESS_STACK_SIZE = 4k; /* Cortex process stack size (only available with OS extensions).*/
|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
|
||||
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
|
||||
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
|
||||
PROVIDE (_estack = __main_stack_start);
|
||||
PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.init :
|
||||
{
|
||||
__vector_table_vma_base_address = .;
|
||||
*(.isr_vector)
|
||||
. = ALIGN(0x4);
|
||||
} >esram
|
||||
|
||||
.text :
|
||||
{
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
__text_load = LOADADDR(.text);
|
||||
__text_start = .;
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu.warning)
|
||||
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
|
||||
|
||||
. = ALIGN(0x4);
|
||||
/* These are for running static constructors and destructors under ELF. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >external_ram
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >external_ram
|
||||
__exidx_end = .;
|
||||
_etext = .;
|
||||
PROVIDE(__text_end = .);
|
||||
|
||||
.data :
|
||||
{
|
||||
__data_load = LOADADDR (.data);
|
||||
_sidata = LOADADDR (.data);
|
||||
__data_start = .;
|
||||
_sdata = .;
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
. = ALIGN (4);
|
||||
_edata = .;
|
||||
} >external_ram
|
||||
|
||||
.bss :
|
||||
{
|
||||
__bss_start__ = . ;
|
||||
_sbss = .;
|
||||
*(.shbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN (8);
|
||||
__bss_end__ = .;
|
||||
_end = .;
|
||||
__end = _end;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} >external_ram
|
||||
|
||||
/*
|
||||
* The .stack section is only specified here in order for the linker to generate
|
||||
* an error if the esram is full.
|
||||
*/
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
. += PROCESS_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
. += MAIN_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
} >external_ram
|
||||
|
||||
.stab 0 (NOLOAD) :
|
||||
{
|
||||
*(.stab)
|
||||
}
|
||||
|
||||
.stabstr 0 (NOLOAD) :
|
||||
{
|
||||
*(.stabstr)
|
||||
}
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) *(.isr_vector) }
|
||||
}
|
||||
-184
@@ -1,184 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2012-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
|
||||
* debug image executing in SmartFusion2 internal eNVM.
|
||||
*
|
||||
* SVN $Revision: 5269 $
|
||||
* SVN $Date: 2013-03-21 20:53:38 +0000 (Thu, 21 Mar 2013) $
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
|
||||
"elf32-littlearm")
|
||||
GROUP(-lc -lgcc -lm)
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(Reset_Handler)
|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
/*
|
||||
* WARNING: The words "SOFTCONSOLE", "FLASH", and "USE", the colon ":", and
|
||||
* the name of the type of flash memory are all in a specific order.
|
||||
* Please do not modify that comment line, in order to ensure
|
||||
* debugging of your application will use the flash memory correctly.
|
||||
*/
|
||||
|
||||
/* SOFTCONSOLE FLASH USE: microsemi-smartfusion2-envm */
|
||||
rom (rx) : ORIGIN = 0x60000000, LENGTH = 256k
|
||||
|
||||
/* SmartFusion2 internal eNVM mirrored to 0x00000000 */
|
||||
romMirror (rx) : ORIGIN = 0x00000000, LENGTH = 256k
|
||||
|
||||
/* SmartFusion2 internal eSRAM */
|
||||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
}
|
||||
|
||||
RAM_START_ADDRESS = 0x20000000; /* Must be the same value MEMORY region ram ORIGIN above. */
|
||||
RAM_SIZE = 64k; /* Must be the same value MEMORY region ram LENGTH above. */
|
||||
MAIN_STACK_SIZE = 8k; /* Cortex main stack size. */
|
||||
PROCESS_STACK_SIZE = 4k; /* Cortex process stack size (only available with OS extensions).*/
|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
|
||||
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
|
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PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
|
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|
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|
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|
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|
||||
|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
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||||
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||||
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||||
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|
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||||
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||||
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||||
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||||
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||||
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||||
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|
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|
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-178
@@ -1,178 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2012-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
|
||||
* debug image executing in SmartFusion2 internal eSRAM.
|
||||
*
|
||||
* SVN $Revision: 5269 $
|
||||
* SVN $Date: 2013-03-21 20:53:38 +0000 (Thu, 21 Mar 2013) $
|
||||
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|
||||
|
||||
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|
||||
"elf32-littlearm")
|
||||
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|
||||
OUTPUT_ARCH(arm)
|
||||
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|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
/* SmartFusion2 internal eSRAM */
|
||||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
}
|
||||
|
||||
RAM_START_ADDRESS = 0x20000000; /* Must be the same value MEMORY region ram ORIGIN above. */
|
||||
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|
||||
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|
||||
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|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
|
||||
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
|
||||
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|
||||
PROVIDE (_estack = __main_stack_start);
|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
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|
||||
__exidx_end = .;
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||||
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||||
PROVIDE(__text_end = .);
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||||
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||||
__data_load = LOADADDR (.data);
|
||||
_sidata = LOADADDR (.data);
|
||||
__data_start = .;
|
||||
_sdata = .;
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
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|
||||
-273
File diff suppressed because it is too large
Load Diff
-172
@@ -1,172 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2009-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SmartFusion2 Cortex-M3 linker script creating an executable image for use in
|
||||
* the Libero flow for executing code in place in internal eNVM.
|
||||
*
|
||||
* SVN $Revision: 5269 $
|
||||
* SVN $Date: 2013-03-21 20:53:38 +0000 (Thu, 21 Mar 2013) $
|
||||
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|
||||
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|
||||
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|
||||
GROUP(-lc -lgcc -lm)
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(Reset_Handler)
|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
|
||||
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|
||||
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|
||||
PROVIDE (_estack = __main_stack_start);
|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
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||||
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|
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||||
|
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
|
||||
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|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
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||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
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/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
-178
@@ -1,178 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2009-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SmartFusion2 Cortex-M3 linker script creating an executable image for use in
|
||||
* the Libero flow for relocating executable from internal eNVM to external RAM
|
||||
* before starting execution.
|
||||
*
|
||||
* SVN $Revision: 5269 $
|
||||
* SVN $Date: 2013-03-21 20:53:38 +0000 (Thu, 21 Mar 2013) $
|
||||
*/
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
|
||||
"elf32-littlearm")
|
||||
GROUP(-lc -lgcc -lm)
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(Reset_Handler)
|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
/* SmartFusion2 internal eNVM */
|
||||
rom (rx) : ORIGIN = 0, LENGTH = 256k
|
||||
|
||||
/* SmartFusion2 internal eSRAM */
|
||||
esram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
|
||||
/* SmartFusion2 development board external RAM */
|
||||
external_ram (rwx) : ORIGIN = 0x70000000, LENGTH = 2M
|
||||
}
|
||||
|
||||
RAM_START_ADDRESS = 0x20000000; /* Must be the same value as MEMORY region esram ORIGIN above. */
|
||||
RAM_SIZE = 64k; /* Must be the same value as MEMORY region esram LENGTH above. */
|
||||
MAIN_STACK_SIZE = 8k; /* Cortex main stack size. */
|
||||
PROCESS_STACK_SIZE = 4k; /* Cortex process stack size (only available with OS extensions).*/
|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
|
||||
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
|
||||
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
|
||||
PROVIDE (_estack = __main_stack_start);
|
||||
PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.reset :
|
||||
{
|
||||
__vector_table_vma_base_address = .;
|
||||
*(.isr_vector)
|
||||
/* SystemInit() is called before relocation to RAM so keep in ROM */
|
||||
*system_m2sxxx.o(.text*)
|
||||
. = ALIGN(0x4);
|
||||
} >rom
|
||||
|
||||
.text :
|
||||
{
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
__text_load = LOADADDR(.text);
|
||||
__text_start = .;
|
||||
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu.warning)
|
||||
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
|
||||
|
||||
. = ALIGN(0x4);
|
||||
/* These are for running static constructors and destructors under ELF. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >external_ram AT>rom
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >external_ram AT>rom
|
||||
__exidx_end = .;
|
||||
_etext = .;
|
||||
|
||||
.data :
|
||||
{
|
||||
__data_load = LOADADDR(.data);
|
||||
_sidata = LOADADDR (.data);
|
||||
__data_start = .;
|
||||
_sdata = .;
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
. = ALIGN (4);
|
||||
_edata = .;
|
||||
} >esram AT>rom
|
||||
|
||||
.bss :
|
||||
{
|
||||
__bss_start__ = . ;
|
||||
_sbss = .;
|
||||
*(.shbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN (8);
|
||||
__bss_end__ = .;
|
||||
_end = .;
|
||||
__end = _end;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} >esram AT>rom
|
||||
|
||||
.stab 0 (NOLOAD) :
|
||||
{
|
||||
*(.stab)
|
||||
}
|
||||
|
||||
.stabstr 0 (NOLOAD) :
|
||||
{
|
||||
*(.stabstr)
|
||||
}
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
-951
File diff suppressed because it is too large
Load Diff
-212
File diff suppressed because it is too large
Load Diff
-560
File diff suppressed because it is too large
Load Diff
-49
@@ -1,49 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2012-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SmartFusion2 CMSIS system initialization.
|
||||
*
|
||||
* SVN $Revision: 5280 $
|
||||
* SVN $Date: 2013-03-22 20:51:50 +0000 (Fri, 22 Mar 2013) $
|
||||
*/
|
||||
|
||||
#ifndef SYSTEM_M2SXXX_H
|
||||
#define SYSTEM_M2SXXX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Standard CMSIS global variables. */
|
||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||
|
||||
/* SmartFusion2 specific clocks. */
|
||||
extern uint32_t g_FrequencyPCLK0; /*!< Clock frequency of APB bus 0. */
|
||||
extern uint32_t g_FrequencyPCLK1; /*!< Clock frequency of APB bus 1. */
|
||||
extern uint32_t g_FrequencyPCLK2; /*!< Clock frequency of APB bus 2. */
|
||||
extern uint32_t g_FrequencyFIC0; /*!< Clock frequecny of FPGA fabric interface controller 1. */
|
||||
extern uint32_t g_FrequencyFIC1; /*!< Clock frequecny of FPGA fabric inteface controller 2. */
|
||||
extern uint32_t g_FrequencyFIC64; /*!< Clock frequecny of 64-bit FPGA fabric interface controller. */
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
* The SystemInit() is a standard CMSIS function called during system startup.
|
||||
* It is meant to perform low level hardware setup such as configuring DDR and
|
||||
* SERDES controllers.
|
||||
*/
|
||||
void SystemInit(void);
|
||||
|
||||
/***************************************************************************//**
|
||||
* The SystemCoreClockUpdate() is a standard CMSIS function which can be called
|
||||
* by the application in order to ensure that the SystemCoreClock global
|
||||
* variable contains the up to date Cortex-M3 core frequency. Calling this
|
||||
* function also updates the global variables containing the frequencies of the
|
||||
* APB busses connecting the peripherals.
|
||||
*/
|
||||
void SystemCoreClockUpdate(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
-16
@@ -1,16 +0,0 @@
|
||||
#ifndef RTOSDemo_HW_PLATFORM_H_
|
||||
#define RTOSDemo_HW_PLATFORM_H_
|
||||
/*****************************************************************************
|
||||
*
|
||||
*Created by Actel SmartDesign Sun May 05 13:23:22 2013
|
||||
*
|
||||
*Memory map specification for peripherals in RTOSDemo
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------------
|
||||
* CM3 subsystem memory map
|
||||
* Master(s) for this subsystem: CM3
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
#endif /* RTOSDemo_HW_PLATFORM_H_*/
|
||||
-296
File diff suppressed because it is too large
Load Diff
-507
File diff suppressed because it is too large
Load Diff
-344
File diff suppressed because it is too large
Load Diff
-361
File diff suppressed because it is too large
Load Diff
-694
File diff suppressed because it is too large
Load Diff
-249
File diff suppressed because it is too large
Load Diff
-666
File diff suppressed because it is too large
Load Diff
-710
File diff suppressed because it is too large
Load Diff
-703
File diff suppressed because it is too large
Load Diff
-87
@@ -1,87 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2012 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SmartFusion2 COMBLK access functions.
|
||||
*
|
||||
* SVN $Revision: 5160 $
|
||||
* SVN $Date: 2013-03-14 14:50:49 +0000 (Thu, 14 Mar 2013) $
|
||||
*/
|
||||
#ifndef __MSS_COMBLK_H_
|
||||
#define __MSS_COMBLK_H_ 1
|
||||
|
||||
#include "../../CMSIS/m2sxxx.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
typedef void(*comblk_completion_handler_t)(uint8_t * p_response, uint16_t response_size);
|
||||
|
||||
typedef uint32_t (*comblk_page_handler_t)(uint8_t const ** pp_next_page);
|
||||
|
||||
typedef void (*comblk_async_event_handler_t)(uint8_t event_opcode);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void MSS_COMBLK_init(comblk_async_event_handler_t async_event_handler);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void MSS_COMBLK_send_cmd_with_ptr
|
||||
(
|
||||
uint8_t cmd_opcode,
|
||||
uint32_t cmd_params_ptr,
|
||||
uint8_t * p_response,
|
||||
uint16_t response_size,
|
||||
comblk_completion_handler_t completion_handler
|
||||
);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void MSS_COMBLK_send_cmd
|
||||
(
|
||||
const uint8_t * p_cmd,
|
||||
uint16_t cmd_size,
|
||||
const uint8_t * p_data,
|
||||
uint32_t data_size,
|
||||
uint8_t * p_response,
|
||||
uint16_t response_size,
|
||||
comblk_completion_handler_t completion_handler
|
||||
);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void MSS_COMBLK_read
|
||||
(
|
||||
const uint8_t * p_data,
|
||||
uint16_t cmd_size,
|
||||
uint8_t * p_response,
|
||||
uint16_t response_size,
|
||||
comblk_completion_handler_t completion_handler
|
||||
);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void MSS_COMBLK_send_paged_cmd
|
||||
(
|
||||
const uint8_t * p_cmd,
|
||||
uint16_t cmd_size,
|
||||
uint8_t * p_response,
|
||||
uint16_t response_size,
|
||||
uint32_t (*)(uint8_t const **),
|
||||
void (*completion_handler)(uint8_t *, uint16_t)
|
||||
);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MSS_COMBLK_H_ */
|
||||
-813
File diff suppressed because it is too large
Load Diff
-883
File diff suppressed because it is too large
Load Diff
-595
File diff suppressed because it is too large
Load Diff
-1762
File diff suppressed because it is too large
Load Diff
-2639
File diff suppressed because it is too large
Load Diff
-83
@@ -1,83 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2011-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* Register bit offsets and masks defintions for SmartFusion2 MSS MMUART.
|
||||
*
|
||||
* SVN $Revision: 5610 $
|
||||
* SVN $Date: 2013-04-05 14:19:30 +0100 (Fri, 05 Apr 2013) $
|
||||
*/
|
||||
#ifndef MSS_UART_REGS_H_
|
||||
#define MSS_UART_REGS_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
Register Bit definitions
|
||||
*/
|
||||
|
||||
/* Line Control register bit definitions */
|
||||
#define SB 6u /* Set break */
|
||||
#define DLAB 7u /* Divisor latch access bit */
|
||||
|
||||
/* FIFO Control register bit definitions */
|
||||
#define RXRDY_TXRDYN_EN 0u /* Enable TXRDY and RXRDY signals */
|
||||
#define CLEAR_RX_FIFO 1u /* Clear receiver FIFO */
|
||||
#define CLEAR_TX_FIFO 2u /* Clear transimtter FIFO */
|
||||
#define RDYMODE 3u /* Mode 0 or Mode 1 for TXRDY and RXRDY */
|
||||
|
||||
/* Modem Control register bit definitions */
|
||||
#define LOOP 4u /* Local loopback */
|
||||
#define RLOOP 5u /* Remote loopback */
|
||||
#define ECHO 6u /* Automatic echo */
|
||||
#define RLOOP_MASK 0x6u /* Remote loopback & Automatic echo*/
|
||||
|
||||
/* Line Status register bit definitions */
|
||||
#define DR 0u /* Data ready */
|
||||
#define THRE 5u /* Transmitter holding register empty */
|
||||
#define TEMT 6u /* Transitter empty */
|
||||
|
||||
/* Interrupt Enable register bit definitions */
|
||||
#define ERBFI 0u /* Enable receiver buffer full interrupt */
|
||||
#define ETBEI 1u /* Enable transmitter buffer empty interrupt */
|
||||
#define ELSI 2u /* Enable line status interrupt */
|
||||
#define EDSSI 3u /* Enable modem status interrupt */
|
||||
|
||||
/* Multimode register 0 bit definitions */
|
||||
#define ELIN 3u /* Enable LIN header detection */
|
||||
#define ETTG 5u /* Enable transmitter time guard */
|
||||
#define ERTO 6u /* Enable receiver time-out */
|
||||
#define EFBR 7u /* Enable fractional baud rate mode */
|
||||
|
||||
/* Multimode register 1 bit definitions */
|
||||
#define E_MSB_RX 0u /* MSB / LSB first for receiver */
|
||||
#define E_MSB_TX 1u /* MSB / LSB first for transmitter */
|
||||
#define EIRD 2u /* Enable IrDA modem */
|
||||
#define EIRX 3u /* Input polarity for IrDA modem */
|
||||
#define EITX 4u /* Output polarity for IrDA modem */
|
||||
#define EITP 5u /* Output pulse width for IrDA modem */
|
||||
|
||||
/* Multimode register 2 bit definitions */
|
||||
#define EERR 0u /* Enable ERR / NACK during stop time */
|
||||
#define EAFM 1u /* Enable 9-bit address flag mode */
|
||||
#define EAFC 2u /* Enable address flag clear */
|
||||
#define ESWM 3u /* Enable single wire half-duplex mode */
|
||||
|
||||
/* Multimode Interrupt Enable register and
|
||||
Multimode Interrupt Identification register definitions */
|
||||
#define ERTOI 0u /* Enable receiver timeout interrupt */
|
||||
#define ENACKI 1u /* Enable NACK / ERR interrupt */
|
||||
#define EPID_PEI 2u /* Enable PID parity error interrupt */
|
||||
#define ELINBI 3u /* Enable LIN break interrupt */
|
||||
#define ELINSI 4u /* Enable LIN sync detection interrupt */
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* MSS_UART_REGS_H_ */
|
||||
|
||||
|
||||
|
||||
-385
File diff suppressed because it is too large
Load Diff
-67
@@ -1,67 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2012 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* Smartfusion2 system configuration. This file is automatically generated
|
||||
* by the Libero tools.
|
||||
*
|
||||
*/
|
||||
#ifndef MSS_SYSTEM_CONFIGURATION
|
||||
#define MSS_SYSTEM_CONFIGURATION
|
||||
|
||||
/*==============================================================================
|
||||
* Clock configuration
|
||||
*/
|
||||
#include "sys_config_mss_clocks.h"
|
||||
|
||||
/*==============================================================================
|
||||
* Memory remapping configuration
|
||||
*/
|
||||
/* TBD */
|
||||
|
||||
/*==============================================================================
|
||||
* FACC_INIT (Cortex-M3 runs the FACC INIT procedure)
|
||||
* Only set to 1 for design targeting the M2S050T_ES device
|
||||
*/
|
||||
#define MSS_SYS_FACC_INIT_BY_CORTEX 1
|
||||
|
||||
/*==============================================================================
|
||||
* MDDR configuration
|
||||
*/
|
||||
#define MSS_SYS_MDDR_CONFIG_BY_CORTEX 0
|
||||
|
||||
/*==============================================================================
|
||||
* FDDR configuration
|
||||
*/
|
||||
#define MSS_SYS_FDDR_CONFIG_BY_CORTEX 0
|
||||
|
||||
/*==============================================================================
|
||||
* SERDES Interface configuration
|
||||
*/
|
||||
#define MSS_SYS_SERDES_0_CONFIG_BY_CORTEX 0
|
||||
#if MSS_SYS_SERDES_0_CONFIG_BY_CORTEX
|
||||
#include "sys_config_SERDESIF_0.h"
|
||||
#endif
|
||||
|
||||
#define MSS_SYS_SERDES_1_CONFIG_BY_CORTEX 0
|
||||
#if MSS_SYS_SERDES_1_CONFIG_BY_CORTEX
|
||||
#include "sys_config_SERDESIF_1.h"
|
||||
#endif
|
||||
|
||||
#define MSS_SYS_SERDES_2_CONFIG_BY_CORTEX 0
|
||||
#if MSS_SYS_SERDES_2_CONFIG_BY_CORTEX
|
||||
#include "sys_config_SERDESIF_2.h"
|
||||
#endif
|
||||
|
||||
#define MSS_SYS_SERDES_3_CONFIG_BY_CORTEX 0
|
||||
#if MSS_SYS_SERDES_3_CONFIG_BY_CORTEX
|
||||
#include "sys_config_SERDESIF_3.h"
|
||||
#endif
|
||||
|
||||
/*==============================================================================
|
||||
* Cache configuration
|
||||
*/
|
||||
#define MSS_SYS_CACHE_CONFIG_BY_CORTEX 0
|
||||
|
||||
#endif /* MSS_SYSTEM_CONFIGURATION */
|
||||
|
||||
|
||||
-30
@@ -1,30 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2007-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SVN $Revision: 5258 $
|
||||
* SVN $Date: 2013-03-21 12:41:02 +0000 (Thu, 21 Mar 2013) $
|
||||
*/
|
||||
#ifndef __CPU_TYPES_H
|
||||
#define __CPU_TYPES_H 1
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*/
|
||||
typedef unsigned int size_t;
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* addr_t: address type.
|
||||
* Used to specify the address of peripherals present in the processor's memory
|
||||
* map.
|
||||
*/
|
||||
typedef unsigned int addr_t;
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* psr_t: processor state register.
|
||||
* Used by HAL_disable_interrupts() and HAL_restore_interrupts() to store the
|
||||
* processor's state between disabling and restoring interrupts.
|
||||
*/
|
||||
typedef unsigned int psr_t;
|
||||
|
||||
#endif /* __CPU_TYPES_H */
|
||||
-31
@@ -1,31 +0,0 @@
|
||||
#-------------------------------------------------------------------------------
|
||||
# (c) Copyright 2007-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
#
|
||||
# Interrupt disabling/restoration for critical section protection.
|
||||
#
|
||||
# SVN $Revision: 5258 $
|
||||
# SVN $Date: 2013-03-21 12:41:02 +0000 (Thu, 21 Mar 2013) $
|
||||
#
|
||||
.text
|
||||
.global HAL_disable_interrupts
|
||||
.global HAL_restore_interrupts
|
||||
.code 16
|
||||
.syntax unified
|
||||
.type HAL_disable_interrupts, function
|
||||
.type HAL_restore_interrupts, function
|
||||
#-------------------------------------------------------------------------------
|
||||
#
|
||||
#
|
||||
HAL_disable_interrupts:
|
||||
mrs r0, PRIMASK
|
||||
cpsid I
|
||||
bx lr
|
||||
|
||||
#-------------------------------------------------------------------------------
|
||||
#
|
||||
#
|
||||
HAL_restore_interrupts:
|
||||
msr PRIMASK, r0
|
||||
bx lr
|
||||
|
||||
.end
|
||||
-96
@@ -1,96 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2007-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* Hardware registers access macros.
|
||||
*
|
||||
* THE MACROS DEFINED IN THIS FILE ARE DEPRECATED. DO NOT USED FOR NEW
|
||||
* DEVELOPMENT.
|
||||
*
|
||||
* These macros are used to access peripheral's registers. They allow access to
|
||||
* 8, 16 and 32 bit wide registers. All accesses to peripheral registers should
|
||||
* be done through these macros in order to ease porting accross different
|
||||
* processors/bus architectures.
|
||||
*
|
||||
* Some of these macros also allow to access a specific register field.
|
||||
*
|
||||
* SVN $Revision: 5258 $
|
||||
* SVN $Date: 2013-03-21 12:41:02 +0000 (Thu, 21 Mar 2013) $
|
||||
*/
|
||||
#ifndef __HW_REGISTER_MACROS_H
|
||||
#define __HW_REGISTER_MACROS_H 1
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* 32 bits registers access:
|
||||
*/
|
||||
#define HW_get_uint32_reg(BASE_ADDR, REG_OFFSET) (*((uint32_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)))
|
||||
|
||||
#define HW_set_uint32_reg(BASE_ADDR, REG_OFFSET, VALUE) (*((uint32_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)) = (VALUE))
|
||||
|
||||
#define HW_set_uint32_reg_field(BASE_ADDR, FIELD, VALUE) \
|
||||
(*((uint32_t volatile *)(BASE_ADDR + FIELD##_OFFSET)) = \
|
||||
( \
|
||||
(uint32_t) \
|
||||
( \
|
||||
(*((uint32_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & ~FIELD##_MASK) | \
|
||||
(uint32_t)(((VALUE) << FIELD##_SHIFT) & FIELD##_MASK) \
|
||||
) \
|
||||
)
|
||||
|
||||
#define HW_get_uint32_reg_field( BASE_ADDR, FIELD ) \
|
||||
(( (*((uint32_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & FIELD##_MASK) >> FIELD##_SHIFT)
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* 32 bits memory access:
|
||||
*/
|
||||
#define HW_get_uint32(BASE_ADDR) (*((uint32_t volatile *)(BASE_ADDR)))
|
||||
|
||||
#define HW_set_uint32(BASE_ADDR, VALUE) (*((uint32_t volatile *)(BASE_ADDR)) = (VALUE))
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* 16 bits registers access:
|
||||
*/
|
||||
#define HW_get_uint16_reg(BASE_ADDR, REG_OFFSET) (*((uint16_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)))
|
||||
|
||||
#define HW_set_uint16_reg(BASE_ADDR, REG_OFFSET, VALUE) (*((uint16_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)) = (VALUE))
|
||||
|
||||
#define HW_set_uint16_reg_field(BASE_ADDR, FIELD, VALUE) \
|
||||
(*((uint16_t volatile *)(BASE_ADDR + FIELD##_OFFSET)) = \
|
||||
( \
|
||||
(uint16_t) \
|
||||
( \
|
||||
(*((uint16_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & ~FIELD##_MASK) | \
|
||||
(uint16_t)(((VALUE) << FIELD##_SHIFT) & FIELD##_MASK) \
|
||||
) \
|
||||
)
|
||||
|
||||
#define HW_get_uint16_reg_field( BASE_ADDR, FIELD ) \
|
||||
(( (*((uint16_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & FIELD##_MASK) >> FIELD##_SHIFT)
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* 8 bits registers access:
|
||||
*/
|
||||
#define HW_get_uint8_reg(BASE_ADDR, REG_OFFSET) (*((uint8_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)))
|
||||
|
||||
#define HW_set_uint8_reg(BASE_ADDR, REG_OFFSET, VALUE) (*((uint8_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)) = (VALUE))
|
||||
|
||||
#define HW_set_uint8_reg_field(BASE_ADDR, FIELD, VALUE) \
|
||||
(*((uint8_t volatile *)(BASE_ADDR + FIELD##_OFFSET)) = \
|
||||
( \
|
||||
(uint8_t) \
|
||||
( \
|
||||
(*((uint8_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & ~FIELD##_MASK) | \
|
||||
(uint8_t)(((VALUE) << FIELD##_SHIFT) & FIELD##_MASK) \
|
||||
) \
|
||||
)
|
||||
|
||||
#define HW_get_uint8_reg_field( BASE_ADDR, FIELD ) \
|
||||
(( (*((uint8_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & FIELD##_MASK) >> FIELD##_SHIFT)
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* 8 bits memory access:
|
||||
*/
|
||||
#define HW_get_uint8(BASE_ADDR) (*((uint8_t volatile *)(BASE_ADDR)))
|
||||
|
||||
#define HW_set_uint8(BASE_ADDR, VALUE) (*((uint8_t volatile *)(BASE_ADDR)) = (VALUE))
|
||||
|
||||
#endif /* __HW_REGISTER_MACROS_H */
|
||||
-165
@@ -1,165 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2008-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SVN $Revision: 5258 $
|
||||
* SVN $Date: 2013-03-21 12:41:02 +0000 (Thu, 21 Mar 2013) $
|
||||
*/
|
||||
|
||||
.text
|
||||
.global HW_set_32bit_reg
|
||||
.global HW_get_32bit_reg
|
||||
.global HW_set_32bit_reg_field
|
||||
.global HW_get_32bit_reg_field
|
||||
.global HW_set_16bit_reg
|
||||
.global HW_get_16bit_reg
|
||||
.global HW_set_16bit_reg_field
|
||||
.global HW_get_16bit_reg_field
|
||||
.global HW_set_8bit_reg
|
||||
.global HW_get_8bit_reg
|
||||
.global HW_set_8bit_reg_field
|
||||
.global HW_get_8bit_reg_field
|
||||
.code 16
|
||||
.syntax unified
|
||||
.type HW_set_32bit_reg, function
|
||||
.type HW_get_32bit_reg, function
|
||||
.type HW_set_32bit_reg_field, function
|
||||
.type HW_get_32bit_reg_field, function
|
||||
.type HW_set_16bit_reg, function
|
||||
.type HW_get_16bit_reg, function
|
||||
.type HW_set_16bit_reg_field, function
|
||||
.type HW_get_16bit_reg_field, function
|
||||
.type HW_set_8bit_reg, function
|
||||
.type HW_get_8bit_reg, function
|
||||
.type HW_set_8bit_reg_field, function
|
||||
.type HW_get_8bit_reg_field, function
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* R0: addr_t reg_addr
|
||||
* R1: uint32_t value
|
||||
*/
|
||||
HW_set_32bit_reg:
|
||||
STR R1, [R0]
|
||||
BX LR
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* R0: addr_t reg_addr
|
||||
*/
|
||||
HW_get_32bit_reg:
|
||||
LDR R0, [R0]
|
||||
BX LR
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* R0: addr_t reg_addr
|
||||
* R1: int_fast8_t shift
|
||||
* R2: uint32_t mask
|
||||
* R3: uint32_t value
|
||||
*/
|
||||
HW_set_32bit_reg_field:
|
||||
PUSH {R1,R2,R3,LR}
|
||||
LSL.W R3, R3, R1
|
||||
AND.W R3, R3, R2
|
||||
LDR R1, [R0]
|
||||
MVN.W R2, R2
|
||||
AND.W R1, R1, R2
|
||||
ORR.W R1, R1, R3
|
||||
STR R1, [R0]
|
||||
POP {R1,R2,R3,PC}
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* R0: addr_t reg_addr
|
||||
* R1: int_fast8_t shift
|
||||
* R2: uint32_t mask
|
||||
*/
|
||||
HW_get_32bit_reg_field:
|
||||
LDR R0, [R0]
|
||||
AND.W R0, R0, R2
|
||||
LSR.W R0, R0, R1
|
||||
BX LR
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* R0: addr_t reg_addr
|
||||
* R1: uint_fast16_t value
|
||||
*/
|
||||
HW_set_16bit_reg:
|
||||
STRH R1, [R0]
|
||||
BX LR
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* R0: addr_t reg_addr
|
||||
*/
|
||||
HW_get_16bit_reg:
|
||||
LDRH R0, [R0]
|
||||
BX LR
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* R0: addr_t reg_addr
|
||||
* R1: int_fast8_t shift
|
||||
* R2: uint_fast16_t mask
|
||||
* R3: uint_fast16_t value
|
||||
*/
|
||||
HW_set_16bit_reg_field:
|
||||
PUSH {R1,R2,R3,LR}
|
||||
LSL.W R3, R3, R1
|
||||
AND.W R3, R3, R2
|
||||
LDRH R1, [R0]
|
||||
MVN.W R2, R2
|
||||
AND.W R1, R1, R2
|
||||
ORR.W R1, R1, R3
|
||||
STRH R1, [R0]
|
||||
POP {R1,R2,R3,PC}
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* R0: addr_t reg_addr
|
||||
* R1: int_fast8_t shift
|
||||
* R2: uint_fast16_t mask
|
||||
*/
|
||||
HW_get_16bit_reg_field:
|
||||
LDRH R0, [R0]
|
||||
AND.W R0, R0, R2
|
||||
LSR.W R0, R0, R1
|
||||
BX LR
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* R0: addr_t reg_addr
|
||||
* R1: uint_fast8_t value
|
||||
*/
|
||||
HW_set_8bit_reg:
|
||||
STRB R1, [R0]
|
||||
BX LR
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* R0: addr_t reg_addr
|
||||
*/
|
||||
HW_get_8bit_reg:
|
||||
LDRB R0, [R0]
|
||||
BX LR
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* R0: addr_t reg_addr,
|
||||
* R1: int_fast8_t shift
|
||||
* R2: uint_fast8_t mask
|
||||
* R3: uint_fast8_t value
|
||||
*/
|
||||
HW_set_8bit_reg_field:
|
||||
PUSH {R1,R2,R3,LR}
|
||||
LSL.W R3, R3, R1
|
||||
AND.W R3, R3, R2
|
||||
LDRB R1, [R0]
|
||||
MVN.W R2, R2
|
||||
AND.W R1, R1, R2
|
||||
ORR.W R1, R1, R3
|
||||
STRB R1, [R0]
|
||||
POP {R1,R2,R3,PC}
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* R0: addr_t reg_addr
|
||||
* R1: int_fast8_t shift
|
||||
* R2: uint_fast8_t mask
|
||||
*/
|
||||
HW_get_8bit_reg_field:
|
||||
LDRB R0, [R0]
|
||||
AND.W R0, R0, R2
|
||||
LSR.W R0, R0, R1
|
||||
BX LR
|
||||
|
||||
.end
|
||||
-205
File diff suppressed because it is too large
Load Diff
-56
@@ -1,56 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2007-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* Legacy Actel HAL Cortex NVIC control functions.
|
||||
* The use of these functions should be replaced by calls to the equivalent
|
||||
* CMSIS function in your application code.
|
||||
*
|
||||
* SVN $Revision: 5257 $
|
||||
* SVN $Date: 2013-03-21 12:24:10 +0000 (Thu, 21 Mar 2013) $
|
||||
*/
|
||||
#ifndef CORTEX_NVIC_H_
|
||||
#define CORTEX_NVIC_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef void (*hal_nvic_irq_handler_t)(void);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void NVIC_init( void );
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void NVIC_set_handler
|
||||
(
|
||||
uint32_t interrupt_number,
|
||||
hal_nvic_irq_handler_t handler
|
||||
);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void NVIC_set_priority
|
||||
(
|
||||
uint32_t interrupt_number,
|
||||
uint8_t priority_level
|
||||
);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void NVIC_enable_interrupt( uint32_t interrupt_number );
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void NVIC_disable_interrupt( uint32_t interrupt_number );
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void NVIC_clear_interrupt( uint32_t interrupt_number );
|
||||
|
||||
#endif /*CORTEX_NVIC_H_*/
|
||||
-206
File diff suppressed because it is too large
Load Diff
-30
@@ -1,30 +0,0 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2008-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SVN $Revision: 5274 $
|
||||
* SVN $Date: 2013-03-22 13:18:44 +0000 (Fri, 22 Mar 2013) $
|
||||
*/
|
||||
#ifndef HAL_ASSERT_HEADER
|
||||
#define HAL_ASSERT_HEADER
|
||||
|
||||
#include "../CMSIS/mss_assert.h"
|
||||
|
||||
#if defined(NDEBUG)
|
||||
/***************************************************************************//**
|
||||
* HAL_ASSERT() is defined out when the NDEBUG symbol is used.
|
||||
******************************************************************************/
|
||||
#define HAL_ASSERT(CHECK)
|
||||
|
||||
#else
|
||||
/***************************************************************************//**
|
||||
* Default behaviour for HAL_ASSERT() macro:
|
||||
*------------------------------------------------------------------------------
|
||||
* Using the HAL_ASSERT() macro is the same as directly using the SmartFusion2
|
||||
* CMSIS ASSERT() macro. The behaviour is toolchain specific and project
|
||||
* setting specific.
|
||||
******************************************************************************/
|
||||
#define HAL_ASSERT(CHECK) ASSERT(CHECK);
|
||||
|
||||
#endif /* NDEBUG */
|
||||
|
||||
#endif /* HAL_ASSERT_HEADER */
|
||||
-227
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+22
@@ -0,0 +1,22 @@
|
||||
/**************************************************************************
|
||||
* (c) Copyright 2012 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* Smartfusion2 system configuration.
|
||||
* - Automatically created by Microsemi Libero SoC Sun May 05 13:12:03 2013
|
||||
*
|
||||
* Warning: Do not modify this file, it may lead to unexpected
|
||||
* functional failures in your Microcontroller Subsystem.
|
||||
*/
|
||||
#ifndef SYS_CONFIG_MSS_CLOCKS
|
||||
#define SYS_CONFIG_MSS_CLOCKS
|
||||
|
||||
#define MSS_SYS_M3_CLK_FREQ 100000000u
|
||||
#define MSS_SYS_MDDR_CLK_FREQ 100000000u
|
||||
#define MSS_SYS_APB_0_CLK_FREQ 25000000u
|
||||
#define MSS_SYS_APB_1_CLK_FREQ 25000000u
|
||||
#define MSS_SYS_APB_2_CLK_FREQ 25000000u
|
||||
#define MSS_SYS_FIC_0_CLK_FREQ 100000000u
|
||||
#define MSS_SYS_FIC_1_CLK_FREQ 100000000u
|
||||
#define MSS_SYS_FIC64_CLK_FREQ 100000000u
|
||||
|
||||
#endif /* SYS_CONFIG_MSS_CLOCKS */
|
||||
Reference in New Issue
Block a user