mirror of
https://github.com/FreeRTOS/FreeRTOS.git
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Start of an MSP430FR5969 IAR project - currently running Blinky only.
This commit is contained in:
Richard Barry
@@ -0,0 +1,236 @@
|
||||
/*
|
||||
FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
* NOTE 1: This project provides two demo applications. A simple blinky
|
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* style project, and a more comprehensive test and demo application. The
|
||||
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select
|
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* between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY
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* in main.c. This file implements the simply blinky style version.
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||||
*
|
||||
* NOTE 2: This file only contains the source code that is specific to the
|
||||
* basic demo. Generic functions, such FreeRTOS hook functions, and functions
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||||
* required to configure the hardware are defined in main.c.
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||||
******************************************************************************
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*
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* main_blinky() creates one queue, and two tasks. It then starts the
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* scheduler.
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*
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* The Queue Send Task:
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||||
* The queue send task is implemented by the prvQueueSendTask() function in
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||||
* this file. prvQueueSendTask() sits in a loop that causes it to repeatedly
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* block for 200 milliseconds, before sending the value 100 to the queue that
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* was created within main_blinky(). Once the value is sent, the task loops
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||||
* back around to block for another 200 milliseconds...and so on.
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||||
*
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* The Queue Receive Task:
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||||
* The queue receive task is implemented by the prvQueueReceiveTask() function
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||||
* in this file. prvQueueReceiveTask() sits in a loop where it repeatedly
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||||
* blocks on attempts to read data from the queue that was created within
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* main_blinky(). When data is received, the task checks the value of the
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* data, and if the value equals the expected 100, toggles an LED. The 'block
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||||
* time' parameter passed to the queue receive function specifies that the
|
||||
* task should be held in the Blocked state indefinitely to wait for data to
|
||||
* be available on the queue. The queue receive task will only leave the
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||||
* Blocked state when the queue send task writes to the queue. As the queue
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||||
* send task writes to the queue every 200 milliseconds, the queue receive
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||||
* task leaves the Blocked state every 200 milliseconds, and therefore toggles
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||||
* the LED every 200 milliseconds.
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||||
*/
|
||||
|
||||
/* Kernel includes. */
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||||
#include "FreeRTOS.h"
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||||
#include "task.h"
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||||
#include "semphr.h"
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||||
|
||||
/* Standard demo includes. */
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||||
#include "partest.h"
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||||
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||||
/* Priorities at which the tasks are created. */
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#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
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#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
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/* The rate at which data is sent to the queue. The 200ms value is converted
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||||
to ticks using the portTICK_PERIOD_MS constant. */
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#define mainQUEUE_SEND_FREQUENCY_MS ( pdMS_TO_TICKS( 200 ) )
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/* The number of items the queue can hold. This is 1 as the receive task
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will remove items as they are added, meaning the send task should always find
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||||
the queue empty. */
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#define mainQUEUE_LENGTH ( 1 )
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||||
/* The LED toggled by the Rx task. */
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#define mainTASK_LED ( 0 )
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||||
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||||
/*-----------------------------------------------------------*/
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||||
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/*
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* Called by main when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1 in
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* main.c.
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*/
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||||
void main_blinky( void );
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||||
/*
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* The tasks as described in the comments at the top of this file.
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*/
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||||
static void prvQueueReceiveTask( void *pvParameters );
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static void prvQueueSendTask( void *pvParameters );
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||||
|
||||
/*-----------------------------------------------------------*/
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||||
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||||
/* The queue used by both tasks. */
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||||
static QueueHandle_t xQueue = NULL;
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||||
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||||
/*-----------------------------------------------------------*/
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||||
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void main_blinky( void )
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{
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||||
/* Create the queue. */
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xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) );
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||||
|
||||
if( xQueue != NULL )
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||||
{
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||||
/* Start the two tasks as described in the comments at the top of this
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||||
file. */
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||||
xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */
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||||
"Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */
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||||
configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */
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||||
NULL, /* The parameter passed to the task - not used in this case. */
|
||||
mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */
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||||
NULL ); /* The task handle is not required, so NULL is passed. */
|
||||
|
||||
xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL );
|
||||
|
||||
/* Start the tasks and timer running. */
|
||||
vTaskStartScheduler();
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||||
}
|
||||
|
||||
/* If all is well, the scheduler will now be running, and the following
|
||||
line will never be reached. If the following line does execute, then
|
||||
there was either insufficient FreeRTOS heap memory available for the idle
|
||||
and/or timer tasks to be created, or vTaskStartScheduler() was called from
|
||||
User mode. See the memory management section on the FreeRTOS web site for
|
||||
more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The
|
||||
mode from which main() is called is set in the C start up code and must be
|
||||
a privileged mode (not user mode). */
|
||||
for( ;; );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
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||||
|
||||
static void prvQueueSendTask( void *pvParameters )
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||||
{
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||||
TickType_t xNextWakeTime;
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||||
const unsigned long ulValueToSend = 100UL;
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||||
|
||||
/* Remove compiler warning about unused parameter. */
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||||
( void ) pvParameters;
|
||||
|
||||
/* Initialise xNextWakeTime - this only needs to be done once. */
|
||||
xNextWakeTime = xTaskGetTickCount();
|
||||
|
||||
for( ;; )
|
||||
{
|
||||
/* Place this task in the blocked state until it is time to run again. */
|
||||
vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );
|
||||
|
||||
/* Send to the queue - causing the queue receive task to unblock and
|
||||
toggle the LED. 0 is used as the block time so the sending operation
|
||||
will not block - it shouldn't need to block as the queue should always
|
||||
be empty at this point in the code. */
|
||||
xQueueSend( xQueue, &ulValueToSend, 0U );
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvQueueReceiveTask( void *pvParameters )
|
||||
{
|
||||
unsigned long ulReceivedValue;
|
||||
const unsigned long ulExpectedValue = 100UL;
|
||||
|
||||
/* Remove compiler warning about unused parameter. */
|
||||
( void ) pvParameters;
|
||||
|
||||
for( ;; )
|
||||
{
|
||||
/* Wait until something arrives in the queue - this task will block
|
||||
indefinitely provided INCLUDE_vTaskSuspend is set to 1 in
|
||||
FreeRTOSConfig.h. */
|
||||
xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
|
||||
|
||||
/* To get here something must have been received from the queue, but
|
||||
is it the expected value? If it is, toggle the LED. */
|
||||
if( ulReceivedValue == ulExpectedValue )
|
||||
{
|
||||
vParTestToggleLED( mainTASK_LED );
|
||||
ulReceivedValue = 0U;
|
||||
}
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
@@ -0,0 +1,169 @@
|
||||
/*
|
||||
FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||
* http://www.freertos.org/a00110.html
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/* The array used as the heap is declared by the application to allow the
|
||||
__persistent keyword to be used. See http://www.freertos.org/a00111.html#heap_4 */
|
||||
#define configAPPLICATION_ALLOCATED_HEAP 1
|
||||
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configMAX_PRIORITIES ( 5 )
|
||||
#define configTICK_RATE_HZ ( 1000 ) /* In this non-real time simulated environment the tick frequency has to be at least a multiple of the Win32 tick frequency, and therefore very slow. */
|
||||
#define configTOTAL_HEAP_SIZE ( 5 * 1024 )
|
||||
#define configMAX_TASK_NAME_LEN ( 15 )
|
||||
#define configUSE_TRACE_FACILITY 1
|
||||
#define configUSE_16_BIT_TICKS 0
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configUSE_CO_ROUTINES 0
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configQUEUE_REGISTRY_SIZE 0
|
||||
#define configUSE_APPLICATION_TASK_TAG 0
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configUSE_ALTERNATIVE_API 0
|
||||
#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0
|
||||
#define configENABLE_BACKWARD_COMPATIBILITY 0
|
||||
|
||||
#if __DATA_MODEL__ == __DATA_MODEL_SMALL__
|
||||
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 110 )
|
||||
#else
|
||||
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 80 )
|
||||
#endif
|
||||
|
||||
/* Hook function related definitions. */
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_MALLOC_FAILED_HOOK 1
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
|
||||
/* Software timer related definitions. */
|
||||
#define configUSE_TIMERS 0
|
||||
#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
|
||||
#define configTIMER_QUEUE_LENGTH 5
|
||||
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 )
|
||||
|
||||
/* Event group related definitions. */
|
||||
#define configUSE_EVENT_GROUPS 0
|
||||
|
||||
/* Run time stats gathering definitions. */
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
|
||||
/* Co-routine definitions. */
|
||||
#define configUSE_CO_ROUTINES 0
|
||||
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
to exclude the API function. The IAR linker will remove unused functions
|
||||
anyway, so any INCLUDE_ definition that doesn't have another dependency can be
|
||||
left at 1 with no impact on the code size. */
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 1
|
||||
#define INCLUDE_xTimerGetTimerTaskHandle 1
|
||||
#define INCLUDE_xTaskGetIdleTaskHandle 1
|
||||
#define INCLUDE_xQueueGetMutexHolder 1
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||
#define INCLUDE_xTimerPendFunctionCall 0
|
||||
#define INCLUDE_pcTaskGetTaskName 1
|
||||
|
||||
/* Not using stats, so no need to include the formatting functions. */
|
||||
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
|
||||
|
||||
/* Assert call defined for debug builds. */
|
||||
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
|
||||
|
||||
/* The MSP430X port uses a callback function to configure its tick interrupt.
|
||||
This allows the application to choose the tick interrupt source.
|
||||
configTICK_VECTOR must also be set in FreeRTOSConfig.h to the correct
|
||||
interrupt vector for the chosen tick interrupt source. This implementation of
|
||||
vApplicationSetupTimerInterrupt() generates the tick from timer A0, so in this
|
||||
case configTICK__VECTOR is set to TIMER0_A0_VECTOR. */
|
||||
#define configTICK_VECTOR TIMER0_A0_VECTOR
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
|
||||
@@ -0,0 +1,115 @@
|
||||
/*
|
||||
FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Simple IO routines to control the LEDs.
|
||||
*-----------------------------------------------------------*/
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
/* Demo includes. */
|
||||
#include "partest.h"
|
||||
|
||||
/* TI includes. */
|
||||
#include "driverlib.h"
|
||||
|
||||
/* Port/pin definitions. */
|
||||
#define partstNUM_LEDS 2
|
||||
const uint8_t ucPorts[ partstNUM_LEDS ] = { GPIO_PORT_P1, GPIO_PORT_P4 };
|
||||
const uint16_t usPins[ partstNUM_LEDS ] = { GPIO_PIN0, GPIO_PIN6 };
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vParTestSetLED( UBaseType_t uxLED, BaseType_t xValue )
|
||||
{
|
||||
if( uxLED < partstNUM_LEDS )
|
||||
{
|
||||
if( xValue == pdFALSE )
|
||||
{
|
||||
GPIO_setOutputLowOnPin( ucPorts[ uxLED ], usPins[ uxLED ] );
|
||||
}
|
||||
else
|
||||
{
|
||||
GPIO_setOutputHighOnPin( ucPorts[ uxLED ], usPins[ uxLED ] );
|
||||
}
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
|
||||
{
|
||||
if( uxLED < partstNUM_LEDS )
|
||||
{
|
||||
GPIO_toggleOutputOnPin( ucPorts[ uxLED ], usPins[ uxLED ] );
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,417 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<project>
|
||||
<fileVersion>2</fileVersion>
|
||||
<configuration>
|
||||
<name>Debug</name>
|
||||
<toolchain>
|
||||
<name>MSP430</name>
|
||||
</toolchain>
|
||||
<debug>1</debug>
|
||||
<settings>
|
||||
<name>C-SPY</name>
|
||||
<archiveVersion>5</archiveVersion>
|
||||
<data>
|
||||
<version>27</version>
|
||||
<wantNonLocal>1</wantNonLocal>
|
||||
<debug>1</debug>
|
||||
<option>
|
||||
<name>CInput</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>MacOverride</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>MacFile</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IProcessor</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GoToEnable</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GoToName</name>
|
||||
<state>main</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>DynDriver</name>
|
||||
<state>430FET</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>dDllSlave</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>DdfFileSlave</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>DdfOverride</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>DdfFileName</name>
|
||||
<state>$TOOLKIT_DIR$\config\debugger\msp430fr5969.ddf</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>ProcTMS</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CExtraOptionsCheck</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CExtraOptions</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>ProcMSP430X</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CompilerDataModel</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IVBASE</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesSuppressCheck1</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesPath1</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesSuppressCheck2</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesPath2</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesSuppressCheck3</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesPath3</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CPUTAG</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>L092Mode</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesOffset1</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesOffset2</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesOffset3</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesUse1</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesUse2</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCImagesUse3</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>ENERGYTRACE</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>FETIPE</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
<settings>
|
||||
<name>430FET</name>
|
||||
<archiveVersion>1</archiveVersion>
|
||||
<data>
|
||||
<version>29</version>
|
||||
<wantNonLocal>1</wantNonLocal>
|
||||
<debug>1</debug>
|
||||
<option>
|
||||
<name>CFetMandatory</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>Erase</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>EMUVerifyDownloadP7</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>EraseOptionSlaveP7</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>ExitBreakpointP7</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>PutcharBreakpointP7</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GetcharBreakpointP7</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>derivativeP7</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>ParallelPortP7</name>
|
||||
<version>0</version>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>TargetVoltage</name>
|
||||
<state>3.3</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AllowLockedFlashAccessP7</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>EMUAttach</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AttachOptionSlave</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CRadioProtocolType</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCRadioModuleTypeSlave</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>EEMLevel</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>DiasbleMemoryCache</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>NeedLockedFlashAccess</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>UsbComPort</name>
|
||||
<state>Automatic</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>FetConnection</name>
|
||||
<version>4</version>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>SoftwareBreakpointEnable</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>RadioSoftwareBreakpointType</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>TargetSettlingtime</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AllowAccessToBSL</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OTargetVccTypeDefault</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCBetaDll</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GPassword</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>DebugLPM5</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>LPM5Slave</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CRadioAutoManualType</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>ExternalCodeDownload</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCVCCDefault</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>Retain</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>jstatebit</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>RadioJtagSpeedType</name>
|
||||
<state>2</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>memoryTypeSlave</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>fuseBlowDisabledSlave</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>eraseTypeSlave</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>DataSampleBpReservation</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>cycleCounterLevel</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
<settings>
|
||||
<name>SIM430</name>
|
||||
<archiveVersion>1</archiveVersion>
|
||||
<data>
|
||||
<version>4</version>
|
||||
<wantNonLocal>1</wantNonLocal>
|
||||
<debug>1</debug>
|
||||
<option>
|
||||
<name>SimOddAddressCheckP7</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CSimMandatory</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>derivativeSim</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>SimEnablePSP</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>SimPspOverrideConfig</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>SimPspConfigFile</name>
|
||||
<state>$TOOLKIT_DIR$\CONFIG\test.psp.config</state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
<debuggerPlugins>
|
||||
<plugin>
|
||||
<file>$TOOLKIT_DIR$\plugins\lcd\lcd.ewplugin</file>
|
||||
<loadFlag>1</loadFlag>
|
||||
</plugin>
|
||||
<plugin>
|
||||
<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxPlugin.ENU.ewplugin</file>
|
||||
<loadFlag>0</loadFlag>
|
||||
</plugin>
|
||||
<plugin>
|
||||
<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyPlugin.ENU.ewplugin</file>
|
||||
<loadFlag>0</loadFlag>
|
||||
</plugin>
|
||||
<plugin>
|
||||
<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
|
||||
<loadFlag>0</loadFlag>
|
||||
</plugin>
|
||||
<plugin>
|
||||
<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
|
||||
<loadFlag>0</loadFlag>
|
||||
</plugin>
|
||||
<plugin>
|
||||
<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
|
||||
<loadFlag>0</loadFlag>
|
||||
</plugin>
|
||||
<plugin>
|
||||
<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
|
||||
<loadFlag>0</loadFlag>
|
||||
</plugin>
|
||||
<plugin>
|
||||
<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
|
||||
<loadFlag>0</loadFlag>
|
||||
</plugin>
|
||||
<plugin>
|
||||
<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
|
||||
<loadFlag>0</loadFlag>
|
||||
</plugin>
|
||||
<plugin>
|
||||
<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
|
||||
<loadFlag>0</loadFlag>
|
||||
</plugin>
|
||||
<plugin>
|
||||
<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
|
||||
<loadFlag>1</loadFlag>
|
||||
</plugin>
|
||||
<plugin>
|
||||
<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
|
||||
<loadFlag>0</loadFlag>
|
||||
</plugin>
|
||||
<plugin>
|
||||
<file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file>
|
||||
<loadFlag>1</loadFlag>
|
||||
</plugin>
|
||||
<plugin>
|
||||
<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
|
||||
<loadFlag>0</loadFlag>
|
||||
</plugin>
|
||||
</debuggerPlugins>
|
||||
</configuration>
|
||||
</project>
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\RTOSDemo.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
@@ -0,0 +1,290 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// adc12_b.c - Driver for the adc12_b Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup adc12_b_api adc12_b
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_ADC12_B__
|
||||
#include "adc12_b.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
bool ADC12_B_init(uint16_t baseAddress,
|
||||
ADC12_B_initParam *param)
|
||||
{
|
||||
//Make sure the ENC bit is cleared before initializing the ADC12
|
||||
HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~ADC12ENC;
|
||||
|
||||
bool retVal = STATUS_SUCCESS;
|
||||
|
||||
//Turn OFF ADC12B Module & Clear Interrupt Registers
|
||||
HWREG16(baseAddress + OFS_ADC12CTL0) &= ~(ADC12ON + ADC12ENC + ADC12SC);
|
||||
HWREG16(baseAddress + OFS_ADC12IER0) &= 0x0000; //Reset ALL interrupt enables
|
||||
HWREG16(baseAddress + OFS_ADC12IER1) &= 0x0000;
|
||||
HWREG16(baseAddress + OFS_ADC12IER2) &= 0x0000;
|
||||
HWREG16(baseAddress + OFS_ADC12IFGR0) &= 0x0000; //Reset ALL interrupt flags
|
||||
HWREG16(baseAddress + OFS_ADC12IFGR1) &= 0x0000;
|
||||
HWREG16(baseAddress + OFS_ADC12IFGR2) &= 0x0000;
|
||||
|
||||
//Set ADC12B Control 1
|
||||
HWREG16(baseAddress + OFS_ADC12CTL1) =
|
||||
param->sampleHoldSignalSourceSelect //Setup the Sample-and-Hold Source
|
||||
+ (param->clockSourceDivider & ADC12DIV_7) //Set Clock Divider
|
||||
+ (param->clockSourcePredivider & ADC12PDIV__64)
|
||||
+ param->clockSourceSelect; //Setup Clock Source
|
||||
|
||||
//Set ADC12B Control 2
|
||||
HWREG16(baseAddress + OFS_ADC12CTL2) =
|
||||
ADC12RES_2; //Default resolution to 12-bits
|
||||
|
||||
//Set ADC12B Control 3
|
||||
HWREG16(baseAddress + OFS_ADC12CTL3) =
|
||||
param->internalChannelMap; // Map internal channels
|
||||
|
||||
return (retVal);
|
||||
}
|
||||
|
||||
void ADC12_B_enable(uint16_t baseAddress)
|
||||
{
|
||||
// Clear ENC bit
|
||||
HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~ADC12ENC;
|
||||
|
||||
//Enable the ADC12B Module
|
||||
HWREG8(baseAddress + OFS_ADC12CTL0_L) |= ADC12ON;
|
||||
}
|
||||
|
||||
void ADC12_B_disable(uint16_t baseAddress)
|
||||
{
|
||||
// Clear ENC bit
|
||||
HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~ADC12ENC;
|
||||
|
||||
//Disable ADC12B module
|
||||
HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~ADC12ON;
|
||||
}
|
||||
|
||||
void ADC12_B_setupSamplingTimer(uint16_t baseAddress,
|
||||
uint16_t clockCycleHoldCountLowMem,
|
||||
uint16_t clockCycleHoldCountHighMem,
|
||||
uint16_t multipleSamplesEnabled)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_ADC12CTL1) |= ADC12SHP;
|
||||
|
||||
//Reset clock cycle hold counts and msc bit before setting them
|
||||
HWREG16(baseAddress + OFS_ADC12CTL0) &=
|
||||
~(ADC12SHT0_15 + ADC12SHT1_15 + ADC12MSC);
|
||||
|
||||
//Set clock cycle hold counts and msc bit
|
||||
HWREG16(baseAddress + OFS_ADC12CTL0) |= clockCycleHoldCountLowMem
|
||||
+ (clockCycleHoldCountHighMem << 4)
|
||||
+ multipleSamplesEnabled;
|
||||
}
|
||||
|
||||
void ADC12_B_disableSamplingTimer(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_ADC12CTL1) &= ~(ADC12SHP);
|
||||
}
|
||||
|
||||
void ADC12_B_configureMemory(uint16_t baseAddress,
|
||||
ADC12_B_configureMemoryParam *param)
|
||||
{
|
||||
//Set the offset in respect to ADC12MCTL0
|
||||
uint16_t memoryBufferControlOffset =
|
||||
(OFS_ADC12MCTL0 + param->memoryBufferControlIndex);
|
||||
|
||||
//Reset the memory buffer control and Set the input source
|
||||
HWREG16(baseAddress + memoryBufferControlOffset) =
|
||||
param->inputSourceSelect //Set Input Source
|
||||
+ param->refVoltageSourceSelect //Set Vref+/-
|
||||
+ param->endOfSequence; //Set End of Sequence
|
||||
|
||||
HWREG16(baseAddress + memoryBufferControlOffset)
|
||||
&= ~(ADC12WINC);
|
||||
|
||||
HWREG16(baseAddress + memoryBufferControlOffset)
|
||||
|= param->windowComparatorSelect;
|
||||
//(OFS_ADC12MCTL0_H + memoryIndex) == offset of OFS_ADC12MCTLX_H
|
||||
|
||||
HWREG16(baseAddress + memoryBufferControlOffset)
|
||||
&= ~(ADC12DIF);
|
||||
|
||||
HWREG16(baseAddress + memoryBufferControlOffset)
|
||||
|= param->differentialModeSelect;
|
||||
//(OFS_ADC12MCTL0_H + memoryIndex) == offset of OFS_ADC12MCTLX_H
|
||||
}
|
||||
|
||||
void ADC12_B_setWindowCompAdvanced(uint16_t baseAddress,
|
||||
uint16_t highThreshold,
|
||||
uint16_t lowThreshold)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_ADC12HI) = highThreshold;
|
||||
HWREG16(baseAddress + OFS_ADC12LO) = lowThreshold;
|
||||
}
|
||||
|
||||
void ADC12_B_enableInterrupt(uint16_t baseAddress,
|
||||
uint16_t interruptMask0,
|
||||
uint16_t interruptMask1,
|
||||
uint16_t interruptMask2)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_ADC12IER0) |= interruptMask0;
|
||||
HWREG16(baseAddress + OFS_ADC12IER1) |= interruptMask1;
|
||||
HWREG16(baseAddress + OFS_ADC12IER2) |= interruptMask2;
|
||||
}
|
||||
|
||||
void ADC12_B_disableInterrupt(uint16_t baseAddress,
|
||||
uint16_t interruptMask0,
|
||||
uint16_t interruptMask1,
|
||||
uint16_t interruptMask2)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_ADC12IER0) &= ~(interruptMask0);
|
||||
HWREG16(baseAddress + OFS_ADC12IER1) &= ~(interruptMask1);
|
||||
HWREG16(baseAddress + OFS_ADC12IER2) &= ~(interruptMask2);
|
||||
}
|
||||
|
||||
void ADC12_B_clearInterrupt(uint16_t baseAddress,
|
||||
uint8_t interruptRegisterChoice,
|
||||
uint16_t memoryInterruptFlagMask)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_ADC12IFGR0 + 2 * interruptRegisterChoice) &=
|
||||
~(memoryInterruptFlagMask);
|
||||
}
|
||||
|
||||
uint16_t ADC12_B_getInterruptStatus(uint16_t baseAddress,
|
||||
uint8_t interruptRegisterChoice,
|
||||
uint16_t memoryInterruptFlagMask)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_ADC12IFGR0 + 2 * interruptRegisterChoice)
|
||||
& memoryInterruptFlagMask);
|
||||
}
|
||||
|
||||
void ADC12_B_startConversion(uint16_t baseAddress,
|
||||
uint16_t startingMemoryBufferIndex,
|
||||
uint8_t conversionSequenceModeSelect)
|
||||
{
|
||||
//Reset the ENC bit to set the starting memory address and conversion mode
|
||||
//sequence
|
||||
HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~(ADC12ENC);
|
||||
//Reset the bits about to be set
|
||||
HWREG16(baseAddress + OFS_ADC12CTL3) &= ~(ADC12CSTARTADD_31);
|
||||
HWREG16(baseAddress + OFS_ADC12CTL1) &= ~(ADC12CONSEQ_3);
|
||||
|
||||
HWREG16(baseAddress + OFS_ADC12CTL3) |= startingMemoryBufferIndex;
|
||||
HWREG16(baseAddress + OFS_ADC12CTL1) |= conversionSequenceModeSelect;
|
||||
HWREG8(baseAddress + OFS_ADC12CTL0_L) |= ADC12ENC + ADC12SC;
|
||||
}
|
||||
|
||||
void ADC12_B_disableConversions(uint16_t baseAddress,
|
||||
bool preempt)
|
||||
{
|
||||
if(ADC12_B_PREEMPTCONVERSION == preempt)
|
||||
{
|
||||
HWREG8(baseAddress + OFS_ADC12CTL1_L) &= ~(ADC12CONSEQ_3);
|
||||
//Reset conversion sequence mode to single-channel, single-conversion
|
||||
}
|
||||
else if(~(HWREG8(baseAddress + OFS_ADC12CTL1_L) & ADC12CONSEQ_3))
|
||||
{
|
||||
//To prevent preemption of a single-channel, single-conversion we must
|
||||
//wait for the ADC core to finish the conversion.
|
||||
while(ADC12_B_isBusy(baseAddress))
|
||||
{
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~(ADC12ENC);
|
||||
}
|
||||
|
||||
uint16_t ADC12_B_getResults(uint16_t baseAddress,
|
||||
uint8_t memoryBufferIndex)
|
||||
{
|
||||
return (HWREG16(baseAddress + (OFS_ADC12MEM0 + memoryBufferIndex)));
|
||||
//(0x60 + memoryBufferIndex) == offset of ADC12MEMx
|
||||
}
|
||||
|
||||
void ADC12_B_setResolution(uint16_t baseAddress,
|
||||
uint8_t resolutionSelect)
|
||||
{
|
||||
HWREG8(baseAddress + OFS_ADC12CTL2_L) &= ~(ADC12RES_3);
|
||||
HWREG8(baseAddress + OFS_ADC12CTL2_L) |= resolutionSelect;
|
||||
}
|
||||
|
||||
void ADC12_B_setSampleHoldSignalInversion(uint16_t baseAddress,
|
||||
uint16_t invertedSignal)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_ADC12CTL1) &= ~(ADC12ISSH);
|
||||
HWREG16(baseAddress + OFS_ADC12CTL1) |= invertedSignal;
|
||||
}
|
||||
|
||||
void ADC12_B_setDataReadBackFormat(uint16_t baseAddress,
|
||||
uint8_t readBackFormat)
|
||||
{
|
||||
HWREG8(baseAddress + OFS_ADC12CTL2_L) &= ~(ADC12DF);
|
||||
HWREG8(baseAddress + OFS_ADC12CTL2_L) |= readBackFormat;
|
||||
}
|
||||
|
||||
void ADC12_B_setAdcPowerMode(uint16_t baseAddress,
|
||||
uint8_t powerMode)
|
||||
{
|
||||
HWREG8(baseAddress + OFS_ADC12CTL2_L) &= ~(ADC12PWRMD);
|
||||
HWREG8(baseAddress + OFS_ADC12CTL2_L) |= powerMode;
|
||||
}
|
||||
|
||||
uint32_t ADC12_B_getMemoryAddressForDMA(uint16_t baseAddress,
|
||||
uint8_t memoryIndex)
|
||||
{
|
||||
return (baseAddress + (OFS_ADC12MEM0 + memoryIndex));
|
||||
//(0x60 + memoryIndex) == offset of ADC12MEMx
|
||||
}
|
||||
|
||||
uint8_t ADC12_B_isBusy(uint16_t baseAddress)
|
||||
{
|
||||
return (HWREG8(baseAddress + OFS_ADC12CTL1_L) & ADC12BUSY);
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for adc12_b_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,375 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// aes256.c - Driver for the aes256 Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup aes256_api aes256
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_AES256__
|
||||
#include "aes256.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
uint8_t AES256_setCipherKey(uint16_t baseAddress,
|
||||
const uint8_t * cipherKey,
|
||||
uint16_t keyLength)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t sCipherKey;
|
||||
|
||||
HWREG16(baseAddress + OFS_AESACTL0) &= (~(AESKL_1 + AESKL_2));
|
||||
|
||||
switch(keyLength)
|
||||
{
|
||||
case AES256_KEYLENGTH_128BIT:
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__128;
|
||||
break;
|
||||
|
||||
case AES256_KEYLENGTH_192BIT:
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__192;
|
||||
break;
|
||||
|
||||
case AES256_KEYLENGTH_256BIT:
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__256;
|
||||
break;
|
||||
|
||||
default:
|
||||
return(STATUS_FAIL);
|
||||
}
|
||||
|
||||
keyLength = keyLength / 8;
|
||||
|
||||
for(i = 0; i < keyLength; i = i + 2)
|
||||
{
|
||||
sCipherKey = (uint16_t)(cipherKey[i]);
|
||||
sCipherKey = sCipherKey | ((uint16_t)(cipherKey[i + 1]) << 8);
|
||||
HWREG16(baseAddress + OFS_AESAKEY) = sCipherKey;
|
||||
}
|
||||
|
||||
// Wait until key is written
|
||||
while(0x00 == (HWREG16(baseAddress + OFS_AESASTAT) & AESKEYWR))
|
||||
{
|
||||
;
|
||||
}
|
||||
return(STATUS_SUCCESS);
|
||||
}
|
||||
|
||||
void AES256_encryptData(uint16_t baseAddress,
|
||||
const uint8_t * data,
|
||||
uint8_t * encryptedData)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t tempData = 0;
|
||||
uint16_t tempVariable = 0;
|
||||
|
||||
// Set module to encrypt mode
|
||||
HWREG16(baseAddress + OFS_AESACTL0) &= ~AESOP_3;
|
||||
|
||||
// Write data to encrypt to module
|
||||
for(i = 0; i < 16; i = i + 2)
|
||||
{
|
||||
tempVariable = (uint16_t)(data[i]);
|
||||
tempVariable = tempVariable | ((uint16_t)(data[i + 1]) << 8);
|
||||
HWREG16(baseAddress + OFS_AESADIN) = tempVariable;
|
||||
}
|
||||
|
||||
// Key that is already written shall be used
|
||||
// Encryption is initialized by setting AESKEYWR to 1
|
||||
HWREG16(baseAddress + OFS_AESASTAT) |= AESKEYWR;
|
||||
|
||||
// Wait unit finished ~167 MCLK
|
||||
while(AESBUSY == (HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY))
|
||||
{
|
||||
;
|
||||
}
|
||||
|
||||
// Write encrypted data back to variable
|
||||
for(i = 0; i < 16; i = i + 2)
|
||||
{
|
||||
tempData = HWREG16(baseAddress + OFS_AESADOUT);
|
||||
*(encryptedData + i) = (uint8_t)tempData;
|
||||
*(encryptedData + i + 1) = (uint8_t)(tempData >> 8);
|
||||
}
|
||||
}
|
||||
|
||||
void AES256_decryptData(uint16_t baseAddress,
|
||||
const uint8_t * data,
|
||||
uint8_t * decryptedData)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t tempData = 0;
|
||||
uint16_t tempVariable = 0;
|
||||
|
||||
// Set module to decrypt mode
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= (AESOP_3);
|
||||
|
||||
// Write data to decrypt to module
|
||||
for(i = 0; i < 16; i = i + 2)
|
||||
{
|
||||
tempVariable = (uint16_t)(data[i + 1] << 8);
|
||||
tempVariable = tempVariable | ((uint16_t)(data[i]));
|
||||
HWREG16(baseAddress + OFS_AESADIN) = tempVariable;
|
||||
}
|
||||
|
||||
// Key that is already written shall be used
|
||||
// Now decryption starts
|
||||
HWREG16(baseAddress + OFS_AESASTAT) |= AESKEYWR;
|
||||
|
||||
// Wait unit finished ~167 MCLK
|
||||
while(AESBUSY == (HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY))
|
||||
{
|
||||
;
|
||||
}
|
||||
|
||||
// Write encrypted data back to variable
|
||||
for(i = 0; i < 16; i = i + 2)
|
||||
{
|
||||
tempData = HWREG16(baseAddress + OFS_AESADOUT);
|
||||
*(decryptedData + i) = (uint8_t)tempData;
|
||||
*(decryptedData + i + 1) = (uint8_t)(tempData >> 8);
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t AES256_setDecipherKey(uint16_t baseAddress,
|
||||
const uint8_t * cipherKey,
|
||||
uint16_t keyLength)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t tempVariable = 0;
|
||||
|
||||
// Set module to decrypt mode
|
||||
HWREG16(baseAddress + OFS_AESACTL0) &= ~(AESOP0);
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= AESOP1;
|
||||
|
||||
switch(keyLength)
|
||||
{
|
||||
case AES256_KEYLENGTH_128BIT:
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__128;
|
||||
break;
|
||||
|
||||
case AES256_KEYLENGTH_192BIT:
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__192;
|
||||
break;
|
||||
|
||||
case AES256_KEYLENGTH_256BIT:
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__256;
|
||||
break;
|
||||
|
||||
default:
|
||||
return(STATUS_FAIL);
|
||||
}
|
||||
|
||||
keyLength = keyLength / 8;
|
||||
|
||||
// Write cipher key to key register
|
||||
for(i = 0; i < keyLength; i = i + 2)
|
||||
{
|
||||
tempVariable = (uint16_t)(cipherKey[i]);
|
||||
tempVariable = tempVariable | ((uint16_t)(cipherKey[i + 1]) << 8);
|
||||
HWREG16(baseAddress + OFS_AESAKEY) = tempVariable;
|
||||
}
|
||||
|
||||
// Wait until key is processed ~52 MCLK
|
||||
while((HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY) == AESBUSY)
|
||||
{
|
||||
;
|
||||
}
|
||||
|
||||
return(STATUS_SUCCESS);
|
||||
}
|
||||
|
||||
void AES256_clearInterrupt(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_AESACTL0) &= ~AESRDYIFG;
|
||||
}
|
||||
|
||||
uint32_t AES256_getInterruptStatus(uint16_t baseAddress)
|
||||
{
|
||||
return ((HWREG16(baseAddress + OFS_AESACTL0) & AESRDYIFG) << 0x04);
|
||||
}
|
||||
|
||||
void AES256_enableInterrupt(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= AESRDYIE;
|
||||
}
|
||||
|
||||
void AES256_disableInterrupt(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_AESACTL0) &= ~AESRDYIE;
|
||||
}
|
||||
|
||||
void AES256_reset(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= AESSWRST;
|
||||
}
|
||||
|
||||
void AES256_startEncryptData(uint16_t baseAddress,
|
||||
const uint8_t * data)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t tempVariable = 0;
|
||||
|
||||
// Set module to encrypt mode
|
||||
HWREG16(baseAddress + OFS_AESACTL0) &= ~AESOP_3;
|
||||
|
||||
// Write data to encrypt to module
|
||||
for(i = 0; i < 16; i = i + 2)
|
||||
{
|
||||
tempVariable = (uint16_t)(data[i]);
|
||||
tempVariable = tempVariable | ((uint16_t)(data[i + 1 ]) << 8);
|
||||
HWREG16(baseAddress + OFS_AESADIN) = tempVariable;
|
||||
}
|
||||
|
||||
// Key that is already written shall be used
|
||||
// Encryption is initialized by setting AESKEYWR to 1
|
||||
HWREG16(baseAddress + OFS_AESASTAT) |= AESKEYWR;
|
||||
}
|
||||
|
||||
void AES256_startDecryptData(uint16_t baseAddress,
|
||||
const uint8_t * data)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t tempVariable = 0;
|
||||
|
||||
// Set module to decrypt mode
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= (AESOP_3);
|
||||
|
||||
// Write data to decrypt to module
|
||||
for(i = 0; i < 16; i = i + 2)
|
||||
{
|
||||
tempVariable = (uint16_t)(data[i + 1] << 8);
|
||||
tempVariable = tempVariable | ((uint16_t)(data[i]));
|
||||
HWREG16(baseAddress + OFS_AESADIN) = tempVariable;
|
||||
}
|
||||
|
||||
// Key that is already written shall be used
|
||||
// Now decryption starts
|
||||
HWREG16(baseAddress + OFS_AESASTAT) |= AESKEYWR;
|
||||
}
|
||||
|
||||
uint8_t AES256_startSetDecipherKey(uint16_t baseAddress,
|
||||
const uint8_t * cipherKey,
|
||||
uint16_t keyLength)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t tempVariable = 0;
|
||||
|
||||
HWREG16(baseAddress + OFS_AESACTL0) &= ~(AESOP0);
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= AESOP1;
|
||||
|
||||
switch(keyLength)
|
||||
{
|
||||
case AES256_KEYLENGTH_128BIT:
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__128;
|
||||
break;
|
||||
|
||||
case AES256_KEYLENGTH_192BIT:
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__192;
|
||||
break;
|
||||
|
||||
case AES256_KEYLENGTH_256BIT:
|
||||
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__256;
|
||||
break;
|
||||
|
||||
default:
|
||||
return(STATUS_FAIL);
|
||||
}
|
||||
|
||||
keyLength = keyLength / 8;
|
||||
|
||||
// Write cipher key to key register
|
||||
for(i = 0; i < keyLength; i = i + 2)
|
||||
{
|
||||
tempVariable = (uint16_t)(cipherKey[i]);
|
||||
tempVariable = tempVariable | ((uint16_t)(cipherKey[i + 1]) << 8);
|
||||
HWREG16(baseAddress + OFS_AESAKEY) = tempVariable;
|
||||
}
|
||||
|
||||
return(STATUS_SUCCESS);
|
||||
}
|
||||
|
||||
uint8_t AES256_getDataOut(uint16_t baseAddress,
|
||||
uint8_t *outputData)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t tempData = 0;
|
||||
|
||||
// If module is busy, exit and return failure
|
||||
if(AESBUSY == (HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY))
|
||||
{
|
||||
return(STATUS_FAIL);
|
||||
}
|
||||
|
||||
// Write encrypted data back to variable
|
||||
for(i = 0; i < 16; i = i + 2)
|
||||
{
|
||||
tempData = HWREG16(baseAddress + OFS_AESADOUT);
|
||||
*(outputData + i) = (uint8_t)tempData;
|
||||
*(outputData + i + 1) = (uint8_t)(tempData >> 8);
|
||||
}
|
||||
|
||||
return(STATUS_SUCCESS);
|
||||
}
|
||||
|
||||
uint16_t AES256_isBusy(uint16_t baseAddress)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY);
|
||||
}
|
||||
|
||||
void AES256_clearErrorFlag(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_AESACTL0) &= ~AESERRFG;
|
||||
}
|
||||
|
||||
uint32_t AES256_getErrorFlagStatus(uint16_t baseAddress)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_AESACTL0) & AESERRFG);
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for aes256_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,418 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// aes256.h - Driver for the AES256 Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __MSP430WARE_AES256_H__
|
||||
#define __MSP430WARE_AES256_H__
|
||||
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_AES256__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the keyLength parameter for
|
||||
// functions: AES256_setCipherKey(), AES256_setDecipherKey(), and
|
||||
// AES256_startSetDecipherKey().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES256_KEYLENGTH_128BIT 128
|
||||
#define AES256_KEYLENGTH_192BIT 192
|
||||
#define AES256_KEYLENGTH_256BIT 256
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed toThe following are values that
|
||||
// can be returned by the AES256_getErrorFlagStatus() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES256_ERROR_OCCURRED AESERRFG
|
||||
#define AES256_NO_ERROR 0x00
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed toThe following are values that
|
||||
// can be returned by the AES256_isBusy() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES256_BUSY AESBUSY
|
||||
#define AES256_NOT_BUSY 0x00
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed toThe following are values that
|
||||
// can be returned by the AES256_getInterruptStatus() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES256_READY_INTERRUPT AESRDYIE
|
||||
#define AES256_NOTREADY_INTERRUPT 0x00
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Loads a 128, 192 or 256 bit cipher key to AES256 module.
|
||||
//!
|
||||
//! This function loads a 128, 192 or 256 bit cipher key to AES256 module.
|
||||
//! Requires both a key as well as the length of the key provided. Acceptable
|
||||
//! key lengths are AES256_KEYLENGTH_128BIT, AES256_KEYLENGTH_192BIT, or
|
||||
//! AES256_KEYLENGTH_256BIT
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//! \param cipherKey is a pointer to an uint8_t array with a length of 16 bytes
|
||||
//! that contains a 128 bit cipher key.
|
||||
//! \param keyLength is the length of the key.
|
||||
//! Valid values are:
|
||||
//! - \b AES256_KEYLENGTH_128BIT
|
||||
//! - \b AES256_KEYLENGTH_192BIT
|
||||
//! - \b AES256_KEYLENGTH_256BIT
|
||||
//!
|
||||
//! \return STATUS_SUCCESS or STATUS_FAIL of key loading
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint8_t AES256_setCipherKey(uint16_t baseAddress,
|
||||
const uint8_t *cipherKey,
|
||||
uint16_t keyLength);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Encrypts a block of data using the AES256 module.
|
||||
//!
|
||||
//! The cipher key that is used for encryption should be loaded in advance by
|
||||
//! using function AES256_setCipherKey()
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
|
||||
//! contains data to be encrypted.
|
||||
//! \param encryptedData is a pointer to an uint8_t array with a length of 16
|
||||
//! bytes in that the encrypted data will be written.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_encryptData(uint16_t baseAddress,
|
||||
const uint8_t *data,
|
||||
uint8_t *encryptedData);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Decrypts a block of data using the AES256 module.
|
||||
//!
|
||||
//! This function requires a pregenerated decryption key. A key can be loaded
|
||||
//! and pregenerated by using function AES256_setDecipherKey() or
|
||||
//! AES256_startSetDecipherKey(). The decryption takes 167 MCLK.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
|
||||
//! contains encrypted data to be decrypted.
|
||||
//! \param decryptedData is a pointer to an uint8_t array with a length of 16
|
||||
//! bytes in that the decrypted data will be written.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_decryptData(uint16_t baseAddress,
|
||||
const uint8_t *data,
|
||||
uint8_t *decryptedData);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets the decipher key.
|
||||
//!
|
||||
//! The API AES256_startSetDecipherKey or AES256_setDecipherKey must be invoked
|
||||
//! before invoking AES256_startDecryptData.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//! \param cipherKey is a pointer to an uint8_t array with a length of 16 bytes
|
||||
//! that contains a 128 bit cipher key.
|
||||
//! \param keyLength is the length of the key.
|
||||
//! Valid values are:
|
||||
//! - \b AES256_KEYLENGTH_128BIT
|
||||
//! - \b AES256_KEYLENGTH_192BIT
|
||||
//! - \b AES256_KEYLENGTH_256BIT
|
||||
//!
|
||||
//! \return STATUS_SUCCESS or STATUS_FAIL of key loading
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint8_t AES256_setDecipherKey(uint16_t baseAddress,
|
||||
const uint8_t *cipherKey,
|
||||
uint16_t keyLength);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Clears the AES256 ready interrupt flag.
|
||||
//!
|
||||
//! This function clears the AES256 ready interrupt flag. This flag is
|
||||
//! automatically cleared when AES256ADOUT is read, or when AES256AKEY or
|
||||
//! AES256ADIN is written. This function should be used when the flag needs to
|
||||
//! be reset and it has not been automatically cleared by one of the previous
|
||||
//! actions.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//!
|
||||
//! Modified bits are \b AESRDYIFG of \b AESACTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_clearInterrupt(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Gets the AES256 ready interrupt flag status.
|
||||
//!
|
||||
//! This function checks the AES256 ready interrupt flag. This flag is
|
||||
//! automatically cleared when AES256ADOUT is read, or when AES256AKEY or
|
||||
//! AES256ADIN is written. This function can be used to confirm that this has
|
||||
//! been done.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//!
|
||||
//! \return One of the following:
|
||||
//! - \b AES256_READY_INTERRUPT
|
||||
//! - \b AES256_NOTREADY_INTERRUPT
|
||||
//! \n indicating the status of the AES256 ready status
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint32_t AES256_getInterruptStatus(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Enables AES256 ready interrupt.
|
||||
//!
|
||||
//! Enables AES256 ready interrupt. This interrupt is reset by a PUC, but not
|
||||
//! reset by AES256_reset.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//!
|
||||
//! Modified bits are \b AESRDYIE of \b AESACTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_enableInterrupt(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Disables AES256 ready interrupt.
|
||||
//!
|
||||
//! Disables AES256 ready interrupt. This interrupt is reset by a PUC, but not
|
||||
//! reset by AES256_reset.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//!
|
||||
//! Modified bits are \b AESRDYIE of \b AESACTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_disableInterrupt(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Resets AES256 Module immediately.
|
||||
//!
|
||||
//! This function performs a software reset on the AES256 Module, note that
|
||||
//! this does not affect the AES256 ready interrupt.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//!
|
||||
//! Modified bits are \b AESSWRST of \b AESACTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_reset(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Starts an encryption process on the AES256 module.
|
||||
//!
|
||||
//! The cipher key that is used for decryption should be loaded in advance by
|
||||
//! using function AES256_setCipherKey(). This is a non-blocking equivalent of
|
||||
//! AES256_encryptData(). It is recommended to use the interrupt functionality
|
||||
//! to check for procedure completion then use the AES256_getDataOut() API to
|
||||
//! retrieve the encrypted data.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
|
||||
//! contains data to be encrypted.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_startEncryptData(uint16_t baseAddress,
|
||||
const uint8_t *data);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Decrypts a block of data using the AES256 module.
|
||||
//!
|
||||
//! This is the non-blocking equivalent of AES256_decryptData(). This function
|
||||
//! requires a pregenerated decryption key. A key can be loaded and
|
||||
//! pregenerated by using function AES256_setDecipherKey() or
|
||||
//! AES256_startSetDecipherKey(). The decryption takes 167 MCLK. It is
|
||||
//! recommended to use interrupt to check for procedure completion then use the
|
||||
//! AES256_getDataOut() API to retrieve the decrypted data.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
|
||||
//! contains encrypted data to be decrypted.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_startDecryptData(uint16_t baseAddress,
|
||||
const uint8_t *data);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets the decipher key
|
||||
//!
|
||||
//! The API AES256_startSetDecipherKey() or AES256_setDecipherKey() must be
|
||||
//! invoked before invoking AES256_startDecryptData.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//! \param cipherKey is a pointer to an uint8_t array with a length of 16 bytes
|
||||
//! that contains a 128 bit cipher key.
|
||||
//! \param keyLength is the length of the key.
|
||||
//! Valid values are:
|
||||
//! - \b AES256_KEYLENGTH_128BIT
|
||||
//! - \b AES256_KEYLENGTH_192BIT
|
||||
//! - \b AES256_KEYLENGTH_256BIT
|
||||
//!
|
||||
//! \return STATUS_SUCCESS or STATUS_FAIL of key loading
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint8_t AES256_startSetDecipherKey(uint16_t baseAddress,
|
||||
const uint8_t *cipherKey,
|
||||
uint16_t keyLength);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Reads back the output data from AES256 module.
|
||||
//!
|
||||
//! This function is meant to use after an encryption or decryption process
|
||||
//! that was started and finished by initiating an interrupt by use of
|
||||
//! AES256_startEncryptData or AES256_startDecryptData functions.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//! \param outputData is a pointer to an uint8_t array with a length of 16
|
||||
//! bytes in that the data will be written.
|
||||
//!
|
||||
//! \return STATUS_SUCCESS if data is valid, otherwise STATUS_FAIL
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint8_t AES256_getDataOut(uint16_t baseAddress,
|
||||
uint8_t *outputData);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Gets the AES256 module busy status.
|
||||
//!
|
||||
//! Gets the AES256 module busy status. If a key or data are written while the
|
||||
//! AES256 module is busy, an error flag will be thrown.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//!
|
||||
//! \return One of the following:
|
||||
//! - \b AES256_BUSY
|
||||
//! - \b AES256_NOT_BUSY
|
||||
//! \n indicating if the AES256 module is busy
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint16_t AES256_isBusy(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Clears the AES256 error flag.
|
||||
//!
|
||||
//! Clears the AES256 error flag that results from a key or data being written
|
||||
//! while the AES256 module is busy.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//!
|
||||
//! Modified bits are \b AESERRFG of \b AESACTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_clearErrorFlag(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Gets the AES256 error flag status.
|
||||
//!
|
||||
//! Checks the AES256 error flag that results from a key or data being written
|
||||
//! while the AES256 module is busy. If the flag is set, it needs to be cleared
|
||||
//! using AES256_clearErrorFlag.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the AES256 module.
|
||||
//!
|
||||
//! \return One of the following:
|
||||
//! - \b AES256_ERROR_OCCURRED
|
||||
//! - \b AES256_NO_ERROR
|
||||
//! \n indicating the error flag status
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint32_t AES256_getErrorFlagStatus(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#endif // __MSP430WARE_AES256_H__
|
||||
@@ -0,0 +1,293 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// comp_e.c - Driver for the comp_e Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup comp_e_api comp_e
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_COMP_E__
|
||||
#include "comp_e.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
static uint16_t __getRegisterSettingForInput(uint32_t input)
|
||||
{
|
||||
switch(input)
|
||||
{
|
||||
case COMP_E_INPUT0:
|
||||
return(CEIPSEL_0);
|
||||
case COMP_E_INPUT1:
|
||||
return(CEIPSEL_1);
|
||||
case COMP_E_INPUT2:
|
||||
return(CEIPSEL_2);
|
||||
case COMP_E_INPUT3:
|
||||
return(CEIPSEL_3);
|
||||
case COMP_E_INPUT4:
|
||||
return(CEIPSEL_4);
|
||||
case COMP_E_INPUT5:
|
||||
return(CEIPSEL_5);
|
||||
case COMP_E_INPUT6:
|
||||
return(CEIPSEL_6);
|
||||
case COMP_E_INPUT7:
|
||||
return(CEIPSEL_7);
|
||||
case COMP_E_INPUT8:
|
||||
return(CEIPSEL_8);
|
||||
case COMP_E_INPUT9:
|
||||
return(CEIPSEL_9);
|
||||
case COMP_E_INPUT10:
|
||||
return(CEIPSEL_10);
|
||||
case COMP_E_INPUT11:
|
||||
return(CEIPSEL_11);
|
||||
case COMP_E_INPUT12:
|
||||
return(CEIPSEL_12);
|
||||
case COMP_E_INPUT13:
|
||||
return(CEIPSEL_13);
|
||||
case COMP_E_INPUT14:
|
||||
return(CEIPSEL_14);
|
||||
case COMP_E_INPUT15:
|
||||
return(CEIPSEL_15);
|
||||
case COMP_E_VREF:
|
||||
return(COMP_E_VREF);
|
||||
default:
|
||||
return(0x11);
|
||||
}
|
||||
}
|
||||
|
||||
bool Comp_E_init(uint16_t baseAddress,
|
||||
Comp_E_initParam *param)
|
||||
{
|
||||
uint8_t positiveTerminalInput = __getRegisterSettingForInput(
|
||||
param->posTerminalInput);
|
||||
uint8_t negativeTerminalInput = __getRegisterSettingForInput(
|
||||
param->negTerminalInput);
|
||||
bool retVal = STATUS_SUCCESS;
|
||||
|
||||
//Reset COMPE Control 1 & Interrupt Registers for initialization (OFS_CECTL3
|
||||
//is not reset because it controls the input buffers of the analog signals
|
||||
//and may cause parasitic effects if an analog signal is still attached and
|
||||
//the buffer is re-enabled
|
||||
HWREG16(baseAddress + OFS_CECTL0) &= 0x0000;
|
||||
HWREG16(baseAddress + OFS_CEINT) &= 0x0000;
|
||||
|
||||
//Set the Positive Terminal
|
||||
if(COMP_E_VREF != positiveTerminalInput)
|
||||
{
|
||||
//Enable Positive Terminal Input Mux and Set it to the appropriate input
|
||||
HWREG16(baseAddress + OFS_CECTL0) |= CEIPEN + positiveTerminalInput;
|
||||
|
||||
//Disable the input buffer
|
||||
HWREG16(baseAddress + OFS_CECTL3) |= (1 << positiveTerminalInput);
|
||||
}
|
||||
else
|
||||
{
|
||||
//Reset and Set COMPE Control 2 Register
|
||||
HWREG16(baseAddress + OFS_CECTL2) &= ~(CERSEL); //Set Vref to go to (+)terminal
|
||||
}
|
||||
|
||||
//Set the Negative Terminal
|
||||
if(COMP_E_VREF != negativeTerminalInput)
|
||||
{
|
||||
//Enable Negative Terminal Input Mux and Set it to the appropriate input
|
||||
HWREG16(baseAddress +
|
||||
OFS_CECTL0) |= CEIMEN + (negativeTerminalInput << 8);
|
||||
|
||||
//Disable the input buffer
|
||||
HWREG16(baseAddress + OFS_CECTL3) |= (1 << negativeTerminalInput);
|
||||
}
|
||||
else
|
||||
{
|
||||
//Reset and Set COMPE Control 2 Register
|
||||
HWREG16(baseAddress + OFS_CECTL2) |= CERSEL; //Set Vref to go to (-) terminal
|
||||
}
|
||||
|
||||
//Reset and Set COMPE Control 1 Register
|
||||
HWREG16(baseAddress + OFS_CECTL1) =
|
||||
+param->outputFilterEnableAndDelayLevel //Set the filter enable bit and delay
|
||||
+ param->invertedOutputPolarity; //Set the polarity of the output
|
||||
|
||||
return (retVal);
|
||||
}
|
||||
|
||||
void Comp_E_setReferenceVoltage(uint16_t baseAddress,
|
||||
uint16_t supplyVoltageReferenceBase,
|
||||
uint16_t lowerLimitSupplyVoltageFractionOf32,
|
||||
uint16_t upperLimitSupplyVoltageFractionOf32)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CECTL1) &= ~(CEMRVS); //Set to VREF0
|
||||
|
||||
//Reset COMPE Control 2 Bits (Except for CERSEL which is set in Comp_Init() )
|
||||
HWREG16(baseAddress + OFS_CECTL2) &= CERSEL;
|
||||
|
||||
//Set Voltage Source (Vcc | Vref, resistor ladder or not)
|
||||
if(COMP_E_REFERENCE_AMPLIFIER_DISABLED == supplyVoltageReferenceBase)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CECTL2) |= CERS_1; //Vcc with resistor ladder
|
||||
}
|
||||
else if(lowerLimitSupplyVoltageFractionOf32 == 32)
|
||||
{
|
||||
//If the lower limit is 32, then the upper limit has to be 32 due to the
|
||||
//assertion that upper must be >= to the lower limit. If the numerator is
|
||||
//equal to 32, then the equation would be 32/32 == 1, therefore no resistor
|
||||
//ladder is needed
|
||||
HWREG16(baseAddress + OFS_CECTL2) |= CERS_3; //Vref, no resistor ladder
|
||||
}
|
||||
else
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CECTL2) |= CERS_2; //Vref with resistor ladder
|
||||
}
|
||||
|
||||
//Set COMPE Control 2 Register
|
||||
HWREG16(baseAddress + OFS_CECTL2) |=
|
||||
supplyVoltageReferenceBase //Set Supply Voltage Base
|
||||
+ ((upperLimitSupplyVoltageFractionOf32 - 1) << 8) //Set Supply Voltage Num.
|
||||
+ (lowerLimitSupplyVoltageFractionOf32 - 1);
|
||||
}
|
||||
|
||||
void Comp_E_setReferenceAccuracy(uint16_t baseAddress,
|
||||
uint16_t referenceAccuracy)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CECTL2) &= ~(CEREFACC);
|
||||
HWREG16(baseAddress + OFS_CECTL2) |= referenceAccuracy;
|
||||
}
|
||||
|
||||
void Comp_E_setPowerMode(uint16_t baseAddress,
|
||||
uint16_t powerMode)
|
||||
{
|
||||
HWREG16(baseAddress +
|
||||
OFS_CECTL1) &= ~(COMP_E_NORMAL_MODE | COMP_E_ULTRA_LOW_POWER_MODE);
|
||||
HWREG16(baseAddress + OFS_CECTL1) |= powerMode;
|
||||
}
|
||||
|
||||
void Comp_E_enableInterrupt(uint16_t baseAddress,
|
||||
uint16_t interruptMask)
|
||||
{
|
||||
//Set the Interrupt enable bit
|
||||
HWREG16(baseAddress + OFS_CEINT) |= interruptMask;
|
||||
}
|
||||
|
||||
void Comp_E_disableInterrupt(uint16_t baseAddress,
|
||||
uint16_t interruptMask)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CEINT) &= ~(interruptMask);
|
||||
}
|
||||
|
||||
void Comp_E_clearInterrupt(uint16_t baseAddress,
|
||||
uint16_t interruptFlagMask)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CEINT) &= ~(interruptFlagMask);
|
||||
}
|
||||
|
||||
uint8_t Comp_E_getInterruptStatus(uint16_t baseAddress,
|
||||
uint16_t interruptFlagMask)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_CEINT) & interruptFlagMask);
|
||||
}
|
||||
|
||||
void Comp_E_setInterruptEdgeDirection(uint16_t baseAddress,
|
||||
uint16_t edgeDirection)
|
||||
{
|
||||
//Set the edge direction that will trigger an interrupt
|
||||
if(COMP_E_RISINGEDGE == edgeDirection)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CECTL1) |= CEIES;
|
||||
}
|
||||
else if(COMP_E_FALLINGEDGE == edgeDirection)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CECTL1) &= ~(CEIES);
|
||||
}
|
||||
}
|
||||
|
||||
void Comp_E_toggleInterruptEdgeDirection(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CECTL1) ^= CEIES;
|
||||
}
|
||||
|
||||
void Comp_E_enable(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CECTL1) |= CEON;
|
||||
}
|
||||
|
||||
void Comp_E_disable(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CECTL1) &= ~(CEON);
|
||||
}
|
||||
|
||||
void Comp_E_shortInputs(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CECTL1) |= CESHORT;
|
||||
}
|
||||
|
||||
void Comp_E_unshortInputs(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CECTL1) &= ~(CESHORT);
|
||||
}
|
||||
|
||||
void Comp_E_disableInputBuffer(uint16_t baseAddress,
|
||||
uint16_t inputPort)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CECTL3) |= (inputPort);
|
||||
}
|
||||
|
||||
void Comp_E_enableInputBuffer(uint16_t baseAddress,
|
||||
uint16_t inputPort)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CECTL3) &= ~(inputPort);
|
||||
}
|
||||
|
||||
void Comp_E_swapIO(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CECTL1) ^= CEEX; //Toggle CEEX bit
|
||||
}
|
||||
|
||||
uint16_t Comp_E_outputValue(uint16_t baseAddress)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_CECTL1) & CEOUT);
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for comp_e_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,104 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// crc.c - Driver for the crc Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup crc_api crc
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_CRC__
|
||||
#include "crc.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
void CRC_setSeed(uint16_t baseAddress,
|
||||
uint16_t seed)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CRCINIRES) = seed;
|
||||
}
|
||||
|
||||
void CRC_set16BitData(uint16_t baseAddress,
|
||||
uint16_t dataIn)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CRCDI) = dataIn;
|
||||
}
|
||||
|
||||
void CRC_set8BitData(uint16_t baseAddress,
|
||||
uint8_t dataIn)
|
||||
{
|
||||
HWREG8(baseAddress + OFS_CRCDI_L) = dataIn;
|
||||
}
|
||||
|
||||
void CRC_set16BitDataReversed(uint16_t baseAddress,
|
||||
uint16_t dataIn)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_CRCDIRB) = dataIn;
|
||||
}
|
||||
|
||||
void CRC_set8BitDataReversed(uint16_t baseAddress,
|
||||
uint8_t dataIn)
|
||||
{
|
||||
HWREG8(baseAddress + OFS_CRCDIRB_L) = dataIn;
|
||||
}
|
||||
|
||||
uint16_t CRC_getData(uint16_t baseAddress)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_CRCDI));
|
||||
}
|
||||
|
||||
uint16_t CRC_getResult(uint16_t baseAddress)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_CRCINIRES));
|
||||
}
|
||||
|
||||
uint16_t CRC_getResultBitsReversed(uint16_t baseAddress)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_CRCRESR));
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for crc_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,209 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// crc.h - Driver for the CRC Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __MSP430WARE_CRC_H__
|
||||
#define __MSP430WARE_CRC_H__
|
||||
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_CRC__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets the seed for the CRC.
|
||||
//!
|
||||
//! This function sets the seed for the CRC to begin generating a signature
|
||||
//! with the given seed and all passed data. Using this function resets the CRC
|
||||
//! signature.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the CRC module.
|
||||
//! \param seed is the seed for the CRC to start generating a signature from.
|
||||
//! \n Modified bits are \b CRCINIRES of \b CRCINIRES register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC_setSeed(uint16_t baseAddress,
|
||||
uint16_t seed);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets the 16 bit data to add into the CRC module to generate a new
|
||||
//! signature.
|
||||
//!
|
||||
//! This function sets the given data into the CRC module to generate the new
|
||||
//! signature from the current signature and new data.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the CRC module.
|
||||
//! \param dataIn is the data to be added, through the CRC module, to the
|
||||
//! signature.
|
||||
//! \n Modified bits are \b CRCDI of \b CRCDI register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC_set16BitData(uint16_t baseAddress,
|
||||
uint16_t dataIn);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets the 8 bit data to add into the CRC module to generate a new
|
||||
//! signature.
|
||||
//!
|
||||
//! This function sets the given data into the CRC module to generate the new
|
||||
//! signature from the current signature and new data.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the CRC module.
|
||||
//! \param dataIn is the data to be added, through the CRC module, to the
|
||||
//! signature.
|
||||
//! \n Modified bits are \b CRCDI of \b CRCDI register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC_set8BitData(uint16_t baseAddress,
|
||||
uint8_t dataIn);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Translates the 16 bit data by reversing the bits in each byte and
|
||||
//! then sets this data to add into the CRC module to generate a new signature.
|
||||
//!
|
||||
//! This function first reverses the bits in each byte of the data and then
|
||||
//! generates the new signature from the current signature and new translated
|
||||
//! data.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the CRC module.
|
||||
//! \param dataIn is the data to be added, through the CRC module, to the
|
||||
//! signature.
|
||||
//! \n Modified bits are \b CRCDIRB of \b CRCDIRB register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC_set16BitDataReversed(uint16_t baseAddress,
|
||||
uint16_t dataIn);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Translates the 8 bit data by reversing the bits in each byte and
|
||||
//! then sets this data to add into the CRC module to generate a new signature.
|
||||
//!
|
||||
//! This function first reverses the bits in each byte of the data and then
|
||||
//! generates the new signature from the current signature and new translated
|
||||
//! data.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the CRC module.
|
||||
//! \param dataIn is the data to be added, through the CRC module, to the
|
||||
//! signature.
|
||||
//! \n Modified bits are \b CRCDIRB of \b CRCDIRB register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC_set8BitDataReversed(uint16_t baseAddress,
|
||||
uint8_t dataIn);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Returns the value currently in the Data register.
|
||||
//!
|
||||
//! This function returns the value currently in the data register. If set in
|
||||
//! byte bits reversed format, then the translated data would be returned.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the CRC module.
|
||||
//!
|
||||
//! \return The value currently in the data register
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint16_t CRC_getData(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Returns the value pf the Signature Result.
|
||||
//!
|
||||
//! This function returns the value of the signature result generated by the
|
||||
//! CRC.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the CRC module.
|
||||
//!
|
||||
//! \return The value currently in the data register
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint16_t CRC_getResult(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Returns the bit-wise reversed format of the Signature Result.
|
||||
//!
|
||||
//! This function returns the bit-wise reversed format of the Signature Result.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the CRC module.
|
||||
//!
|
||||
//! \return The bit-wise reversed format of the Signature Result
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint16_t CRC_getResultBitsReversed(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#endif // __MSP430WARE_CRC_H__
|
||||
@@ -0,0 +1,172 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// crc32.c - Driver for the crc32 Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup crc32_api crc32
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_CRC32__
|
||||
#include "crc32.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
void CRC32_setSeed(uint32_t seed,
|
||||
uint8_t crcMode)
|
||||
{
|
||||
if(CRC16_MODE == crcMode)
|
||||
{
|
||||
HWREG16(CRC32_BASE + OFS_CRC16INIRESW0) = seed;
|
||||
}
|
||||
else
|
||||
{
|
||||
HWREG16(CRC32_BASE + OFS_CRC32INIRESW1) = ((seed & 0xFFFF0000)
|
||||
>> 16);
|
||||
HWREG16(CRC32_BASE + OFS_CRC32INIRESW0) = (seed & 0xFFFF);
|
||||
}
|
||||
}
|
||||
|
||||
void CRC32_set8BitData(uint8_t dataIn,
|
||||
uint8_t crcMode)
|
||||
{
|
||||
if(CRC16_MODE == crcMode)
|
||||
{
|
||||
HWREG8(CRC32_BASE + OFS_CRC16DIW0_L) = dataIn;
|
||||
}
|
||||
else
|
||||
{
|
||||
HWREG8(CRC32_BASE + OFS_CRC32DIW0_L) = dataIn;
|
||||
}
|
||||
}
|
||||
|
||||
void CRC32_set16BitData(uint16_t dataIn,
|
||||
uint8_t crcMode)
|
||||
{
|
||||
if(CRC16_MODE == crcMode)
|
||||
{
|
||||
HWREG16(CRC32_BASE + OFS_CRC16DIW0) = dataIn;
|
||||
}
|
||||
else
|
||||
{
|
||||
HWREG16(CRC32_BASE + OFS_CRC32DIW0) = dataIn;
|
||||
}
|
||||
}
|
||||
|
||||
void CRC32_set32BitData(uint32_t dataIn)
|
||||
{
|
||||
HWREG16(CRC32_BASE + OFS_CRC32DIW0) = dataIn & 0xFFFF;
|
||||
HWREG16(CRC32_BASE + OFS_CRC32DIW1) = (uint16_t) ((dataIn & 0xFFFF0000)
|
||||
>> 16);
|
||||
}
|
||||
|
||||
void CRC32_set8BitDataReversed(uint8_t dataIn,
|
||||
uint8_t crcMode)
|
||||
{
|
||||
if(CRC16_MODE == crcMode)
|
||||
{
|
||||
HWREG8(CRC32_BASE + OFS_CRC16DIRBW1_L) = dataIn;
|
||||
}
|
||||
else
|
||||
{
|
||||
HWREG8(CRC32_BASE + OFS_CRC32DIRBW1_L) = dataIn;
|
||||
}
|
||||
}
|
||||
|
||||
void CRC32_set16BitDataReversed(uint16_t dataIn,
|
||||
uint8_t crcMode)
|
||||
{
|
||||
if(CRC16_MODE == crcMode)
|
||||
{
|
||||
HWREG16(CRC32_BASE + OFS_CRC16DIRBW1) = dataIn;
|
||||
}
|
||||
else
|
||||
{
|
||||
HWREG16(CRC32_BASE + OFS_CRC32DIRBW1) = dataIn;
|
||||
}
|
||||
}
|
||||
|
||||
void CRC32_set32BitDataReversed(uint32_t dataIn)
|
||||
{
|
||||
HWREG16(CRC32_BASE + OFS_CRC32DIRBW1) = dataIn & 0xFFFF;
|
||||
HWREG16(CRC32_BASE + OFS_CRC32DIRBW0) = (uint16_t) ((dataIn & 0xFFFF0000)
|
||||
>> 16);
|
||||
}
|
||||
|
||||
uint32_t CRC32_getResult(uint8_t crcMode)
|
||||
{
|
||||
if(CRC16_MODE == crcMode)
|
||||
{
|
||||
return (HWREG16(CRC32_BASE + OFS_CRC16INIRESW0));
|
||||
}
|
||||
else
|
||||
{
|
||||
uint32_t result = 0;
|
||||
result = HWREG16(CRC32_BASE + OFS_CRC32INIRESW1);
|
||||
result = (result << 16);
|
||||
result |= HWREG16(CRC32_BASE + OFS_CRC32INIRESW0);
|
||||
return (result);
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t CRC32_getResultReversed(uint8_t crcMode)
|
||||
{
|
||||
if(CRC16_MODE == crcMode)
|
||||
{
|
||||
return (HWREG16(CRC32_BASE + OFS_CRC16RESRW0));
|
||||
}
|
||||
else
|
||||
{
|
||||
uint32_t result = 0;
|
||||
result = HWREG16(CRC32_BASE + OFS_CRC32RESRW0);
|
||||
result = (result << 16);
|
||||
result |= HWREG16(CRC32_BASE + OFS_CRC32RESRW1);
|
||||
return (result);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for crc32_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,263 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// crc32.h - Driver for the CRC32 Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __MSP430WARE_CRC32_H__
|
||||
#define __MSP430WARE_CRC32_H__
|
||||
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_CRC32__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the crcMode parameter for
|
||||
// functions: CRC32_setSeed(), CRC32_getResult(), CRC32_getResultReversed(),
|
||||
// CRC32_set8BitDataReversed(), CRC32_set16BitDataReversed(),
|
||||
// CRC32_set8BitData(), and CRC32_set16BitData().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define CRC32_MODE (0x01)
|
||||
#define CRC16_MODE (0x00)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets the seed for the CRC32.
|
||||
//!
|
||||
//! This function sets the seed for the CRC32 to begin generating a signature
|
||||
//! with the given seed and all passed data. Using this function resets the
|
||||
//! CRC32 signature.
|
||||
//!
|
||||
//! \param seed is the seed for the CRC32 to start generating a signature from.
|
||||
//! \n Modified bits are \b CRC32INIRESL0 of \b CRC32INIRESL0 register.
|
||||
//! \param crcMode selects the mode of operation for the CRC32
|
||||
//! Valid values are:
|
||||
//! - \b CRC32_MODE - 32 Bit Mode
|
||||
//! - \b CRC16_MODE - 16 Bit Mode
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC32_setSeed(uint32_t seed,
|
||||
uint8_t crcMode);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets the 8 bit data to add into the CRC32 module to generate a new
|
||||
//! signature.
|
||||
//!
|
||||
//! This function sets the given data into the CRC32 module to generate the new
|
||||
//! signature from the current signature and new data. Bit 0 is treated as the
|
||||
//! LSB.
|
||||
//!
|
||||
//! \param dataIn is the data to be added, through the CRC32 module, to the
|
||||
//! signature.
|
||||
//! \param crcMode selects the mode of operation for the CRC32
|
||||
//! Valid values are:
|
||||
//! - \b CRC32_MODE - 32 Bit Mode
|
||||
//! - \b CRC16_MODE - 16 Bit Mode
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC32_set8BitData(uint8_t dataIn,
|
||||
uint8_t crcMode);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets the 16 bit data to add into the CRC32 module to generate a new
|
||||
//! signature.
|
||||
//!
|
||||
//! This function sets the given data into the CRC32 module to generate the new
|
||||
//! signature from the current signature and new data. Bit 0 is treated as the
|
||||
//! LSB.
|
||||
//!
|
||||
//! \param dataIn is the data to be added, through the CRC32 module, to the
|
||||
//! signature.
|
||||
//! \param crcMode selects the mode of operation for the CRC32
|
||||
//! Valid values are:
|
||||
//! - \b CRC32_MODE - 32 Bit Mode
|
||||
//! - \b CRC16_MODE - 16 Bit Mode
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC32_set16BitData(uint16_t dataIn,
|
||||
uint8_t crcMode);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets the 32 bit data to add into the CRC32 module to generate a new
|
||||
//! signature.
|
||||
//!
|
||||
//! This function sets the given data into the CRC32 module to generate the new
|
||||
//! signature from the current signature and new data. Bit 0 is treated as the
|
||||
//! LSB.
|
||||
//!
|
||||
//! \param dataIn is the data to be added, through the CRC32 module, to the
|
||||
//! signature.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC32_set32BitData(uint32_t dataIn);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Translates the data by reversing the bits in each 8 bit data and
|
||||
//! then sets this data to add into the CRC32 module to generate a new
|
||||
//! signature.
|
||||
//!
|
||||
//! This function first reverses the bits in each byte of the data and then
|
||||
//! generates the new signature from the current signature and new translated
|
||||
//! data. Bit 0 is treated as the MSB.
|
||||
//!
|
||||
//! \param dataIn is the data to be added, through the CRC32 module, to the
|
||||
//! signature.
|
||||
//! \param crcMode selects the mode of operation for the CRC32
|
||||
//! Valid values are:
|
||||
//! - \b CRC32_MODE - 32 Bit Mode
|
||||
//! - \b CRC16_MODE - 16 Bit Mode
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC32_set8BitDataReversed(uint8_t dataIn,
|
||||
uint8_t crcMode);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Translates the data by reversing the bits in each 16 bit data and
|
||||
//! then sets this data to add into the CRC32 module to generate a new
|
||||
//! signature.
|
||||
//!
|
||||
//! This function first reverses the bits in each byte of the data and then
|
||||
//! generates the new signature from the current signature and new translated
|
||||
//! data. Bit 0 is treated as the MSB.
|
||||
//!
|
||||
//! \param dataIn is the data to be added, through the CRC32 module, to the
|
||||
//! signature.
|
||||
//! \param crcMode selects the mode of operation for the CRC32
|
||||
//! Valid values are:
|
||||
//! - \b CRC32_MODE - 32 Bit Mode
|
||||
//! - \b CRC16_MODE - 16 Bit Mode
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC32_set16BitDataReversed(uint16_t dataIn,
|
||||
uint8_t crcMode);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Translates the data by reversing the bits in each 32 bit data and
|
||||
//! then sets this data to add into the CRC32 module to generate a new
|
||||
//! signature.
|
||||
//!
|
||||
//! This function first reverses the bits in each byte of the data and then
|
||||
//! generates the new signature from the current signature and new translated
|
||||
//! data. Bit 0 is treated as the MSB.
|
||||
//!
|
||||
//! \param dataIn is the data to be added, through the CRC32 module, to the
|
||||
//! signature.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC32_set32BitDataReversed(uint32_t dataIn);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Returns the value of the signature result.
|
||||
//!
|
||||
//! This function returns the value of the signature result generated by the
|
||||
//! CRC32. Bit 0 is treated as LSB.
|
||||
//!
|
||||
//! \param crcMode selects the mode of operation for the CRC32
|
||||
//! Valid values are:
|
||||
//! - \b CRC32_MODE - 32 Bit Mode
|
||||
//! - \b CRC16_MODE - 16 Bit Mode
|
||||
//!
|
||||
//! \return The signature result
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint32_t CRC32_getResult(uint8_t crcMode);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Returns the bit-wise reversed format of the 32 bit signature result.
|
||||
//!
|
||||
//! This function returns the bit-wise reversed format of the signature result.
|
||||
//! Bit 0 is treated as MSB.
|
||||
//!
|
||||
//! \param crcMode selects the mode of operation for the CRC32
|
||||
//! Valid values are:
|
||||
//! - \b CRC32_MODE - 32 Bit Mode
|
||||
//! - \b CRC16_MODE - 16 Bit Mode
|
||||
//!
|
||||
//! \return The bit-wise reversed format of the signature result
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint32_t CRC32_getResultReversed(uint8_t crcMode);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#endif // __MSP430WARE_CRC32_H__
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
+6542
File diff suppressed because it is too large
Load Diff
+6573
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,199 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// dma.c - Driver for the dma Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup dma_api dma
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#if defined(__MSP430_HAS_DMAX_3__) || defined(__MSP430_HAS_DMAX_6__)
|
||||
#include "dma.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
void DMA_init(DMA_initParam *param){
|
||||
uint8_t triggerOffset = (param->channelSelect >> 4);
|
||||
|
||||
//Reset and Set DMA Control 0 Register
|
||||
HWREG16(DMA_BASE + param->channelSelect + OFS_DMA0CTL) =
|
||||
param->transferModeSelect //Set Transfer Mode
|
||||
+ param->transferUnitSelect //Set Transfer Unit Size
|
||||
+ param->triggerTypeSelect; //Set Trigger Type
|
||||
|
||||
//Set Transfer Size Amount
|
||||
HWREG16(DMA_BASE + param->channelSelect + OFS_DMA0SZ) = param->transferSize;
|
||||
|
||||
if(triggerOffset & 0x01) //Odd Channel
|
||||
{
|
||||
HWREG16(DMA_BASE + (triggerOffset & 0x0E)) &= 0x00FF; //Reset Trigger Select
|
||||
HWREG16(DMA_BASE +
|
||||
(triggerOffset & 0x0E)) |= (param->triggerSourceSelect << 8);
|
||||
}
|
||||
else //Even Channel
|
||||
{
|
||||
HWREG16(DMA_BASE + (triggerOffset & 0x0E)) &= 0xFF00; //Reset Trigger Select
|
||||
HWREG16(DMA_BASE +
|
||||
(triggerOffset & 0x0E)) |= param->triggerSourceSelect;
|
||||
}
|
||||
}
|
||||
|
||||
void DMA_setTransferSize(uint8_t channelSelect,
|
||||
uint16_t transferSize)
|
||||
{
|
||||
//Set Transfer Size Amount
|
||||
HWREG16(DMA_BASE + channelSelect + OFS_DMA0SZ) = transferSize;
|
||||
}
|
||||
|
||||
uint16_t DMA_getTransferSize(uint8_t channelSelect)
|
||||
{
|
||||
//Get Transfer Size Amount
|
||||
return(HWREG16(DMA_BASE + channelSelect + OFS_DMA0SZ));
|
||||
}
|
||||
|
||||
void DMA_setSrcAddress(uint8_t channelSelect,
|
||||
uint32_t srcAddress,
|
||||
uint16_t directionSelect)
|
||||
{
|
||||
//Set the Source Address
|
||||
__data16_write_addr((unsigned short)(DMA_BASE + channelSelect + OFS_DMA0SA),
|
||||
srcAddress);
|
||||
|
||||
//Reset bits before setting them
|
||||
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMASRCINCR_3);
|
||||
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= directionSelect;
|
||||
}
|
||||
|
||||
void DMA_setDstAddress(uint8_t channelSelect,
|
||||
uint32_t dstAddress,
|
||||
uint16_t directionSelect)
|
||||
{
|
||||
//Set the Destination Address
|
||||
__data16_write_addr((unsigned short)(DMA_BASE + channelSelect + OFS_DMA0DA),
|
||||
dstAddress);
|
||||
|
||||
//Reset bits before setting them
|
||||
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMADSTINCR_3);
|
||||
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= (directionSelect << 2);
|
||||
}
|
||||
|
||||
void DMA_enableTransfers(uint8_t channelSelect)
|
||||
{
|
||||
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= DMAEN;
|
||||
}
|
||||
|
||||
void DMA_disableTransfers(uint8_t channelSelect)
|
||||
{
|
||||
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAEN);
|
||||
}
|
||||
|
||||
void DMA_startTransfer(uint8_t channelSelect)
|
||||
{
|
||||
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= DMAREQ;
|
||||
}
|
||||
|
||||
void DMA_enableInterrupt(uint8_t channelSelect)
|
||||
{
|
||||
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= DMAIE;
|
||||
}
|
||||
|
||||
void DMA_disableInterrupt(uint8_t channelSelect)
|
||||
{
|
||||
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAIE);
|
||||
}
|
||||
|
||||
uint16_t DMA_getInterruptStatus(uint8_t channelSelect)
|
||||
{
|
||||
return (HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) & DMAIFG);
|
||||
}
|
||||
|
||||
void DMA_clearInterrupt(uint8_t channelSelect)
|
||||
{
|
||||
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAIFG);
|
||||
}
|
||||
|
||||
uint16_t DMA_getNMIAbortStatus(uint8_t channelSelect)
|
||||
{
|
||||
return (HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) & DMAABORT);
|
||||
}
|
||||
|
||||
void DMA_clearNMIAbort(uint8_t channelSelect)
|
||||
{
|
||||
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAABORT);
|
||||
}
|
||||
|
||||
void DMA_disableTransferDuringReadModifyWrite(void)
|
||||
{
|
||||
HWREG16(DMA_BASE + OFS_DMACTL4) |= DMARMWDIS;
|
||||
}
|
||||
|
||||
void DMA_enableTransferDuringReadModifyWrite(void)
|
||||
{
|
||||
HWREG16(DMA_BASE + OFS_DMACTL4) &= ~(DMARMWDIS);
|
||||
}
|
||||
|
||||
void DMA_enableRoundRobinPriority(void)
|
||||
{
|
||||
HWREG16(DMA_BASE + OFS_DMACTL4) |= ROUNDROBIN;
|
||||
}
|
||||
|
||||
void DMA_disableRoundRobinPriority(void)
|
||||
{
|
||||
HWREG16(DMA_BASE + OFS_DMACTL4) &= ~(ROUNDROBIN);
|
||||
}
|
||||
|
||||
void DMA_enableNMIAbort(void)
|
||||
{
|
||||
HWREG16(DMA_BASE + OFS_DMACTL4) |= ENNMI;
|
||||
}
|
||||
|
||||
void DMA_disableNMIAbort(void)
|
||||
{
|
||||
HWREG16(DMA_BASE + OFS_DMACTL4) &= ~(ENNMI);
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for dma_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,61 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#include "adc12_b.h"
|
||||
#include "aes256.h"
|
||||
#include "comp_e.h"
|
||||
#include "crc.h"
|
||||
#include "crc32.h"
|
||||
#include "cs.h"
|
||||
#include "dma.h"
|
||||
#include "esi.h"
|
||||
#include "eusci_a_spi.h"
|
||||
#include "eusci_a_uart.h"
|
||||
#include "eusci_b_i2c.h"
|
||||
#include "eusci_b_spi.h"
|
||||
#include "framctl.h"
|
||||
#include "gpio.h"
|
||||
#include "lcd_c.h"
|
||||
#include "mpu.h"
|
||||
#include "mpy32.h"
|
||||
#include "pmm.h"
|
||||
#include "ram.h"
|
||||
#include "ref_a.h"
|
||||
#include "rtc_b.h"
|
||||
#include "rtc_c.h"
|
||||
#include "sfr.h"
|
||||
#include "sysctl.h"
|
||||
#include "timer_a.h"
|
||||
#include "timer_b.h"
|
||||
#include "tlv.h"
|
||||
#include "wdt_a.h"
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,222 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// eusci_a_spi.c - Driver for the eusci_a_spi Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup eusci_a_spi_api eusci_a_spi
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_EUSCI_Ax__
|
||||
#include "eusci_a_spi.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
void EUSCI_A_SPI_initMaster(uint16_t baseAddress,
|
||||
EUSCI_A_SPI_initMasterParam *param)
|
||||
{
|
||||
//Disable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
|
||||
|
||||
//Reset OFS_UCAxCTLW0 values
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCCKPH + UCCKPL + UC7BIT + UCMSB +
|
||||
UCMST + UCMODE_3 + UCSYNC);
|
||||
|
||||
//Reset OFS_UCAxCTLW0 values
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSSEL_3);
|
||||
|
||||
//Select Clock
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= param->selectClockSource;
|
||||
|
||||
HWREG16(baseAddress + OFS_UCAxBRW) =
|
||||
(uint16_t)(param->clockSourceFrequency / param->desiredSpiClock);
|
||||
|
||||
/*
|
||||
* Configure as SPI master mode.
|
||||
* Clock phase select, polarity, msb
|
||||
* UCMST = Master mode
|
||||
* UCSYNC = Synchronous mode
|
||||
* UCMODE_0 = 3-pin SPI
|
||||
*/
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= (
|
||||
param->msbFirst +
|
||||
param->clockPhase +
|
||||
param->clockPolarity +
|
||||
UCMST +
|
||||
UCSYNC +
|
||||
param->spiMode
|
||||
);
|
||||
//No modulation
|
||||
HWREG16(baseAddress + OFS_UCAxMCTLW) = 0;
|
||||
}
|
||||
|
||||
void EUSCI_A_SPI_select4PinFunctionality(uint16_t baseAddress,
|
||||
uint8_t select4PinFunctionality)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCSTEM;
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= select4PinFunctionality;
|
||||
}
|
||||
|
||||
void EUSCI_A_SPI_changeMasterClock(uint16_t baseAddress,
|
||||
EUSCI_A_SPI_changeMasterClockParam *param)
|
||||
{
|
||||
//Disable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
|
||||
|
||||
HWREG16(baseAddress + OFS_UCAxBRW) =
|
||||
(uint16_t)(param->clockSourceFrequency / param->desiredSpiClock);
|
||||
|
||||
//Reset the UCSWRST bit to enable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSWRST);
|
||||
}
|
||||
|
||||
void EUSCI_A_SPI_initSlave(uint16_t baseAddress,
|
||||
EUSCI_A_SPI_initSlaveParam *param)
|
||||
{
|
||||
//Disable USCI Module
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
|
||||
|
||||
//Reset OFS_UCAxCTLW0 register
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCMSB +
|
||||
UC7BIT +
|
||||
UCMST +
|
||||
UCCKPL +
|
||||
UCCKPH +
|
||||
UCMODE_3
|
||||
);
|
||||
|
||||
//Clock polarity, phase select, msbFirst, SYNC, Mode0
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= (param->clockPhase +
|
||||
param->clockPolarity +
|
||||
param->msbFirst +
|
||||
UCSYNC +
|
||||
param->spiMode
|
||||
);
|
||||
}
|
||||
|
||||
void EUSCI_A_SPI_changeClockPhasePolarity(uint16_t baseAddress,
|
||||
uint16_t clockPhase,
|
||||
uint16_t clockPolarity)
|
||||
{
|
||||
//Disable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
|
||||
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCCKPH + UCCKPL);
|
||||
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= (
|
||||
clockPhase +
|
||||
clockPolarity
|
||||
);
|
||||
|
||||
//Reset the UCSWRST bit to enable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSWRST);
|
||||
}
|
||||
|
||||
void EUSCI_A_SPI_transmitData(uint16_t baseAddress,
|
||||
uint8_t transmitData)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_UCAxTXBUF) = transmitData;
|
||||
}
|
||||
|
||||
uint8_t EUSCI_A_SPI_receiveData(uint16_t baseAddress)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_UCAxRXBUF));
|
||||
}
|
||||
|
||||
void EUSCI_A_SPI_enableInterrupt(uint16_t baseAddress,
|
||||
uint8_t mask)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_UCAxIE) |= mask;
|
||||
}
|
||||
|
||||
void EUSCI_A_SPI_disableInterrupt(uint16_t baseAddress,
|
||||
uint8_t mask)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_UCAxIE) &= ~mask;
|
||||
}
|
||||
|
||||
uint8_t EUSCI_A_SPI_getInterruptStatus(uint16_t baseAddress,
|
||||
uint8_t mask)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_UCAxIFG) & mask);
|
||||
}
|
||||
|
||||
void EUSCI_A_SPI_clearInterrupt(uint16_t baseAddress,
|
||||
uint8_t mask)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_UCAxIFG) &= ~mask;
|
||||
}
|
||||
|
||||
void EUSCI_A_SPI_enable(uint16_t baseAddress)
|
||||
{
|
||||
//Reset the UCSWRST bit to enable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSWRST);
|
||||
}
|
||||
|
||||
void EUSCI_A_SPI_disable(uint16_t baseAddress)
|
||||
{
|
||||
//Set the UCSWRST bit to disable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
|
||||
}
|
||||
|
||||
uint32_t EUSCI_A_SPI_getReceiveBufferAddress(uint16_t baseAddress)
|
||||
{
|
||||
return (baseAddress + OFS_UCAxRXBUF);
|
||||
}
|
||||
|
||||
uint32_t EUSCI_A_SPI_getTransmitBufferAddress(uint16_t baseAddress)
|
||||
{
|
||||
return (baseAddress + OFS_UCAxTXBUF);
|
||||
}
|
||||
|
||||
uint16_t EUSCI_A_SPI_isBusy(uint16_t baseAddress)
|
||||
{
|
||||
//Return the bus busy status.
|
||||
return (HWREG16(baseAddress + OFS_UCAxSTATW) & UCBUSY);
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for eusci_a_spi_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,283 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// eusci_a_uart.c - Driver for the eusci_a_uart Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup eusci_a_uart_api eusci_a_uart
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_EUSCI_Ax__
|
||||
#include "eusci_a_uart.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
bool EUSCI_A_UART_init(uint16_t baseAddress,
|
||||
EUSCI_A_UART_initParam *param)
|
||||
{
|
||||
bool retVal = STATUS_SUCCESS;
|
||||
|
||||
//Disable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
|
||||
|
||||
//Clock source select
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCSSEL_3;
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= param->selectClockSource;
|
||||
|
||||
//MSB, LSB select
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCMSB;
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= param->msborLsbFirst;
|
||||
|
||||
//UCSPB = 0(1 stop bit) OR 1(2 stop bits)
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCSPB;
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= param->numberofStopBits;
|
||||
|
||||
//Parity
|
||||
switch(param->parity)
|
||||
{
|
||||
case EUSCI_A_UART_NO_PARITY:
|
||||
//No Parity
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCPEN;
|
||||
break;
|
||||
case EUSCI_A_UART_ODD_PARITY:
|
||||
//Odd Parity
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCPEN;
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCPAR;
|
||||
break;
|
||||
case EUSCI_A_UART_EVEN_PARITY:
|
||||
//Even Parity
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCPEN;
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCPAR;
|
||||
break;
|
||||
}
|
||||
|
||||
//BaudRate Control Register
|
||||
HWREG16(baseAddress + OFS_UCAxBRW) = param->clockPrescalar;
|
||||
//Modulation Control Register
|
||||
HWREG16(baseAddress + OFS_UCAxMCTLW) = ((param->secondModReg << 8)
|
||||
+ (param->firstModReg <<
|
||||
4) + param->overSampling);
|
||||
|
||||
//Asynchronous mode & 8 bit character select & clear mode
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSYNC +
|
||||
UC7BIT +
|
||||
UCMODE_3
|
||||
);
|
||||
|
||||
//Configure UART mode.
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= param->uartMode;
|
||||
|
||||
//Reset UCRXIE, UCBRKIE, UCDORM, UCTXADDR, UCTXBRK
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCRXEIE + UCBRKIE + UCDORM +
|
||||
UCTXADDR + UCTXBRK
|
||||
);
|
||||
return (retVal);
|
||||
}
|
||||
|
||||
void EUSCI_A_UART_transmitData(uint16_t baseAddress,
|
||||
uint8_t transmitData)
|
||||
{
|
||||
//If interrupts are not used, poll for flags
|
||||
if(!(HWREG16(baseAddress + OFS_UCAxIE) & UCTXIE))
|
||||
{
|
||||
//Poll for transmit interrupt flag
|
||||
while(!(HWREG16(baseAddress + OFS_UCAxIFG) & UCTXIFG))
|
||||
{
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
HWREG16(baseAddress + OFS_UCAxTXBUF) = transmitData;
|
||||
}
|
||||
|
||||
uint8_t EUSCI_A_UART_receiveData(uint16_t baseAddress)
|
||||
{
|
||||
//If interrupts are not used, poll for flags
|
||||
if(!(HWREG16(baseAddress + OFS_UCAxIE) & UCRXIE))
|
||||
{
|
||||
//Poll for receive interrupt flag
|
||||
while(!(HWREG16(baseAddress + OFS_UCAxIFG) & UCRXIFG))
|
||||
{
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
return (HWREG16(baseAddress + OFS_UCAxRXBUF));
|
||||
}
|
||||
|
||||
void EUSCI_A_UART_enableInterrupt(uint16_t baseAddress,
|
||||
uint8_t mask)
|
||||
{
|
||||
uint8_t locMask;
|
||||
|
||||
locMask = (mask & (EUSCI_A_UART_RECEIVE_INTERRUPT
|
||||
| EUSCI_A_UART_TRANSMIT_INTERRUPT
|
||||
| EUSCI_A_UART_STARTBIT_INTERRUPT
|
||||
| EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT));
|
||||
|
||||
HWREG16(baseAddress + OFS_UCAxIE) |= locMask;
|
||||
|
||||
locMask = (mask & (EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT
|
||||
| EUSCI_A_UART_BREAKCHAR_INTERRUPT));
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= locMask;
|
||||
}
|
||||
|
||||
void EUSCI_A_UART_disableInterrupt(uint16_t baseAddress,
|
||||
uint8_t mask)
|
||||
{
|
||||
uint8_t locMask;
|
||||
|
||||
locMask = (mask & (EUSCI_A_UART_RECEIVE_INTERRUPT
|
||||
| EUSCI_A_UART_TRANSMIT_INTERRUPT
|
||||
| EUSCI_A_UART_STARTBIT_INTERRUPT
|
||||
| EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT));
|
||||
HWREG16(baseAddress + OFS_UCAxIE) &= ~locMask;
|
||||
|
||||
locMask = (mask & (EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT
|
||||
| EUSCI_A_UART_BREAKCHAR_INTERRUPT));
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~locMask;
|
||||
}
|
||||
|
||||
uint8_t EUSCI_A_UART_getInterruptStatus(uint16_t baseAddress,
|
||||
uint8_t mask)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_UCAxIFG) & mask);
|
||||
}
|
||||
|
||||
void EUSCI_A_UART_clearInterrupt(uint16_t baseAddress,
|
||||
uint8_t mask)
|
||||
{
|
||||
//Clear the UART interrupt source.
|
||||
HWREG16(baseAddress + OFS_UCAxIFG) &= ~(mask);
|
||||
}
|
||||
|
||||
void EUSCI_A_UART_enable(uint16_t baseAddress)
|
||||
{
|
||||
//Reset the UCSWRST bit to enable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSWRST);
|
||||
}
|
||||
|
||||
void EUSCI_A_UART_disable(uint16_t baseAddress)
|
||||
{
|
||||
//Set the UCSWRST bit to disable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
|
||||
}
|
||||
|
||||
uint8_t EUSCI_A_UART_queryStatusFlags(uint16_t baseAddress,
|
||||
uint8_t mask)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_UCAxSTATW) & mask);
|
||||
}
|
||||
|
||||
void EUSCI_A_UART_setDormant(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCDORM;
|
||||
}
|
||||
|
||||
void EUSCI_A_UART_resetDormant(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCDORM;
|
||||
}
|
||||
|
||||
void EUSCI_A_UART_transmitAddress(uint16_t baseAddress,
|
||||
uint8_t transmitAddress)
|
||||
{
|
||||
//Set UCTXADDR bit
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCTXADDR;
|
||||
|
||||
//Place next byte to be sent into the transmit buffer
|
||||
HWREG16(baseAddress + OFS_UCAxTXBUF) = transmitAddress;
|
||||
}
|
||||
|
||||
void EUSCI_A_UART_transmitBreak(uint16_t baseAddress)
|
||||
{
|
||||
//Set UCTXADDR bit
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCTXBRK;
|
||||
|
||||
//If current mode is automatic baud-rate detection
|
||||
if(EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE ==
|
||||
(HWREG16(baseAddress + OFS_UCAxCTLW0) &
|
||||
EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE))
|
||||
{
|
||||
HWREG16(baseAddress +
|
||||
OFS_UCAxTXBUF) = EUSCI_A_UART_AUTOMATICBAUDRATE_SYNC;
|
||||
}
|
||||
else
|
||||
{
|
||||
HWREG16(baseAddress + OFS_UCAxTXBUF) = DEFAULT_SYNC;
|
||||
}
|
||||
|
||||
//If interrupts are not used, poll for flags
|
||||
if(!(HWREG16(baseAddress + OFS_UCAxIE) & UCTXIE))
|
||||
{
|
||||
//Poll for transmit interrupt flag
|
||||
while(!(HWREG16(baseAddress + OFS_UCAxIFG) & UCTXIFG))
|
||||
{
|
||||
;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t EUSCI_A_UART_getReceiveBufferAddress(uint16_t baseAddress)
|
||||
{
|
||||
return (baseAddress + OFS_UCAxRXBUF);
|
||||
}
|
||||
|
||||
uint32_t EUSCI_A_UART_getTransmitBufferAddress(uint16_t baseAddress)
|
||||
{
|
||||
return (baseAddress + OFS_UCAxTXBUF);
|
||||
}
|
||||
|
||||
void EUSCI_A_UART_selectDeglitchTime(uint16_t baseAddress,
|
||||
uint16_t deglitchTime)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW1) &= ~(UCGLIT1 + UCGLIT0);
|
||||
|
||||
HWREG16(baseAddress + OFS_UCAxCTLW1) |= deglitchTime;
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for eusci_a_uart_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,220 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// eusci_b_spi.c - Driver for the eusci_b_spi Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup eusci_b_spi_api eusci_b_spi
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_EUSCI_Bx__
|
||||
#include "eusci_b_spi.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
void EUSCI_B_SPI_initMaster(uint16_t baseAddress,
|
||||
EUSCI_B_SPI_initMasterParam *param)
|
||||
{
|
||||
//Disable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
|
||||
|
||||
//Reset OFS_UCBxCTLW0 values
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCCKPH + UCCKPL + UC7BIT + UCMSB +
|
||||
UCMST + UCMODE_3 + UCSYNC);
|
||||
|
||||
//Reset OFS_UCBxCTLW0 values
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCSSEL_3);
|
||||
|
||||
//Select Clock
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) |= param->selectClockSource;
|
||||
|
||||
HWREG16(baseAddress + OFS_UCBxBRW) =
|
||||
(uint16_t)(param->clockSourceFrequency / param->desiredSpiClock);
|
||||
|
||||
/*
|
||||
* Configure as SPI master mode.
|
||||
* Clock phase select, polarity, msb
|
||||
* UCMST = Master mode
|
||||
* UCSYNC = Synchronous mode
|
||||
* UCMODE_0 = 3-pin SPI
|
||||
*/
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) |= (
|
||||
param->msbFirst +
|
||||
param->clockPhase +
|
||||
param->clockPolarity +
|
||||
UCMST +
|
||||
UCSYNC +
|
||||
param->spiMode
|
||||
);
|
||||
}
|
||||
|
||||
void EUSCI_B_SPI_select4PinFunctionality(uint16_t baseAddress,
|
||||
uint8_t select4PinFunctionality)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~UCSTEM;
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) |= select4PinFunctionality;
|
||||
}
|
||||
|
||||
void EUSCI_B_SPI_changeMasterClock(uint16_t baseAddress,
|
||||
EUSCI_B_SPI_changeMasterClockParam *param)
|
||||
{
|
||||
//Disable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
|
||||
|
||||
HWREG16(baseAddress + OFS_UCBxBRW) =
|
||||
(uint16_t)(param->clockSourceFrequency / param->desiredSpiClock);
|
||||
|
||||
//Reset the UCSWRST bit to enable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCSWRST);
|
||||
}
|
||||
|
||||
void EUSCI_B_SPI_initSlave(uint16_t baseAddress,
|
||||
EUSCI_B_SPI_initSlaveParam *param)
|
||||
{
|
||||
//Disable USCI Module
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
|
||||
|
||||
//Reset OFS_UCBxCTLW0 register
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCMSB +
|
||||
UC7BIT +
|
||||
UCMST +
|
||||
UCCKPL +
|
||||
UCCKPH +
|
||||
UCMODE_3
|
||||
);
|
||||
|
||||
//Clock polarity, phase select, msbFirst, SYNC, Mode0
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) |= (param->clockPhase +
|
||||
param->clockPolarity +
|
||||
param->msbFirst +
|
||||
UCSYNC +
|
||||
param->spiMode
|
||||
);
|
||||
}
|
||||
|
||||
void EUSCI_B_SPI_changeClockPhasePolarity(uint16_t baseAddress,
|
||||
uint16_t clockPhase,
|
||||
uint16_t clockPolarity)
|
||||
{
|
||||
//Disable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
|
||||
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCCKPH + UCCKPL);
|
||||
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) |= (
|
||||
clockPhase +
|
||||
clockPolarity
|
||||
);
|
||||
|
||||
//Reset the UCSWRST bit to enable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCSWRST);
|
||||
}
|
||||
|
||||
void EUSCI_B_SPI_transmitData(uint16_t baseAddress,
|
||||
uint8_t transmitData)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_UCBxTXBUF) = transmitData;
|
||||
}
|
||||
|
||||
uint8_t EUSCI_B_SPI_receiveData(uint16_t baseAddress)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_UCBxRXBUF));
|
||||
}
|
||||
|
||||
void EUSCI_B_SPI_enableInterrupt(uint16_t baseAddress,
|
||||
uint8_t mask)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_UCBxIE) |= mask;
|
||||
}
|
||||
|
||||
void EUSCI_B_SPI_disableInterrupt(uint16_t baseAddress,
|
||||
uint8_t mask)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_UCBxIE) &= ~mask;
|
||||
}
|
||||
|
||||
uint8_t EUSCI_B_SPI_getInterruptStatus(uint16_t baseAddress,
|
||||
uint8_t mask)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_UCBxIFG) & mask);
|
||||
}
|
||||
|
||||
void EUSCI_B_SPI_clearInterrupt(uint16_t baseAddress,
|
||||
uint8_t mask)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_UCBxIFG) &= ~mask;
|
||||
}
|
||||
|
||||
void EUSCI_B_SPI_enable(uint16_t baseAddress)
|
||||
{
|
||||
//Reset the UCSWRST bit to enable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCSWRST);
|
||||
}
|
||||
|
||||
void EUSCI_B_SPI_disable(uint16_t baseAddress)
|
||||
{
|
||||
//Set the UCSWRST bit to disable the USCI Module
|
||||
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
|
||||
}
|
||||
|
||||
uint32_t EUSCI_B_SPI_getReceiveBufferAddress(uint16_t baseAddress)
|
||||
{
|
||||
return (baseAddress + OFS_UCBxRXBUF);
|
||||
}
|
||||
|
||||
uint32_t EUSCI_B_SPI_getTransmitBufferAddress(uint16_t baseAddress)
|
||||
{
|
||||
return (baseAddress + OFS_UCBxTXBUF);
|
||||
}
|
||||
|
||||
uint16_t EUSCI_B_SPI_isBusy(uint16_t baseAddress)
|
||||
{
|
||||
//Return the bus busy status.
|
||||
return (HWREG16(baseAddress + OFS_UCBxSTATW) & UCBUSY);
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for eusci_b_spi_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,157 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// framctl.c - Driver for the framctl Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup framctl_api framctl
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_FRAM__
|
||||
#include "framctl.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
void FRAMCtl_write8(uint8_t *dataPtr,
|
||||
uint8_t *framPtr,
|
||||
uint16_t numberOfBytes)
|
||||
{
|
||||
while(numberOfBytes > 0)
|
||||
{
|
||||
//Write to Fram
|
||||
*framPtr++ = *dataPtr++;
|
||||
numberOfBytes--;
|
||||
}
|
||||
}
|
||||
|
||||
void FRAMCtl_write16(uint16_t *dataPtr,
|
||||
uint16_t *framPtr,
|
||||
uint16_t numberOfWords)
|
||||
{
|
||||
while(numberOfWords > 0)
|
||||
{
|
||||
//Write to Fram
|
||||
*framPtr++ = *dataPtr++;
|
||||
numberOfWords--;
|
||||
}
|
||||
}
|
||||
|
||||
void FRAMCtl_write32(uint32_t *dataPtr,
|
||||
uint32_t *framPtr,
|
||||
uint16_t count)
|
||||
{
|
||||
while(count > 0)
|
||||
{
|
||||
//Write to Fram
|
||||
*framPtr++ = *dataPtr++;
|
||||
count--;
|
||||
}
|
||||
}
|
||||
|
||||
void FRAMCtl_fillMemory32(uint32_t value,
|
||||
uint32_t *framPtr,
|
||||
uint16_t count)
|
||||
{
|
||||
while(count > 0)
|
||||
{
|
||||
//Write to Fram
|
||||
*framPtr++ = value;
|
||||
count--;
|
||||
}
|
||||
}
|
||||
|
||||
void FRAMCtl_enableInterrupt(uint8_t interruptMask)
|
||||
{
|
||||
uint8_t waitSelection;
|
||||
|
||||
waitSelection = (HWREG8(FRAM_BASE + OFS_FRCTL0) & 0xFF);
|
||||
// Clear lock in FRAM control registers
|
||||
HWREG16(FRAM_BASE + OFS_FRCTL0) = FWPW | waitSelection;
|
||||
|
||||
// Enable user selected interrupt sources
|
||||
HWREG16(FRAM_BASE + OFS_GCCTL0) |= interruptMask;
|
||||
}
|
||||
|
||||
uint8_t FRAMCtl_getInterruptStatus(uint16_t interruptFlagMask)
|
||||
{
|
||||
return (HWREG16(FRAM_BASE + OFS_GCCTL1) & interruptFlagMask);
|
||||
}
|
||||
|
||||
void FRAMCtl_disableInterrupt(uint16_t interruptMask)
|
||||
{
|
||||
uint8_t waitSelection;
|
||||
|
||||
waitSelection = (HWREG8(FRAM_BASE + OFS_FRCTL0) & 0xFF);
|
||||
//Clear lock in FRAM control registers
|
||||
HWREG16(FRAM_BASE + OFS_FRCTL0) = FWPW | waitSelection;
|
||||
|
||||
HWREG16(FRAM_BASE + OFS_GCCTL0) &= ~(interruptMask);
|
||||
}
|
||||
|
||||
void FRAMCtl_configureWaitStateControl(uint8_t waitState)
|
||||
{
|
||||
// Clear lock in FRAM control registers
|
||||
HWREG16(FRAM_BASE + OFS_FRCTL0) = FWPW;
|
||||
|
||||
HWREG8(FRAM_BASE + OFS_FRCTL0_L) &= ~NWAITS_7;
|
||||
HWREG8(FRAM_BASE + OFS_FRCTL0_L) |= (waitState);
|
||||
}
|
||||
|
||||
void FRAMCtl_delayPowerUpFromLPM(uint8_t delayStatus)
|
||||
{
|
||||
uint8_t waitSelection;
|
||||
|
||||
waitSelection = (HWREG8(FRAM_BASE + OFS_FRCTL0) & 0xFF);
|
||||
|
||||
// Clear lock in FRAM control registers
|
||||
HWREG16(FRAM_BASE + OFS_FRCTL0) = FWPW | waitSelection;
|
||||
|
||||
HWREG8(FRAM_BASE + OFS_GCCTL0_L) &= ~0x02;
|
||||
HWREG8(FRAM_BASE + OFS_GCCTL0_L) |= delayStatus;
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for framctl_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,303 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// framctl.h - Driver for the FRAMCTL Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __MSP430WARE_FRAMCTL_H__
|
||||
#define __MSP430WARE_FRAMCTL_H__
|
||||
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_FRAM__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the interruptMask parameter
|
||||
// for functions: FRAMCtl_enableInterrupt(), and FRAMCtl_disableInterrupt().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define FRAMCTL_PUC_ON_UNCORRECTABLE_BIT UBDRSTEN
|
||||
#define FRAMCTL_UNCORRECTABLE_BIT_INTERRUPT UBDIE
|
||||
#define FRAMCTL_CORRECTABLE_BIT_INTERRUPT CBDIE
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the interruptFlagMask
|
||||
// parameter for functions: FRAMCtl_getInterruptStatus() as well as returned by
|
||||
// the FRAMCtl_getInterruptStatus() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define FRAMCTL_ACCESS_TIME_ERROR_FLAG ACCTEIFG
|
||||
#define FRAMCTL_UNCORRECTABLE_BIT_FLAG UBDIFG
|
||||
#define FRAMCTL_CORRECTABLE_BIT_FLAG CBDIFG
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the waitState parameter for
|
||||
// functions: FRAMCtl_configureWaitStateControl().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define FRAMCTL_ACCESS_TIME_CYCLES_0 NWAITS_0
|
||||
#define FRAMCTL_ACCESS_TIME_CYCLES_1 NWAITS_1
|
||||
#define FRAMCTL_ACCESS_TIME_CYCLES_2 NWAITS_2
|
||||
#define FRAMCTL_ACCESS_TIME_CYCLES_3 NWAITS_3
|
||||
#define FRAMCTL_ACCESS_TIME_CYCLES_4 NWAITS_4
|
||||
#define FRAMCTL_ACCESS_TIME_CYCLES_5 NWAITS_5
|
||||
#define FRAMCTL_ACCESS_TIME_CYCLES_6 NWAITS_6
|
||||
#define FRAMCTL_ACCESS_TIME_CYCLES_7 NWAITS_7
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the delayStatus parameter for
|
||||
// functions: FRAMCtl_delayPowerUpFromLPM().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define FRAMCTL_DELAY_FROM_LPM_ENABLE 0x00
|
||||
#define FRAMCTL_DELAY_FROM_LPM_DISABLE 0x02
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Write data into the fram memory in byte format.
|
||||
//!
|
||||
//! \param dataPtr is the pointer to the data to be written
|
||||
//! \param framPtr is the pointer into which to write the data
|
||||
//! \param numberOfBytes is the number of bytes to be written
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FRAMCtl_write8(uint8_t *dataPtr,
|
||||
uint8_t *framPtr,
|
||||
uint16_t numberOfBytes);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Write data into the fram memory in word format.
|
||||
//!
|
||||
//! \param dataPtr is the pointer to the data to be written
|
||||
//! \param framPtr is the pointer into which to write the data
|
||||
//! \param numberOfWords is the number of words to be written
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FRAMCtl_write16(uint16_t *dataPtr,
|
||||
uint16_t *framPtr,
|
||||
uint16_t numberOfWords);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Write data into the fram memory in long format, pass by reference
|
||||
//!
|
||||
//! \param dataPtr is the pointer to the data to be written
|
||||
//! \param framPtr is the pointer into which to write the data
|
||||
//! \param count is the number of 32 bit words to be written
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FRAMCtl_write32(uint32_t *dataPtr,
|
||||
uint32_t *framPtr,
|
||||
uint16_t count);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Write data into the fram memory in long format, pass by value
|
||||
//!
|
||||
//! \param value is the value to written to FRAMCTL memory
|
||||
//! \param framPtr is the pointer into which to write the data
|
||||
//! \param count is the number of 32 bit addresses to fill
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FRAMCtl_fillMemory32(uint32_t value,
|
||||
uint32_t *framPtr,
|
||||
uint16_t count);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Enables selected FRAMCtl interrupt sources.
|
||||
//!
|
||||
//! Enables the indicated FRAMCtl interrupt sources. Only the sources that are
|
||||
//! enabled can be reflected to the processor interrupt; disabled sources have
|
||||
//! no effect on the processor. Does not clear interrupt flags.
|
||||
//!
|
||||
//! \param interruptMask is the bit mask of the memory buffer interrupt sources
|
||||
//! to be disabled.
|
||||
//! Mask value is the logical OR of any of the following:
|
||||
//! - \b FRAMCTL_PUC_ON_UNCORRECTABLE_BIT - Enable PUC reset if FRAMCtl
|
||||
//! uncorrectable bit error detected.
|
||||
//! - \b FRAMCTL_UNCORRECTABLE_BIT_INTERRUPT - Interrupts when an
|
||||
//! uncorrectable bit error is detected.
|
||||
//! - \b FRAMCTL_CORRECTABLE_BIT_INTERRUPT - Interrupts when a
|
||||
//! correctable bit error is detected.
|
||||
//!
|
||||
//! Modified bits of \b GCCTL0 register and bits of \b FRCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FRAMCtl_enableInterrupt(uint8_t interruptMask);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Returns the status of the selected FRAMCtl interrupt flags.
|
||||
//!
|
||||
//! \param interruptFlagMask is a bit mask of the interrupt flags status to be
|
||||
//! returned.
|
||||
//! Mask value is the logical OR of any of the following:
|
||||
//! - \b FRAMCTL_ACCESS_TIME_ERROR_FLAG - Interrupt flag is set if a
|
||||
//! wrong setting for NPRECHG and NACCESS is set and FRAMCtl access
|
||||
//! time is not hold.
|
||||
//! - \b FRAMCTL_UNCORRECTABLE_BIT_FLAG - Interrupt flag is set if an
|
||||
//! uncorrectable bit error has been detected in the FRAMCtl memory
|
||||
//! error detection logic.
|
||||
//! - \b FRAMCTL_CORRECTABLE_BIT_FLAG - Interrupt flag is set if a
|
||||
//! correctable bit error has been detected and corrected in the
|
||||
//! FRAMCtl memory error detection logic.
|
||||
//!
|
||||
//! \return Logical OR of any of the following:
|
||||
//! - \b FRAMCtl_ACCESS_TIME_ERROR_FLAG Interrupt flag is set if a
|
||||
//! wrong setting for NPRECHG and NACCESS is set and FRAMCtl access
|
||||
//! time is not hold.
|
||||
//! - \b FRAMCtl_UNCORRECTABLE_BIT_FLAG Interrupt flag is set if an
|
||||
//! uncorrectable bit error has been detected in the FRAMCtl memory
|
||||
//! error detection logic.
|
||||
//! - \b FRAMCtl_CORRECTABLE_BIT_FLAG Interrupt flag is set if a
|
||||
//! correctable bit error has been detected and corrected in the
|
||||
//! FRAMCtl memory error detection logic.
|
||||
//! \n indicating the status of the masked flags
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint8_t FRAMCtl_getInterruptStatus(uint16_t interruptFlagMask);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Disables selected FRAMCtl interrupt sources.
|
||||
//!
|
||||
//! Disables the indicated FRAMCtl interrupt sources. Only the sources that
|
||||
//! are enabled can be reflected to the processor interrupt; disabled sources
|
||||
//! have no effect on the processor.
|
||||
//!
|
||||
//! \param interruptMask is the bit mask of the memory buffer interrupt sources
|
||||
//! to be disabled.
|
||||
//! Mask value is the logical OR of any of the following:
|
||||
//! - \b FRAMCTL_PUC_ON_UNCORRECTABLE_BIT - Enable PUC reset if FRAMCtl
|
||||
//! uncorrectable bit error detected.
|
||||
//! - \b FRAMCTL_UNCORRECTABLE_BIT_INTERRUPT - Interrupts when an
|
||||
//! uncorrectable bit error is detected.
|
||||
//! - \b FRAMCTL_CORRECTABLE_BIT_INTERRUPT - Interrupts when a
|
||||
//! correctable bit error is detected.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FRAMCtl_disableInterrupt(uint16_t interruptMask);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Configures the access time of the FRAMCtl module
|
||||
//!
|
||||
//! Configures the access time of the FRAMCtl module.
|
||||
//!
|
||||
//! \param waitState defines the number of CPU cycles required for access time
|
||||
//! defined in the datasheet
|
||||
//! Valid values are:
|
||||
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_0
|
||||
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_1
|
||||
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_2
|
||||
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_3
|
||||
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_4
|
||||
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_5
|
||||
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_6
|
||||
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_7
|
||||
//!
|
||||
//! Modified bits are \b NWAITS of \b GCCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FRAMCtl_configureWaitStateControl(uint8_t waitState);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Configures when the FRAMCtl module will power up after LPM exit
|
||||
//!
|
||||
//! Configures when the FRAMCtl module will power up after LPM exit. The module
|
||||
//! can either wait until the first FRAMCtl access to power up or power up
|
||||
//! immediately after leaving LPM. If FRAMCtl power is disabled, a memory
|
||||
//! access will automatically insert wait states to ensure sufficient timing
|
||||
//! for the FRAMCtl power-up and access.
|
||||
//!
|
||||
//! \param delayStatus chooses if FRAMCTL should power up instantly with LPM
|
||||
//! exit or to wait until first FRAMCTL access after LPM exit
|
||||
//! Valid values are:
|
||||
//! - \b FRAMCTL_DELAY_FROM_LPM_ENABLE
|
||||
//! - \b FRAMCTL_DELAY_FROM_LPM_DISABLE
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FRAMCtl_delayPowerUpFromLPM(uint8_t delayStatus);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#endif // __MSP430WARE_FRAMCTL_H__
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,64 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#ifndef __HW_REGACCESS__
|
||||
#define __HW_REGACCESS__
|
||||
|
||||
#include "stdint.h"
|
||||
#include "stdbool.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macro for enabling assert statements for debugging
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define NDEBUG
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macros for hardware access
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HWREG32(x) \
|
||||
(*((volatile uint32_t *)((uint16_t)x)))
|
||||
#define HWREG16(x) \
|
||||
(*((volatile uint16_t *)((uint16_t)x)))
|
||||
#define HWREG8(x) \
|
||||
(*((volatile uint8_t *)((uint16_t)x)))
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// SUCCESS and FAILURE for API return value
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define STATUS_SUCCESS 0x01
|
||||
#define STATUS_FAIL 0x00
|
||||
|
||||
#endif // #ifndef __HW_REGACCESS__
|
||||
@@ -0,0 +1,60 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#ifndef __HW_TYPES__
|
||||
#define __HW_TYPES__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macro for enabling assert statements for debugging
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define NDEBUG
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macros for hardware access
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HWREG(x) \
|
||||
(*((volatile unsigned int *)(x)))
|
||||
#define HWREGB(x) \
|
||||
(*((volatile unsigned char *)(x)))
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// SUCCESS and FAILURE for API return value
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define STATUS_SUCCESS 0x01
|
||||
#define STATUS_FAIL 0x00
|
||||
|
||||
#endif // #ifndef __HW_TYPES__
|
||||
@@ -0,0 +1,42 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#ifndef __DRIVERLIB_VERSION__
|
||||
#define DRIVERLIB_VER_MAJOR 2
|
||||
#define DRIVERLIB_VER_MINOR 00
|
||||
#define DRIVERLIB_VER_PATCH 00
|
||||
#define DRIVERLIB_VER_BUILD 16
|
||||
#endif
|
||||
|
||||
#define getVersion() ((uint32_t)DRIVERLIB_VER_MAJOR << 24 | \
|
||||
(uint32_t)DRIVERLIB_VER_MINOR << 16 | \
|
||||
(uint32_t)DRIVERLIB_VER_PATCH << 8 | \
|
||||
(uint32_t)DRIVERLIB_VER_BUILD)
|
||||
@@ -0,0 +1,371 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// lcd_c.c - Driver for the lcd_c Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup lcd_c_api lcd_c
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_LCD_C__
|
||||
#include "lcd_c.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Initialization parameter instance
|
||||
//
|
||||
//*****************************************************************************
|
||||
const LCD_C_initParam LCD_C_INIT_PARAM = {
|
||||
LCD_C_CLOCKSOURCE_ACLK,
|
||||
LCD_C_CLOCKDIVIDER_1,
|
||||
LCD_C_CLOCKPRESCALAR_1,
|
||||
LCD_C_STATIC,
|
||||
LCD_C_STANDARD_WAVEFORMS,
|
||||
LCD_C_SEGMENTS_DISABLED
|
||||
};
|
||||
|
||||
static void setLCDFunction(uint16_t baseAddress,
|
||||
uint8_t index,
|
||||
uint16_t value)
|
||||
{
|
||||
switch(index)
|
||||
{
|
||||
case 0:
|
||||
HWREG16(baseAddress + OFS_LCDCPCTL0) |= value;
|
||||
break;
|
||||
case 1:
|
||||
HWREG16(baseAddress + OFS_LCDCPCTL1) |= value;
|
||||
break;
|
||||
case 2:
|
||||
HWREG16(baseAddress + OFS_LCDCPCTL2) |= value;
|
||||
break;
|
||||
case 3:
|
||||
HWREG16(baseAddress + OFS_LCDCPCTL3) |= value;
|
||||
break;
|
||||
default: break;
|
||||
}
|
||||
}
|
||||
|
||||
void LCD_C_init(uint16_t baseAddress,
|
||||
LCD_C_initParam *initParams)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~(LCDMX0 | LCDMX1 | LCDMX2 | LCDSSEL
|
||||
| LCDLP | LCDSON | LCDDIV_31);
|
||||
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->muxRate;
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->clockSource;
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->waveforms;
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->segments;
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->clockDivider;
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->clockPrescalar;
|
||||
}
|
||||
|
||||
void LCD_C_on(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) |= LCDON;
|
||||
}
|
||||
|
||||
void LCD_C_off(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
|
||||
}
|
||||
|
||||
void LCD_C_clearInterrupt(uint16_t baseAddress,
|
||||
uint16_t mask)
|
||||
{
|
||||
HWREG8(baseAddress + OFS_LCDCCTL1_L) &= ~(mask >> 8);
|
||||
}
|
||||
|
||||
uint16_t LCD_C_getInterruptStatus(uint16_t baseAddress,
|
||||
uint16_t mask)
|
||||
{
|
||||
return (HWREG8(baseAddress + OFS_LCDCCTL1_L) & (mask >> 8));
|
||||
}
|
||||
|
||||
void LCD_C_enableInterrupt(uint16_t baseAddress,
|
||||
uint16_t mask)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCCTL1) |= mask;
|
||||
}
|
||||
|
||||
void LCD_C_disableInterrupt(uint16_t baseAddress,
|
||||
uint16_t mask)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCCTL1) &= ~mask;
|
||||
}
|
||||
|
||||
void LCD_C_clearMemory(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCMEMCTL) |= LCDCLRM;
|
||||
}
|
||||
|
||||
void LCD_C_clearBlinkingMemory(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCMEMCTL) |= LCDCLRBM;
|
||||
}
|
||||
|
||||
void LCD_C_selectDisplayMemory(uint16_t baseAddress,
|
||||
uint16_t displayMemory)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCMEMCTL) &= ~LCDDISP;
|
||||
HWREG16(baseAddress + OFS_LCDCMEMCTL) |= displayMemory;
|
||||
}
|
||||
|
||||
void LCD_C_setBlinkingControl(uint16_t baseAddress,
|
||||
uint8_t clockDivider,
|
||||
uint8_t clockPrescalar,
|
||||
uint8_t mode)
|
||||
{
|
||||
HWREG16(baseAddress +
|
||||
OFS_LCDCBLKCTL) &= ~(LCDBLKDIV0 | LCDBLKDIV1 | LCDBLKDIV2 |
|
||||
LCDBLKPRE0 | LCDBLKPRE1 |
|
||||
LCDBLKPRE2 |
|
||||
LCDBLKMOD0 | LCDBLKMOD1
|
||||
);
|
||||
HWREG16(baseAddress +
|
||||
OFS_LCDCBLKCTL) |= clockDivider | clockPrescalar | mode;
|
||||
}
|
||||
|
||||
void LCD_C_enableChargePump(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) |= LCDCPEN;
|
||||
}
|
||||
|
||||
void LCD_C_disableChargePump(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~LCDCPEN;
|
||||
}
|
||||
|
||||
void LCD_C_selectBias(uint16_t baseAddress,
|
||||
uint16_t bias)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~LCD2B;
|
||||
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) |= bias;
|
||||
}
|
||||
|
||||
void LCD_C_selectChargePumpReference(uint16_t baseAddress,
|
||||
uint16_t reference)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~VLCDREF_3;
|
||||
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) |= reference;
|
||||
}
|
||||
|
||||
void LCD_C_setVLCDSource(uint16_t baseAddress,
|
||||
uint16_t vlcdSource,
|
||||
uint16_t v2v3v4Source,
|
||||
uint16_t v5Source)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~VLCDEXT;
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~LCDREXT;
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~LCDEXTBIAS;
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~R03EXT;
|
||||
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) |= vlcdSource;
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) |= v2v3v4Source;
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) |= v5Source;
|
||||
}
|
||||
|
||||
void LCD_C_setVLCDVoltage(uint16_t baseAddress,
|
||||
uint16_t voltage)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~VLCD_15;
|
||||
|
||||
HWREG16(baseAddress + OFS_LCDCVCTL) |= voltage;
|
||||
}
|
||||
|
||||
void LCD_C_setPinAsLCDFunction(uint16_t baseAddress,
|
||||
uint8_t pin)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
|
||||
|
||||
uint8_t idx = pin >> 4;
|
||||
uint16_t val = 1 << (pin & 0xF);
|
||||
|
||||
setLCDFunction(baseAddress, idx, val);
|
||||
}
|
||||
|
||||
void LCD_C_setPinAsPortFunction(uint16_t baseAddress,
|
||||
uint8_t pin)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
|
||||
|
||||
uint8_t idx = pin >> 4;
|
||||
uint16_t val = 1 << (pin & 0xF);
|
||||
|
||||
switch(idx)
|
||||
{
|
||||
case 0:
|
||||
HWREG16(baseAddress + OFS_LCDCPCTL0) &= ~val;
|
||||
break;
|
||||
case 1:
|
||||
HWREG16(baseAddress + OFS_LCDCPCTL1) &= ~val;
|
||||
break;
|
||||
case 2:
|
||||
HWREG16(baseAddress + OFS_LCDCPCTL2) &= ~val;
|
||||
break;
|
||||
case 3:
|
||||
HWREG16(baseAddress + OFS_LCDCPCTL3) &= ~val;
|
||||
break;
|
||||
default: break;
|
||||
}
|
||||
}
|
||||
|
||||
void LCD_C_setPinAsLCDFunctionEx(uint16_t baseAddress,
|
||||
uint8_t startPin,
|
||||
uint8_t endPin)
|
||||
{
|
||||
uint8_t startIdx = startPin >> 4;
|
||||
uint8_t endIdx = endPin >> 4;
|
||||
uint8_t startPos = startPin & 0xF;
|
||||
uint8_t endPos = endPin & 0xF;
|
||||
uint16_t val = 0;
|
||||
uint8_t i = 0;
|
||||
|
||||
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
|
||||
|
||||
if(startIdx == endIdx)
|
||||
{
|
||||
val = (0xFFFF >> (15 - endPos)) & (0xFFFF << startPos);
|
||||
|
||||
setLCDFunction(baseAddress, startIdx, val);
|
||||
}
|
||||
else
|
||||
{
|
||||
val = 0xFFFF >> (15 - endPos);
|
||||
setLCDFunction(baseAddress, endIdx, val);
|
||||
|
||||
for(i = endIdx - 1; i > startIdx; i--)
|
||||
{
|
||||
setLCDFunction(baseAddress, i, 0xFFFF);
|
||||
}
|
||||
|
||||
val = 0xFFFF << startPos;
|
||||
setLCDFunction(baseAddress, startIdx, val);
|
||||
}
|
||||
}
|
||||
|
||||
void LCD_C_setMemory(uint16_t baseAddress,
|
||||
uint8_t pin,
|
||||
uint8_t value)
|
||||
{
|
||||
uint8_t muxRate = HWREG16(baseAddress + OFS_LCDCCTL0)
|
||||
& (LCDMX2 | LCDMX1 | LCDMX0);
|
||||
|
||||
// static, 2-mux, 3-mux, 4-mux
|
||||
if(muxRate <= (LCDMX1 | LCDMX0))
|
||||
{
|
||||
if(pin & 1)
|
||||
{
|
||||
HWREG8(baseAddress + OFS_LCDM1 + pin / 2) &= 0x0F;
|
||||
HWREG8(baseAddress + OFS_LCDM1 + pin / 2) |= (value & 0xF) << 4;
|
||||
}
|
||||
else
|
||||
{
|
||||
HWREG8(baseAddress + OFS_LCDM1 + pin / 2) &= 0xF0;
|
||||
HWREG8(baseAddress + OFS_LCDM1 + pin / 2) |= (value & 0xF);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
//5-mux, 6-mux, 7-mux, 8-mux
|
||||
HWREG8(baseAddress + OFS_LCDM1 + pin) = value;
|
||||
}
|
||||
}
|
||||
|
||||
void LCD_C_setBlinkingMemory(uint16_t baseAddress,
|
||||
uint8_t pin,
|
||||
uint8_t value)
|
||||
{
|
||||
uint8_t muxRate = HWREG16(baseAddress + OFS_LCDCCTL0)
|
||||
& (LCDMX2 | LCDMX1 | LCDMX0);
|
||||
|
||||
// static, 2-mux, 3-mux, 4-mux
|
||||
if(muxRate <= (LCDMX1 | LCDMX0))
|
||||
{
|
||||
if(pin & 1)
|
||||
{
|
||||
HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) &= 0x0F;
|
||||
HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) |= (value & 0xF) << 4;
|
||||
}
|
||||
else
|
||||
{
|
||||
HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) &= 0xF0;
|
||||
HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) |= (value & 0xF);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
//5-mux, 6-mux, 7-mux, 8-mux
|
||||
HWREG8(baseAddress + OFS_LCDBM1 + pin) = value;
|
||||
}
|
||||
}
|
||||
|
||||
void LCD_C_configChargePump(uint16_t baseAddress,
|
||||
uint16_t syncToClock,
|
||||
uint16_t functionControl)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_LCDCCPCTL) &= ~(LCDCPCLKSYNC);
|
||||
HWREG16(baseAddress + OFS_LCDCCPCTL) &= ~(LCDCPDIS7 | LCDCPDIS6 | LCDCPDIS5
|
||||
| LCDCPDIS4 | LCDCPDIS3 |
|
||||
LCDCPDIS2 | LCDCPDIS1 |
|
||||
LCDCPDIS0);
|
||||
|
||||
HWREG16(baseAddress + OFS_LCDCCPCTL) |= syncToClock | functionControl;
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for lcd_c_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,360 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// mpu.c - Driver for the mpu Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup mpu_api mpu
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_MPU__
|
||||
#include "mpu.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following value is used by createTwoSegments, createThreeSegments to
|
||||
// check the user has passed a valid segmentation value. This value was
|
||||
// obtained from the User's Guide.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MPU_MAX_SEG_VALUE 0x13C1
|
||||
|
||||
void MPU_initTwoSegments(uint16_t baseAddress,
|
||||
uint16_t seg1boundary,
|
||||
uint8_t seg1accmask,
|
||||
uint8_t seg2accmask)
|
||||
{
|
||||
// Write MPU password to allow MPU register configuration
|
||||
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(
|
||||
baseAddress + OFS_MPUCTL0);
|
||||
|
||||
// Create two memory segmentations
|
||||
HWREG16(baseAddress + OFS_MPUSEGB1) = seg1boundary;
|
||||
HWREG16(baseAddress + OFS_MPUSEGB2) = seg1boundary;
|
||||
|
||||
// Set access rights based on user's selection for segment1
|
||||
switch(seg1accmask)
|
||||
{
|
||||
case MPU_EXEC | MPU_READ:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG1WE;
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1XE + MPUSEG1RE;
|
||||
break;
|
||||
case MPU_READ | MPU_WRITE:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG1XE;
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1RE + MPUSEG1WE;
|
||||
break;
|
||||
case MPU_READ:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG1XE + MPUSEG1WE);
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1RE;
|
||||
break;
|
||||
case MPU_EXEC | MPU_READ | MPU_WRITE:
|
||||
HWREG16(baseAddress +
|
||||
OFS_MPUSAM) |= (MPUSEG1XE + MPUSEG1WE + MPUSEG1RE);
|
||||
break;
|
||||
case MPU_NO_READ_WRITE_EXEC:
|
||||
HWREG16(baseAddress +
|
||||
OFS_MPUSAM) &= ~(MPUSEG1XE + MPUSEG1WE + MPUSEG1RE);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
// Set access rights based on user's selection for segment2
|
||||
switch(seg2accmask)
|
||||
{
|
||||
case MPU_EXEC | MPU_READ:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3WE + MPUSEG2WE);
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3XE + MPUSEG3RE +
|
||||
MPUSEG2XE + MPUSEG2RE;
|
||||
break;
|
||||
case MPU_READ | MPU_WRITE:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3XE + MPUSEG2XE);
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3RE + MPUSEG3WE +
|
||||
MPUSEG2RE + MPUSEG2WE;
|
||||
break;
|
||||
case MPU_READ:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3XE + MPUSEG3WE +
|
||||
MPUSEG2XE + MPUSEG2WE);
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3RE + MPUSEG2RE;
|
||||
break;
|
||||
case MPU_EXEC | MPU_READ | MPU_WRITE:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= (MPUSEG3XE + MPUSEG3WE +
|
||||
MPUSEG3RE + MPUSEG2XE +
|
||||
MPUSEG2WE + MPUSEG2RE);
|
||||
break;
|
||||
case MPU_NO_READ_WRITE_EXEC:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3XE + MPUSEG3WE +
|
||||
MPUSEG3RE + MPUSEG2XE +
|
||||
MPUSEG2WE + MPUSEG2RE);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
//Lock MPU to disable writing to all registers
|
||||
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
void MPU_initThreeSegments(uint16_t baseAddress,
|
||||
MPU_initThreeSegmentsParam *param)
|
||||
{
|
||||
// Write MPU password to allow MPU register configuration
|
||||
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(
|
||||
baseAddress + OFS_MPUCTL0);
|
||||
|
||||
// Create two memory segmentations
|
||||
HWREG16(baseAddress + OFS_MPUSEGB1) = param->seg1boundary;
|
||||
HWREG16(baseAddress + OFS_MPUSEGB2) = param->seg2boundary;
|
||||
|
||||
// Set access rights based on user's selection for segment1
|
||||
switch(param->seg1accmask)
|
||||
{
|
||||
case MPU_EXEC | MPU_READ:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG1WE;
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1XE + MPUSEG1RE;
|
||||
break;
|
||||
case MPU_READ | MPU_WRITE:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG1XE;
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1RE + MPUSEG1WE;
|
||||
break;
|
||||
case MPU_READ:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG1XE + MPUSEG1WE);
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1RE;
|
||||
break;
|
||||
case MPU_EXEC | MPU_READ | MPU_WRITE:
|
||||
HWREG16(baseAddress +
|
||||
OFS_MPUSAM) |= (MPUSEG1XE + MPUSEG1WE + MPUSEG1RE);
|
||||
break;
|
||||
case MPU_NO_READ_WRITE_EXEC:
|
||||
HWREG16(baseAddress +
|
||||
OFS_MPUSAM) &= ~(MPUSEG1XE + MPUSEG1WE + MPUSEG1RE);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
// Set access rights based on user's selection for segment2
|
||||
switch(param->seg2accmask)
|
||||
{
|
||||
case MPU_EXEC | MPU_READ:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG2WE;
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG2XE + MPUSEG2RE;
|
||||
break;
|
||||
case MPU_READ | MPU_WRITE:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG2XE;
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG2RE + MPUSEG2WE;
|
||||
break;
|
||||
case MPU_READ:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG2XE + MPUSEG2WE);
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG2RE;
|
||||
break;
|
||||
case MPU_EXEC | MPU_READ | MPU_WRITE:
|
||||
HWREG16(baseAddress +
|
||||
OFS_MPUSAM) |= (MPUSEG2XE + MPUSEG2WE + MPUSEG2RE);
|
||||
break;
|
||||
case MPU_NO_READ_WRITE_EXEC:
|
||||
HWREG16(baseAddress +
|
||||
OFS_MPUSAM) &= ~(MPUSEG2XE + MPUSEG2WE + MPUSEG2RE);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
// Set access rights based on user's selection for segment3
|
||||
switch(param->seg3accmask)
|
||||
{
|
||||
case MPU_EXEC | MPU_READ:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG3WE;
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3XE + MPUSEG3RE;
|
||||
break;
|
||||
case MPU_READ | MPU_WRITE:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG3XE;
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3RE + MPUSEG3WE;
|
||||
break;
|
||||
case MPU_READ:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3XE + MPUSEG3WE);
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3RE;
|
||||
break;
|
||||
case MPU_EXEC | MPU_READ | MPU_WRITE:
|
||||
HWREG16(baseAddress +
|
||||
OFS_MPUSAM) |= (MPUSEG3XE + MPUSEG3WE + MPUSEG3WE);
|
||||
break;
|
||||
case MPU_NO_READ_WRITE_EXEC:
|
||||
HWREG16(baseAddress +
|
||||
OFS_MPUSAM) &= ~(MPUSEG3XE + MPUSEG3WE + MPUSEG3WE);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
//Lock MPU to disable writing to all registers
|
||||
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
void MPU_initInfoSegment(uint16_t baseAddress,
|
||||
uint8_t accmask)
|
||||
{
|
||||
// Write MPU password to allow MPU register configuration
|
||||
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(
|
||||
baseAddress + OFS_MPUCTL0);
|
||||
|
||||
// Set access rights based on user's selection for segment1
|
||||
switch(accmask)
|
||||
{
|
||||
case MPU_EXEC | MPU_READ:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEGIWE;
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEGIXE + MPUSEGIRE;
|
||||
break;
|
||||
case MPU_READ | MPU_WRITE:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEGIXE;
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEGIRE + MPUSEGIWE;
|
||||
break;
|
||||
case MPU_READ:
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEGIXE + MPUSEGIWE);
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEGIRE;
|
||||
break;
|
||||
case MPU_EXEC | MPU_READ | MPU_WRITE:
|
||||
HWREG16(baseAddress +
|
||||
OFS_MPUSAM) |= (MPUSEGIXE + MPUSEGIWE + MPUSEGIRE);
|
||||
break;
|
||||
case MPU_NO_READ_WRITE_EXEC:
|
||||
HWREG16(baseAddress +
|
||||
OFS_MPUSAM) &= ~(MPUSEGIXE + MPUSEGIWE + MPUSEGIRE);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
//Lock MPU to disable writing to all registers
|
||||
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
void MPU_enableNMIevent(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | MPUSEGIE |
|
||||
HWREG8(baseAddress + OFS_MPUCTL0);
|
||||
|
||||
//Lock MPU to disable writing to all registers
|
||||
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
void MPU_start(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | MPUENA | HWREG8(
|
||||
baseAddress + OFS_MPUCTL0);
|
||||
|
||||
//Lock MPU to disable writing to all registers
|
||||
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
void MPU_enablePUCOnViolation(uint16_t baseAddress,
|
||||
uint16_t segment)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(
|
||||
baseAddress + OFS_MPUCTL0);
|
||||
HWREG16(baseAddress + OFS_MPUSAM) |= segment;
|
||||
|
||||
//Lock MPU to disable writing to all registers
|
||||
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
void MPU_disablePUCOnViolation(uint16_t baseAddress,
|
||||
uint16_t segment)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(
|
||||
baseAddress + OFS_MPUCTL0);
|
||||
HWREG16(baseAddress + OFS_MPUSAM) &= ~segment;
|
||||
|
||||
//Lock MPU to disable writing to all registers
|
||||
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
uint16_t MPU_getInterruptStatus(uint16_t baseAddress,
|
||||
uint16_t memAccFlag)
|
||||
{
|
||||
return (HWREG16(baseAddress + OFS_MPUCTL1) & memAccFlag);
|
||||
}
|
||||
|
||||
uint16_t MPU_clearInterrupt(uint16_t baseAddress,
|
||||
uint16_t memAccFlag)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(
|
||||
baseAddress + OFS_MPUCTL0);
|
||||
HWREG16(baseAddress + OFS_MPUCTL1) &= ~memAccFlag;
|
||||
|
||||
//Lock MPU to disable writing to all registers
|
||||
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
|
||||
|
||||
return (HWREG16(baseAddress + OFS_MPUCTL1) & memAccFlag);
|
||||
}
|
||||
|
||||
uint16_t MPU_clearAllInterrupts(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(
|
||||
baseAddress + OFS_MPUCTL0);
|
||||
HWREG16(baseAddress +
|
||||
OFS_MPUCTL1) &= ~(MPUSEG1IFG + MPUSEG2IFG + MPUSEG3IFG);
|
||||
|
||||
//Lock MPU to disable writing to all registers
|
||||
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
|
||||
|
||||
return (HWREG16(baseAddress +
|
||||
OFS_MPUCTL1) & (MPUSEG1IFG + MPUSEG2IFG + MPUSEG3IFG));
|
||||
}
|
||||
|
||||
void MPU_lockMPU(uint16_t baseAddress)
|
||||
{
|
||||
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | MPULOCK |
|
||||
HWREG8(baseAddress + OFS_MPUCTL0);
|
||||
|
||||
//Lock MPU to disable writing to all registers
|
||||
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for mpu_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,423 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// mpu.h - Driver for the MPU Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __MSP430WARE_MPU_H__
|
||||
#define __MSP430WARE_MPU_H__
|
||||
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_MPU__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Used in the MPU_initThreeSegments() function as the param parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct MPU_initThreeSegmentsParam
|
||||
{
|
||||
//! Valid values can be found in the Family User's Guide
|
||||
uint16_t seg1boundary;
|
||||
//! Valid values can be found in the Family User's Guide
|
||||
uint16_t seg2boundary;
|
||||
//! Is the bit mask of access right for memory segment 1.
|
||||
//! \n Logical OR of any of the following:
|
||||
//! - \b MPU_READ
|
||||
//! - \b MPU_WRITE
|
||||
//! - \b MPU_EXEC
|
||||
//! - \b MPU_NO_READ_WRITE_EXEC
|
||||
uint8_t seg1accmask;
|
||||
//! Is the bit mask of access right for memory segment 2.
|
||||
//! \n Logical OR of any of the following:
|
||||
//! - \b MPU_READ
|
||||
//! - \b MPU_WRITE
|
||||
//! - \b MPU_EXEC
|
||||
//! - \b MPU_NO_READ_WRITE_EXEC
|
||||
uint8_t seg2accmask;
|
||||
//! Is the bit mask of access right for memory segment 3.
|
||||
//! \n Logical OR of any of the following:
|
||||
//! - \b MPU_READ
|
||||
//! - \b MPU_WRITE
|
||||
//! - \b MPU_EXEC
|
||||
//! - \b MPU_NO_READ_WRITE_EXEC
|
||||
uint8_t seg3accmask;
|
||||
} MPU_initThreeSegmentsParam;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the accmask parameter for
|
||||
// functions: MPU_initInfoSegment(); the seg2accmask parameter for functions:
|
||||
// MPU_initTwoSegments(); the seg1accmask parameter for functions:
|
||||
// MPU_initTwoSegments(); the param parameter for functions:
|
||||
// MPU_initThreeSegments(), MPU_initThreeSegments(), and
|
||||
// MPU_initThreeSegments().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MPU_READ MPUSEG1RE
|
||||
#define MPU_WRITE MPUSEG1WE
|
||||
#define MPU_EXEC MPUSEG1XE
|
||||
#define MPU_NO_READ_WRITE_EXEC (0x0000)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the segment parameter for
|
||||
// functions: MPU_enablePUCOnViolation(), and MPU_disablePUCOnViolation().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MPU_FIRST_SEG MPUSEG1VS
|
||||
#define MPU_SECOND_SEG MPUSEG2VS
|
||||
#define MPU_THIRD_SEG MPUSEG3VS
|
||||
#define MPU_INFO_SEG MPUSEGIVS
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the memAccFlag parameter for
|
||||
// functions: MPU_getInterruptStatus(), and MPU_clearInterrupt() as well as
|
||||
// returned by the MPU_getInterruptStatus() function, the
|
||||
// MPU_clearAllInterrupts() function and the MPU_clearInterrupt() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MPU_SEG_1_ACCESS_VIOLATION MPUSEG1IFG
|
||||
#define MPU_SEG_2_ACCESS_VIOLATION MPUSEG2IFG
|
||||
#define MPU_SEG_3_ACCESS_VIOLATION MPUSEG3IFG
|
||||
#define MPU_SEG_INFO_ACCESS_VIOLATION MPUSEGIIFG
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Initializes MPU with two memory segments
|
||||
//!
|
||||
//! This function creates two memory segments in FRAM allowing the user to set
|
||||
//! access right to each segment. To set the correct value for seg1boundary,
|
||||
//! the user must consult the Device Family User's Guide and provide the MPUSBx
|
||||
//! value corresponding to the memory address where the user wants to create
|
||||
//! the partition. Consult the "Segment Border Setting" section in the User's
|
||||
//! Guide to find the options available for MPUSBx.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the MPU module.
|
||||
//! \param seg1boundary Valid values can be found in the Family User's Guide
|
||||
//! \param seg1accmask is the bit mask of access right for memory segment 1.
|
||||
//! Mask value is the logical OR of any of the following:
|
||||
//! - \b MPU_READ - Read rights
|
||||
//! - \b MPU_WRITE - Write rights
|
||||
//! - \b MPU_EXEC - Execute rights
|
||||
//! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
|
||||
//! \param seg2accmask is the bit mask of access right for memory segment 2
|
||||
//! Mask value is the logical OR of any of the following:
|
||||
//! - \b MPU_READ - Read rights
|
||||
//! - \b MPU_WRITE - Write rights
|
||||
//! - \b MPU_EXEC - Execute rights
|
||||
//! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
|
||||
//!
|
||||
//! Modified bits of \b MPUSAM register, bits of \b MPUSEG register and bits of
|
||||
//! \b MPUCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPU_initTwoSegments(uint16_t baseAddress,
|
||||
uint16_t seg1boundary,
|
||||
uint8_t seg1accmask,
|
||||
uint8_t seg2accmask);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Initializes MPU with three memory segments
|
||||
//!
|
||||
//! This function creates three memory segments in FRAM allowing the user to
|
||||
//! set access right to each segment. To set the correct value for
|
||||
//! seg1boundary, the user must consult the Device Family User's Guide and
|
||||
//! provide the MPUSBx value corresponding to the memory address where the user
|
||||
//! wants to create the partition. Consult the "Segment Border Setting" section
|
||||
//! in the User's Guide to find the options available for MPUSBx.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the MPU module.
|
||||
//! \param param is the pointer to struct for initializing three segments.
|
||||
//!
|
||||
//! Modified bits of \b MPUSAM register, bits of \b MPUSEG register and bits of
|
||||
//! \b MPUCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPU_initThreeSegments(uint16_t baseAddress,
|
||||
MPU_initThreeSegmentsParam *param);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Initializes user information memory segment
|
||||
//!
|
||||
//! This function initializes user information memory segment with specified
|
||||
//! access rights.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the MPU module.
|
||||
//! \param accmask is the bit mask of access right for user information memory
|
||||
//! segment.
|
||||
//! Mask value is the logical OR of any of the following:
|
||||
//! - \b MPU_READ - Read rights
|
||||
//! - \b MPU_WRITE - Write rights
|
||||
//! - \b MPU_EXEC - Execute rights
|
||||
//! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
|
||||
//!
|
||||
//! Modified bits of \b MPUSAM register and bits of \b MPUCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPU_initInfoSegment(uint16_t baseAddress,
|
||||
uint8_t accmask);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief The following function enables the NMI Event if a Segment violation
|
||||
//! has occurred.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the MPU module.
|
||||
//!
|
||||
//! Modified bits of \b MPUCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPU_enableNMIevent(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief The following function enables the MPU module in the device.
|
||||
//!
|
||||
//! This function needs to be called once all memory segmentation has been
|
||||
//! done. If this function is not called the MPU module will not be activated.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the MPU module.
|
||||
//!
|
||||
//! Modified bits of \b MPUCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPU_start(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief The following function enables PUC generation when an access
|
||||
//! violation has occurred on the memory segment selected by the user.
|
||||
//!
|
||||
//! Note that only specified segments for PUC generation are enabled. Other
|
||||
//! segments for PUC generation are left untouched. Users may call
|
||||
//! MPU_enablePUCOnViolation() and MPU_disablePUCOnViolation() to assure that
|
||||
//! all the bits will be set and/or cleared.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the MPU module.
|
||||
//! \param segment is the bit mask of memory segment that will generate a PUC
|
||||
//! when an access violation occurs.
|
||||
//! Mask value is the logical OR of any of the following:
|
||||
//! - \b MPU_FIRST_SEG - PUC generation on first memory segment
|
||||
//! - \b MPU_SECOND_SEG - PUC generation on second memory segment
|
||||
//! - \b MPU_THIRD_SEG - PUC generation on third memory segment
|
||||
//! - \b MPU_INFO_SEG - PUC generation on user information memory
|
||||
//! segment
|
||||
//!
|
||||
//! Modified bits of \b MPUSAM register and bits of \b MPUCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPU_enablePUCOnViolation(uint16_t baseAddress,
|
||||
uint16_t segment);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief The following function disables PUC generation when an access
|
||||
//! violation has occurred on the memory segment selected by the user.
|
||||
//!
|
||||
//! Note that only specified segments for PUC generation are disabled. Other
|
||||
//! segments for PUC generation are left untouched. Users may call
|
||||
//! MPU_enablePUCOnViolation() and MPU_disablePUCOnViolation() to assure that
|
||||
//! all the bits will be set and/or cleared.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the MPU module.
|
||||
//! \param segment is the bit mask of memory segment that will NOT generate a
|
||||
//! PUC when an access violation occurs.
|
||||
//! Mask value is the logical OR of any of the following:
|
||||
//! - \b MPU_FIRST_SEG - PUC generation on first memory segment
|
||||
//! - \b MPU_SECOND_SEG - PUC generation on second memory segment
|
||||
//! - \b MPU_THIRD_SEG - PUC generation on third memory segment
|
||||
//! - \b MPU_INFO_SEG - PUC generation on user information memory
|
||||
//! segment
|
||||
//!
|
||||
//! Modified bits of \b MPUSAM register and bits of \b MPUCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPU_disablePUCOnViolation(uint16_t baseAddress,
|
||||
uint16_t segment);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Returns the memory segment violation flag status requested by the
|
||||
//! user.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the MPU module.
|
||||
//! \param memAccFlag is the is the memory access violation flag.
|
||||
//! Mask value is the logical OR of any of the following:
|
||||
//! - \b MPU_SEG_1_ACCESS_VIOLATION - is set if an access violation in
|
||||
//! Main Memory Segment 1 is detected
|
||||
//! - \b MPU_SEG_2_ACCESS_VIOLATION - is set if an access violation in
|
||||
//! Main Memory Segment 2 is detected
|
||||
//! - \b MPU_SEG_3_ACCESS_VIOLATION - is set if an access violation in
|
||||
//! Main Memory Segment 3 is detected
|
||||
//! - \b MPU_SEG_INFO_ACCESS_VIOLATION - is set if an access violation
|
||||
//! in User Information Memory Segment is detected
|
||||
//!
|
||||
//! \return Logical OR of any of the following:
|
||||
//! - \b MPU_SEG_1_ACCESS_VIOLATION is set if an access violation in
|
||||
//! Main Memory Segment 1 is detected
|
||||
//! - \b MPU_SEG_2_ACCESS_VIOLATION is set if an access violation in
|
||||
//! Main Memory Segment 2 is detected
|
||||
//! - \b MPU_SEG_3_ACCESS_VIOLATION is set if an access violation in
|
||||
//! Main Memory Segment 3 is detected
|
||||
//! - \b MPU_SEG_INFO_ACCESS_VIOLATION is set if an access violation in
|
||||
//! User Information Memory Segment is detected
|
||||
//! \n indicating the status of the masked flags.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint16_t MPU_getInterruptStatus(uint16_t baseAddress,
|
||||
uint16_t memAccFlag);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Clears the masked interrupt flags
|
||||
//!
|
||||
//! Returns the memory segment violation flag status requested by the user or
|
||||
//! if user is providing a bit mask value, the function will return a value
|
||||
//! indicating if all flags were cleared.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the MPU module.
|
||||
//! \param memAccFlag is the is the memory access violation flag.
|
||||
//! Mask value is the logical OR of any of the following:
|
||||
//! - \b MPU_SEG_1_ACCESS_VIOLATION - is set if an access violation in
|
||||
//! Main Memory Segment 1 is detected
|
||||
//! - \b MPU_SEG_2_ACCESS_VIOLATION - is set if an access violation in
|
||||
//! Main Memory Segment 2 is detected
|
||||
//! - \b MPU_SEG_3_ACCESS_VIOLATION - is set if an access violation in
|
||||
//! Main Memory Segment 3 is detected
|
||||
//! - \b MPU_SEG_INFO_ACCESS_VIOLATION - is set if an access violation
|
||||
//! in User Information Memory Segment is detected
|
||||
//!
|
||||
//! \return Logical OR of any of the following:
|
||||
//! - \b MPU_SEG_1_ACCESS_VIOLATION is set if an access violation in
|
||||
//! Main Memory Segment 1 is detected
|
||||
//! - \b MPU_SEG_2_ACCESS_VIOLATION is set if an access violation in
|
||||
//! Main Memory Segment 2 is detected
|
||||
//! - \b MPU_SEG_3_ACCESS_VIOLATION is set if an access violation in
|
||||
//! Main Memory Segment 3 is detected
|
||||
//! - \b MPU_SEG_INFO_ACCESS_VIOLATION is set if an access violation in
|
||||
//! User Information Memory Segment is detected
|
||||
//! \n indicating the status of the masked flags.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint16_t MPU_clearInterrupt(uint16_t baseAddress,
|
||||
uint16_t memAccFlag);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Clears all Memory Segment Access Violation Interrupt Flags.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the MPU module.
|
||||
//!
|
||||
//! Modified bits of \b MPUCTL1 register.
|
||||
//!
|
||||
//! \return Logical OR of any of the following:
|
||||
//! - \b MPU_SEG_1_ACCESS_VIOLATION is set if an access violation in
|
||||
//! Main Memory Segment 1 is detected
|
||||
//! - \b MPU_SEG_2_ACCESS_VIOLATION is set if an access violation in
|
||||
//! Main Memory Segment 2 is detected
|
||||
//! - \b MPU_SEG_3_ACCESS_VIOLATION is set if an access violation in
|
||||
//! Main Memory Segment 3 is detected
|
||||
//! - \b MPU_SEG_INFO_ACCESS_VIOLATION is set if an access violation in
|
||||
//! User Information Memory Segment is detected
|
||||
//! \n indicating the status of the interrupt flags.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint16_t MPU_clearAllInterrupts(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Lock MPU to protect from write access.
|
||||
//!
|
||||
//! Sets MPULOCK to protect MPU from write access on all MPU registers except
|
||||
//! MPUCTL1, MPUIPC0 and MPUIPSEGBx until a BOR occurs. MPULOCK bit cannot be
|
||||
//! cleared manually. MPU_clearInterrupt() and MPU_clearAllInterrupts() still
|
||||
//! can be used after this API is called.
|
||||
//!
|
||||
//! \param baseAddress is the base address of the MPU module.
|
||||
//!
|
||||
//! Modified bits are \b MPULOCK of \b MPUCTL1 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPU_lockMPU(uint16_t baseAddress);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#endif // __MSP430WARE_MPU_H__
|
||||
@@ -0,0 +1,179 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// mpy32.c - Driver for the mpy32 Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup mpy32_api mpy32
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_MPY32__
|
||||
#include "mpy32.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
void MPY32_setWriteDelay(uint16_t writeDelaySelect)
|
||||
{
|
||||
HWREG16(MPY32_BASE + OFS_MPY32CTL0) &= ~(MPYDLY32 + MPYDLYWRTEN);
|
||||
HWREG16(MPY32_BASE + OFS_MPY32CTL0) |= writeDelaySelect;
|
||||
}
|
||||
|
||||
void MPY32_enableSaturationMode(void)
|
||||
{
|
||||
HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) |= MPYSAT;
|
||||
}
|
||||
|
||||
void MPY32_disableSaturationMode(void)
|
||||
{
|
||||
HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) &= ~(MPYSAT);
|
||||
}
|
||||
|
||||
uint8_t MPY32_getSaturationMode(void)
|
||||
{
|
||||
return (HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) & (MPYSAT));
|
||||
}
|
||||
|
||||
void MPY32_enableFractionalMode(void)
|
||||
{
|
||||
HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) |= MPYFRAC;
|
||||
}
|
||||
|
||||
void MPY32_disableFractionalMode(void)
|
||||
{
|
||||
HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) &= ~(MPYFRAC);
|
||||
}
|
||||
|
||||
uint8_t MPY32_getFractionalMode(void)
|
||||
{
|
||||
return (HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) & (MPYFRAC));
|
||||
}
|
||||
|
||||
void MPY32_setOperandOne8Bit(uint8_t multiplicationType,
|
||||
uint8_t operand)
|
||||
{
|
||||
HWREG8(MPY32_BASE + OFS_MPY + multiplicationType) = operand;
|
||||
}
|
||||
|
||||
void MPY32_setOperandOne16Bit(uint8_t multiplicationType,
|
||||
uint16_t operand)
|
||||
{
|
||||
HWREG16(MPY32_BASE + OFS_MPY + multiplicationType) = operand;
|
||||
}
|
||||
|
||||
void MPY32_setOperandOne24Bit(uint8_t multiplicationType,
|
||||
uint32_t operand)
|
||||
{
|
||||
multiplicationType <<= 1;
|
||||
HWREG16(MPY32_BASE + OFS_MPY32L + multiplicationType) = operand;
|
||||
HWREG8(MPY32_BASE + OFS_MPY32H + multiplicationType) = (operand >> 16);
|
||||
}
|
||||
|
||||
void MPY32_setOperandOne32Bit(uint8_t multiplicationType,
|
||||
uint32_t operand)
|
||||
{
|
||||
multiplicationType <<= 1;
|
||||
HWREG16(MPY32_BASE + OFS_MPY32L + multiplicationType) = operand;
|
||||
HWREG16(MPY32_BASE + OFS_MPY32H + multiplicationType) = (operand >> 16);
|
||||
}
|
||||
|
||||
void MPY32_setOperandTwo8Bit(uint8_t operand)
|
||||
{
|
||||
HWREG8(MPY32_BASE + OFS_OP2) = operand;
|
||||
}
|
||||
|
||||
void MPY32_setOperandTwo16Bit(uint16_t operand)
|
||||
{
|
||||
HWREG16(MPY32_BASE + OFS_OP2) = operand;
|
||||
}
|
||||
|
||||
void MPY32_setOperandTwo24Bit(uint32_t operand)
|
||||
{
|
||||
HWREG16(MPY32_BASE + OFS_OP2L) = operand;
|
||||
HWREG8(MPY32_BASE + OFS_OP2H) = (operand >> 16);
|
||||
}
|
||||
|
||||
void MPY32_setOperandTwo32Bit(uint32_t operand)
|
||||
{
|
||||
HWREG16(MPY32_BASE + OFS_OP2L) = operand;
|
||||
HWREG16(MPY32_BASE + OFS_OP2H) = (operand >> 16);
|
||||
}
|
||||
|
||||
uint64_t MPY32_getResult(void)
|
||||
{
|
||||
uint64_t result;
|
||||
|
||||
result = HWREG16(MPY32_BASE + OFS_RES0);
|
||||
result += ((uint64_t)HWREG16(MPY32_BASE + OFS_RES1) << 16);
|
||||
result += ((uint64_t)HWREG16(MPY32_BASE + OFS_RES2) << 32);
|
||||
result += ((uint64_t)HWREG16(MPY32_BASE + OFS_RES3) << 48);
|
||||
return (result);
|
||||
}
|
||||
|
||||
uint16_t MPY32_getSumExtension(void)
|
||||
{
|
||||
return (HWREG16(MPY32_BASE + OFS_SUMEXT));
|
||||
}
|
||||
|
||||
uint16_t MPY32_getCarryBitValue(void)
|
||||
{
|
||||
return (HWREG16(MPY32_BASE + OFS_MPY32CTL0) | MPYC);
|
||||
}
|
||||
|
||||
void MPY32_clearCarryBitValue(void)
|
||||
{
|
||||
HWREG16(MPY32_BASE + OFS_MPY32CTL0) &= ~MPYC;
|
||||
}
|
||||
|
||||
void MPY32_preloadResult(uint64_t result)
|
||||
{
|
||||
HWREG16(MPY32_BASE + OFS_RES0) = (result & 0xFFFF);
|
||||
HWREG16(MPY32_BASE + OFS_RES1) = ((result >> 16) & 0xFFFF);
|
||||
HWREG16(MPY32_BASE + OFS_RES2) = ((result >> 32) & 0xFFFF);
|
||||
HWREG16(MPY32_BASE + OFS_RES3) = ((result >> 48) & 0xFFFF);
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for mpy32_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,445 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// mpy32.h - Driver for the MPY32 Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __MSP430WARE_MPY32_H__
|
||||
#define __MSP430WARE_MPY32_H__
|
||||
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_MPY32__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the writeDelaySelect
|
||||
// parameter for functions: MPY32_setWriteDelay().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MPY32_WRITEDELAY_OFF (!(MPYDLY32 + MPYDLYWRTEN))
|
||||
#define MPY32_WRITEDELAY_32BIT (MPYDLYWRTEN)
|
||||
#define MPY32_WRITEDELAY_64BIT (MPYDLY32 + MPYDLYWRTEN)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the multiplicationType
|
||||
// parameter for functions: MPY32_setOperandOne8Bit(),
|
||||
// MPY32_setOperandOne16Bit(), MPY32_setOperandOne24Bit(), and
|
||||
// MPY32_setOperandOne32Bit().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MPY32_MULTIPLY_UNSIGNED (0x00)
|
||||
#define MPY32_MULTIPLY_SIGNED (0x02)
|
||||
#define MPY32_MULTIPLYACCUMULATE_UNSIGNED (0x04)
|
||||
#define MPY32_MULTIPLYACCUMULATE_SIGNED (0x06)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed toThe following are values that
|
||||
// can be returned by the MPY32_getSaturationMode() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MPY32_SATURATION_MODE_DISABLED 0x00
|
||||
#define MPY32_SATURATION_MODE_ENABLED MPYSAT
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed toThe following are values that
|
||||
// can be returned by the MPY32_getFractionalMode() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MPY32_FRACTIONAL_MODE_DISABLED 0x00
|
||||
#define MPY32_FRACTIONAL_MODE_ENABLED MPYFRAC
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets the write delay setting for the MPY32 module.
|
||||
//!
|
||||
//! This function sets up a write delay to the MPY module's registers, which
|
||||
//! holds any writes to the registers until all calculations are complete.
|
||||
//! There are two different settings, one which waits for 32-bit results to be
|
||||
//! ready, and one which waits for 64-bit results to be ready. This prevents
|
||||
//! unpredicatble results if registers are changed before the results are
|
||||
//! ready.
|
||||
//!
|
||||
//! \param writeDelaySelect delays the write to any MPY32 register until the
|
||||
//! selected bit size of result has been written.
|
||||
//! Valid values are:
|
||||
//! - \b MPY32_WRITEDELAY_OFF [Default] - writes are not delayed
|
||||
//! - \b MPY32_WRITEDELAY_32BIT - writes are delayed until a 32-bit
|
||||
//! result is available in the result registers
|
||||
//! - \b MPY32_WRITEDELAY_64BIT - writes are delayed until a 64-bit
|
||||
//! result is available in the result registers
|
||||
//! \n Modified bits are \b MPYDLY32 and \b MPYDLYWRTEN of \b MPY32CTL0
|
||||
//! register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_setWriteDelay(uint16_t writeDelaySelect);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Enables Saturation Mode.
|
||||
//!
|
||||
//! This function enables saturation mode. When this is enabled, the result
|
||||
//! read out from the MPY result registers is converted to the most-positive
|
||||
//! number in the case of an overflow, or the most-negative number in the case
|
||||
//! of an underflow. Please note, that the raw value in the registers does not
|
||||
//! reflect the result returned, and if the saturation mode is disabled, then
|
||||
//! the raw value of the registers will be returned instead.
|
||||
//!
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_enableSaturationMode(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Disables Saturation Mode.
|
||||
//!
|
||||
//! This function disables saturation mode, which allows the raw result of the
|
||||
//! MPY result registers to be returned.
|
||||
//!
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_disableSaturationMode(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Gets the Saturation Mode.
|
||||
//!
|
||||
//! This function gets the current saturation mode.
|
||||
//!
|
||||
//!
|
||||
//! \return Gets the Saturation Mode
|
||||
//! Return one of the following:
|
||||
//! - \b MPY32_SATURATION_MODE_DISABLED
|
||||
//! - \b MPY32_SATURATION_MODE_ENABLED
|
||||
//! \n Gets the Saturation Mode
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint8_t MPY32_getSaturationMode(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Enables Fraction Mode.
|
||||
//!
|
||||
//! This function enables fraction mode.
|
||||
//!
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_enableFractionalMode(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Disables Fraction Mode.
|
||||
//!
|
||||
//! This function disables fraction mode.
|
||||
//!
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_disableFractionalMode(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Gets the Fractional Mode.
|
||||
//!
|
||||
//! This function gets the current fractional mode.
|
||||
//!
|
||||
//!
|
||||
//! \return Gets the fractional mode
|
||||
//! Return one of the following:
|
||||
//! - \b MPY32_FRACTIONAL_MODE_DISABLED
|
||||
//! - \b MPY32_FRACTIONAL_MODE_ENABLED
|
||||
//! \n Gets the Fractional Mode
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint8_t MPY32_getFractionalMode(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets an 8-bit value into operand 1.
|
||||
//!
|
||||
//! This function sets the first operand for multiplication and determines what
|
||||
//! type of operation should be performed. Once the second operand is set, then
|
||||
//! the operation will begin.
|
||||
//!
|
||||
//! \param multiplicationType is the type of multiplication to perform once the
|
||||
//! second operand is set.
|
||||
//! Valid values are:
|
||||
//! - \b MPY32_MULTIPLY_UNSIGNED
|
||||
//! - \b MPY32_MULTIPLY_SIGNED
|
||||
//! - \b MPY32_MULTIPLYACCUMULATE_UNSIGNED
|
||||
//! - \b MPY32_MULTIPLYACCUMULATE_SIGNED
|
||||
//! \param operand is the 8-bit value to load into the 1st operand.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_setOperandOne8Bit(uint8_t multiplicationType,
|
||||
uint8_t operand);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets an 16-bit value into operand 1.
|
||||
//!
|
||||
//! This function sets the first operand for multiplication and determines what
|
||||
//! type of operation should be performed. Once the second operand is set, then
|
||||
//! the operation will begin.
|
||||
//!
|
||||
//! \param multiplicationType is the type of multiplication to perform once the
|
||||
//! second operand is set.
|
||||
//! Valid values are:
|
||||
//! - \b MPY32_MULTIPLY_UNSIGNED
|
||||
//! - \b MPY32_MULTIPLY_SIGNED
|
||||
//! - \b MPY32_MULTIPLYACCUMULATE_UNSIGNED
|
||||
//! - \b MPY32_MULTIPLYACCUMULATE_SIGNED
|
||||
//! \param operand is the 16-bit value to load into the 1st operand.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_setOperandOne16Bit(uint8_t multiplicationType,
|
||||
uint16_t operand);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets an 24-bit value into operand 1.
|
||||
//!
|
||||
//! This function sets the first operand for multiplication and determines what
|
||||
//! type of operation should be performed. Once the second operand is set, then
|
||||
//! the operation will begin.
|
||||
//!
|
||||
//! \param multiplicationType is the type of multiplication to perform once the
|
||||
//! second operand is set.
|
||||
//! Valid values are:
|
||||
//! - \b MPY32_MULTIPLY_UNSIGNED
|
||||
//! - \b MPY32_MULTIPLY_SIGNED
|
||||
//! - \b MPY32_MULTIPLYACCUMULATE_UNSIGNED
|
||||
//! - \b MPY32_MULTIPLYACCUMULATE_SIGNED
|
||||
//! \param operand is the 24-bit value to load into the 1st operand.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_setOperandOne24Bit(uint8_t multiplicationType,
|
||||
uint32_t operand);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets an 32-bit value into operand 1.
|
||||
//!
|
||||
//! This function sets the first operand for multiplication and determines what
|
||||
//! type of operation should be performed. Once the second operand is set, then
|
||||
//! the operation will begin.
|
||||
//!
|
||||
//! \param multiplicationType is the type of multiplication to perform once the
|
||||
//! second operand is set.
|
||||
//! Valid values are:
|
||||
//! - \b MPY32_MULTIPLY_UNSIGNED
|
||||
//! - \b MPY32_MULTIPLY_SIGNED
|
||||
//! - \b MPY32_MULTIPLYACCUMULATE_UNSIGNED
|
||||
//! - \b MPY32_MULTIPLYACCUMULATE_SIGNED
|
||||
//! \param operand is the 32-bit value to load into the 1st operand.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_setOperandOne32Bit(uint8_t multiplicationType,
|
||||
uint32_t operand);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets an 8-bit value into operand 2, which starts the multiplication.
|
||||
//!
|
||||
//! This function sets the second operand of the multiplication operation and
|
||||
//! starts the operation.
|
||||
//!
|
||||
//! \param operand is the 8-bit value to load into the 2nd operand.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_setOperandTwo8Bit(uint8_t operand);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets an 16-bit value into operand 2, which starts the
|
||||
//! multiplication.
|
||||
//!
|
||||
//! This function sets the second operand of the multiplication operation and
|
||||
//! starts the operation.
|
||||
//!
|
||||
//! \param operand is the 16-bit value to load into the 2nd operand.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_setOperandTwo16Bit(uint16_t operand);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets an 24-bit value into operand 2, which starts the
|
||||
//! multiplication.
|
||||
//!
|
||||
//! This function sets the second operand of the multiplication operation and
|
||||
//! starts the operation.
|
||||
//!
|
||||
//! \param operand is the 24-bit value to load into the 2nd operand.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_setOperandTwo24Bit(uint32_t operand);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets an 32-bit value into operand 2, which starts the
|
||||
//! multiplication.
|
||||
//!
|
||||
//! This function sets the second operand of the multiplication operation and
|
||||
//! starts the operation.
|
||||
//!
|
||||
//! \param operand is the 32-bit value to load into the 2nd operand.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_setOperandTwo32Bit(uint32_t operand);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Returns an 64-bit result of the last multiplication operation.
|
||||
//!
|
||||
//! This function returns all 64 bits of the result registers
|
||||
//!
|
||||
//!
|
||||
//! \return The 64-bit result is returned as a uint64_t type
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint64_t MPY32_getResult(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Returns the Sum Extension of the last multiplication operation.
|
||||
//!
|
||||
//! This function returns the Sum Extension of the MPY module, which either
|
||||
//! gives the sign after a signed operation or shows a carry after a multiply-
|
||||
//! and-accumulate operation. The Sum Extension acts as a check for overflows
|
||||
//! or underflows.
|
||||
//!
|
||||
//!
|
||||
//! \return The value of the MPY32 module Sum Extension.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint16_t MPY32_getSumExtension(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Returns the Carry Bit of the last multiplication operation.
|
||||
//!
|
||||
//! This function returns the Carry Bit of the MPY module, which either gives
|
||||
//! the sign after a signed operation or shows a carry after a multiply- and-
|
||||
//! accumulate operation.
|
||||
//!
|
||||
//!
|
||||
//! \return The value of the MPY32 module Carry Bit 0x0 or 0x1.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint16_t MPY32_getCarryBitValue(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Clears the Carry Bit of the last multiplication operation.
|
||||
//!
|
||||
//! This function clears the Carry Bit of the MPY module
|
||||
//!
|
||||
//!
|
||||
//! \return The value of the MPY32 module Carry Bit 0x0 or 0x1.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_clearCarryBitValue(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Preloads the result register
|
||||
//!
|
||||
//! This function Preloads the result register
|
||||
//!
|
||||
//! \param result value to preload the result register to
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPY32_preloadResult(uint64_t result);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#endif // __MSP430WARE_MPY32_H__
|
||||
@@ -0,0 +1,132 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// pmm.c - Driver for the pmm Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup pmm_api pmm
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_PMM_FRAM__
|
||||
#include "pmm.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
void PMM_enableLowPowerReset(void)
|
||||
{
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0) |= PMMLPRST;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
void PMM_disableLowPowerReset(void)
|
||||
{
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0) &= ~PMMLPRST;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
void PMM_enableSVSH(void)
|
||||
{
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_L) |= SVSHE;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
void PMM_disableSVSH(void)
|
||||
{
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_L) &= ~SVSHE;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
void PMM_turnOnRegulator(void)
|
||||
{
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0) &= ~PMMREGOFF;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
void PMM_turnOffRegulator(void)
|
||||
{
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0) |= PMMREGOFF;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
void PMM_trigPOR(void)
|
||||
{
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0) |= PMMSWPOR;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
void PMM_trigBOR(void)
|
||||
{
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0) |= PMMSWBOR;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
void PMM_clearInterrupt(uint16_t mask)
|
||||
{
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
|
||||
HWREG16(PMM_BASE + OFS_PMMIFG) &= ~mask;
|
||||
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
|
||||
}
|
||||
|
||||
uint16_t PMM_getInterruptStatus(uint16_t mask)
|
||||
{
|
||||
return ((HWREG16(PMM_BASE + OFS_PMMIFG)) & mask);
|
||||
}
|
||||
|
||||
void PMM_unlockLPM5(void)
|
||||
{
|
||||
HWREG8(PMM_BASE + OFS_PM5CTL0) &= ~LOCKLPM5;
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for pmm_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,244 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// pmm.h - Driver for the PMM Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __MSP430WARE_PMM_H__
|
||||
#define __MSP430WARE_PMM_H__
|
||||
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_PMM_FRAM__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the mask parameter for
|
||||
// functions: PMM_clearInterrupt(), and PMM_getInterruptStatus() as well as
|
||||
// returned by the PMM_getInterruptStatus() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define PMM_BOR_INTERRUPT PMMBORIFG
|
||||
#define PMM_RST_INTERRUPT PMMRSTIFG
|
||||
#define PMM_POR_INTERRUPT PMMPORIFG
|
||||
#define PMM_SVSH_INTERRUPT SVSHIFG
|
||||
#define PMM_LPM5_INTERRUPT PMMLPM5IFG
|
||||
#define PMM_ALL (0xA7)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Enables the low power reset. SVSH does not reset device, but
|
||||
//! triggers a system NMI
|
||||
//!
|
||||
//!
|
||||
//! Modified bits of \b PMMCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void PMM_enableLowPowerReset(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Disables the low power reset. SVSH resets device.
|
||||
//!
|
||||
//!
|
||||
//! Modified bits of \b PMMCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void PMM_disableLowPowerReset(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Enables the high-side SVS circuitry
|
||||
//!
|
||||
//!
|
||||
//! Modified bits of \b PMMCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void PMM_enableSVSH(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Disables the high-side SVS circuitry
|
||||
//!
|
||||
//!
|
||||
//! Modified bits of \b PMMCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void PMM_disableSVSH(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Makes the low-dropout voltage regulator (LDO) remain ON when going
|
||||
//! into LPM 3/4.
|
||||
//!
|
||||
//!
|
||||
//! Modified bits of \b PMMCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void PMM_turnOnRegulator(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Turns OFF the low-dropout voltage regulator (LDO) when going into
|
||||
//! LPM3/4, thus the system will enter LPM3.5 or LPM4.5 respectively
|
||||
//!
|
||||
//!
|
||||
//! Modified bits of \b PMMCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void PMM_turnOffRegulator(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Calling this function will trigger a software Power On Reset (POR).
|
||||
//!
|
||||
//!
|
||||
//! Modified bits of \b PMMCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void PMM_trigPOR(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Calling this function will trigger a software Brown Out Rest (BOR).
|
||||
//!
|
||||
//!
|
||||
//! Modified bits of \b PMMCTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void PMM_trigBOR(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Clears interrupt flags for the PMM
|
||||
//!
|
||||
//! \param mask is the mask for specifying the required flag
|
||||
//! Mask value is the logical OR of any of the following:
|
||||
//! - \b PMM_BOR_INTERRUPT - Software BOR interrupt
|
||||
//! - \b PMM_RST_INTERRUPT - RESET pin interrupt
|
||||
//! - \b PMM_POR_INTERRUPT - Software POR interrupt
|
||||
//! - \b PMM_SVSH_INTERRUPT - SVS high side interrupt
|
||||
//! - \b PMM_LPM5_INTERRUPT - LPM5 indication
|
||||
//! - \b PMM_ALL - All interrupts
|
||||
//!
|
||||
//! Modified bits of \b PMMCTL0 register and bits of \b PMMIFG register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void PMM_clearInterrupt(uint16_t mask);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Returns interrupt status
|
||||
//!
|
||||
//! \param mask is the mask for specifying the required flag
|
||||
//! Mask value is the logical OR of any of the following:
|
||||
//! - \b PMM_BOR_INTERRUPT - Software BOR interrupt
|
||||
//! - \b PMM_RST_INTERRUPT - RESET pin interrupt
|
||||
//! - \b PMM_POR_INTERRUPT - Software POR interrupt
|
||||
//! - \b PMM_SVSH_INTERRUPT - SVS high side interrupt
|
||||
//! - \b PMM_LPM5_INTERRUPT - LPM5 indication
|
||||
//! - \b PMM_ALL - All interrupts
|
||||
//!
|
||||
//! \return Logical OR of any of the following:
|
||||
//! - \b PMM_BOR_INTERRUPT Software BOR interrupt
|
||||
//! - \b PMM_RST_INTERRUPT RESET pin interrupt
|
||||
//! - \b PMM_POR_INTERRUPT Software POR interrupt
|
||||
//! - \b PMM_SVSH_INTERRUPT SVS high side interrupt
|
||||
//! - \b PMM_LPM5_INTERRUPT LPM5 indication
|
||||
//! - \b PMM_ALL All interrupts
|
||||
//! \n indicating the status of the selected interrupt flags
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint16_t PMM_getInterruptStatus(uint16_t mask);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Unlock LPM5
|
||||
//!
|
||||
//! LPMx.5 configuration is not locked and defaults to its reset condition.
|
||||
//! Disable the GPIO power-on default high-impedance mode to activate
|
||||
//! previously configured port settings.
|
||||
//!
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void PMM_unlockLPM5(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#endif // __MSP430WARE_PMM_H__
|
||||
@@ -0,0 +1,74 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2014, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
//*****************************************************************************
|
||||
//
|
||||
// ram.c - Driver for the ram Module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup ram_api ram
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_regaccess.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
|
||||
#ifdef __MSP430_HAS_RC_FRAM__
|
||||
#include "ram.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
void RAM_setSectorOff(uint8_t sector,
|
||||
uint8_t mode)
|
||||
{
|
||||
uint8_t sectorPos = sector << 1;
|
||||
uint8_t val = HWREG8(RAM_BASE + OFS_RCCTL0_L) & ~(0x3 << sectorPos);
|
||||
|
||||
HWREG16(RAM_BASE + OFS_RCCTL0) = (RCKEY | val | (mode << sectorPos));
|
||||
}
|
||||
|
||||
uint8_t RAM_getSectorState(uint8_t sector)
|
||||
{
|
||||
uint8_t sectorPos = sector << 1;
|
||||
return((HWREG8(RAM_BASE + OFS_RCCTL0_L) & (0x3 << sectorPos)) >> sectorPos);
|
||||
}
|
||||
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Close the doxygen group for ram_api
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user