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Final V8.2.1 release ready for tagging:
+ Added MSP432 (ARM Cortex-M4F MSP430!) demos for IAR, Keil and CCS. + Renamed directory containing demo for STM32F7 ARM Cortex-M7. + Renamed directory containing demo for SAMV71 ARM Cortex-M7. + Introduced xTaskNotifyAndQuery().
This commit is contained in:
Richard Barry
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@@ -0,0 +1,227 @@
|
||||
/*
|
||||
FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
***NOTE*** The exception to the GPL is included to allow you to distribute
|
||||
a combined work that includes FreeRTOS without being obliged to provide the
|
||||
source code for proprietary components outside of the FreeRTOS kernel.
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details. You should have received a copy of the GNU General Public
|
||||
License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
by writing to Richard Barry, contact details for whom are available on the
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||
contact details.
|
||||
|
||||
http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||
critical systems.
|
||||
|
||||
http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||
licensing and training services.
|
||||
*/
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
See http://www.freertos.org/a00110.html for an explanation of the
|
||||
definitions contained in this file.
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
|
||||
/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,
|
||||
or 0 to run the more comprehensive test and demo application.
|
||||
|
||||
The comprehensive demo uses FreeRTOS+CLI to create a simple command line
|
||||
interface through a UART.
|
||||
|
||||
The blinky demo uses FreeRTOS's tickless idle mode to reduce power consumption.
|
||||
See the notes on the web page below regarding the difference in power saving
|
||||
that can be achieved between using the generic tickless implementation (as used
|
||||
by the blinky demo) and a tickless implementation that is tailored specifically
|
||||
to the MSP432.
|
||||
|
||||
See http://www.FreeRTOS.org/TI_MSP432_Free_RTOS_Demo.html for instructions. */
|
||||
#define configCREATE_SIMPLE_TICKLESS_DEMO 0
|
||||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||
* http://www.freertos.org/a00110.html
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/* Constants related to the behaviour or the scheduler. */
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_TIME_SLICING 1
|
||||
#define configMAX_PRIORITIES ( 5 )
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configUSE_16_BIT_TICKS 0 /* Only for 8 and 16-bit hardware. */
|
||||
|
||||
/* Constants that describe the hardware and memory usage. */
|
||||
#define configCPU_CLOCK_HZ MAP_CS_getMCLK()
|
||||
#define configMINIMAL_STACK_SIZE ( ( uint16_t ) 100 )
|
||||
#define configMAX_TASK_NAME_LEN ( 12 )
|
||||
|
||||
/* Note heap_5.c is used so this only defines the part of the heap that is in
|
||||
the first block of RAM on the LPC device. See the initialisation of the heap
|
||||
in main.c. */
|
||||
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 50 * 1024 ) )
|
||||
|
||||
/* Constants that build features in or out. */
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configUSE_TICKLESS_IDLE 1
|
||||
#define configUSE_APPLICATION_TASK_TAG 0
|
||||
#define configUSE_NEWLIB_REENTRANT 0
|
||||
#define configUSE_CO_ROUTINES 0
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_QUEUE_SETS 0
|
||||
#define configUSE_TASK_NOTIFICATIONS 1
|
||||
|
||||
/* Constants that define which hook (callback) functions should be used. */
|
||||
#define configUSE_IDLE_HOOK 1
|
||||
#define configUSE_TICK_HOOK 1
|
||||
#define configUSE_MALLOC_FAILED_HOOK 1
|
||||
|
||||
/* Constants provided for debugging and optimisation assistance. */
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
|
||||
#define configQUEUE_REGISTRY_SIZE 0
|
||||
|
||||
/* Software timer definitions. */
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY ( 3 )
|
||||
#define configTIMER_QUEUE_LENGTH 5
|
||||
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE )
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
to exclude the API function. NOTE: Setting an INCLUDE_ parameter to 0 is only
|
||||
necessary if the linker does not automatically remove functions that are not
|
||||
referenced anyway. */
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 0
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 0
|
||||
#define INCLUDE_pcTaskGetTaskName 1
|
||||
#define INCLUDE_xTaskGetIdleTaskHandle 0
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
#define INCLUDE_xTaskResumeFromISR 0
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 0
|
||||
#define INCLUDE_xSemaphoreGetMutexHolder 0
|
||||
#define INCLUDE_xTimerPendFunctionCall 1
|
||||
|
||||
/* This demo makes use of one or more example stats formatting functions. These
|
||||
format the raw data provided by the uxTaskGetSystemState() function in to human
|
||||
readable ASCII form. See the notes in the implementation of vTaskList() within
|
||||
FreeRTOS/Source/tasks.c for limitations. */
|
||||
#define configUSE_STATS_FORMATTING_FUNCTIONS 1
|
||||
|
||||
/* Dimensions a buffer that can be used by the FreeRTOS+CLI command
|
||||
interpreter. See the FreeRTOS+CLI documentation for more information:
|
||||
http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_CLI/ */
|
||||
#define configCOMMAND_INT_MAX_OUTPUT_SIZE 2048
|
||||
|
||||
|
||||
/* Cortex-M3/4 interrupt priority configuration follows...................... */
|
||||
|
||||
/* Use the system definition, if there is one. */
|
||||
#ifdef __NVIC_PRIO_BITS
|
||||
#define configPRIO_BITS __NVIC_PRIO_BITS
|
||||
#else
|
||||
#define configPRIO_BITS 3 /* 8 priority levels */
|
||||
#endif
|
||||
|
||||
/* The lowest interrupt priority that can be used in a call to a "set priority"
|
||||
function. */
|
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x07
|
||||
|
||||
/* The highest interrupt priority that can be used by any interrupt service
|
||||
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
|
||||
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
|
||||
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
|
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
|
||||
|
||||
/* Interrupt priorities used by the kernel port layer itself. These are generic
|
||||
to all Cortex-M ports, and do not rely on any particular library functions. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
|
||||
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
|
||||
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
|
||||
standard names - can't be used with CCS due to limitations in the assemblers
|
||||
pre-processing. */
|
||||
#ifndef __TI_COMPILER_VERSION__
|
||||
#define xPortPendSVHandler PendSV_Handler
|
||||
#define vPortSVCHandler SVC_Handler
|
||||
#define xPortSysTickHandler SysTick_Handler
|
||||
#endif
|
||||
|
||||
/* The trace facility is turned on to make some functions available for use in
|
||||
CLI commands. */
|
||||
#define configUSE_TRACE_FACILITY 1
|
||||
|
||||
/* Some board specifics. The LED is on P1.0, configure the pin as output. */
|
||||
#define configTOGGLE_LED() GPIO_toggleOutputOnPin( GPIO_PORT_P1, GPIO_PIN0 )
|
||||
|
||||
/* The #ifdef guards against the file being included from IAR assembly files. */
|
||||
#ifndef __IASMARM__
|
||||
|
||||
/* TI driver library includes. */
|
||||
#include <driverlib.h>
|
||||
|
||||
void vPreSleepProcessing( uint32_t ulExpectedIdleTime );
|
||||
#define configPRE_SLEEP_PROCESSING( x ) vPreSleepProcessing( x )
|
||||
|
||||
#if configCREATE_SIMPLE_TICKLESS_DEMO == 1
|
||||
|
||||
/* Constants related to the generation of run time stats. Run time stats
|
||||
are gathered in the full demo, not the blinky demo. */
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
|
||||
#define portGET_RUN_TIME_COUNTER_VALUE() 0
|
||||
|
||||
/* The blinky demo can use a slow tick rate to save power. */
|
||||
#define configTICK_RATE_HZ ( ( TickType_t ) 100 )
|
||||
|
||||
#else
|
||||
|
||||
/* Constants related to the generation of run time stats. Run time stats
|
||||
are gathered in the full demo, not the blinky demo. */
|
||||
void vConfigureTimerForRunTimeStats( void );
|
||||
uint32_t ulGetRunTimeCounterValue( void );
|
||||
#define configGENERATE_RUN_TIME_STATS 1
|
||||
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() vConfigureTimerForRunTimeStats()
|
||||
#define portGET_RUN_TIME_COUNTER_VALUE() ulGetRunTimeCounterValue()
|
||||
|
||||
/* Some of the tests in the full demo expecte a 1ms tick rate. */
|
||||
#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
|
||||
|
||||
#endif /* configCREATE_SIMPLE_TICKLESS_DEMO */
|
||||
#endif /* __IASMARM__ */
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
|
||||
@@ -0,0 +1,135 @@
|
||||
/*
|
||||
FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file initialises the two timers available in the Timer32 peripheral.
|
||||
*
|
||||
* Channels 0 and 1 provide the interrupts that are used with the IntQ
|
||||
* standard demo tasks, which test interrupt nesting and using queues from
|
||||
* interrupts.
|
||||
*/
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
|
||||
/* Demo includes. */
|
||||
#include "IntQueueTimer.h"
|
||||
#include "IntQueue.h"
|
||||
|
||||
/* The frequencies at which the two timers expire are slightly offset to ensure
|
||||
they don't remain synchronised. */
|
||||
#define tmrTIMER_0_FREQUENCY ( 2000UL )
|
||||
#define tmrTIMER_1_FREQUENCY ( 2003UL )
|
||||
|
||||
/* The interrupts use the FreeRTOS API so must be at or below the max syscall
|
||||
interrupt priority. Counter-intuitively, the higher the numeric number the
|
||||
lower the logical priority. http://www.freertos.org/RTOS-Cortex-M3-M4.html */
|
||||
#define tmrLOWER_PRIORITY ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
#define tmrHIGHER_PRIORITY ( configMAX_SYSCALL_INTERRUPT_PRIORITY + 1 )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Handlers for the two timer peripherals - two channels are used in the TC0
|
||||
timer. */
|
||||
void vT32_0_Handler( void );
|
||||
void vT32_1_Handler( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vInitialiseTimerForIntQueueTest( void )
|
||||
{
|
||||
/* Configure the timer channels. */
|
||||
MAP_Timer32_initModule( TIMER32_0_MODULE, TIMER32_PRESCALER_1, TIMER32_32BIT, TIMER32_PERIODIC_MODE );
|
||||
MAP_Timer32_setCount( TIMER32_0_MODULE, CS_getMCLK() / tmrTIMER_0_FREQUENCY );
|
||||
MAP_Timer32_enableInterrupt( TIMER32_0_MODULE );
|
||||
MAP_Timer32_startTimer( TIMER32_0_MODULE, false );
|
||||
MAP_Interrupt_setPriority( INT_T32_INT1, tmrLOWER_PRIORITY );
|
||||
MAP_Interrupt_enableInterrupt( INT_T32_INT1 );
|
||||
|
||||
MAP_Timer32_initModule( TIMER32_1_MODULE, TIMER32_PRESCALER_1, TIMER32_32BIT, TIMER32_PERIODIC_MODE );
|
||||
MAP_Timer32_setCount( TIMER32_1_MODULE, CS_getMCLK() / tmrTIMER_1_FREQUENCY );
|
||||
MAP_Timer32_enableInterrupt( TIMER32_1_MODULE );
|
||||
MAP_Timer32_startTimer( TIMER32_1_MODULE, false );
|
||||
MAP_Interrupt_setPriority( INT_T32_INT2, tmrHIGHER_PRIORITY );
|
||||
MAP_Interrupt_enableInterrupt( INT_T32_INT2 );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vT32_0_Handler( void )
|
||||
{
|
||||
MAP_Timer32_clearInterruptFlag( TIMER32_0_MODULE );
|
||||
portYIELD_FROM_ISR( xFirstTimerHandler() );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vT32_1_Handler( void )
|
||||
{
|
||||
MAP_Timer32_clearInterruptFlag( TIMER32_1_MODULE );
|
||||
portYIELD_FROM_ISR( xSecondTimerHandler() );
|
||||
}
|
||||
|
||||
@@ -0,0 +1,454 @@
|
||||
;/*
|
||||
; FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
; All rights reserved
|
||||
;
|
||||
; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
;
|
||||
; This file is part of the FreeRTOS distribution.
|
||||
;
|
||||
; FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
; the terms of the GNU General Public License (version 2) as published by the
|
||||
; Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
;
|
||||
; ***************************************************************************
|
||||
; >>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
; >>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
; >>! obliged to provide the source code for proprietary components !<<
|
||||
; >>! outside of the FreeRTOS kernel. !<<
|
||||
; ***************************************************************************
|
||||
;
|
||||
; FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
; WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
; FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
; link: http://www.freertos.org/a00114.html
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * *
|
||||
; * FreeRTOS provides completely free yet professionally developed, *
|
||||
; * robust, strictly quality controlled, supported, and cross *
|
||||
; * platform software that is more than just the market leader, it *
|
||||
; * is the industry's de facto standard. *
|
||||
; * *
|
||||
; * Help yourself get started quickly while simultaneously helping *
|
||||
; * to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
; * tutorial book, reference manual, or both: *
|
||||
; * http://www.FreeRTOS.org/Documentation *
|
||||
; * *
|
||||
; ***************************************************************************
|
||||
;
|
||||
; http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
; the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
; defined configASSERT()?
|
||||
;
|
||||
; http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
; embedded software for free we request you assist our global community by
|
||||
; participating in the support forum.
|
||||
;
|
||||
; http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
; be as productive as possible as early as possible. Now you can receive
|
||||
; FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
; Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
;
|
||||
; http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
; including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
; compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
;
|
||||
; http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
; Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
;
|
||||
; http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
; Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
; licenses offer ticketed support, indemnification and commercial middleware.
|
||||
;
|
||||
; http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
; engineered and independently SIL3 certified version for use in safety and
|
||||
; mission critical applications that require provable dependability.
|
||||
;
|
||||
; 1 tab == 4 spaces!
|
||||
;*/
|
||||
|
||||
|
||||
.thumb
|
||||
|
||||
.ref ulRegTest1LoopCounter
|
||||
.ref ulRegTest2LoopCounter
|
||||
|
||||
.def vRegTest1Implementation
|
||||
.def vRegTest2Implementation
|
||||
|
||||
ulRegTest1LoopCounterConst: .word ulRegTest1LoopCounter
|
||||
ulRegTest2LoopCounterConst: .word ulRegTest2LoopCounter
|
||||
ulNVIC_INT_CTRL: .word 0xe000ed04
|
||||
;/*-----------------------------------------------------------*/
|
||||
.align 4
|
||||
vRegTest1Implementation: .asmfunc
|
||||
|
||||
;/* Fill the core registers with known values. */
|
||||
mov r0, #100
|
||||
mov r1, #101
|
||||
mov r2, #102
|
||||
mov r3, #103
|
||||
mov r4, #104
|
||||
mov r5, #105
|
||||
mov r6, #106
|
||||
mov r7, #107
|
||||
mov r8, #108
|
||||
mov r9, #109
|
||||
mov r10, #110
|
||||
mov r11, #111
|
||||
mov r12, #112
|
||||
|
||||
;/* Fill the VFP registers with known values. */
|
||||
vmov d0, r0, r1
|
||||
vmov d1, r2, r3
|
||||
vmov d2, r4, r5
|
||||
vmov d3, r6, r7
|
||||
vmov d4, r8, r9
|
||||
vmov d5, r10, r11
|
||||
vmov d6, r0, r1
|
||||
vmov d7, r2, r3
|
||||
vmov d8, r4, r5
|
||||
vmov d9, r6, r7
|
||||
vmov d10, r8, r9
|
||||
vmov d11, r10, r11
|
||||
vmov d12, r0, r1
|
||||
vmov d13, r2, r3
|
||||
vmov d14, r4, r5
|
||||
vmov d15, r6, r7
|
||||
|
||||
reg1_loop:
|
||||
;/* Check all the VFP registers still contain the values set above.
|
||||
;First save registers that are clobbered by the test. */
|
||||
push { r0-r1 }
|
||||
|
||||
vmov r0, r1, d0
|
||||
cmp r0, #100
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #101
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d1
|
||||
cmp r0, #102
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #103
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d2
|
||||
cmp r0, #104
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #105
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d3
|
||||
cmp r0, #106
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #107
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d4
|
||||
cmp r0, #108
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #109
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d5
|
||||
cmp r0, #110
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #111
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d6
|
||||
cmp r0, #100
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #101
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d7
|
||||
cmp r0, #102
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #103
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d8
|
||||
cmp r0, #104
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #105
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d9
|
||||
cmp r0, #106
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #107
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d10
|
||||
cmp r0, #108
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #109
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d11
|
||||
cmp r0, #110
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #111
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d12
|
||||
cmp r0, #100
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #101
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d13
|
||||
cmp r0, #102
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #103
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d14
|
||||
cmp r0, #104
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #105
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d15
|
||||
cmp r0, #106
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #107
|
||||
bne reg1_error_loopf
|
||||
|
||||
;/* Restore the registers that were clobbered by the test. */
|
||||
pop {r0-r1}
|
||||
|
||||
;/* VFP register test passed. Jump to the core register test. */
|
||||
b reg1_loopf_pass
|
||||
|
||||
reg1_error_loopf:
|
||||
;/* If this line is hit then a VFP register value was found to be
|
||||
;incorrect. */
|
||||
b reg1_error_loopf
|
||||
|
||||
reg1_loopf_pass:
|
||||
|
||||
cmp r0, #100
|
||||
bne reg1_error_loop
|
||||
cmp r1, #101
|
||||
bne reg1_error_loop
|
||||
cmp r2, #102
|
||||
bne reg1_error_loop
|
||||
cmp r3, #103
|
||||
bne reg1_error_loop
|
||||
cmp r4, #104
|
||||
bne reg1_error_loop
|
||||
cmp r5, #105
|
||||
bne reg1_error_loop
|
||||
cmp r6, #106
|
||||
bne reg1_error_loop
|
||||
cmp r7, #107
|
||||
bne reg1_error_loop
|
||||
cmp r8, #108
|
||||
bne reg1_error_loop
|
||||
cmp r9, #109
|
||||
bne reg1_error_loop
|
||||
cmp r10, #110
|
||||
bne reg1_error_loop
|
||||
cmp r11, #111
|
||||
bne reg1_error_loop
|
||||
cmp r12, #112
|
||||
bne reg1_error_loop
|
||||
|
||||
;/* Everything passed, increment the loop counter. */
|
||||
push { r0-r1 }
|
||||
ldr r0, ulRegTest1LoopCounterConst
|
||||
ldr r1, [r0]
|
||||
adds r1, r1, #1
|
||||
str r1, [r0]
|
||||
pop { r0-r1 }
|
||||
|
||||
;/* Start again. */
|
||||
b reg1_loop
|
||||
|
||||
reg1_error_loop:
|
||||
;/* If this line is hit then there was an error in a core register value.
|
||||
;The loop ensures the loop counter stops incrementing. */
|
||||
b reg1_error_loop
|
||||
.endasmfunc
|
||||
|
||||
;/*-----------------------------------------------------------*/
|
||||
|
||||
.align 4
|
||||
vRegTest2Implementation: .asmfunc
|
||||
|
||||
;/* Set all the core registers to known values. */
|
||||
mov r0, #-1
|
||||
mov r1, #1
|
||||
mov r2, #2
|
||||
mov r3, #3
|
||||
mov r4, #4
|
||||
mov r5, #5
|
||||
mov r6, #6
|
||||
mov r7, #7
|
||||
mov r8, #8
|
||||
mov r9, #9
|
||||
mov r10, #10
|
||||
mov r11, #11
|
||||
mov r12, #12
|
||||
|
||||
;/* Set all the VFP to known values. */
|
||||
vmov d0, r0, r1
|
||||
vmov d1, r2, r3
|
||||
vmov d2, r4, r5
|
||||
vmov d3, r6, r7
|
||||
vmov d4, r8, r9
|
||||
vmov d5, r10, r11
|
||||
vmov d6, r0, r1
|
||||
vmov d7, r2, r3
|
||||
vmov d8, r4, r5
|
||||
vmov d9, r6, r7
|
||||
vmov d10, r8, r9
|
||||
vmov d11, r10, r11
|
||||
vmov d12, r0, r1
|
||||
vmov d13, r2, r3
|
||||
vmov d14, r4, r5
|
||||
vmov d15, r6, r7
|
||||
|
||||
reg2_loop:
|
||||
|
||||
;/* Check all the VFP registers still contain the values set above.
|
||||
;First save registers that are clobbered by the test. */
|
||||
push { r0-r1 }
|
||||
|
||||
vmov r0, r1, d0
|
||||
cmp r0, #-1
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #1
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d1
|
||||
cmp r0, #2
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #3
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d2
|
||||
cmp r0, #4
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #5
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d3
|
||||
cmp r0, #6
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #7
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d4
|
||||
cmp r0, #8
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #9
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d5
|
||||
cmp r0, #10
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #11
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d6
|
||||
cmp r0, #-1
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #1
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d7
|
||||
cmp r0, #2
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #3
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d8
|
||||
cmp r0, #4
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #5
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d9
|
||||
cmp r0, #6
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #7
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d10
|
||||
cmp r0, #8
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #9
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d11
|
||||
cmp r0, #10
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #11
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d12
|
||||
cmp r0, #-1
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #1
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d13
|
||||
cmp r0, #2
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #3
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d14
|
||||
cmp r0, #4
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #5
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d15
|
||||
cmp r0, #6
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #7
|
||||
bne reg2_error_loopf
|
||||
|
||||
;/* Restore the registers that were clobbered by the test. */
|
||||
pop {r0-r1}
|
||||
|
||||
;/* VFP register test passed. Jump to the core register test. */
|
||||
b reg2_loopf_pass
|
||||
|
||||
reg2_error_loopf
|
||||
;/* If this line is hit then a VFP register value was found to be
|
||||
;incorrect. */
|
||||
b reg2_error_loopf
|
||||
|
||||
reg2_loopf_pass
|
||||
|
||||
cmp r0, #-1
|
||||
bne reg2_error_loop
|
||||
cmp r1, #1
|
||||
bne reg2_error_loop
|
||||
cmp r2, #2
|
||||
bne reg2_error_loop
|
||||
cmp r3, #3
|
||||
bne reg2_error_loop
|
||||
cmp r4, #4
|
||||
bne reg2_error_loop
|
||||
cmp r5, #5
|
||||
bne reg2_error_loop
|
||||
cmp r6, #6
|
||||
bne reg2_error_loop
|
||||
cmp r7, #7
|
||||
bne reg2_error_loop
|
||||
cmp r8, #8
|
||||
bne reg2_error_loop
|
||||
cmp r9, #9
|
||||
bne reg2_error_loop
|
||||
cmp r10, #10
|
||||
bne reg2_error_loop
|
||||
cmp r11, #11
|
||||
bne reg2_error_loop
|
||||
cmp r12, #12
|
||||
bne reg2_error_loop
|
||||
|
||||
;/* Increment the loop counter to indicate this test is still functioning
|
||||
;correctly. */
|
||||
push { r0-r1 }
|
||||
ldr r0, ulRegTest2LoopCounterConst
|
||||
ldr r1, [r0]
|
||||
adds r1, r1, #1
|
||||
str r1, [r0]
|
||||
|
||||
;/* Yield to increase test coverage. */
|
||||
movs r0, #0x01
|
||||
ldr r1, ulNVIC_INT_CTRL
|
||||
lsl r0, r0, #28 ;/* Shift to PendSV bit */
|
||||
str r0, [r1]
|
||||
dsb
|
||||
|
||||
pop { r0-r1 }
|
||||
|
||||
;/* Start again. */
|
||||
b reg2_loop
|
||||
|
||||
reg2_error_loop:
|
||||
;/* If this line is hit then there was an error in a core register value.
|
||||
;This loop ensures the loop counter variable stops incrementing. */
|
||||
b reg2_error_loop
|
||||
|
||||
;/*-----------------------------------------------------------*/
|
||||
|
||||
.end
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,126 @@
|
||||
/*
|
||||
FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/* FreeRTOS includes. */
|
||||
#include "FreeRTOS.h"
|
||||
|
||||
/* Utility functions to implement run time stats on Cortex-M CPUs. The collected
|
||||
run time data can be viewed through the CLI interface. See the following URL for
|
||||
more information on run time stats:
|
||||
http://www.freertos.org/rtos-run-time-stats.html */
|
||||
|
||||
/* Addresses of registers in the Cortex-M debug hardware. */
|
||||
#define rtsDWT_CYCCNT ( *( ( unsigned long * ) 0xE0001004 ) )
|
||||
#define rtsDWT_CONTROL ( *( ( unsigned long * ) 0xE0001000 ) )
|
||||
#define rtsSCB_DEMCR ( *( ( unsigned long * ) 0xE000EDFC ) )
|
||||
#define rtsTRCENA_BIT ( 0x01000000UL )
|
||||
#define rtsCOUNTER_ENABLE_BIT ( 0x01UL )
|
||||
|
||||
/* Simple shift divide for scaling to avoid an overflow occurring too soon. */
|
||||
#define runtimeSHIFT_13 13
|
||||
#define runtimeOVERFLOW_BIT_13 ( 1UL << ( 32UL - runtimeSHIFT_13 ) )
|
||||
static const uint32_t ulPrescaleBits = runtimeSHIFT_13;
|
||||
static const uint32_t ulOverflowBit = runtimeOVERFLOW_BIT_13;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vConfigureTimerForRunTimeStats( void )
|
||||
{
|
||||
/* Enable TRCENA. */
|
||||
rtsSCB_DEMCR = rtsSCB_DEMCR | rtsTRCENA_BIT;
|
||||
|
||||
/* Reset counter. */
|
||||
rtsDWT_CYCCNT = 0;
|
||||
|
||||
/* Enable counter. */
|
||||
rtsDWT_CONTROL = rtsDWT_CONTROL | rtsCOUNTER_ENABLE_BIT;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
uint32_t ulGetRunTimeCounterValue( void )
|
||||
{
|
||||
static unsigned long ulLastCounterValue = 0UL, ulOverflows = 0;
|
||||
unsigned long ulValueNow;
|
||||
|
||||
ulValueNow = rtsDWT_CYCCNT;
|
||||
|
||||
/* Has the value overflowed since it was last read. */
|
||||
if( ulValueNow < ulLastCounterValue )
|
||||
{
|
||||
ulOverflows += ulOverflowBit;
|
||||
}
|
||||
ulLastCounterValue = ulValueNow;
|
||||
|
||||
/* There is no prescale on the counter, so simulate in software. */
|
||||
ulValueNow = ( ulValueNow >> ulPrescaleBits ) + ulOverflows;
|
||||
|
||||
return ulValueNow;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
@@ -0,0 +1,490 @@
|
||||
/*
|
||||
FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* NOTE 1: This project provides two demo applications. A simple blinky
|
||||
* style project, and a more comprehensive test and demo application. The
|
||||
* configCREATE_SIMPLE_TICKLESS_DEMO setting in FreeRTOSConfig.h is used to
|
||||
* select between the two. See the notes on using
|
||||
* configCREATE_SIMPLY_BLINKY_DEMO_ONLY in main.c. This file implements the
|
||||
* comprehensive version.
|
||||
*
|
||||
* NOTE 2: This file only contains the source code that is specific to the
|
||||
* full demo. Generic functions, such FreeRTOS hook functions, and functions
|
||||
* required to configure the hardware, are defined in main.c.
|
||||
*
|
||||
* See http://www.FreeRTOS.org/TI_MSP432_Free_RTOS_Demo.html for instructions.
|
||||
*
|
||||
******************************************************************************
|
||||
*
|
||||
* main_full() creates all the demo application tasks and software timers, then
|
||||
* starts the scheduler. The web documentation provides more details of the
|
||||
* standard demo application tasks, which provide no particular functionality,
|
||||
* but do provide a good example of how to use the FreeRTOS API.
|
||||
*
|
||||
* In addition to the standard demo tasks, the following tasks and tests are
|
||||
* defined and/or created within this file:
|
||||
*
|
||||
* FreeRTOS+CLI command console. The command console is access through the
|
||||
* UART at 19200 baud. For reasons of robustness testing the UART driver is
|
||||
* deliberately written to be inefficient and should not be used as a template
|
||||
* for a production driver. Type "help" to see a list of registered commands.
|
||||
* The FreeRTOS+CLI license is different to the FreeRTOS license, see
|
||||
* http://www.FreeRTOS.org/cli for license and usage details.
|
||||
*
|
||||
* "Reg test" tasks - These fill both the core and floating point registers with
|
||||
* known values, then check that each register maintains its expected value for
|
||||
* the lifetime of the task. Each task uses a different set of values. The reg
|
||||
* test tasks execute with a very low priority, so get preempted very
|
||||
* frequently. A register containing an unexpected value is indicative of an
|
||||
* error in the context switching mechanism.
|
||||
*
|
||||
* "Check" task - The check task period is initially set to three seconds. The
|
||||
* task checks that all the standard demo tasks, and the register check tasks,
|
||||
* are not only still executing, but are executing without reporting any errors.
|
||||
* If the check task discovers that a task has either stalled, or reported an
|
||||
* error, then it changes its own execution period from the initial three
|
||||
* seconds, to just 200ms. The check task also toggles an LED each time it is
|
||||
* called. This provides a visual indication of the system status: If the LED
|
||||
* toggles every three seconds, then no issues have been discovered. If the LED
|
||||
* toggles every 200ms, then an issue has been discovered with at least one
|
||||
* task.
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
#include <stdio.h>
|
||||
|
||||
/* Kernel includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "timers.h"
|
||||
#include "semphr.h"
|
||||
|
||||
/* Standard demo application includes. */
|
||||
#include "flop.h"
|
||||
#include "semtest.h"
|
||||
#include "countsem.h"
|
||||
#include "GenQTest.h"
|
||||
#include "recmutex.h"
|
||||
#include "partest.h"
|
||||
#include "serial.h"
|
||||
#include "TimerDemo.h"
|
||||
#include "IntQueue.h"
|
||||
#include "EventGroupsDemo.h"
|
||||
#include "TaskNotify.h"
|
||||
#include "IntSemTest.h"
|
||||
|
||||
/* Priorities for the demo application tasks. */
|
||||
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )
|
||||
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )
|
||||
#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )
|
||||
#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )
|
||||
#define mainUART_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 2UL )
|
||||
#define mainCOM_TEST_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
|
||||
#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
|
||||
#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY )
|
||||
|
||||
/* The priority used by the UART command console task. */
|
||||
#define mainUART_COMMAND_CONSOLE_TASK_PRIORITY ( configMAX_PRIORITIES - 2 )
|
||||
|
||||
/* A block time of zero simply means "don't block". */
|
||||
#define mainDONT_BLOCK ( 0UL )
|
||||
|
||||
/* The period after which the check timer will expire, in ms, provided no errors
|
||||
have been reported by any of the standard demo tasks. ms are converted to the
|
||||
equivalent in ticks using the portTICK_PERIOD_MS constant. */
|
||||
#define mainNO_ERROR_CHECK_TASK_PERIOD ( pdMS_TO_TICKS( 3000UL ) )
|
||||
|
||||
/* The period at which the check timer will expire, in ms, if an error has been
|
||||
reported in one of the standard demo tasks. ms are converted to the equivalent
|
||||
in ticks using the portTICK_PERIOD_MS constant. */
|
||||
#define mainERROR_CHECK_TASK_PERIOD ( pdMS_TO_TICKS( 200UL ) )
|
||||
|
||||
/* Parameters that are passed into the register check tasks solely for the
|
||||
purpose of ensuring parameters are passed into tasks correctly. */
|
||||
#define mainREG_TEST_TASK_1_PARAMETER ( ( void * ) 0x12345678 )
|
||||
#define mainREG_TEST_TASK_2_PARAMETER ( ( void * ) 0x87654321 )
|
||||
|
||||
/* The base period used by the timer test tasks. */
|
||||
#define mainTIMER_TEST_PERIOD ( 50 )
|
||||
|
||||
/* Dimensions the queue in which characters received from the UART are
|
||||
placed. */
|
||||
#define mainRX_QUEUE_LENGTH 10
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/*
|
||||
* The check task, as described at the top of this file.
|
||||
*/
|
||||
static void prvCheckTask( void *pvParameters );
|
||||
|
||||
/*
|
||||
* Register check tasks, and the tasks used to write over and check the contents
|
||||
* of the FPU registers, as described at the top of this file. The nature of
|
||||
* these files necessitates that they are written in an assembly file, but the
|
||||
* entry points are kept in the C file for the convenience of checking the task
|
||||
* parameter.
|
||||
*/
|
||||
static void prvRegTestTaskEntry1( void *pvParameters );
|
||||
extern void vRegTest1Implementation( void );
|
||||
static void prvRegTestTaskEntry2( void *pvParameters );
|
||||
extern void vRegTest2Implementation( void );
|
||||
|
||||
/*
|
||||
* Register commands that can be used with FreeRTOS+CLI. The commands are
|
||||
* defined in CLI-Commands.c and File-Related-CLI-Command.c respectively.
|
||||
*/
|
||||
extern void vRegisterSampleCLICommands( void );
|
||||
|
||||
/*
|
||||
* The task that manages the FreeRTOS+CLI input and output.
|
||||
*/
|
||||
extern void vUARTCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriority );
|
||||
|
||||
/*
|
||||
* When the full demo is build the idle hook is used to create some timers that
|
||||
* cannot be created in main() because the timer demo tasks need the entire
|
||||
* command queue.
|
||||
*/
|
||||
void vFullDemoIdleHook( void );
|
||||
|
||||
/*
|
||||
* The full demo configures the clocks for maximum frequency, wheras the blinky
|
||||
* demo uses a slower clock as it also uses low power features.
|
||||
*/
|
||||
static void prvConfigureClocks( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The following two variables are used to communicate the status of the
|
||||
register check tasks to the check task. If the variables keep incrementing,
|
||||
then the register check tasks has not discovered any errors. If a variable
|
||||
stops incrementing, then an error has been found. */
|
||||
volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void main_full( void )
|
||||
{
|
||||
/* This demo sets the clock to its maximum. The blinky demo uses as slower
|
||||
clock as it uses low power features. */
|
||||
prvConfigureClocks();
|
||||
|
||||
/* Init the serial port for use by the CLI. The baud rate parameter is not
|
||||
used so set to 0 to make this obvious. */
|
||||
xSerialPortInitMinimal( 0, mainRX_QUEUE_LENGTH );
|
||||
|
||||
/* Start all the other standard demo/test tasks. They have not particular
|
||||
functionality, but do demonstrate how to use the FreeRTOS API and test the
|
||||
kernel port. */
|
||||
vStartInterruptQueueTasks();
|
||||
|
||||
vStartCountingSemaphoreTasks();
|
||||
vStartGenericQueueTasks( tskIDLE_PRIORITY );
|
||||
vStartRecursiveMutexTasks();
|
||||
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
|
||||
vStartTimerDemoTask( mainTIMER_TEST_PERIOD );
|
||||
vStartEventGroupTasks();
|
||||
vStartTaskNotifyTask();
|
||||
vStartInterruptSemaphoreTasks();
|
||||
|
||||
/* Note - the set of standard demo tasks contains two versions of
|
||||
vStartMathTasks.c. One is defined in flop.c, and uses double precision
|
||||
floating point numbers and variables. The other is defined in sp_flop.c,
|
||||
and uses single precision floating point numbers and variables. sp_flop.
|
||||
c should be included in this project. */
|
||||
vStartMathTasks( mainFLOP_TASK_PRIORITY );
|
||||
|
||||
/* Start the tasks that implements the command console on the UART, as
|
||||
described above. */
|
||||
vUARTCommandConsoleStart( mainUART_COMMAND_CONSOLE_STACK_SIZE, mainUART_COMMAND_CONSOLE_TASK_PRIORITY );
|
||||
|
||||
/* Register the standard CLI commands. */
|
||||
vRegisterSampleCLICommands();
|
||||
|
||||
/* Create the register check tasks, as described at the top of this file */
|
||||
xTaskCreate( prvRegTestTaskEntry1, "Reg1", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_1_PARAMETER, tskIDLE_PRIORITY, NULL );
|
||||
xTaskCreate( prvRegTestTaskEntry2, "Reg2", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_2_PARAMETER, tskIDLE_PRIORITY, NULL );
|
||||
|
||||
/* Create the task that performs the 'check' functionality, as described at
|
||||
the top of this file. */
|
||||
xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
|
||||
|
||||
/* Start the scheduler. */
|
||||
vTaskStartScheduler();
|
||||
|
||||
/* If all is well, the scheduler will now be running, and the following
|
||||
line will never be reached. If the following line does execute, then
|
||||
there was either insufficient FreeRTOS heap memory available for the idle
|
||||
and/or timer tasks to be created, or vTaskStartScheduler() was called from
|
||||
User mode. See the memory management section on the FreeRTOS web site for
|
||||
more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The
|
||||
mode from which main() is called is set in the C start up code and must be
|
||||
a privileged mode (not user mode). */
|
||||
for( ;; );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvCheckTask( void *pvParameters )
|
||||
{
|
||||
TickType_t xDelayPeriod = mainNO_ERROR_CHECK_TASK_PERIOD;
|
||||
TickType_t xLastExecutionTime;
|
||||
static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;
|
||||
unsigned long ulErrorFound = pdFALSE;
|
||||
|
||||
/* Just to stop compiler warnings. */
|
||||
( void ) pvParameters;
|
||||
|
||||
/* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()
|
||||
works correctly. */
|
||||
xLastExecutionTime = xTaskGetTickCount();
|
||||
|
||||
/* Cycle for ever, delaying then checking all the other tasks are still
|
||||
operating without error. The onboard LED is toggled on each iteration.
|
||||
If an error is detected then the delay period is decreased from
|
||||
mainNO_ERROR_CHECK_TASK_PERIOD to mainERROR_CHECK_TASK_PERIOD. This has the
|
||||
effect of increasing the rate at which the onboard LED toggles, and in so
|
||||
doing gives visual feedback of the system status. */
|
||||
for( ;; )
|
||||
{
|
||||
/* Delay until it is time to execute again. */
|
||||
vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod );
|
||||
|
||||
/* Check all the demo tasks to ensure that they are all still running,
|
||||
and that none have detected an error. */
|
||||
if( xAreIntQueueTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 0UL;
|
||||
}
|
||||
|
||||
if( xAreMathsTaskStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 1UL;
|
||||
}
|
||||
|
||||
if( xAreGenericQueueTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 5UL;
|
||||
}
|
||||
|
||||
if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 6UL;
|
||||
}
|
||||
|
||||
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 8UL;
|
||||
}
|
||||
|
||||
if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 10UL;
|
||||
}
|
||||
|
||||
if( xAreInterruptSemaphoreTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 14UL;
|
||||
}
|
||||
|
||||
if( xAreTimerDemoTasksStillRunning( ( TickType_t ) mainNO_ERROR_CHECK_TASK_PERIOD ) != pdPASS )
|
||||
{
|
||||
ulErrorFound |= 1UL << 9UL;
|
||||
}
|
||||
|
||||
if( xAreEventGroupTasksStillRunning() != pdPASS )
|
||||
{
|
||||
ulErrorFound |= 1UL << 12UL;
|
||||
}
|
||||
|
||||
if( xAreTaskNotificationTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 13UL;
|
||||
}
|
||||
|
||||
/* Check that the register test 1 task is still running. */
|
||||
if( ulLastRegTest1Value == ulRegTest1LoopCounter )
|
||||
{
|
||||
ulErrorFound |= 1UL << 15UL;
|
||||
}
|
||||
ulLastRegTest1Value = ulRegTest1LoopCounter;
|
||||
|
||||
/* Check that the register test 2 task is still running. */
|
||||
if( ulLastRegTest2Value == ulRegTest2LoopCounter )
|
||||
{
|
||||
ulErrorFound |= 1UL << 16UL;
|
||||
}
|
||||
ulLastRegTest2Value = ulRegTest2LoopCounter;
|
||||
|
||||
/* Toggle the check LED to give an indication of the system status. If
|
||||
the LED toggles every mainNO_ERROR_CHECK_TASK_PERIOD milliseconds then
|
||||
everything is ok. A faster toggle indicates an error. */
|
||||
configTOGGLE_LED();
|
||||
|
||||
if( ulErrorFound != pdFALSE )
|
||||
{
|
||||
/* An error has been detected in one of the tasks - flash the LED
|
||||
at a higher frequency to give visible feedback that something has
|
||||
gone wrong (it might just be that the loop back connector required
|
||||
by the comtest tasks has not been fitted). */
|
||||
xDelayPeriod = mainERROR_CHECK_TASK_PERIOD;
|
||||
}
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvRegTestTaskEntry1( void *pvParameters )
|
||||
{
|
||||
/* Although the regtest task is written in assembler, its entry point is
|
||||
written in C for convenience of checking the task parameter is being passed
|
||||
in correctly. */
|
||||
if( pvParameters == mainREG_TEST_TASK_1_PARAMETER )
|
||||
{
|
||||
/* Start the part of the test that is written in assembler. */
|
||||
vRegTest1Implementation();
|
||||
}
|
||||
|
||||
/* The following line will only execute if the task parameter is found to
|
||||
be incorrect. The check timer will detect that the regtest loop counter is
|
||||
not being incremented and flag an error. */
|
||||
vTaskDelete( NULL );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvRegTestTaskEntry2( void *pvParameters )
|
||||
{
|
||||
/* Although the regtest task is written in assembler, its entry point is
|
||||
written in C for convenience of checking the task parameter is being passed
|
||||
in correctly. */
|
||||
if( pvParameters == mainREG_TEST_TASK_2_PARAMETER )
|
||||
{
|
||||
/* Start the part of the test that is written in assembler. */
|
||||
vRegTest2Implementation();
|
||||
}
|
||||
|
||||
/* The following line will only execute if the task parameter is found to
|
||||
be incorrect. The check timer will detect that the regtest loop counter is
|
||||
not being incremented and flag an error. */
|
||||
vTaskDelete( NULL );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvConfigureClocks( void )
|
||||
{
|
||||
/* The full demo configures the clocks for maximum frequency, wheras the
|
||||
blinky demo uses a slower clock as it also uses low power features. Maximum
|
||||
freqency also needs more voltage.
|
||||
|
||||
From the datashee: For AM_LDO_VCORE1 and AM_DCDC_VCORE1 modes, the maximum
|
||||
CPU operating frequency is 48 MHz and maximum input clock frequency for
|
||||
peripherals is 24 MHz. */
|
||||
PCM_setCoreVoltageLevel( PCM_VCORE1 );
|
||||
CS_setDCOCenteredFrequency( CS_DCO_FREQUENCY_48 );
|
||||
CS_initClockSignal( CS_HSMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
|
||||
CS_initClockSignal( CS_SMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
|
||||
CS_initClockSignal( CS_MCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
|
||||
CS_initClockSignal( CS_ACLK, CS_REFOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if( configCREATE_SIMPLE_TICKLESS_DEMO == 0 )
|
||||
|
||||
void vApplicationTickHook( void )
|
||||
{
|
||||
/* This function will be called by each tick interrupt if
|
||||
configUSE_TICK_HOOK is set to 1 in FreeRTOSConfig.h. User code can be
|
||||
added here, but the tick hook is called from an interrupt context, so
|
||||
code must not attempt to block, and only the interrupt safe FreeRTOS API
|
||||
functions can be used (those that end in FromISR()). */
|
||||
|
||||
/* The full demo includes a software timer demo/test that requires
|
||||
prodding periodically from the tick interrupt. */
|
||||
vTimerPeriodicISRTests();
|
||||
|
||||
/* Call the periodic event group from ISR demo. */
|
||||
vPeriodicEventGroupsProcessing();
|
||||
|
||||
/* Use task notifications from an interrupt. */
|
||||
xNotifyTaskFromISR();
|
||||
|
||||
/* Use mutexes from interrupts. */
|
||||
vInterruptSemaphorePeriodicTest();
|
||||
}
|
||||
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,307 @@
|
||||
/*
|
||||
FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*
|
||||
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
|
||||
|
||||
Note1: This driver is used specifically to provide an interface to the
|
||||
FreeRTOS+CLI command interpreter. It is *not* intended to be a generic
|
||||
serial port driver. Nor is it intended to be used as an example of an
|
||||
efficient implementation. In particular, a queue is used to buffer
|
||||
received characters, which is fine in this case as key presses arrive
|
||||
slowly, but a DMA and/or RAM buffer should be used in place of the queue in
|
||||
applications that expect higher throughput.
|
||||
|
||||
Note2: This driver does not attempt to handle UART errors.
|
||||
*/
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "queue.h"
|
||||
#include "semphr.h"
|
||||
|
||||
/* Demo application includes. */
|
||||
#include "serial.h"
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* The UART interrupt handler.
|
||||
*/
|
||||
void vUART_Handler( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The queue into which received key presses are placed. NOTE THE COMMENTS AT
|
||||
THE TOP OF THIS FILE REGARDING THE USE OF QUEUES FOR THIS PURPOSE. */
|
||||
static QueueHandle_t xRxQueue = NULL;
|
||||
|
||||
/* Variables used in the Tx interrupt to send a string. */
|
||||
static volatile const signed char *pcStringStart = NULL, *pcStringEnd = NULL;
|
||||
static volatile TaskHandle_t xTransmittingTask = NULL;
|
||||
|
||||
static EUSCI_A0_Type * const pxUARTA0 = ( EUSCI_A0_Type * ) EUSCI_A0_MODULE;
|
||||
|
||||
/* UART Configuration for 19200 baud. Value generated using the tool provided
|
||||
on the following page:
|
||||
http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSP430BaudRateConverter/index.html
|
||||
*/
|
||||
const eUSCI_UART_Config xUARTConfig =
|
||||
{
|
||||
EUSCI_A_UART_CLOCKSOURCE_SMCLK, /* SMCLK Clock Source. */
|
||||
156, /* BRDIV */
|
||||
4, /* UCxBRF */
|
||||
0, /* UCxBRS */
|
||||
EUSCI_A_UART_NO_PARITY, /* No Parity. */
|
||||
EUSCI_A_UART_LSB_FIRST, /* MSB First. */
|
||||
EUSCI_A_UART_ONE_STOP_BIT, /* One stop bit. */
|
||||
EUSCI_A_UART_MODE, /* UART mode. */
|
||||
EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION /* Low Frequency Mode. */
|
||||
};
|
||||
|
||||
/*
|
||||
* See the serial2.h header file.
|
||||
*/
|
||||
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned long uxQueueLength )
|
||||
{
|
||||
/* Create the queue used to hold received characters. NOTE THE COMMENTS AT
|
||||
THE TOP OF THIS FILE REGARDING THE USE OF QUEUES FOR THIS PURPSOE. */
|
||||
xRxQueue = xQueueCreate( uxQueueLength, sizeof( char ) );
|
||||
configASSERT( xRxQueue );
|
||||
|
||||
/* Use the library functions to initialise and enable the UART. */
|
||||
MAP_UART_initModule( EUSCI_A0_MODULE, &xUARTConfig );
|
||||
MAP_UART_enableModule( EUSCI_A0_MODULE );
|
||||
MAP_UART_clearInterruptFlag( EUSCI_A0_MODULE, EUSCI_A_UART_RECEIVE_INTERRUPT | EUSCI_A_UART_TRANSMIT_INTERRUPT );
|
||||
MAP_UART_enableInterrupt( EUSCI_A0_MODULE, EUSCI_A_UART_RECEIVE_INTERRUPT );
|
||||
|
||||
/* The interrupt handler uses the FreeRTOS API function so its priority must
|
||||
be at or below the configured maximum system call interrupt priority.
|
||||
configKERNEL_INTERRUPT_PRIORITY is the priority used by the RTOS tick and
|
||||
(should) always be set to the minimum priority. */
|
||||
MAP_Interrupt_setPriority( INT_EUSCIA0, configKERNEL_INTERRUPT_PRIORITY );
|
||||
MAP_Interrupt_enableInterrupt( INT_EUSCIA0 );
|
||||
|
||||
/* Only one UART is supported so the handle is not used. */
|
||||
return ( xComPortHandle ) 0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, TickType_t xBlockTime )
|
||||
{
|
||||
BaseType_t xReturn;
|
||||
|
||||
/* Only a single port is supported. */
|
||||
( void ) pxPort;
|
||||
|
||||
/* Obtain a received character from the queue - entering the Blocked state
|
||||
(so not consuming any processing time) to wait for a character if one is not
|
||||
already available. */
|
||||
xReturn = xQueueReceive( xRxQueue, pcRxedChar, xBlockTime );
|
||||
return xReturn;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )
|
||||
{
|
||||
const TickType_t xMaxWaitTime = pdMS_TO_TICKS( 20UL * ( uint32_t ) usStringLength );
|
||||
|
||||
/* Only a single port is supported. */
|
||||
( void ) pxPort;
|
||||
|
||||
/* Note there is no mutual exclusion at the driver level. If more than one
|
||||
task is using the serial port then mutual exclusion should be provided where
|
||||
this function is called. */
|
||||
|
||||
/* Ensure notifications are not already waiting. */
|
||||
( void ) ulTaskNotifyTake( pdTRUE, 0 );
|
||||
|
||||
/* Remember which task is sending the byte. */
|
||||
xTransmittingTask = xTaskGetCurrentTaskHandle();
|
||||
|
||||
/* Mark the start and end of the data being sent. */
|
||||
pcStringStart = pcString;
|
||||
pcStringEnd = pcStringStart + usStringLength;
|
||||
|
||||
/* Start to send the first byte. */
|
||||
pxUARTA0->rTXBUF.r = ( uint_fast8_t ) *pcString;
|
||||
|
||||
/* Enable the interrupt then wait for the byte to be sent. The interrupt
|
||||
will be disabled again in the ISR. */
|
||||
MAP_UART_enableInterrupt( EUSCI_A0_MODULE, EUSCI_A_UART_TRANSMIT_INTERRUPT );
|
||||
ulTaskNotifyTake( pdTRUE, xMaxWaitTime );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, TickType_t xBlockTime )
|
||||
{
|
||||
const TickType_t xMaxWaitTime = pdMS_TO_TICKS( 20UL );
|
||||
|
||||
/* Only a single port is supported. */
|
||||
( void ) pxPort;
|
||||
|
||||
/* Note there is no mutual exclusion at the driver level. If more than one
|
||||
task is using the serial port then mutual exclusion should be provided where
|
||||
this function is called. */
|
||||
|
||||
/* Ensure notifications are not already waiting. */
|
||||
( void ) ulTaskNotifyTake( pdTRUE, 0 );
|
||||
|
||||
/* Remember which task is sending the byte. */
|
||||
xTransmittingTask = xTaskGetCurrentTaskHandle();
|
||||
|
||||
/* Mark the start and end of the data being sent - in this case just a
|
||||
single byte. */
|
||||
pcStringStart = &cOutChar;
|
||||
pcStringEnd = pcStringStart + sizeof( cOutChar );
|
||||
|
||||
/* Start to send the byte. */
|
||||
pxUARTA0->rTXBUF.r = ( uint_fast8_t ) cOutChar;
|
||||
|
||||
/* Enable the interrupt then wait for the byte to be sent. The interrupt
|
||||
will be disabled again in the ISR. */
|
||||
MAP_UART_enableInterrupt( EUSCI_A0_MODULE, EUSCI_A_UART_TRANSMIT_INTERRUPT );
|
||||
ulTaskNotifyTake( pdTRUE, xMaxWaitTime );
|
||||
|
||||
return pdPASS;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vSerialClose(xComPortHandle xPort)
|
||||
{
|
||||
/* Not supported as not required by the demo application. */
|
||||
( void ) xPort;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vUART_Handler( void )
|
||||
{
|
||||
uint8_t ucChar;
|
||||
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
|
||||
uint_fast8_t xInterruptStatus;
|
||||
|
||||
xInterruptStatus = MAP_UART_getEnabledInterruptStatus( EUSCI_A0_MODULE );
|
||||
|
||||
if( ( xInterruptStatus & EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG ) != 0x00 )
|
||||
{
|
||||
/* Obtain the character. */
|
||||
ucChar = MAP_UART_receiveData( EUSCI_A0_MODULE );
|
||||
|
||||
/* Send the character to the queue. Note the comments at the top of this
|
||||
file with regards to the inefficiency of this method for anything other than
|
||||
very low bandwidth communications.
|
||||
|
||||
If writing to the queue unblocks a task, and the unblocked task has a
|
||||
priority above the currently running task (the task that this interrupt
|
||||
interrupted), then xHigherPriorityTaskWoken will be set to pdTRUE inside the
|
||||
xQueueSendFromISR() function. xHigherPriorityTaskWoken is then passed to
|
||||
portYIELD_FROM_ISR() at the end of this interrupt handler to request a
|
||||
context switch so the interrupt returns directly to the (higher priority)
|
||||
unblocked task. */
|
||||
xQueueSendFromISR( xRxQueue, &ucChar, &xHigherPriorityTaskWoken );
|
||||
}
|
||||
|
||||
if( ( xInterruptStatus & EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG ) != 0x00 )
|
||||
{
|
||||
/* Are there more characters to transmit? */
|
||||
pcStringStart++;
|
||||
if( ( uint32_t ) pcStringStart < ( uint32_t ) pcStringEnd )
|
||||
{
|
||||
/* This is probably quite a heavy wait function just for writing to
|
||||
the Tx register. An optimised design would probably replace this
|
||||
with a simple register write. */
|
||||
pxUARTA0->rTXBUF.r = ( uint_fast8_t ) *pcStringStart;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* No more characters to send. Disable the interrupt and notify the
|
||||
task, if the task is waiting. */
|
||||
MAP_UART_disableInterrupt( EUSCI_A0_MODULE, EUSCI_A_UART_TRANSMIT_INTERRUPT );
|
||||
if( xTransmittingTask != NULL )
|
||||
{
|
||||
vTaskNotifyGiveFromISR( xTransmittingTask, &xHigherPriorityTaskWoken );
|
||||
xTransmittingTask = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* portYIELD_FROM_ISR() will request a context switch if executing this
|
||||
interrupt handler caused a task to leave the blocked state, and the task
|
||||
that left the blocked state has a higher priority than the currently running
|
||||
task (the task this interrupt interrupted). See the comment above the calls
|
||||
to xSemaphoreGiveFromISR() and xQueueSendFromISR() within this function. */
|
||||
portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,358 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<project>
|
||||
<fileVersion>2</fileVersion>
|
||||
<configuration>
|
||||
<name>Debug</name>
|
||||
<toolchain>
|
||||
<name>ARM</name>
|
||||
</toolchain>
|
||||
<debug>1</debug>
|
||||
<settings>
|
||||
<name>RuntimeChecking</name>
|
||||
<archiveVersion>0</archiveVersion>
|
||||
<data>
|
||||
<version>2</version>
|
||||
<wantNonLocal>1</wantNonLocal>
|
||||
<debug>1</debug>
|
||||
<option>
|
||||
<name>GenRtcDebugHeap</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcEnableBoundsChecking</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcCheckPtrsNonInstrMem</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcTrackPointerBounds</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcCheckAccesses</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcGenerateEntries</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcNrTrackedPointers</name>
|
||||
<state>1000</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcIntOverflow</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcIncUnsigned</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcIntConversion</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcInclExplicit</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcIntShiftOverflow</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcInclUnsignedShiftOverflow</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcUnhandledCase</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcDivByZero</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcEnable</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcCheckPtrsNonInstrFunc</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
</configuration>
|
||||
<configuration>
|
||||
<name>Release</name>
|
||||
<toolchain>
|
||||
<name>ARM</name>
|
||||
</toolchain>
|
||||
<debug>0</debug>
|
||||
<settings>
|
||||
<name>RuntimeChecking</name>
|
||||
<archiveVersion>0</archiveVersion>
|
||||
<data>
|
||||
<version>2</version>
|
||||
<wantNonLocal>1</wantNonLocal>
|
||||
<debug>0</debug>
|
||||
<option>
|
||||
<name>GenRtcDebugHeap</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcEnableBoundsChecking</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcCheckPtrsNonInstrMem</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcTrackPointerBounds</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcCheckAccesses</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcGenerateEntries</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcNrTrackedPointers</name>
|
||||
<state>1000</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcIntOverflow</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcIncUnsigned</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcIntConversion</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcInclExplicit</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcIntShiftOverflow</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcInclUnsignedShiftOverflow</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcUnhandledCase</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcDivByZero</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcEnable</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenRtcCheckPtrsNonInstrFunc</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
</configuration>
|
||||
<group>
|
||||
<name>DriverLibrary</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\driverlib\cpu.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\driverlib\cs.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\driverlib\fpu.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\driverlib\gpio.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\driverlib\interrupt.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\driverlib\pcm.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\driverlib\timer32.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\driverlib\uart.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\driverlib\wdt_a.c</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>FreeRTOS_Source</name>
|
||||
<group>
|
||||
<name>include</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\include\event_groups.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\include\FreeRTOS.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\include\projdefs.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\include\queue.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\include\semphr.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\include\task.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\include\timers.h</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>Portable</name>
|
||||
<group>
|
||||
<name>IAR</name>
|
||||
<group>
|
||||
<name>Cortex-M4F</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM4F\port.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM4F\portasm.s</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM4F\portmacro.h</name>
|
||||
</file>
|
||||
</group>
|
||||
</group>
|
||||
<group>
|
||||
<name>MemMang</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_4.c</name>
|
||||
</file>
|
||||
</group>
|
||||
</group>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\event_groups.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\list.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\queue.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\tasks.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\timers.c</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>Full_Demo</name>
|
||||
<group>
|
||||
<name>FreeRTOS+CLI</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\FreeRTOS-Plus\Source\FreeRTOS-Plus-CLI\FreeRTOS_CLI.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\FreeRTOS-Plus\Source\FreeRTOS-Plus-CLI\FreeRTOS_CLI.h</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>Standard Demo Tasks</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\countsem.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\EventGroupsDemo.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\GenQTest.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\IntQueue.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\IntSemTest.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\recmutex.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\sp_flop.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\TaskNotify.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\TimerDemo.c</name>
|
||||
</file>
|
||||
</group>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Full_Demo\IntQueueTimer.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Full_Demo\main_full.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Full_Demo\RegTest.s</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Full_Demo\RunTimeStatsTimer.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\FreeRTOS-Plus\Demo\Common\FreeRTOS_Plus_CLI_Demos\Sample-CLI-commands.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Full_Demo\serial.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\FreeRTOS-Plus\Demo\Common\FreeRTOS_Plus_CLI_Demos\UARTCommandConsole.c</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>Simply Blinky Demo</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\SimplyBlinkyDemo\main_blinky.c</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>System</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\system\IAR\msp432_startup_ewarm.c</name>
|
||||
</file>
|
||||
</group>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\FreeRTOSConfig.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\main.c</name>
|
||||
</file>
|
||||
</project>
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
+308
@@ -0,0 +1,308 @@
|
||||
/*
|
||||
FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
* NOTE 1: This project provides two demo applications. A simple blinky style
|
||||
* project, and a more comprehensive test and demo application. The
|
||||
* configCREATE_SIMPLE_TICKLESS_DEMO setting in FreeRTOSConfig.h is used to
|
||||
* select between the two. See the notes on using
|
||||
* configCREATE_SIMPLE_TICKLESS_DEMO in main.c. This file implements the
|
||||
* simply blinky style version.
|
||||
*
|
||||
* The blinky demo uses FreeRTOS's tickless idle mode to reduce power
|
||||
* consumption. See the notes on the web page below regarding the difference
|
||||
* in power saving that can be achieved between using the generic tickless
|
||||
* implementation (as used by the blinky demo) and a tickless implementation
|
||||
* that is tailored specifically to the MSP432.
|
||||
*
|
||||
* See http://www.FreeRTOS.org/TI_MSP432_Free_RTOS_Demo.html for instructions.
|
||||
*
|
||||
* NOTE 2: This file only contains the source code that is specific to the
|
||||
* basic demo. Generic functions, such FreeRTOS hook functions, and functions
|
||||
* required to configure the hardware, are defined in main.c.
|
||||
******************************************************************************
|
||||
*
|
||||
* main_blinky() creates one queue, and two tasks. It then starts the
|
||||
* scheduler.
|
||||
*
|
||||
* The Queue Send Task:
|
||||
* The queue send task is implemented by the prvQueueSendTask() function in
|
||||
* this file. prvQueueSendTask() sits in a loop that causes it to repeatedly
|
||||
* block for 200 milliseconds, before sending the value 100 to the queue that
|
||||
* was created within main_blinky(). Once the value is sent, the task loops
|
||||
* back around to block for another 200 milliseconds.
|
||||
*
|
||||
* The Queue Receive Task:
|
||||
* The queue receive task is implemented by the prvQueueReceiveTask() function
|
||||
* in this file. prvQueueReceiveTask() sits in a loop where it repeatedly
|
||||
* blocks on attempts to read data from the queue that was created within
|
||||
* main_blinky(). When data is received, the task checks the value of the
|
||||
* data, and if the value equals the expected 100, toggles the LED. The 'block
|
||||
* time' parameter passed to the queue receive function specifies that the
|
||||
* task should be held in the Blocked state indefinitely to wait for data to
|
||||
* be available on the queue. The queue receive task will only leave the
|
||||
* Blocked state when the queue send task writes to the queue. As the queue
|
||||
* send task writes to the queue every 200 milliseconds, the queue receive
|
||||
* task leaves the Blocked state every 200 milliseconds, and therefore toggles
|
||||
* the LED every 200 milliseconds.
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
#include <stdio.h>
|
||||
|
||||
/* Kernel includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "semphr.h"
|
||||
|
||||
/* Priorities at which the tasks are created. */
|
||||
#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
|
||||
#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
|
||||
|
||||
/* The rate at which data is sent to the queue. The 200ms value is converted
|
||||
to ticks using the portTICK_PERIOD_MS constant. */
|
||||
#define mainQUEUE_SEND_FREQUENCY_MS ( pdMS_TO_TICKS( 1000UL ) )
|
||||
|
||||
/* The number of items the queue can hold. This is 1 as the receive task
|
||||
will remove items as they are added, meaning the send task should always find
|
||||
the queue empty. */
|
||||
#define mainQUEUE_LENGTH ( 1 )
|
||||
|
||||
/* Values passed to the two tasks just to check the task parameter
|
||||
functionality. */
|
||||
#define mainQUEUE_SEND_PARAMETER ( 0x1111UL )
|
||||
#define mainQUEUE_RECEIVE_PARAMETER ( 0x22UL )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* The tasks as described in the comments at the top of this file.
|
||||
*/
|
||||
static void prvQueueReceiveTask( void *pvParameters );
|
||||
static void prvQueueSendTask( void *pvParameters );
|
||||
|
||||
/*
|
||||
* Called by main() to create the simply blinky style application if
|
||||
* configCREATE_SIMPLE_TICKLESS_DEMO is set to 1.
|
||||
*/
|
||||
void main_blinky( void );
|
||||
|
||||
/*
|
||||
* The full demo configures the clocks for maximum frequency, wheras this blinky
|
||||
* demo uses a slower clock as it also uses low power features.
|
||||
*/
|
||||
static void prvConfigureClocks( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The queue used by both tasks. */
|
||||
static QueueHandle_t xQueue = NULL;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void main_blinky( void )
|
||||
{
|
||||
/* See http://www.FreeRTOS.org/TI_MSP432_Free_RTOS_Demo.html for
|
||||
instructions and notes regarding the difference in power saving that can be
|
||||
achieved between using the generic tickless RTOS implementation (as used by
|
||||
the blinky demo) and a tickless RTOS implementation that is tailored
|
||||
specifically to the MSP432. */
|
||||
|
||||
/* The full demo configures the clocks for maximum frequency, wheras this
|
||||
blinky demo uses a slower clock as it also uses low power features. */
|
||||
prvConfigureClocks();
|
||||
|
||||
/* Create the queue. */
|
||||
xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) );
|
||||
|
||||
if( xQueue != NULL )
|
||||
{
|
||||
/* Start the two tasks as described in the comments at the top of this
|
||||
file. */
|
||||
xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */
|
||||
"Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */
|
||||
configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */
|
||||
( void * ) mainQUEUE_RECEIVE_PARAMETER, /* The parameter passed to the task - just to check the functionality. */
|
||||
mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */
|
||||
NULL ); /* The task handle is not required, so NULL is passed. */
|
||||
|
||||
xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, ( void * ) mainQUEUE_SEND_PARAMETER, mainQUEUE_SEND_TASK_PRIORITY, NULL );
|
||||
|
||||
/* Start the tasks and timer running. */
|
||||
vTaskStartScheduler();
|
||||
}
|
||||
|
||||
/* If all is well, the scheduler will now be running, and the following
|
||||
line will never be reached. If the following line does execute, then
|
||||
there was insufficient FreeRTOS heap memory available for the idle and/or
|
||||
timer tasks to be created. See the memory management section on the
|
||||
FreeRTOS web site for more details. */
|
||||
for( ;; );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvQueueSendTask( void *pvParameters )
|
||||
{
|
||||
TickType_t xNextWakeTime;
|
||||
const unsigned long ulValueToSend = 100UL;
|
||||
|
||||
/* Check the task parameter is as expected. */
|
||||
configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_SEND_PARAMETER );
|
||||
|
||||
/* Initialise xNextWakeTime - this only needs to be done once. */
|
||||
xNextWakeTime = xTaskGetTickCount();
|
||||
|
||||
for( ;; )
|
||||
{
|
||||
/* Place this task in the blocked state until it is time to run again.
|
||||
The block time is specified in ticks, the constant used converts ticks
|
||||
to ms. While in the Blocked state this task will not consume any CPU
|
||||
time. */
|
||||
vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );
|
||||
|
||||
/* Send to the queue - causing the queue receive task to unblock and
|
||||
toggle the LED. 0 is used as the block time so the sending operation
|
||||
will not block - it shouldn't need to block as the queue should always
|
||||
be empty at this point in the code. */
|
||||
xQueueSend( xQueue, &ulValueToSend, 0U );
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvQueueReceiveTask( void *pvParameters )
|
||||
{
|
||||
unsigned long ulReceivedValue;
|
||||
static const TickType_t xShortBlock = pdMS_TO_TICKS( 50 );
|
||||
|
||||
/* Check the task parameter is as expected. */
|
||||
configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_RECEIVE_PARAMETER );
|
||||
|
||||
for( ;; )
|
||||
{
|
||||
/* Wait until something arrives in the queue - this task will block
|
||||
indefinitely provided INCLUDE_vTaskSuspend is set to 1 in
|
||||
FreeRTOSConfig.h. */
|
||||
xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
|
||||
|
||||
/* To get here something must have been received from the queue, but
|
||||
is it the expected value? If it is, toggle the LED. */
|
||||
if( ulReceivedValue == 100UL )
|
||||
{
|
||||
/* Blip the LED for a short while so as not to use too much
|
||||
power. */
|
||||
configTOGGLE_LED();
|
||||
vTaskDelay( xShortBlock );
|
||||
configTOGGLE_LED();
|
||||
ulReceivedValue = 0U;
|
||||
}
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvConfigureClocks( void )
|
||||
{
|
||||
/* The full demo configures the clocks for maximum frequency, wheras this
|
||||
blinky demo uses a slower clock as it also uses low power features.
|
||||
|
||||
From the datashee: For AM_LDO_VCORE0 and AM_DCDC_VCORE0 modes, the maximum
|
||||
CPU operating frequency is 24 MHz and maximum input clock frequency for
|
||||
peripherals is 12 MHz. */
|
||||
CS_setDCOCenteredFrequency( CS_DCO_FREQUENCY_3 );
|
||||
CS_initClockSignal( CS_HSMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
|
||||
CS_initClockSignal( CS_SMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
|
||||
CS_initClockSignal( CS_MCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
|
||||
CS_initClockSignal( CS_ACLK, CS_REFOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
|
||||
|
||||
/* The lower frequency allows the use of CVORE level 0. */
|
||||
PCM_setCoreVoltageLevel( PCM_VCORE0 );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPreSleepProcessing( uint32_t ulExpectedIdleTime )
|
||||
{
|
||||
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if( configCREATE_SIMPLE_TICKLESS_DEMO == 1 )
|
||||
|
||||
void vApplicationTickHook( void )
|
||||
{
|
||||
/* This function will be called by each tick interrupt if
|
||||
configUSE_TICK_HOOK is set to 1 in FreeRTOSConfig.h. User code can be
|
||||
added here, but the tick hook is called from an interrupt context, so
|
||||
code must not attempt to block, and only the interrupt safe FreeRTOS API
|
||||
functions can be used (those that end in FromISR()). */
|
||||
|
||||
/* Only the full demo uses the tick hook so there is no code is
|
||||
executed here. */
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,355 @@
|
||||
/*
|
||||
* -------------------------------------------
|
||||
* MSP432 DriverLib - v01_04_00_18
|
||||
* -------------------------------------------
|
||||
*
|
||||
* --COPYRIGHT--,BSD,BSD
|
||||
* Copyright (c) 2015, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#include <aes256.h>
|
||||
#include <interrupt.h>
|
||||
#include <debug.h>
|
||||
|
||||
bool AES256_setCipherKey(uint32_t moduleInstance, const uint8_t * cipherKey,
|
||||
uint_fast16_t keyLength)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t sCipherKey;
|
||||
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r |= 0;
|
||||
|
||||
switch (keyLength)
|
||||
{
|
||||
case AES256_KEYLENGTH_128BIT:
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r |= AESKL__128BIT;
|
||||
break;
|
||||
|
||||
case AES256_KEYLENGTH_192BIT:
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r |= AESKL__192BIT;
|
||||
break;
|
||||
|
||||
case AES256_KEYLENGTH_256BIT:
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r |= AESKL__256BIT;
|
||||
break;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
|
||||
keyLength = keyLength / 8;
|
||||
|
||||
for (i = 0; i < keyLength; i = i + 2)
|
||||
{
|
||||
sCipherKey = (uint16_t) (cipherKey[i]);
|
||||
sCipherKey = sCipherKey | ((uint16_t) (cipherKey[i + 1]) << 8);
|
||||
AES256_CMSIS(moduleInstance)->rKEY.r = sCipherKey;
|
||||
}
|
||||
|
||||
// Wait until key is written
|
||||
while (!BITBAND_PERI(AES256_CMSIS(moduleInstance)->rSTAT.r, AESKEYWR_OFS))
|
||||
;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
void AES256_encryptData(uint32_t moduleInstance, const uint8_t * data,
|
||||
uint8_t * encryptedData)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t tempData = 0;
|
||||
uint16_t tempVariable = 0;
|
||||
|
||||
// Set module to encrypt mode
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r &= ~AESOP_M;
|
||||
|
||||
// Write data to encrypt to module
|
||||
for (i = 0; i < 16; i = i + 2)
|
||||
{
|
||||
tempVariable = (uint16_t) (data[i]);
|
||||
tempVariable = tempVariable | ((uint16_t) (data[i + 1]) << 8);
|
||||
AES256_CMSIS(moduleInstance)->rDIN.r = tempVariable;
|
||||
}
|
||||
|
||||
// Key that is already written shall be used
|
||||
// Encryption is initialized by setting AESKEYWR to 1
|
||||
BITBAND_PERI(AES256_CMSIS(moduleInstance)->rSTAT.r, AESKEYWR_OFS) = 1;
|
||||
|
||||
// Wait unit finished ~167 MCLK
|
||||
while (BITBAND_PERI(AES256_CMSIS(moduleInstance)->rSTAT.r, AESBUSY_OFS))
|
||||
;
|
||||
|
||||
// Write encrypted data back to variable
|
||||
for (i = 0; i < 16; i = i + 2)
|
||||
{
|
||||
tempData = AES256_CMSIS(moduleInstance)->rDOUT.r;
|
||||
*(encryptedData + i) = (uint8_t) tempData;
|
||||
*(encryptedData + i + 1) = (uint8_t) (tempData >> 8);
|
||||
}
|
||||
}
|
||||
|
||||
void AES256_decryptData(uint32_t moduleInstance, const uint8_t * data,
|
||||
uint8_t * decryptedData)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t tempData = 0;
|
||||
uint16_t tempVariable = 0;
|
||||
|
||||
// Set module to decrypt mode
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r |= (AESOP_3);
|
||||
|
||||
// Write data to decrypt to module
|
||||
for (i = 0; i < 16; i = i + 2)
|
||||
{
|
||||
tempVariable = (uint16_t) (data[i + 1] << 8);
|
||||
tempVariable = tempVariable | ((uint16_t) (data[i]));
|
||||
AES256_CMSIS(moduleInstance)->rDIN.r = tempVariable;
|
||||
}
|
||||
|
||||
// Key that is already written shall be used
|
||||
// Now decryption starts
|
||||
BITBAND_PERI(AES256_CMSIS(moduleInstance)->rSTAT.r, AESKEYWR_OFS) = 1;
|
||||
|
||||
// Wait unit finished ~167 MCLK
|
||||
while (BITBAND_PERI(AES256_CMSIS(moduleInstance)->rSTAT.r, AESBUSY_OFS))
|
||||
;
|
||||
|
||||
// Write encrypted data back to variable
|
||||
for (i = 0; i < 16; i = i + 2)
|
||||
{
|
||||
tempData = AES256_CMSIS(moduleInstance)->rDOUT.r;
|
||||
*(decryptedData + i) = (uint8_t) tempData;
|
||||
*(decryptedData + i + 1) = (uint8_t) (tempData >> 8);
|
||||
}
|
||||
}
|
||||
|
||||
bool AES256_setDecipherKey(uint32_t moduleInstance, const uint8_t * cipherKey,
|
||||
uint_fast16_t keyLength)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t tempVariable = 0;
|
||||
|
||||
// Set module to decrypt mode
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r =
|
||||
(AES256_CMSIS(moduleInstance)->rCTL0.r & ~AESOP_M) | AESOP1;
|
||||
|
||||
switch (keyLength)
|
||||
{
|
||||
case AES256_KEYLENGTH_128BIT:
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r |= AESKL__128BIT;
|
||||
break;
|
||||
|
||||
case AES256_KEYLENGTH_192BIT:
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r |= AESKL__192BIT;
|
||||
break;
|
||||
|
||||
case AES256_KEYLENGTH_256BIT:
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r |= AESKL__256BIT;
|
||||
break;
|
||||
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
|
||||
keyLength = keyLength / 8;
|
||||
|
||||
// Write cipher key to key register
|
||||
for (i = 0; i < keyLength; i = i + 2)
|
||||
{
|
||||
tempVariable = (uint16_t) (cipherKey[i]);
|
||||
tempVariable = tempVariable | ((uint16_t) (cipherKey[i + 1]) << 8);
|
||||
AES256_CMSIS(moduleInstance)->rKEY.r = tempVariable;
|
||||
}
|
||||
|
||||
// Wait until key is processed ~52 MCLK
|
||||
while (BITBAND_PERI(AES256_CMSIS(moduleInstance)->rSTAT.r, AESBUSY_OFS))
|
||||
;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
void AES256_clearInterruptFlag(uint32_t moduleInstance)
|
||||
{
|
||||
BITBAND_PERI(AES256_CMSIS(moduleInstance)->rCTL0.r,AESRDYIFG_OFS) = 0;
|
||||
}
|
||||
|
||||
uint32_t AES256_getInterruptFlagStatus(uint32_t moduleInstance)
|
||||
{
|
||||
return BITBAND_PERI(AES256_CMSIS(moduleInstance)->rCTL0.r, AESRDYIFG_OFS);
|
||||
}
|
||||
|
||||
void AES256_enableInterrupt(uint32_t moduleInstance)
|
||||
{
|
||||
BITBAND_PERI(AES256_CMSIS(moduleInstance)->rCTL0.r,AESRDYIE_OFS) = 1;
|
||||
}
|
||||
|
||||
void AES256_disableInterrupt(uint32_t moduleInstance)
|
||||
{
|
||||
BITBAND_PERI(AES256_CMSIS(moduleInstance)->rCTL0.r,AESRDYIE_OFS) = 0;
|
||||
}
|
||||
|
||||
void AES256_reset(uint32_t moduleInstance)
|
||||
{
|
||||
BITBAND_PERI(AES256_CMSIS(moduleInstance)->rCTL0.r,AESSWRST_OFS) = 1;
|
||||
}
|
||||
|
||||
void AES256_startEncryptData(uint32_t moduleInstance, const uint8_t * data)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t tempVariable = 0;
|
||||
|
||||
// Set module to encrypt mode
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r &= ~AESOP_M;
|
||||
|
||||
// Write data to encrypt to module
|
||||
for (i = 0; i < 16; i = i + 2)
|
||||
{
|
||||
tempVariable = (uint16_t) (data[i]);
|
||||
tempVariable = tempVariable | ((uint16_t) (data[i + 1]) << 8);
|
||||
AES256_CMSIS(moduleInstance)->rDIN.r = tempVariable;
|
||||
}
|
||||
|
||||
// Key that is already written shall be used
|
||||
// Encryption is initialized by setting AESKEYWR to 1
|
||||
BITBAND_PERI(AES256_CMSIS(moduleInstance)->rSTAT.r, AESKEYWR_OFS) = 1;
|
||||
}
|
||||
|
||||
void AES256_startDecryptData(uint32_t moduleInstance, const uint8_t * data)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t tempVariable = 0;
|
||||
|
||||
// Set module to decrypt mode
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r |= (AESOP_3);
|
||||
|
||||
// Write data to decrypt to module
|
||||
for (i = 0; i < 16; i = i + 2)
|
||||
{
|
||||
tempVariable = (uint16_t) (data[i + 1] << 8);
|
||||
tempVariable = tempVariable | ((uint16_t) (data[i]));
|
||||
AES256_CMSIS(moduleInstance)->rDIN.r = tempVariable;
|
||||
}
|
||||
|
||||
// Key that is already written shall be used
|
||||
// Now decryption starts
|
||||
BITBAND_PERI(AES256_CMSIS(moduleInstance)->rSTAT.r, AESKEYWR_OFS) = 1;
|
||||
}
|
||||
|
||||
bool AES256_startSetDecipherKey(uint32_t moduleInstance,
|
||||
const uint8_t * cipherKey, uint_fast16_t keyLength)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t tempVariable = 0;
|
||||
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r =
|
||||
(AES256_CMSIS(moduleInstance)->rCTL0.r & ~AESOP_M) | AESOP1;
|
||||
|
||||
switch (keyLength)
|
||||
{
|
||||
case AES256_KEYLENGTH_128BIT:
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r |= AESKL__128BIT;
|
||||
break;
|
||||
|
||||
case AES256_KEYLENGTH_192BIT:
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r |= AESKL__192BIT;
|
||||
break;
|
||||
|
||||
case AES256_KEYLENGTH_256BIT:
|
||||
AES256_CMSIS(moduleInstance)->rCTL0.r |= AESKL__256BIT;
|
||||
break;
|
||||
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
|
||||
keyLength = keyLength / 8;
|
||||
|
||||
// Write cipher key to key register
|
||||
for (i = 0; i < keyLength; i = i + 2)
|
||||
{
|
||||
tempVariable = (uint16_t) (cipherKey[i]);
|
||||
tempVariable = tempVariable | ((uint16_t) (cipherKey[i + 1]) << 8);
|
||||
AES256_CMSIS(moduleInstance)->rKEY.r = tempVariable;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool AES256_getDataOut(uint32_t moduleInstance, uint8_t *outputData)
|
||||
{
|
||||
uint8_t i;
|
||||
uint16_t tempData = 0;
|
||||
|
||||
// If module is busy, exit and return failure
|
||||
if (BITBAND_PERI(AES256_CMSIS(moduleInstance)->rSTAT.r, AESBUSY_OFS))
|
||||
return false;
|
||||
|
||||
// Write encrypted data back to variable
|
||||
for (i = 0; i < 16; i = i + 2)
|
||||
{
|
||||
tempData = AES256_CMSIS(moduleInstance)->rDOUT.r;
|
||||
*(outputData + i) = (uint8_t) tempData;
|
||||
*(outputData + i + 1) = (uint8_t) (tempData >> 8);
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool AES256_isBusy(uint32_t moduleInstance)
|
||||
{
|
||||
return BITBAND_PERI(AES256_CMSIS(moduleInstance)->rSTAT.r, AESBUSY_OFS);
|
||||
}
|
||||
|
||||
void AES256_clearErrorFlag(uint32_t moduleInstance)
|
||||
{
|
||||
BITBAND_PERI(AES256_CMSIS(moduleInstance)->rCTL0.r, AESERRFG_OFS) = 0;
|
||||
}
|
||||
|
||||
uint32_t AES256_getErrorFlagStatus(uint32_t moduleInstance)
|
||||
{
|
||||
return BITBAND_PERI(AES256_CMSIS(moduleInstance)->rCTL0.r, AESERRFG_OFS);
|
||||
}
|
||||
|
||||
void AES256_registerInterrupt(uint32_t moduleInstance, void (*intHandler)(void))
|
||||
{
|
||||
Interrupt_registerInterrupt(INT_AES256, intHandler);
|
||||
Interrupt_enableInterrupt(INT_AES256);
|
||||
}
|
||||
|
||||
void AES256_unregisterInterrupt(uint32_t moduleInstance)
|
||||
{
|
||||
Interrupt_disableInterrupt(INT_AES256);
|
||||
Interrupt_unregisterInterrupt(INT_AES256);
|
||||
}
|
||||
|
||||
uint32_t AES256_getInterruptStatus(uint32_t moduleInstance)
|
||||
{
|
||||
return AES256_getInterruptFlagStatus(moduleInstance);
|
||||
}
|
||||
|
||||
@@ -0,0 +1,451 @@
|
||||
/*
|
||||
* -------------------------------------------
|
||||
* MSP432 DriverLib - v01_04_00_18
|
||||
* -------------------------------------------
|
||||
*
|
||||
* --COPYRIGHT--,BSD,BSD
|
||||
* Copyright (c) 2015, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#ifndef AES256_H_
|
||||
#define AES256_H_
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup aes256_api
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <msp.h>
|
||||
|
||||
/* Module Defines and macro for easy access */
|
||||
#define AES256_CMSIS(x) ((AES256_Type *) x)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are deprecated values. Please refer to documentation for the
|
||||
// correct values to use.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define Key_128BIT 128
|
||||
#define Key_192BIT 192
|
||||
#define Key_256BIT 256
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the keyLength parameter for
|
||||
// functions: AES256_setCipherKey(), AES256_setDecipherKey(), and
|
||||
// AES256_startSetDecipherKey().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES256_KEYLENGTH_128BIT 128
|
||||
#define AES256_KEYLENGTH_192BIT 192
|
||||
#define AES256_KEYLENGTH_256BIT 256
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed toThe following are values that
|
||||
// can be returned by the AES256_getErrorFlagStatus() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES256_ERROR_OCCURRED AESERRFG
|
||||
#define AES256_NO_ERROR 0x00
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed toThe following are values that
|
||||
// can be returned by the AES256_isBusy() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES256_BUSY AESBUSY
|
||||
#define AES256_NOT_BUSY 0x00
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed toThe following are values that
|
||||
// can be returned by the AES256_getInterruptFlagStatus() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define AES256_READY_INTERRUPT 0x01
|
||||
#define AES256_NOTREADY_INTERRUPT 0x00
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Loads a 128, 192 or 256 bit cipher key to AES256 module.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//! \param cipherKey is a pointer to an uint8_t array with a length of 16 bytes
|
||||
//! that contains a 128 bit cipher key.
|
||||
//! \param keyLength is the length of the key.
|
||||
//! Valid values are:
|
||||
//! - \b AES256_KEYLENGTH_128BIT
|
||||
//! - \b AES256_KEYLENGTH_192BIT
|
||||
//! - \b AES256_KEYLENGTH_256BIT
|
||||
//!
|
||||
//! \return true if set correctly, false otherwise
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern bool AES256_setCipherKey(uint32_t moduleInstance,
|
||||
const uint8_t *cipherKey, uint_fast16_t keyLength);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Encrypts a block of data using the AES256 module.
|
||||
//!
|
||||
//! The cipher key that is used for encryption should be loaded in advance by
|
||||
//! using function AES256_setCipherKey()
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
|
||||
//! contains data to be encrypted.
|
||||
//! \param encryptedData is a pointer to an uint8_t array with a length of 16
|
||||
//! bytes in that the encrypted data will be written.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_encryptData(uint32_t moduleInstance, const uint8_t *data,
|
||||
uint8_t *encryptedData);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Decrypts a block of data using the AES256 module.
|
||||
//!
|
||||
//! This function requires a pregenerated decryption key. A key can be loaded
|
||||
//! and pregenerated by using function AES256_setDecipherKey() or
|
||||
//! AES256_startSetDecipherKey(). The decryption takes 167 MCLK.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
|
||||
//! contains encrypted data to be decrypted.
|
||||
//! \param decryptedData is a pointer to an uint8_t array with a length of 16
|
||||
//! bytes in that the decrypted data will be written.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_decryptData(uint32_t moduleInstance, const uint8_t *data,
|
||||
uint8_t *decryptedData);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets the decipher key.
|
||||
//!
|
||||
//! The API AES256_startSetDecipherKey or AES256_setDecipherKey must be invoked
|
||||
//! before invoking AES256_startDecryptData.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//! \param cipherKey is a pointer to an uint8_t array with a length of 16 bytes
|
||||
//! that contains a 128 bit cipher key.
|
||||
//! \param keyLength is the length of the key.
|
||||
//! Valid values are:
|
||||
//! - \b AES256_KEYLENGTH_128BIT
|
||||
//! - \b AES256_KEYLENGTH_192BIT
|
||||
//! - \b AES256_KEYLENGTH_256BIT
|
||||
//!
|
||||
//! \return true if set, false otherwise
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern bool AES256_setDecipherKey(uint32_t moduleInstance,
|
||||
const uint8_t *cipherKey, uint_fast16_t keyLength);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Clears the AES256 ready interrupt flag.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//!
|
||||
//! Modified bits are \b AESRDYIFG of \b AESACTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_clearInterruptFlag(uint32_t moduleInstance);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Gets the AES256 ready interrupt flag status.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//!
|
||||
//! \return One of the following:
|
||||
//! - \b AES256_READY_INTERRUPT
|
||||
//! - \b AES256_NOTREADY_INTERRUPT
|
||||
//! \n indicating the status of the AES256 ready status
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint32_t AES256_getInterruptFlagStatus(uint32_t moduleInstance);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Enables AES256 ready interrupt.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//!
|
||||
//! Modified bits are \b AESRDYIE of \b AESACTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_enableInterrupt(uint32_t moduleInstance);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Disables AES256 ready interrupt.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//!
|
||||
//! Modified bits are \b AESRDYIE of \b AESACTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_disableInterrupt(uint32_t moduleInstance);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Resets AES256 Module immediately.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//!
|
||||
//! Modified bits are \b AESSWRST of \b AESACTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_reset(uint32_t moduleInstance);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Starts an encryption process on the AES256 module.
|
||||
//!
|
||||
//! The cipher key that is used for decryption should be loaded in advance by
|
||||
//! using function AES256_setCipherKey(). This is a non-blocking equivalent pf
|
||||
//! AES256_encryptData(). It is recommended to use the interrupt functionality
|
||||
//! to check for procedure completion then use the AES256_getDataOut() API to
|
||||
//! retrieve the encrypted data.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
|
||||
//! contains data to be encrypted.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_startEncryptData(uint32_t moduleInstance,
|
||||
const uint8_t *data);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Decypts a block of data using the AES256 module.
|
||||
//!
|
||||
//! This is the non-blocking equivalant of AES256_decryptData(). This function
|
||||
//! requires a pregenerated decryption key. A key can be loaded and
|
||||
//! pregenerated by using function AES256_setDecipherKey() or
|
||||
//! AES256_startSetDecipherKey(). The decryption takes 167 MCLK. It is
|
||||
//! recommended to use interrupt to check for procedure completion then use the
|
||||
//! AES256_getDataOut() API to retrieve the decrypted data.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
|
||||
//! contains encrypted data to be decrypted.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_startDecryptData(uint32_t moduleInstance,
|
||||
const uint8_t *data);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Sets the decipher key
|
||||
//!
|
||||
//! The API AES256_startSetDecipherKey() or AES256_setDecipherKey() must be
|
||||
//! invoked before invoking AES256_startDecryptData.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//! \param cipherKey is a pointer to an uint8_t array with a length of 16 bytes
|
||||
//! that contains a 128 bit cipher key.
|
||||
//! \param keyLength is the length of the key.
|
||||
//! Valid values are:
|
||||
//! - \b AES256_KEYLENGTH_128BIT
|
||||
//! - \b AES256_KEYLENGTH_192BIT
|
||||
//! - \b AES256_KEYLENGTH_256BIT
|
||||
//!
|
||||
//! \return true if set correctly, false otherwise
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern bool AES256_startSetDecipherKey(uint32_t moduleInstance,
|
||||
const uint8_t *cipherKey, uint_fast16_t keyLength);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Reads back the output data from AES256 module.
|
||||
//!
|
||||
//! This function is meant to use after an encryption or decryption process
|
||||
//! that was started and finished by initiating an interrupt by use of
|
||||
//! AES256_startEncryptData or AES256_startDecryptData functions.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//! \param outputData is a pointer to an uint8_t array with a length of 16
|
||||
//! bytes in that the data will be written.
|
||||
//!
|
||||
//! \return true if data is valid, otherwise false
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern bool AES256_getDataOut(uint32_t moduleInstance,
|
||||
uint8_t *outputData);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Gets the AES256 module busy status.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//!
|
||||
//! \return true if busy, false otherwise
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern bool AES256_isBusy(uint32_t moduleInstance);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Clears the AES256 error flag.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//!
|
||||
//! Modified bits are \b AESERRFG of \b AESACTL0 register.
|
||||
//!
|
||||
//! \return None
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_clearErrorFlag(uint32_t moduleInstance);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \brief Gets the AES256 error flag status.
|
||||
//!
|
||||
//! \param moduleInstance is the base address of the AES256 module.
|
||||
//!
|
||||
//! \return One of the following:
|
||||
//! - \b AES256_ERROR_OCCURRED
|
||||
//! - \b AES256_NO_ERROR
|
||||
//! \n indicating the error flag status
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint32_t AES256_getErrorFlagStatus(uint32_t moduleInstance);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Registers an interrupt handler for the AES interrupt.
|
||||
//!
|
||||
//! \param moduleInstance Instance of the AES256 module
|
||||
//!
|
||||
//! \param intHandler is a pointer to the function to be called when the
|
||||
//! AES interrupt occurs.
|
||||
//!
|
||||
//! This function registers the handler to be called when a AES
|
||||
//! interrupt occurs. This function enables the global interrupt in the
|
||||
//! interrupt controller; specific AES interrupts must be enabled
|
||||
//! via AES256_enableInterrupt(). It is the interrupt handler's responsibility
|
||||
//! to clear the interrupt source via AES256_clearInterrupt().
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_registerInterrupt(uint32_t moduleInstance,
|
||||
void (*intHandler)(void));
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Unregisters the interrupt handler for the AES interrupt
|
||||
//!
|
||||
//! \param moduleInstance Instance of the AES256 module
|
||||
//!
|
||||
//! This function unregisters the handler to be called when AES
|
||||
//! interrupt occurs. This function also masks off the interrupt in the
|
||||
//! interrupt controller so that the interrupt handler no longer is called.
|
||||
//!
|
||||
//! \sa Interrupt_registerInterrupt() for important information about
|
||||
//! registering interrupt handlers.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void AES256_unregisterInterrupt(uint32_t moduleInstance);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Returns the current interrupt flag for the peripheral.
|
||||
//!
|
||||
//! \param moduleInstance Instance of the AES256 module
|
||||
//!
|
||||
//! \return The currently triggered interrupt flag for the module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint32_t AES256_getInterruptStatus(uint32_t moduleInstance);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#endif /* AES256_H_ */
|
||||
|
||||
@@ -0,0 +1,316 @@
|
||||
/*
|
||||
* -------------------------------------------
|
||||
* MSP432 DriverLib - v01_04_00_18
|
||||
* -------------------------------------------
|
||||
*
|
||||
* --COPYRIGHT--,BSD,BSD
|
||||
* Copyright (c) 2015, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#include <comp_e.h>
|
||||
#include <interrupt.h>
|
||||
#include <debug.h>
|
||||
|
||||
static uint16_t __getRegisterSettingForInput(uint32_t input)
|
||||
{
|
||||
switch (input)
|
||||
{
|
||||
case COMP_E_INPUT0:
|
||||
return CEIPSEL_0;
|
||||
case COMP_E_INPUT1:
|
||||
return CEIPSEL_1;
|
||||
case COMP_E_INPUT2:
|
||||
return CEIPSEL_2;
|
||||
case COMP_E_INPUT3:
|
||||
return CEIPSEL_3;
|
||||
case COMP_E_INPUT4:
|
||||
return CEIPSEL_4;
|
||||
case COMP_E_INPUT5:
|
||||
return CEIPSEL_5;
|
||||
case COMP_E_INPUT6:
|
||||
return CEIPSEL_6;
|
||||
case COMP_E_INPUT7:
|
||||
return CEIPSEL_7;
|
||||
case COMP_E_INPUT8:
|
||||
return CEIPSEL_8;
|
||||
case COMP_E_INPUT9:
|
||||
return CEIPSEL_9;
|
||||
case COMP_E_INPUT10:
|
||||
return CEIPSEL_10;
|
||||
case COMP_E_INPUT11:
|
||||
return CEIPSEL_11;
|
||||
case COMP_E_INPUT12:
|
||||
return CEIPSEL_12;
|
||||
case COMP_E_INPUT13:
|
||||
return CEIPSEL_13;
|
||||
case COMP_E_INPUT14:
|
||||
return CEIPSEL_14;
|
||||
case COMP_E_INPUT15:
|
||||
return CEIPSEL_15;
|
||||
case COMP_E_VREF:
|
||||
return COMP_E_VREF;
|
||||
default:
|
||||
ASSERT(false);
|
||||
return 0x11;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
bool COMP_E_initModule(uint32_t comparator, const COMP_E_Config *config)
|
||||
{
|
||||
uint_fast8_t positiveTerminalInput = __getRegisterSettingForInput(
|
||||
config->positiveTerminalInput);
|
||||
uint_fast8_t negativeTerminalInput = __getRegisterSettingForInput(
|
||||
config->negativeTerminalInput);
|
||||
bool retVal = true;
|
||||
|
||||
ASSERT(positiveTerminalInput < 0x10); ASSERT(negativeTerminalInput < 0x10);
|
||||
ASSERT(positiveTerminalInput != negativeTerminalInput);
|
||||
ASSERT(
|
||||
config->outputFilterEnableAndDelayLevel
|
||||
<= COMP_E_FILTEROUTPUT_DLYLVL4);
|
||||
|
||||
/* Reset COMPE Control 1 & Interrupt Registers for initialization */
|
||||
COMP_E_CMSIS(comparator)->rCTL0.r = 0;
|
||||
COMP_E_CMSIS(comparator)->rINT.r = 0;
|
||||
|
||||
// Set the Positive Terminal
|
||||
if (COMP_E_VREF != positiveTerminalInput)
|
||||
{
|
||||
// Enable Positive Terminal Input Mux and Set to the appropriate input
|
||||
COMP_E_CMSIS(comparator)->rCTL0.r |= CEIPEN + positiveTerminalInput;
|
||||
|
||||
// Disable the input buffer
|
||||
COMP_E_CMSIS(comparator)->rCTL3.r |= (1 << positiveTerminalInput);
|
||||
} else
|
||||
{
|
||||
// Reset and Set COMPE Control 2 Register
|
||||
BITBAND_PERI(COMP_E_CMSIS(comparator)->rCTL2.r,CERSEL_OFS) = 0;
|
||||
}
|
||||
|
||||
// Set the Negative Terminal
|
||||
if (COMP_E_VREF != negativeTerminalInput)
|
||||
{
|
||||
// Enable Negative Terminal Input Mux and Set to the appropriate input
|
||||
COMP_E_CMSIS(comparator)->rCTL0.r |= CEIMEN
|
||||
+ (negativeTerminalInput << 8);
|
||||
|
||||
// Disable the input buffer
|
||||
COMP_E_CMSIS(comparator)->rCTL3.r |= (1 << negativeTerminalInput);
|
||||
} else
|
||||
{
|
||||
// Reset and Set COMPE Control 2 Register
|
||||
BITBAND_PERI(COMP_E_CMSIS(comparator)->rCTL2.r, CERSEL_OFS) = 1;
|
||||
}
|
||||
|
||||
// Reset and Set COMPE Control 1 Register
|
||||
COMP_E_CMSIS(comparator)->rCTL1.r = config->powerMode
|
||||
+ config->outputFilterEnableAndDelayLevel
|
||||
+ config->invertedOutputPolarity;
|
||||
|
||||
return retVal;
|
||||
}
|
||||
|
||||
void COMP_E_setReferenceVoltage(uint32_t comparator,
|
||||
uint_fast16_t supplyVoltageReferenceBase,
|
||||
uint_fast16_t lowerLimitSupplyVoltageFractionOf32,
|
||||
uint_fast16_t upperLimitSupplyVoltageFractionOf32)
|
||||
{
|
||||
ASSERT(supplyVoltageReferenceBase <= COMP_E_VREFBASE2_5V);
|
||||
ASSERT(upperLimitSupplyVoltageFractionOf32 <= 32);
|
||||
ASSERT(lowerLimitSupplyVoltageFractionOf32 <= 32); ASSERT(
|
||||
upperLimitSupplyVoltageFractionOf32
|
||||
>= lowerLimitSupplyVoltageFractionOf32);
|
||||
|
||||
BITBAND_PERI(COMP_E_CMSIS(comparator)->rCTL1.r, CEMRVS_OFS) = 0;
|
||||
COMP_E_CMSIS(comparator)->rCTL2.r &= CERSEL;
|
||||
|
||||
// Set Voltage Source(Vcc | Vref, resistor ladder or not)
|
||||
if (COMP_E_REFERENCE_AMPLIFIER_DISABLED == supplyVoltageReferenceBase)
|
||||
{
|
||||
COMP_E_CMSIS(comparator)->rCTL2.r |= CERS_1;
|
||||
} else if (lowerLimitSupplyVoltageFractionOf32 == 32)
|
||||
{
|
||||
COMP_E_CMSIS(comparator)->rCTL2.r |= CERS_3;
|
||||
} else
|
||||
{
|
||||
COMP_E_CMSIS(comparator)->rCTL2.r |= CERS_2;
|
||||
}
|
||||
|
||||
// Set COMPE Control 2 Register
|
||||
COMP_E_CMSIS(comparator)->rCTL2.r |= supplyVoltageReferenceBase
|
||||
+ ((upperLimitSupplyVoltageFractionOf32 - 1) << 8)
|
||||
+ (lowerLimitSupplyVoltageFractionOf32 - 1);
|
||||
}
|
||||
|
||||
void COMP_E_setReferenceAccuracy(uint32_t comparator,
|
||||
uint_fast16_t referenceAccuracy)
|
||||
{
|
||||
ASSERT(
|
||||
(referenceAccuracy == COMP_E_ACCURACY_STATIC)
|
||||
|| (referenceAccuracy == COMP_E_ACCURACY_CLOCKED));
|
||||
|
||||
if (referenceAccuracy)
|
||||
BITBAND_PERI(COMP_E_CMSIS(comparator)->rCTL2.r, CEREFACC_OFS) = 1;
|
||||
else
|
||||
BITBAND_PERI(COMP_E_CMSIS(comparator)->rCTL2.r, CEREFACC_OFS) = 0;
|
||||
|
||||
}
|
||||
|
||||
void COMP_E_setPowerMode(uint32_t comparator, uint_fast16_t powerMode)
|
||||
{
|
||||
COMP_E_CMSIS(comparator)->rCTL1.r = (COMP_E_CMSIS(comparator)->rCTL1.r
|
||||
& ~(CEPWRMD_M)) | powerMode;
|
||||
}
|
||||
|
||||
void COMP_E_enableModule(uint32_t comparator)
|
||||
{
|
||||
BITBAND_PERI(COMP_E_CMSIS(comparator)->rCTL1.r, CEON_OFS) = 1;
|
||||
}
|
||||
|
||||
void COMP_E_disableModule(uint32_t comparator)
|
||||
{
|
||||
BITBAND_PERI(COMP_E_CMSIS(comparator)->rCTL1.r, CEON_OFS) = 0;
|
||||
}
|
||||
|
||||
void COMP_E_shortInputs(uint32_t comparator)
|
||||
{
|
||||
BITBAND_PERI(COMP_E_CMSIS(comparator)->rCTL1.r, CESHORT_OFS) = 1;
|
||||
}
|
||||
|
||||
void COMP_E_unshortInputs(uint32_t comparator)
|
||||
{
|
||||
BITBAND_PERI(COMP_E_CMSIS(comparator)->rCTL1.r, CESHORT_OFS) = 0;
|
||||
}
|
||||
|
||||
void COMP_E_disableInputBuffer(uint32_t comparator, uint_fast16_t inputPort)
|
||||
{
|
||||
ASSERT(inputPort <= COMP_E_INPUT15);
|
||||
|
||||
COMP_E_CMSIS(comparator)->rCTL3.r |= (inputPort);
|
||||
}
|
||||
|
||||
void COMP_E_enableInputBuffer(uint32_t comparator, uint_fast16_t inputPort)
|
||||
{
|
||||
ASSERT(inputPort <= COMP_E_INPUT15);
|
||||
|
||||
COMP_E_CMSIS(comparator)->rCTL3.r &= ~(inputPort);
|
||||
}
|
||||
|
||||
void COMP_E_swapIO(uint32_t comparator)
|
||||
{
|
||||
COMP_E_CMSIS(comparator)->rCTL1.r ^= CEEX; // Toggle CEEX bit
|
||||
}
|
||||
|
||||
uint8_t COMP_E_outputValue(uint32_t comparator)
|
||||
{
|
||||
return COMP_E_CMSIS(comparator)->rCTL1.r & CEOUT;
|
||||
}
|
||||
|
||||
void COMP_E_enableInterrupt(uint32_t comparator, uint_fast16_t mask)
|
||||
{
|
||||
// Set the Interrupt enable bit
|
||||
COMP_E_CMSIS(comparator)->rINT.r |= mask;
|
||||
}
|
||||
|
||||
uint_fast16_t COMP_E_getEnabledInterruptStatus(uint32_t comparator)
|
||||
{
|
||||
return COMP_E_getInterruptStatus(comparator) &
|
||||
COMP_E_CMSIS(comparator)->rINT.r;
|
||||
}
|
||||
|
||||
void COMP_E_disableInterrupt(uint32_t comparator, uint_fast16_t mask)
|
||||
{
|
||||
COMP_E_CMSIS(comparator)->rINT.r &= ~(mask);
|
||||
}
|
||||
|
||||
void COMP_E_clearInterruptFlag(uint32_t comparator, uint_fast16_t mask)
|
||||
{
|
||||
COMP_E_CMSIS(comparator)->rINT.r &= ~(mask);
|
||||
}
|
||||
|
||||
uint_fast16_t COMP_E_getInterruptStatus(uint32_t comparator)
|
||||
{
|
||||
return (COMP_E_CMSIS(comparator)->rINT.r & (COMP_E_OUTPUT_INTERRUPT_FLAG |
|
||||
COMP_E_INTERRUPT_FLAG_INVERTED_POLARITY |
|
||||
COMP_E_INTERRUPT_FLAG_READY));
|
||||
}
|
||||
|
||||
void COMP_E_setInterruptEdgeDirection(uint32_t comparator,
|
||||
uint_fast8_t edgeDirection)
|
||||
{
|
||||
ASSERT(edgeDirection <= COMP_E_RISINGEDGE);
|
||||
|
||||
// Set the edge direction that will trigger an interrupt
|
||||
if (COMP_E_RISINGEDGE == edgeDirection)
|
||||
BITBAND_PERI(COMP_E_CMSIS(comparator)->rCTL1.r, CEIES_OFS) = 1;
|
||||
else if (COMP_E_FALLINGEDGE == edgeDirection)
|
||||
BITBAND_PERI(COMP_E_CMSIS(comparator)->rCTL1.r, CEIES_OFS) = 0;
|
||||
}
|
||||
|
||||
void COMP_E_toggleInterruptEdgeDirection(uint32_t comparator)
|
||||
{
|
||||
COMP_E_CMSIS(comparator)->rCTL1.r ^= CEIES;
|
||||
}
|
||||
|
||||
void COMP_E_registerInterrupt(uint32_t comparator, void (*intHandler)(void))
|
||||
{
|
||||
switch (comparator)
|
||||
{
|
||||
case COMP_E0_MODULE:
|
||||
Interrupt_registerInterrupt(INT_COMP_E0, intHandler);
|
||||
Interrupt_enableInterrupt(INT_COMP_E0);
|
||||
break;
|
||||
case COMP_E1_MODULE:
|
||||
Interrupt_registerInterrupt(INT_COMP_E1, intHandler);
|
||||
Interrupt_enableInterrupt(INT_COMP_E1);
|
||||
break;
|
||||
default:
|
||||
ASSERT(false);
|
||||
}
|
||||
}
|
||||
|
||||
void COMP_E_unregisterInterrupt(uint32_t comparator)
|
||||
{
|
||||
switch (comparator)
|
||||
{
|
||||
case COMP_E0_MODULE:
|
||||
Interrupt_disableInterrupt(INT_COMP_E0);
|
||||
Interrupt_unregisterInterrupt(INT_COMP_E0);
|
||||
break;
|
||||
case COMP_E1_MODULE:
|
||||
Interrupt_disableInterrupt(INT_COMP_E1);
|
||||
Interrupt_unregisterInterrupt(INT_COMP_E1);
|
||||
break;
|
||||
default:
|
||||
ASSERT(false);
|
||||
}
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,430 @@
|
||||
/*
|
||||
* -------------------------------------------
|
||||
* MSP432 DriverLib - v01_04_00_18
|
||||
* -------------------------------------------
|
||||
*
|
||||
* --COPYRIGHT--,BSD,BSD
|
||||
* Copyright (c) 2015, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#include <cpu.h>
|
||||
#include <msp.h>
|
||||
#include <stdint.h>
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for the CPSID instruction. Returns the state of PRIMASK
|
||||
// on entry.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(gcc)
|
||||
uint32_t __attribute__((naked)) CPU_cpsid(void)
|
||||
{
|
||||
uint32_t ret;
|
||||
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsid i\n"
|
||||
" bx lr\n"
|
||||
: "=r" (ret));
|
||||
|
||||
//
|
||||
// The return is handled in the inline assembly, but the compiler will
|
||||
// still complain if there is not an explicit return here (despite the fact
|
||||
// that this does not result in any code being produced because of the
|
||||
// naked attribute).
|
||||
//
|
||||
return(ret);
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
uint32_t CPU_cpsid(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsid i\n");
|
||||
|
||||
//
|
||||
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||
// above and a superfluous return statement here.
|
||||
//
|
||||
#pragma diag_suppress=Pe940
|
||||
}
|
||||
#pragma diag_default=Pe940
|
||||
#endif
|
||||
#if defined(keil)
|
||||
__asm uint32_t CPU_cpsid(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
mrs r0, PRIMASK;
|
||||
cpsid i;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
uint32_t CPU_cpsid(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsid i\n"
|
||||
" bx lr\n");
|
||||
|
||||
//
|
||||
// The following keeps the compiler happy, because it wants to see a
|
||||
// return value from this function. It will generate code to return
|
||||
// a zero. However, the real return is the "bx lr" above, so the
|
||||
// return(0) is never executed and the function returns with the value
|
||||
// you expect in R0.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function returning the state of PRIMASK (indicating whether
|
||||
// interrupts are enabled or disabled).
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(gcc)
|
||||
uint32_t __attribute__((naked)) CPU_primask(void)
|
||||
{
|
||||
uint32_t ret;
|
||||
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" bx lr\n"
|
||||
: "=r" (ret));
|
||||
|
||||
//
|
||||
// The return is handled in the inline assembly, but the compiler will
|
||||
// still complain if there is not an explicit return here (despite the fact
|
||||
// that this does not result in any code being produced because of the
|
||||
// naked attribute).
|
||||
//
|
||||
return(ret);
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
uint32_t CPU_primask(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n");
|
||||
|
||||
//
|
||||
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||
// above and a superfluous return statement here.
|
||||
//
|
||||
#pragma diag_suppress=Pe940
|
||||
}
|
||||
#pragma diag_default=Pe940
|
||||
#endif
|
||||
#if defined(keil)
|
||||
__asm uint32_t CPU_primask(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
mrs r0, PRIMASK;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
uint32_t CPU_primask(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" bx lr\n");
|
||||
|
||||
//
|
||||
// The following keeps the compiler happy, because it wants to see a
|
||||
// return value from this function. It will generate code to return
|
||||
// a zero. However, the real return is the "bx lr" above, so the
|
||||
// return(0) is never executed and the function returns with the value
|
||||
// you expect in R0.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for the CPSIE instruction. Returns the state of PRIMASK
|
||||
// on entry.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(gcc)
|
||||
uint32_t __attribute__((naked)) CPU_cpsie(void)
|
||||
{
|
||||
uint32_t ret;
|
||||
|
||||
//
|
||||
// Read PRIMASK and enable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsie i\n"
|
||||
" bx lr\n"
|
||||
: "=r" (ret));
|
||||
|
||||
//
|
||||
// The return is handled in the inline assembly, but the compiler will
|
||||
// still complain if there is not an explicit return here (despite the fact
|
||||
// that this does not result in any code being produced because of the
|
||||
// naked attribute).
|
||||
//
|
||||
return(ret);
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
uint32_t CPU_cpsie(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and enable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsie i\n");
|
||||
|
||||
//
|
||||
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||
// above and a superfluous return statement here.
|
||||
//
|
||||
#pragma diag_suppress=Pe940
|
||||
}
|
||||
#pragma diag_default=Pe940
|
||||
#endif
|
||||
#if defined(keil)
|
||||
__asm uint32_t CPU_cpsie(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and enable interrupts.
|
||||
//
|
||||
mrs r0, PRIMASK;
|
||||
cpsie i;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
uint32_t CPU_cpsie(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and enable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsie i\n"
|
||||
" bx lr\n");
|
||||
|
||||
//
|
||||
// The following keeps the compiler happy, because it wants to see a
|
||||
// return value from this function. It will generate code to return
|
||||
// a zero. However, the real return is the "bx lr" above, so the
|
||||
// return(0) is never executed and the function returns with the value
|
||||
// you expect in R0.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for the CPUWFI instruction.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(gcc)
|
||||
void __attribute__((naked)) CPU_wfi(void)
|
||||
{
|
||||
//
|
||||
// Wait for the next interrupt.
|
||||
//
|
||||
__asm(" wfi\n"
|
||||
" bx lr\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
void CPU_wfi(void)
|
||||
{
|
||||
//
|
||||
// Wait for the next interrupt.
|
||||
//
|
||||
__asm(" wfi\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(keil)
|
||||
__asm void CPU_wfi(void)
|
||||
{
|
||||
//
|
||||
// Wait for the next interrupt.
|
||||
//
|
||||
wfi;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
void CPU_wfi(void)
|
||||
{
|
||||
//
|
||||
// Wait for the next interrupt.
|
||||
//
|
||||
__asm(" wfi\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for writing the BASEPRI register.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(gcc)
|
||||
void __attribute__((naked)) CPU_basepriSet(uint32_t newBasepri)
|
||||
{
|
||||
//
|
||||
// Set the BASEPRI register
|
||||
//
|
||||
__asm(" msr BASEPRI, r0\n"
|
||||
" bx lr\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
void CPU_basepriSet(uint32_t newBasepri)
|
||||
{
|
||||
//
|
||||
// Set the BASEPRI register
|
||||
//
|
||||
__asm(" msr BASEPRI, r0\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(keil)
|
||||
__asm void CPU_basepriSet(uint32_t newBasepri)
|
||||
{
|
||||
//
|
||||
// Set the BASEPRI register
|
||||
//
|
||||
msr BASEPRI, r0;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
void CPU_basepriSet(uint32_t newBasepri)
|
||||
{
|
||||
//
|
||||
// Set the BASEPRI register
|
||||
//
|
||||
__asm(" msr BASEPRI, r0\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for reading the BASEPRI register.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(gcc)
|
||||
uint32_t __attribute__((naked)) CPU_basepriGet(void)
|
||||
{
|
||||
uint32_t ret;
|
||||
|
||||
//
|
||||
// Read BASEPRI
|
||||
//
|
||||
__asm(" mrs r0, BASEPRI\n"
|
||||
" bx lr\n"
|
||||
: "=r" (ret));
|
||||
|
||||
//
|
||||
// The return is handled in the inline assembly, but the compiler will
|
||||
// still complain if there is not an explicit return here (despite the fact
|
||||
// that this does not result in any code being produced because of the
|
||||
// naked attribute).
|
||||
//
|
||||
return(ret);
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
uint32_t CPU_basepriGet(void)
|
||||
{
|
||||
//
|
||||
// Read BASEPRI
|
||||
//
|
||||
__asm(" mrs r0, BASEPRI\n");
|
||||
|
||||
//
|
||||
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||
// above and a superfluous return statement here.
|
||||
//
|
||||
#pragma diag_suppress=Pe940
|
||||
}
|
||||
#pragma diag_default=Pe940
|
||||
#endif
|
||||
#if defined(keil)
|
||||
__asm uint32_t CPU_basepriGet(void)
|
||||
{
|
||||
//
|
||||
// Read BASEPRI
|
||||
//
|
||||
mrs r0, BASEPRI;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
uint32_t CPU_basepriGet(void)
|
||||
{
|
||||
//
|
||||
// Read BASEPRI
|
||||
//
|
||||
__asm(" mrs r0, BASEPRI\n"
|
||||
" bx lr\n");
|
||||
|
||||
//
|
||||
// The following keeps the compiler happy, because it wants to see a
|
||||
// return value from this function. It will generate code to return
|
||||
// a zero. However, the real return is the "bx lr" above, so the
|
||||
// return(0) is never executed and the function returns with the value
|
||||
// you expect in R0.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,76 @@
|
||||
/*
|
||||
* -------------------------------------------
|
||||
* MSP432 DriverLib - v01_04_00_18
|
||||
* -------------------------------------------
|
||||
*
|
||||
* --COPYRIGHT--,BSD,BSD
|
||||
* Copyright (c) 2015, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#ifndef __CPU_H__
|
||||
#define __CPU_H__
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint32_t CPU_cpsid(void);
|
||||
extern uint32_t CPU_cpsie(void);
|
||||
extern uint32_t CPU_primask(void);
|
||||
extern void CPU_wfi(void);
|
||||
extern uint32_t CPU_basepriGet(void);
|
||||
extern void CPU_basepriSet(uint32_t newBasepri);
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __CPU_H__
|
||||
|
||||
@@ -0,0 +1,144 @@
|
||||
/*
|
||||
* -------------------------------------------
|
||||
* MSP432 DriverLib - v01_04_00_18
|
||||
* -------------------------------------------
|
||||
*
|
||||
* --COPYRIGHT--,BSD,BSD
|
||||
* Copyright (c) 2015, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#include "crc32.h"
|
||||
#include <msp.h>
|
||||
#include <debug.h>
|
||||
|
||||
void CRC32_setSeed(uint32_t seed, uint_fast8_t crcType)
|
||||
{
|
||||
ASSERT((CRC16_MODE == crcType) || (CRC32_MODE == crcType));
|
||||
|
||||
if (CRC16_MODE == crcType)
|
||||
CRC32->rCRC16INIRES = seed;
|
||||
else
|
||||
{
|
||||
CRC32->rCRC32INIRES_HI = ((seed & 0xFFFF0000) >> 16);
|
||||
CRC32->rCRC32INIRES_LO = (seed & 0xFFFF);
|
||||
}
|
||||
}
|
||||
|
||||
void CRC32_set8BitData(uint8_t dataIn, uint_fast8_t crcType)
|
||||
{
|
||||
ASSERT((CRC16_MODE == crcType) || (CRC32_MODE == crcType));
|
||||
|
||||
if (CRC16_MODE == crcType)
|
||||
HWREG8(CRC32_BASE + OFS_CRC16DI) = dataIn;
|
||||
else
|
||||
HWREG8(CRC32_BASE + OFS_CRC32DI) = dataIn;
|
||||
}
|
||||
|
||||
void CRC32_set16BitData(uint16_t dataIn, uint_fast8_t crcType)
|
||||
{
|
||||
ASSERT((CRC16_MODE == crcType) || (CRC32_MODE == crcType));
|
||||
|
||||
if (CRC16_MODE == crcType)
|
||||
CRC32->rCRC16DI = dataIn;
|
||||
else
|
||||
CRC32->rCRC32DI = dataIn;
|
||||
}
|
||||
|
||||
void CRC32_set32BitData(uint32_t dataIn)
|
||||
{
|
||||
//CRC32->rCRC32DI = dataIn & 0xFFFF;
|
||||
//CRC32->rCRC32DI = (uint16_t) ((dataIn & 0xFFFF0000) >> 16);
|
||||
|
||||
HWREG16(CRC32_BASE + OFS_CRC32DI) = dataIn & 0xFFFF;
|
||||
HWREG16(CRC32_BASE + OFS_CRC32DI) = (uint16_t)(
|
||||
(dataIn & 0xFFFF0000) >> 16);
|
||||
}
|
||||
|
||||
void CRC32_set8BitDataReversed(uint8_t dataIn, uint_fast8_t crcType)
|
||||
{
|
||||
ASSERT((CRC16_MODE == crcType) || (CRC32_MODE == crcType));
|
||||
|
||||
if (CRC16_MODE == crcType)
|
||||
HWREG8(CRC32_BASE + OFS_CRC16DIRB) = dataIn;
|
||||
else
|
||||
HWREG8(CRC32_BASE + OFS_CRC32DIRB) = dataIn;
|
||||
}
|
||||
|
||||
void CRC32_set16BitDataReversed(uint16_t dataIn, uint_fast8_t crcType)
|
||||
{
|
||||
ASSERT((CRC16_MODE == crcType) || (CRC32_MODE == crcType));
|
||||
|
||||
if (CRC16_MODE == crcType)
|
||||
CRC32->rCRC16DIRB = dataIn;
|
||||
else
|
||||
CRC32->rCRC32DIRB = dataIn;
|
||||
}
|
||||
|
||||
void CRC32_set32BitDataReversed(uint32_t dataIn)
|
||||
{
|
||||
HWREG16(CRC32_BASE + OFS_CRC32DIRB) = dataIn & 0xFFFF;
|
||||
HWREG16(CRC32_BASE + OFS_CRC32DIRB) = (uint16_t)(
|
||||
(dataIn & 0xFFFF0000) >> 16);
|
||||
//CRC32->rCRC32DIRB = dataIn & 0xFFFF;
|
||||
//CRC32->rCRC32DIRB = (uint16_t) ((dataIn & 0xFFFF0000) >> 16);
|
||||
}
|
||||
|
||||
uint32_t CRC32_getResult(uint_fast8_t crcType)
|
||||
{
|
||||
uint32_t result;
|
||||
ASSERT((CRC16_MODE == crcType) || (CRC32_MODE == crcType));
|
||||
|
||||
if (CRC16_MODE == crcType)
|
||||
return CRC32->rCRC16INIRES;
|
||||
else
|
||||
{
|
||||
result = CRC32->rCRC32INIRES_HI;
|
||||
result = (result << 16);
|
||||
result |= CRC32->rCRC32INIRES_LO;
|
||||
return (result);
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t CRC32_getResultReversed(uint_fast8_t crcType)
|
||||
{
|
||||
uint32_t result;
|
||||
ASSERT((CRC16_MODE == crcType) || (CRC32_MODE == crcType));
|
||||
|
||||
if (CRC16_MODE == crcType)
|
||||
return CRC32->rCRC16RESR;
|
||||
else
|
||||
{
|
||||
result = CRC32->rCRC32RESR_HI;
|
||||
result = (result << 16);
|
||||
result |= CRC32->rCRC32RESR_LO;
|
||||
return (result);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,235 @@
|
||||
/*
|
||||
* -------------------------------------------
|
||||
* MSP432 DriverLib - v01_04_00_18
|
||||
* -------------------------------------------
|
||||
*
|
||||
* --COPYRIGHT--,BSD,BSD
|
||||
* Copyright (c) 2015, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#ifndef _CRC_32_H
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup crc32_api
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define CRC16_MODE 0x00
|
||||
#define CRC32_MODE 0x01
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Sets the seed for the CRC.
|
||||
//!
|
||||
//! \param seed is the seed for the CRC to start generating a signature from.
|
||||
//! Modified bits are \b CRC16INIRESL0 of \b CRC16INIRESL0 register.
|
||||
//! \b CRC32INIRESL0 of \b CRC32INIRESL0 register
|
||||
//! \param crcType selects between CRC32 and CRC16
|
||||
//! Valid values are \b CRC16_MODE and \b CRC32_MODE
|
||||
//!
|
||||
//! This function sets the seed for the CRC to begin generating a signature with
|
||||
//! the given seed and all passed data. Using this function resets the CRC32
|
||||
//! signature.
|
||||
//!
|
||||
//! \return NONE
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC32_setSeed(uint32_t seed, uint_fast8_t crcType);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Sets the 8 Bit data to add into the CRC module to generate a new signature.
|
||||
//!
|
||||
//! \param dataIn is the data to be added, through the CRC module, to the
|
||||
//! signature.
|
||||
//! Modified bits are \b CRC16DIB0 of \b CRC16DIB0 register.
|
||||
//! \b CRC32DIB0 of \b CRC32DIB0 register.
|
||||
//! \param crcType selects between CRC32 and CRC16
|
||||
//! Valid values are \b CRC16_MODE and \b CRC32_MODE
|
||||
//!
|
||||
//! This function sets the given data into the CRC module to generate the new
|
||||
//! signature from the current signature and new data. Bit 0 is
|
||||
//! treated as LSB.
|
||||
//!
|
||||
//! \return NONE
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC32_set8BitData(uint8_t dataIn, uint_fast8_t crcType);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Sets the 16 Bit data to add into the CRC module to generate a new signature.
|
||||
//!
|
||||
//! \param dataIn is the data to be added, through the CRC module, to the
|
||||
//! signature.
|
||||
//! Modified bits are \b CRC16DIW0 of \b CRC16DIW0 register.
|
||||
//! \b CRC32DIW0 of \b CRC32DIW0 register.
|
||||
//! \param crcType selects between CRC32 and CRC16
|
||||
//! Valid values are \b CRC16_MODE and \b CRC32_MODE
|
||||
//!
|
||||
//! This function sets the given data into the CRC module to generate the new
|
||||
//! signature from the current signature and new data. Bit 0 is
|
||||
//! treated as LSB
|
||||
//!
|
||||
//! \return NONE
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC32_set16BitData(uint16_t dataIn, uint_fast8_t crcType);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Sets the 32 Bit data to add into the CRC module to generate a new signature.
|
||||
//! Available only for CRC32_MODE and not for CRC16_MODE
|
||||
//! \param dataIn is the data to be added, through the CRC module, to the
|
||||
//! signature.
|
||||
//! Modified bits are \b CRC32DIL0 of \b CRC32DIL0 register.
|
||||
//!
|
||||
//! This function sets the given data into the CRC module to generate the new
|
||||
//! signature from the current signature and new data. Bit 0 is
|
||||
//! treated as LSB
|
||||
//!
|
||||
//! \return NONE
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC32_set32BitData(uint32_t dataIn);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Translates the data by reversing the bits in each 8 bit data and then sets
|
||||
//! this data to add into the CRC module to generate a new signature.
|
||||
//!
|
||||
//! \param dataIn is the data to be added, through the CRC module, to the
|
||||
//! signature.
|
||||
//! Modified bits are \b CRC16DIRBB0 of \b CRC16DIRBB0 register.
|
||||
//! \b CRC32DIRBB0 of \b CRC32DIRBB0 register.
|
||||
//! \param crcType selects between CRC32 and CRC16
|
||||
//! Valid values are \b CRC16_MODE and \b CRC32_MODE
|
||||
//!
|
||||
//! This function first reverses the bits in each byte of the data and then
|
||||
//! generates the new signature from the current signature and new translated
|
||||
//! data. Bit 0 is treated as MSB.
|
||||
//!
|
||||
//! \return NONE
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC32_set8BitDataReversed(uint8_t dataIn, uint_fast8_t crcType);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Translates the data by reversing the bits in each 16 bit data and then
|
||||
//! sets this data to add into the CRC module to generate a new signature.
|
||||
//!
|
||||
//! \param dataIn is the data to be added, through the CRC module, to the
|
||||
//! signature.
|
||||
//! Modified bits are \b CRC16DIRBW0 of \b CRC16DIRBW0 register.
|
||||
//! \b CRC32DIRBW0 of \b CRC32DIRBW0 register.
|
||||
//! \param crcType selects between CRC32 and CRC16
|
||||
//! Valid values are \b CRC16_MODE and \b CRC32_MODE
|
||||
//!
|
||||
//! This function first reverses the bits in each byte of the data and then
|
||||
//! generates the new signature from the current signature and new translated
|
||||
//! data. Bit 0 is treated as MSB.
|
||||
//!
|
||||
//! \return NONE
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC32_set16BitDataReversed(uint16_t dataIn, uint_fast8_t crcType);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Translates the data by reversing the bits in each 32 Bit Data and then
|
||||
//! sets this data to add into the CRC module to generate a new signature.
|
||||
//! Available only for CRC32 mode and not for CRC16 mode
|
||||
//! \param dataIn is the data to be added, through the CRC module, to the
|
||||
//! signature.
|
||||
//! Modified bits are \b CRC32DIRBL0 of \b CRC32DIRBL0 register.
|
||||
//!
|
||||
//! This function first reverses the bits in each byte of the data and then
|
||||
//! generates the new signature from the current signature and new translated
|
||||
//! data. Bit 0 is treated as MSB.
|
||||
//!
|
||||
//! \return NONE
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CRC32_set32BitDataReversed(uint32_t dataIn);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Returns the value of CRC Signature Result.
|
||||
//!
|
||||
//! \param crcType selects between CRC32 and CRC16
|
||||
//! Valid values are \b CRC16_MODE and \b CRC32_MODE
|
||||
//!
|
||||
//! This function returns the value of the signature result generated by the CRC.
|
||||
//! Bit 0 is treated as LSB.
|
||||
//! \return uint32_t Result
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint32_t CRC32_getResult(uint_fast8_t crcType);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Returns the bit-wise reversed format of the 32 bit Signature Result.
|
||||
//!
|
||||
//! \param crcType selects between CRC32 and CRC16
|
||||
//! Valid values are \b CRC16_MODE and \b CRC32_MODE
|
||||
//!
|
||||
//! This function returns the bit-wise reversed format of the Signature Result.
|
||||
//! Bit 0 is treated as MSB.
|
||||
//!
|
||||
//! \return uint32_t Result
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern uint32_t CRC32_getResultReversed(uint_fast8_t crcType);
|
||||
|
||||
/* Defines for future devices that might have multiple instances */
|
||||
#define CRC32_setSeedMultipleInstance(a,b,c) CRC32_setSeed(b,c)
|
||||
#define CRC32_set8BitDataMultipleInstance(a,b,c) CRC32_set8BitData(b,c)
|
||||
#define CRC32_set16BitDataMultipleInstance(a,b,c) CRC32_set16BitData(b,c)
|
||||
#define CRC32_set32BitDataMultipleInstance(a,b) CRC32_set32BitData(b)
|
||||
#define CRC32_set8BitDataReversedMultipleInstance(a,b,c) CRC32_set8BitDataReversed(b,c)
|
||||
#define CRC32_set16BitDataReversedMultipleInstance(a,b,c) CRC32_set16BitDataReversed(b,c)
|
||||
#define CRC32_set32BitDataReversedMultipleInstance(a,b) CRC32_set32BitDataReversed(b)
|
||||
#define CRC32_getResultMultipleInstance(a,b) CRC32_getResult()
|
||||
#define CRC32_getResultReversedMultipleInstance(a,b) CRC32_getResultReversed(b)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,76 @@
|
||||
/*
|
||||
* -------------------------------------------
|
||||
* MSP432 DriverLib - v01_04_00_18
|
||||
* -------------------------------------------
|
||||
*
|
||||
* --COPYRIGHT--,BSD,BSD
|
||||
* Copyright (c) 2015, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#ifndef __DEBUG_H__
|
||||
#define __DEBUG_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototype for the function that is called when an invalid argument is passed
|
||||
// to an API. This is only used when doing a DEBUG build.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void __error__(char *pcFilename, unsigned long line);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The ASSERT macro, which does the actual assertion checking. Typically, this
|
||||
// will be for procedure arguments.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef DEBUG
|
||||
#define ASSERT(expr) { \
|
||||
if(!(expr)) \
|
||||
{ \
|
||||
__error__(__FILE__, __LINE__); \
|
||||
} \
|
||||
}
|
||||
#else
|
||||
#define ASSERT(expr)
|
||||
#endif
|
||||
|
||||
#ifdef DEBUG
|
||||
#define assert(expr) { \
|
||||
if(!(expr)) \
|
||||
{ \
|
||||
__error__(__FILE__, __LINE__); \
|
||||
} \
|
||||
}
|
||||
#else
|
||||
#define assert(expr)
|
||||
#endif
|
||||
|
||||
#endif // __DEBUG_H__
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,70 @@
|
||||
/*
|
||||
* -------------------------------------------
|
||||
* MSP432 DriverLib - v01_04_00_18
|
||||
* -------------------------------------------
|
||||
*
|
||||
* --COPYRIGHT--,BSD,BSD
|
||||
* Copyright (c) 2015, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#ifndef __DRIVERLIB__H_
|
||||
#define __DRIVERLIB__H_
|
||||
|
||||
#include "adc14.h"
|
||||
#include "aes256.h"
|
||||
#include "comp_e.h"
|
||||
#include "cpu.h"
|
||||
#include "crc32.h"
|
||||
#include "cs.h"
|
||||
#include "dma.h"
|
||||
#include "eusci.h"
|
||||
#include "flash.h"
|
||||
#include "fpu.h"
|
||||
#include "gpio.h"
|
||||
#include "i2c.h"
|
||||
#include "interrupt.h"
|
||||
#include "mpu.h"
|
||||
#include "pcm.h"
|
||||
#include "pmap.h"
|
||||
#include "pss.h"
|
||||
#include "ref_a.h"
|
||||
#include "reset.h"
|
||||
#include "rom.h"
|
||||
#include "rom_map.h"
|
||||
#include "rtc_c.h"
|
||||
#include "spi.h"
|
||||
#include "sysctl.h"
|
||||
#include "systick.h"
|
||||
#include "timer32.h"
|
||||
#include "timer_a.h"
|
||||
#include "uart.h"
|
||||
#include "wdt_a.h"
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,45 @@
|
||||
/*
|
||||
* -------------------------------------------
|
||||
* MSP432 DriverLib - v01_04_00_18
|
||||
* -------------------------------------------
|
||||
*
|
||||
* --COPYRIGHT--,BSD,BSD
|
||||
* Copyright (c) 2015, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#ifndef EUSCI_H_
|
||||
#define EUSCI_H_
|
||||
|
||||
#include <msp.h>
|
||||
|
||||
#define EUSCI_A_CMSIS(x) ((EUSCI_A0_Type *) x)
|
||||
#define EUSCI_B_CMSIS(x) ((EUSCI_B0_Type *) x)
|
||||
|
||||
#endif /* EUSCI_H_ */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,115 @@
|
||||
/*
|
||||
* -------------------------------------------
|
||||
* MSP432 DriverLib - v01_04_00_18
|
||||
* -------------------------------------------
|
||||
*
|
||||
* --COPYRIGHT--,BSD,BSD
|
||||
* Copyright (c) 2015, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#include <fpu.h>
|
||||
|
||||
void FPU_enableModule(void)
|
||||
{
|
||||
//
|
||||
// Enable the coprocessors used by the floating-point unit.
|
||||
//
|
||||
SCB->CPACR = ((SCB->CPACR & ~(SCB_CPACR_CP11_M | SCB_CPACR_CP10_M))
|
||||
| SCB_CPACR_CP11_M | SCB_CPACR_CP10_M);
|
||||
}
|
||||
|
||||
void FPU_disableModule(void)
|
||||
{
|
||||
//
|
||||
// Disable the coprocessors used by the floating-point unit.
|
||||
//
|
||||
SCB->CPACR = ((SCB->CPACR & ~(SCB_CPACR_CP10_M | SCB_CPACR_CP11_M)));
|
||||
}
|
||||
|
||||
void FPU_enableStacking(void)
|
||||
{
|
||||
//
|
||||
// Enable automatic state preservation for the floating-point unit, and
|
||||
// disable lazy state preservation (meaning that the floating-point state
|
||||
// is always stacked when floating-point instructions are used).
|
||||
//
|
||||
FPU->FPCCR = (FPU->FPCCR & ~FPU_FPCCR_LSPEN) | FPU_FPCCR_ASPEN;
|
||||
}
|
||||
|
||||
void FPU_enableLazyStacking(void)
|
||||
{
|
||||
//
|
||||
// Enable automatic and lazy state preservation for the floating-point
|
||||
// unit.
|
||||
//
|
||||
FPU->FPCCR |= FPU_FPCCR_ASPEN | FPU_FPCCR_LSPEN;
|
||||
}
|
||||
|
||||
void FPU_disableStacking(void)
|
||||
{
|
||||
//
|
||||
// Disable automatic and lazy state preservation for the floating-point
|
||||
// unit.
|
||||
//
|
||||
FPU->FPCCR &= ~(FPU_FPCCR_ASPEN | FPU_FPCCR_LSPEN);
|
||||
}
|
||||
|
||||
void FPU_setHalfPrecisionMode(uint32_t mode)
|
||||
{
|
||||
//
|
||||
// Set the half-precision floating-point format.
|
||||
//
|
||||
FPU->FPDSCR = (FPU->FPDSCR & ~(FPU_FPDSCR_AHP_Msk)) | mode;
|
||||
}
|
||||
|
||||
void FPU_setNaNMode(uint32_t mode)
|
||||
{
|
||||
//
|
||||
// Set the NaN mode.
|
||||
//
|
||||
FPU->FPDSCR = (FPU->FPDSCR & ~(FPU_FPDSCR_DN_Msk)) | mode;
|
||||
}
|
||||
|
||||
void FPU_setFlushToZeroMode(uint32_t mode)
|
||||
{
|
||||
//
|
||||
// Set the flush-to-zero mode.
|
||||
//
|
||||
FPU->FPDSCR = (FPU->FPDSCR & ~(FPU_FPDSCR_FZ_Msk)) | mode;
|
||||
}
|
||||
|
||||
void FPU_setRoundingMode(uint32_t mode)
|
||||
{
|
||||
//
|
||||
// Set the rounding mode.
|
||||
//
|
||||
FPU->FPDSCR = (FPU->FPDSCR & ~(FPU_FPDSCR_RMode_Msk)) | mode;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,285 @@
|
||||
/*
|
||||
* -------------------------------------------
|
||||
* MSP432 DriverLib - v01_04_00_18
|
||||
* -------------------------------------------
|
||||
*
|
||||
* --COPYRIGHT--,BSD,BSD
|
||||
* Copyright (c) 2015, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
#ifndef __FPU_H__
|
||||
#define __FPU_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//!
|
||||
//! \addtogroup fpu_api
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
#include <msp.h>
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to FPUHalfPrecisionSet as the mode parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define FPU_HALF_IEEE 0x00000000
|
||||
#define FPU_HALF_ALTERNATE 0x04000000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to FPU_setNaNMode as the mode parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define FPU_NAN_PROPAGATE 0x00000000
|
||||
#define FPU_NAN_DEFAULT 0x02000000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to FPU_setFlushToZeroMode as the mode parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define FPU_FLUSH_TO_ZERO_DIS 0x00000000
|
||||
#define FPU_FLUSH_TO_ZERO_EN 0x01000000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to FPU_setRoundingMode as the mode parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define FPU_ROUND_NEAREST 0x00000000
|
||||
#define FPU_ROUND_POS_INF 0x00400000
|
||||
#define FPU_ROUND_NEG_INF 0x00800000
|
||||
#define FPU_ROUND_ZERO 0x00c00000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables the floating-point unit.
|
||||
//!
|
||||
//! This function enables the floating-point unit, allowing the floating-point
|
||||
//! instructions to be executed. This function must be called prior to
|
||||
//! performing any hardware floating-point operations; failure to do so results
|
||||
//! in a NOCP usage fault.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FPU_enableModule(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Disables the floating-point unit.
|
||||
//!
|
||||
//! This function disables the floating-point unit, preventing floating-point
|
||||
//! instructions from executing (generating a NOCP usage fault instead).
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FPU_disableModule(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables the stacking of floating-point registers.
|
||||
//!
|
||||
//! This function enables the stacking of floating-point registers s0-s15 when
|
||||
//! an interrupt is handled. When enabled, space is reserved on the stack for
|
||||
//! the floating-point context and the floating-point state is saved into this
|
||||
//! stack space. Upon return from the interrupt, the floating-point context is
|
||||
//! restored.
|
||||
//!
|
||||
//! If the floating-point registers are not stacked, floating-point
|
||||
//! instructions cannot be safely executed in an interrupt handler because the
|
||||
//! values of s0-s15 are not likely to be preserved for the interrupted code.
|
||||
//! On the other hand, stacking the floating-point registers increases the
|
||||
//! stacking operation from 8 words to 26 words, also increasing the interrupt
|
||||
//! response latency.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FPU_enableStacking(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables the lazy stacking of floating-point registers.
|
||||
//!
|
||||
//! This function enables the lazy stacking of floating-point registers s0-s15
|
||||
//! when an interrupt is handled. When lazy stacking is enabled, space is
|
||||
//! reserved on the stack for the floating-point context, but the
|
||||
//! floating-point state is not saved. If a floating-point instruction is
|
||||
//! executed from within the interrupt context, the floating-point context is
|
||||
//! first saved into the space reserved on the stack. On completion of the
|
||||
//! interrupt handler, the floating-point context is only restored if it was
|
||||
//! saved (as the result of executing a floating-point instruction).
|
||||
//!
|
||||
//! This method provides a compromise between fast interrupt response (because
|
||||
//! the floating-point state is not saved on interrupt entry) and the ability
|
||||
//! to use floating-point in interrupt handlers (because the floating-point
|
||||
//! state is saved if floating-point instructions are used).
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FPU_enableLazyStacking(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Disables the stacking of floating-point registers.
|
||||
//!
|
||||
//! This function disables the stacking of floating-point registers s0-s15 when
|
||||
//! an interrupt is handled. When floating-point context stacking is disabled,
|
||||
//! floating-point operations performed in an interrupt handler destroy the
|
||||
//! floating-point context of the main thread of execution.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FPU_disableStacking(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Selects the format of half-precision floating-point values.
|
||||
//!
|
||||
//! \param mode is the format for half-precision floating-point value, which
|
||||
//! is either \b FPU_HALF_IEEE or \b FPU_HALF_ALTERNATE.
|
||||
//!
|
||||
//! This function selects between the IEEE half-precision floating-point
|
||||
//! representation and the Cortex-M processor alternative representation. The
|
||||
//! alternative representation has a larger range but does not have a way to
|
||||
//! encode infinity (positive or negative) or NaN (quiet or signalling). The
|
||||
//! default setting is the IEEE format.
|
||||
//!
|
||||
//! \note Unless this function is called prior to executing any floating-point
|
||||
//! instructions, the default mode is used.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FPU_setHalfPrecisionMode(uint32_t mode);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Selects the NaN mode.
|
||||
//!
|
||||
//! \param mode is the mode for NaN results; which is
|
||||
//! either \b FPU_NAN_PROPAGATE or \b FPU_NAN_DEFAULT.
|
||||
//!
|
||||
//! This function selects the handling of NaN results during floating-point
|
||||
//! computations. NaNs can either propagate (the default), or they can return
|
||||
//! the default NaN.
|
||||
//!
|
||||
//! \note Unless this function is called prior to executing any floating-point
|
||||
//! instructions, the default mode is used.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FPU_setNaNMode(uint32_t mode);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Selects the flush-to-zero mode.
|
||||
//!
|
||||
//! \param mode is the flush-to-zero mode; which is either
|
||||
//! \b FPU_FLUSH_TO_ZERO_DIS or \b FPU_FLUSH_TO_ZERO_EN.
|
||||
//!
|
||||
//! This function enables or disables the flush-to-zero mode of the
|
||||
//! floating-point unit. When disabled (the default), the floating-point unit
|
||||
//! is fully IEEE compliant. When enabled, values close to zero are treated as
|
||||
//! zero, greatly improving the execution speed at the expense of some accuracy
|
||||
//! (as well as IEEE compliance).
|
||||
//!
|
||||
//! \note Unless this function is called prior to executing any floating-point
|
||||
//! instructions, the default mode is used.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FPU_setFlushToZeroMode(uint32_t mode);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Selects the rounding mode for floating-point results.
|
||||
//!
|
||||
//! \param mode is the rounding mode.
|
||||
//!
|
||||
//! This function selects the rounding mode for floating-point results. After
|
||||
//! a floating-point operation, the result is rounded toward the specified
|
||||
//! value. The default mode is \b FPU_ROUND_NEAREST.
|
||||
//!
|
||||
//! The following rounding modes are available (as specified by \e mode):
|
||||
//!
|
||||
//! - \b FPU_ROUND_NEAREST - round toward the nearest value
|
||||
//! - \b FPU_ROUND_POS_INF - round toward positive infinity
|
||||
//! - \b FPU_ROUND_NEG_INF - round toward negative infinity
|
||||
//! - \b FPU_ROUND_ZERO - round toward zero
|
||||
//!
|
||||
//! \note Unless this function is called prior to executing any floating-point
|
||||
//! instructions, the default mode is used.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void FPU_setRoundingMode(uint32_t mode);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
|
||||
#endif // __FPU_H__
|
||||
@@ -0,0 +1,356 @@
|
||||
/*
|
||||
* -------------------------------------------
|
||||
* MSP432 DriverLib - v01_04_00_18
|
||||
* -------------------------------------------
|
||||
*
|
||||
* --COPYRIGHT--,BSD,BSD
|
||||
* Copyright (c) 2015, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
/* Standard Includes */
|
||||
#include <stdint.h>
|
||||
|
||||
/* DriverLib Includes */
|
||||
#include <gpio.h>
|
||||
#include <debug.h>
|
||||
#include <interrupt.h>
|
||||
|
||||
static const uint32_t GPIO_PORT_TO_INT[] =
|
||||
{ 0x00,
|
||||
INT_PORT1,
|
||||
INT_PORT2,
|
||||
INT_PORT3,
|
||||
INT_PORT4,
|
||||
INT_PORT5,
|
||||
INT_PORT6 };
|
||||
|
||||
static const uint32_t GPIO_PORT_TO_BASE[] =
|
||||
{ 0x00,
|
||||
0x40004C00,
|
||||
0x40004C01,
|
||||
0x40004C20,
|
||||
0x40004C21,
|
||||
0x40004C40,
|
||||
0x40004C41,
|
||||
0x40004C60,
|
||||
0x40004C61,
|
||||
0x40004C80,
|
||||
0x40004C81,
|
||||
0x40004D20
|
||||
};
|
||||
|
||||
void GPIO_setAsOutputPin(uint_fast8_t selectedPort, uint_fast16_t selectedPins)
|
||||
{
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
|
||||
HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
|
||||
HWREG16(baseAddress + OFS_PADIR) |= selectedPins;
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
void GPIO_setAsInputPin(uint_fast8_t selectedPort, uint_fast16_t selectedPins)
|
||||
{
|
||||
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
|
||||
HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
|
||||
HWREG16(baseAddress + OFS_PADIR) &= ~selectedPins;
|
||||
HWREG16(baseAddress + OFS_PAREN) &= ~selectedPins;
|
||||
}
|
||||
|
||||
|
||||
void GPIO_setAsPeripheralModuleFunctionOutputPin(uint_fast8_t selectedPort,
|
||||
uint_fast16_t selectedPins, uint_fast8_t mode)
|
||||
{
|
||||
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
HWREG16(baseAddress + OFS_PADIR) |= selectedPins;
|
||||
switch (mode)
|
||||
{
|
||||
case GPIO_PRIMARY_MODULE_FUNCTION:
|
||||
HWREG16(baseAddress + OFS_PASEL0) |= selectedPins;
|
||||
HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
|
||||
break;
|
||||
case GPIO_SECONDARY_MODULE_FUNCTION:
|
||||
HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
|
||||
HWREG16(baseAddress + OFS_PASEL1) |= selectedPins;
|
||||
break;
|
||||
case GPIO_TERTIARY_MODULE_FUNCTION:
|
||||
HWREG16(baseAddress + OFS_PASEL0) |= selectedPins;
|
||||
HWREG16(baseAddress + OFS_PASEL1) |= selectedPins;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void GPIO_setAsPeripheralModuleFunctionInputPin(uint_fast8_t selectedPort,
|
||||
uint_fast16_t selectedPins, uint_fast8_t mode)
|
||||
{
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
HWREG16(baseAddress + OFS_PADIR) &= ~selectedPins;
|
||||
switch (mode)
|
||||
{
|
||||
case GPIO_PRIMARY_MODULE_FUNCTION:
|
||||
HWREG16(baseAddress + OFS_PASEL0) |= selectedPins;
|
||||
HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
|
||||
break;
|
||||
case GPIO_SECONDARY_MODULE_FUNCTION:
|
||||
HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
|
||||
HWREG16(baseAddress + OFS_PASEL1) |= selectedPins;
|
||||
break;
|
||||
case GPIO_TERTIARY_MODULE_FUNCTION:
|
||||
HWREG16(baseAddress + OFS_PASEL0) |= selectedPins;
|
||||
HWREG16(baseAddress + OFS_PASEL1) |= selectedPins;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void GPIO_setOutputHighOnPin(uint_fast8_t selectedPort,
|
||||
uint_fast16_t selectedPins)
|
||||
{
|
||||
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
HWREG16(baseAddress + OFS_PAOUT) |= selectedPins;
|
||||
}
|
||||
|
||||
|
||||
void GPIO_setOutputLowOnPin(uint_fast8_t selectedPort,
|
||||
uint_fast16_t selectedPins)
|
||||
{
|
||||
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
HWREG16(baseAddress + OFS_PAOUT) &= ~selectedPins;
|
||||
}
|
||||
|
||||
|
||||
void GPIO_toggleOutputOnPin(uint_fast8_t selectedPort,
|
||||
uint_fast16_t selectedPins)
|
||||
{
|
||||
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
HWREG16(baseAddress + OFS_PAOUT) ^= selectedPins;
|
||||
}
|
||||
|
||||
|
||||
void GPIO_setAsInputPinWithPullDownResistor(uint_fast8_t selectedPort,
|
||||
uint_fast16_t selectedPins)
|
||||
{
|
||||
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
|
||||
HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
|
||||
|
||||
HWREG16(baseAddress + OFS_PADIR) &= ~selectedPins;
|
||||
HWREG16(baseAddress + OFS_PAREN) |= selectedPins;
|
||||
HWREG16(baseAddress + OFS_PAOUT) &= ~selectedPins;
|
||||
}
|
||||
|
||||
|
||||
void GPIO_setAsInputPinWithPullUpResistor(uint_fast8_t selectedPort,
|
||||
uint_fast16_t selectedPins)
|
||||
{
|
||||
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
|
||||
HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
|
||||
HWREG16(baseAddress + OFS_PADIR) &= ~selectedPins;
|
||||
HWREG16(baseAddress + OFS_PAREN) |= selectedPins;
|
||||
HWREG16(baseAddress + OFS_PAOUT) |= selectedPins;
|
||||
}
|
||||
|
||||
|
||||
uint8_t GPIO_getInputPinValue(uint_fast8_t selectedPort,
|
||||
uint_fast16_t selectedPins)
|
||||
{
|
||||
uint16_t inputPinValue;
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
inputPinValue = HWREG16(baseAddress + OFS_PAIN) & (selectedPins);
|
||||
|
||||
if (inputPinValue > 0)
|
||||
return GPIO_INPUT_PIN_HIGH;
|
||||
return GPIO_INPUT_PIN_LOW;
|
||||
}
|
||||
|
||||
|
||||
void GPIO_enableInterrupt(uint_fast8_t selectedPort, uint_fast16_t selectedPins)
|
||||
{
|
||||
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
HWREG16(baseAddress + OFS_PAIE) |= selectedPins;
|
||||
}
|
||||
|
||||
|
||||
void GPIO_disableInterrupt(uint_fast8_t selectedPort,
|
||||
uint_fast16_t selectedPins)
|
||||
{
|
||||
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
HWREG16(baseAddress + OFS_PAIE) &= ~selectedPins;
|
||||
}
|
||||
|
||||
|
||||
uint_fast16_t GPIO_getInterruptStatus(uint_fast8_t selectedPort,
|
||||
uint_fast16_t selectedPins)
|
||||
{
|
||||
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
return HWREG16(baseAddress + OFS_PAIFG) & selectedPins;
|
||||
}
|
||||
|
||||
|
||||
void GPIO_clearInterruptFlag(uint_fast8_t selectedPort,
|
||||
uint_fast16_t selectedPins)
|
||||
{
|
||||
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
|
||||
HWREG16(baseAddress + OFS_PAIFG) &= ~selectedPins;
|
||||
}
|
||||
|
||||
|
||||
void GPIO_interruptEdgeSelect(uint_fast8_t selectedPort,
|
||||
uint_fast16_t selectedPins, uint_fast8_t edgeSelect)
|
||||
{
|
||||
|
||||
uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
|
||||
if (GPIO_LOW_TO_HIGH_TRANSITION == edgeSelect)
|
||||
HWREG16(baseAddress + OFS_PAIES) &= ~selectedPins;
|
||||
else
|
||||
HWREG16(baseAddress + OFS_PAIES) |= selectedPins;
|
||||
}
|
||||
|
||||
uint_fast16_t GPIO_getEnabledInterruptStatus(uint_fast8_t selectedPort)
|
||||
{
|
||||
uint_fast16_t pendingInts;
|
||||
uint32_t baseAddr;
|
||||
|
||||
pendingInts = GPIO_getInterruptStatus(selectedPort, 0xFFFF);
|
||||
baseAddr = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
ASSERT(baseAddr != 0xFFFF);
|
||||
|
||||
switch (selectedPort)
|
||||
{
|
||||
case GPIO_PORT_P1:
|
||||
case GPIO_PORT_P3:
|
||||
case GPIO_PORT_P5:
|
||||
case GPIO_PORT_P7:
|
||||
case GPIO_PORT_P9:
|
||||
return (HWREG8(baseAddr + OFS_P1IE) & pendingInts);
|
||||
case GPIO_PORT_P2:
|
||||
case GPIO_PORT_P4:
|
||||
case GPIO_PORT_P6:
|
||||
case GPIO_PORT_P8:
|
||||
case GPIO_PORT_P10:
|
||||
return (HWREG8(baseAddr + OFS_P2IE) & pendingInts);
|
||||
case GPIO_PORT_PJ:
|
||||
return (HWREG16(baseAddr + OFS_PAIE) & pendingInts);
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void GPIO_setDriveStrengthHigh(uint_fast8_t selectedPort,
|
||||
uint_fast8_t selectedPins)
|
||||
{
|
||||
uint32_t baseAddr;
|
||||
|
||||
baseAddr = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
HWREG8(baseAddr + OFS_PADS) |= selectedPins;
|
||||
|
||||
}
|
||||
|
||||
void GPIO_setDriveStrengthLow(uint_fast8_t selectedPort,
|
||||
uint_fast8_t selectedPins)
|
||||
{
|
||||
uint32_t baseAddr;
|
||||
|
||||
baseAddr = GPIO_PORT_TO_BASE[selectedPort];
|
||||
|
||||
HWREG8(baseAddr + OFS_PADS) &= ~selectedPins;
|
||||
|
||||
}
|
||||
|
||||
void GPIO_registerInterrupt(uint_fast8_t selectedPort, void (*intHandler)(void))
|
||||
{
|
||||
uint32_t wPortInt;
|
||||
|
||||
wPortInt = GPIO_PORT_TO_INT[selectedPort];
|
||||
|
||||
//
|
||||
// Register the interrupt handler, returning an error if an error occurs.
|
||||
//
|
||||
Interrupt_registerInterrupt(wPortInt, intHandler);
|
||||
|
||||
//
|
||||
// Enable the system control interrupt.
|
||||
//
|
||||
Interrupt_enableInterrupt(wPortInt);
|
||||
}
|
||||
|
||||
|
||||
void GPIO_unregisterInterrupt(uint_fast8_t selectedPort)
|
||||
{
|
||||
uint32_t wPortInt;
|
||||
|
||||
wPortInt = GPIO_PORT_TO_INT[selectedPort];
|
||||
|
||||
//
|
||||
// Disable the interrupt.
|
||||
//
|
||||
Interrupt_disableInterrupt(wPortInt);
|
||||
|
||||
//
|
||||
// Unregister the interrupt handler.
|
||||
//
|
||||
Interrupt_unregisterInterrupt(wPortInt);
|
||||
}
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
+230
@@ -0,0 +1,230 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright (C) 2012 - 2014 Texas Instruments Incorporated - http://www.ti.com/
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// MSP432 Family CMSIS Definitions
|
||||
//
|
||||
//****************************************************************************
|
||||
|
||||
#ifndef CMSIS_CCS_H_
|
||||
#define CMSIS_CCS_H_
|
||||
|
||||
//*****************************************************************************
|
||||
// CMSIS-compatible instruction calls
|
||||
//*****************************************************************************
|
||||
|
||||
// No Operation
|
||||
__attribute__( ( always_inline ) ) static inline void __nop(void)
|
||||
{
|
||||
__asm(" nop");
|
||||
}
|
||||
|
||||
// Wait For Interrupt
|
||||
__attribute__( ( always_inline ) ) static inline void __wfi(void)
|
||||
{
|
||||
__asm(" wfi");
|
||||
}
|
||||
|
||||
// Wait For Event
|
||||
__attribute__( ( always_inline ) ) static inline void __wfe(void)
|
||||
{
|
||||
__asm(" wfe");
|
||||
}
|
||||
|
||||
// Enable Interrupts
|
||||
__attribute__( ( always_inline ) ) static inline void __enable_irq(void)
|
||||
{
|
||||
__asm(" cpsie i");
|
||||
}
|
||||
|
||||
// Disable Interrupts
|
||||
__attribute__( ( always_inline ) ) static inline void __disable_irq(void)
|
||||
{
|
||||
__asm(" cpsid i");
|
||||
}
|
||||
|
||||
// Data Synchronization Barrier
|
||||
__attribute__( ( always_inline ) ) static inline void __DSB(void)
|
||||
{
|
||||
__asm(" dsb");
|
||||
}
|
||||
|
||||
#if (0)
|
||||
// Get Main Stack Pointer
|
||||
static inline uint32_t __get_MSP(void)
|
||||
{
|
||||
register uint32_t result;
|
||||
//__asm (" mrs result, msp");
|
||||
return(result);
|
||||
}
|
||||
|
||||
// Set Main Stack Pointer
|
||||
static inline void __set_MSP(uint32_t topOfMainStack)
|
||||
{
|
||||
asm(" .global topOfMainStack");
|
||||
__asm (" msr msp, topOfMainStack");
|
||||
}
|
||||
|
||||
|
||||
// Get Priority Mask
|
||||
static inline uint32_t __get_PRIMASK(void)
|
||||
{
|
||||
uint32_t result;
|
||||
__asm (" mrs result, primask");
|
||||
return(result);
|
||||
}
|
||||
|
||||
|
||||
// Set Priority Mask
|
||||
static inline void __set_PRIMASK(uint32_t priMask)
|
||||
{
|
||||
__asm (" msr primask, priMask");
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
//
|
||||
// v5e, v6, Cortex-M3, Cortex-M4, Cortex-R4, and Cortex-A8 compiler intrinsics
|
||||
//
|
||||
#define __CLZ _norm
|
||||
#define __SXTB _sxtb
|
||||
#define __SXTH _sxth
|
||||
#define __UXTB _uxtb
|
||||
#define __UXTH _uxth
|
||||
// CCS supports intrinsics to take advantage of the shift operand left/right
|
||||
// before saturation extension of SSAT, but CMSIS does not take advantage
|
||||
// of those, so tell the compiler to use a sat & shift left with a shift
|
||||
// value of 0 whenever it encounters an SSAT
|
||||
#define __SSAT(VAL, BITPOS) \
|
||||
_ssatl(VAL , 0, BITPOS)
|
||||
|
||||
//
|
||||
// Only define M4 based intrinsics if we're not using an M4
|
||||
//
|
||||
#if defined (__TI_TMS470_V7M4__)
|
||||
//
|
||||
// V5E, V6, Cortex-M4, Cortex-R4, and Cortex-A8 compiler intrinsics
|
||||
//
|
||||
#define __QADD _sadd
|
||||
#define __QDADD _sdadd
|
||||
#define __QDSUB _sdsub
|
||||
#define __SMLABB _smlabb
|
||||
#define __SMLABT _smlabt
|
||||
#define __SMLALBB _smlalbb
|
||||
#define __SMLALBT _smlalbt
|
||||
#define __SMLALTB _smlaltb
|
||||
#define __SMLALTT _smlaltt
|
||||
#define __SMLATB _smlatb
|
||||
#define __SMLATT _smlatt
|
||||
#define __SMLAWB _smlawb
|
||||
#define __SMLAWT _smlawt
|
||||
|
||||
#define __SMULBB _smulbb
|
||||
#define __SMULBT _smulbt
|
||||
#define __SMULTB _smultb
|
||||
#define __SMULTT _smultt
|
||||
#define __SMULWB _smulwb
|
||||
#define __SMULWT _smulwt
|
||||
#define __QSUB _ssub
|
||||
#define __SUBC _subc
|
||||
|
||||
//
|
||||
// v6, Cortex-M4, Cortex-R4, and Cortex-A8 compiler intrinsics
|
||||
//
|
||||
#define __SHASX _shaddsubx
|
||||
#define __SHSAX _shsubaddx
|
||||
#define __PKHBT _pkhbt
|
||||
#define __PKHTB _pkhtb
|
||||
#define __QADD16 _qadd16
|
||||
#define __QADD8 _qadd8
|
||||
#define __QSUB16 _qsub16
|
||||
#define __QSUB8 _qsub8
|
||||
#define __QASX _saddsubx
|
||||
#define __QSAX _qsubaddx
|
||||
#define __SADD16 _sadd16
|
||||
#define __SADD8 _sadd8
|
||||
#define __SASX _saddsubx
|
||||
#define __SEL _sel
|
||||
#define __SHADD16 _shadd16
|
||||
#define __SHADD8 _shadd8
|
||||
#define __SHSUB16 _shsub16
|
||||
#define __SHSUB8 _shsub8
|
||||
#define __SMLAD _smlad
|
||||
#define __SMLADX _smladx
|
||||
#define __SMLALD _smlald
|
||||
#define __SMLALDX _smlaldx
|
||||
#define __SMLSD _smlsd
|
||||
#define __SMLSDX _smlsdx
|
||||
#define __SMLSLD _smlsld
|
||||
#define __SMLSLDX _smlsldx
|
||||
#define __SMMLA _smmla
|
||||
#define __SMMLAR _smmlar
|
||||
#define __SMMLS _smmls
|
||||
#define __SMMLSR _smmlsr
|
||||
#define __SMMUL _smmul
|
||||
#define __SMMULR _smmulr
|
||||
#define __SMUAD _smuad
|
||||
#define __SMUADX _smuadx
|
||||
#define __SMUSD _smusd
|
||||
#define __SMUSDX _smusd
|
||||
#define __SSAT16 _ssat16
|
||||
#define __SSUB16 _ssub16
|
||||
#define __SSUB8 _ssub8
|
||||
#define __SSAX _ssubaddx
|
||||
#define __SXTAB _sxtab
|
||||
#define __SXTAB16 _sxtab16
|
||||
#define __SXTAH _sxtah
|
||||
#define __UMAAL _umaal
|
||||
#define __UADD16 _uadd16
|
||||
#define __UADD8 _uadd8
|
||||
#define __UHADD16 _uhadd16
|
||||
#define __UHADD8 _uhadd8
|
||||
#define __UASX _uaddsubx
|
||||
#define __UHSUB16 _uhsub16
|
||||
#define __UHSUB8 _uhsub8
|
||||
#define __UQADD16 _uqadd16
|
||||
#define __UQADD8 _uqadd8
|
||||
#define __UQASX _uqaddsubx
|
||||
#define __UQSUB16 _uqsub16
|
||||
#define __UQSUB8 _uqsub8
|
||||
#define __UQSAX _uqsubaddx
|
||||
#define __USAD8 _usad8
|
||||
#define __USAT16 _usat16
|
||||
#define __USUB16 _usub16
|
||||
#define __USUB8 _usub8
|
||||
#define __USAX _usubaddx
|
||||
#define __UXTAB _uxtab
|
||||
#define __UXTAB16 _uxtab16
|
||||
#define __UXTAH _uxtah
|
||||
#define __UXTB16 _uxtb16
|
||||
#endif /*__TI_TMS470_V7M4__*/
|
||||
|
||||
#endif /*CMSIS_CCS_H_*/
|
||||
+1772
File diff suppressed because it is too large
Load Diff
+673
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user