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Add reg tests to LPC55S69 project (#989)

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* Update LPCXpresso55S69 SDK to 2.13.1

* Enable print from non-secure side

* Add register tests

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
This commit is contained in:
Gaurav-Aggarwal-AWS
2023-04-18 10:45:59 +05:30
committed by GitHub
parent 4727d6b3cc
commit 5eaf2f3bce
55 changed files with 9566 additions and 7508 deletions
Download Patch File Download Diff File Expand all files Collapse all files
.github/scripts/core_checker.py
+1
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@@ -261,6 +261,7 @@ FREERTOS_IGNORED_PATTERNS = [
r'.*CMSIS.*',
r'.*/Nordic_Code/*',
r'.*/ST_Code/*',
r'.*/NXP_Code/*',
r'.*/makefile',
r'.*/Makefile',
r'.*/printf-stdarg\.c.*',
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/.gitignore
+6
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@@ -0,0 +1,6 @@
# IDE autogenerated files.
.settings/
*.launch
# Build Artifacts
Debug/
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_armcc.h
-894
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FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_armclang.h
-1444
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FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_armclang_ltm.h
-1891
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FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_gcc.h
+840 -797
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FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_iccarm.h
-964
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FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_version.h
+3 -3
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@@ -1,8 +1,8 @@
/**************************************************************************//**
* @file cmsis_version.h
* @brief CMSIS Core(M) Version definitions
* @version V5.0.3
* @date 24. June 2019
* @version V5.0.4
* @date 23. July 2019
******************************************************************************/
/*
* Copyright (c) 2009-2019 ARM Limited. All rights reserved.
@@ -33,7 +33,7 @@
/* CMSIS Version definitions */
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
#define __CM_CMSIS_VERSION_SUB ( 3U) /*!< [15:0] CMSIS Core(M) sub version */
#define __CM_CMSIS_VERSION_SUB ( 4U) /*!< [15:0] CMSIS Core(M) sub version */
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
#endif
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/core_cm33.h
+449 -94
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File diff suppressed because it is too large Load Diff
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/mpu_armv8.h
+21 -15
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@@ -1,11 +1,11 @@
/******************************************************************************
* @file mpu_armv8.h
* @brief CMSIS MPU API for Armv8-M and Armv8.1-M MPU
* @version V5.1.0
* @date 08. March 2019
* @version V5.1.3
* @date 03. February 2021
******************************************************************************/
/*
* Copyright (c) 2017-2019 Arm Limited. All rights reserved.
* Copyright (c) 2017-2021 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -44,7 +44,7 @@
* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
*/
#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
(((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
((((NT) & 1U) << 3U) | (((WB) & 1U) << 2U) | (((RA) & 1U) << 1U) | ((WA) & 1U))
/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
@@ -62,7 +62,7 @@
* \param O Outer memory attributes
* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
*/
#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
#define ARM_MPU_ATTR(O, I) ((((O) & 0xFU) << 4U) | ((((O) & 0xFU) != 0U) ? ((I) & 0xFU) : (((I) & 0x3U) << 2U)))
/** \brief Normal memory non-shareable */
#define ARM_MPU_SH_NON (0U)
@@ -77,7 +77,7 @@
* \param RO Read-Only: Set to 1 for read-only memory.
* \param NP Non-Privileged: Set to 1 for non-privileged memory.
*/
#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))
#define ARM_MPU_AP_(RO, NP) ((((RO) & 1U) << 1U) | ((NP) & 1U))
/** \brief Region Base Address Register value
* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
@@ -87,18 +87,18 @@
* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
*/
#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
((BASE & MPU_RBAR_BASE_Msk) | \
((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
(((BASE) & MPU_RBAR_BASE_Msk) | \
(((SH) << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
(((XN) << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
/** \brief Region Limit Address Register value
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
* \param IDX The attribute index to be associated with this memory region.
*/
#define ARM_MPU_RLAR(LIMIT, IDX) \
((LIMIT & MPU_RLAR_LIMIT_Msk) | \
((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
(((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))
#if defined(MPU_RLAR_PXN_Pos)
@@ -109,9 +109,9 @@
* \param IDX The attribute index to be associated with this memory region.
*/
#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
((LIMIT & MPU_RLAR_LIMIT_Msk) | \
((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
(((PXN) << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
(((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))
#endif
@@ -129,6 +129,7 @@ typedef struct {
*/
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
{
__DMB();
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
@@ -146,6 +147,8 @@ __STATIC_INLINE void ARM_MPU_Disable(void)
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
__DSB();
__ISB();
}
#ifdef MPU_NS
@@ -154,6 +157,7 @@ __STATIC_INLINE void ARM_MPU_Disable(void)
*/
__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
{
__DMB();
MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
@@ -171,6 +175,8 @@ __STATIC_INLINE void ARM_MPU_Disable_NS(void)
SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
__DSB();
__ISB();
}
#endif
@@ -275,7 +281,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t
}
#endif
/** Memcopy with strictly ordered memory access, e.g. for register targets.
/** Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_LoadEx()
* \param dst Destination data is copied to.
* \param src Source data is copied from.
* \param len Amount of data words to be copied.
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/board/board.h
+5
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@@ -115,6 +115,11 @@
#define BOARD_SW3_IRQ_HANDLER PIN_INT1_IRQHandler
#define BOARD_SW3_GPIO_PININT_INDEX 1
/* USB PHY condfiguration */
#define BOARD_USB_PHY_D_CAL (0x05U)
#define BOARD_USB_PHY_TXCAL45DP (0x0AU)
#define BOARD_USB_PHY_TXCAL45DM (0x0AU)
/* Board led color mapping */
#define LOGIC_LED_ON 0U
#define LOGIC_LED_OFF 1U
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/component/lists/fsl_component_generic_list.c
+6 -6
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@@ -1,5 +1,5 @@
/*
* Copyright 2018-2019 NXP
* Copyright 2018-2019, 2022 NXP
* All rights reserved.
*
*
@@ -21,8 +21,8 @@
OSA_ENTER_CRITICAL()
#define LIST_EXIT_CRITICAL() OSA_EXIT_CRITICAL()
#else
#define LIST_ENTER_CRITICAL()
#define LIST_EXIT_CRITICAL()
#define LIST_ENTER_CRITICAL() uint32_t regPrimask = DisableGlobalIRQ();
#define LIST_EXIT_CRITICAL() EnableGlobalIRQ(regPrimask);
#endif
#else
#define LIST_ENTER_CRITICAL() uint32_t regPrimask = DisableGlobalIRQ();
@@ -63,7 +63,7 @@ static list_status_t LIST_Error_Check(list_handle_t list, list_element_handle_t
*************************************************************************************
********************************************************************************** */
/*! *********************************************************************************
* \brief Initialises the list descriptor.
* \brief Initializes the list descriptor.
*
* \param[in] list - LIST_ handle to init.
* max - Maximum number of elements in list. 0 for unlimited.
@@ -81,7 +81,7 @@ void LIST_Init(list_handle_t list, uint32_t max)
{
list->head = NULL;
list->tail = NULL;
list->max = (uint16_t)max;
list->max = max;
list->size = 0;
}
@@ -489,5 +489,5 @@ uint32_t LIST_GetSize(list_handle_t list)
********************************************************************************** */
uint32_t LIST_GetAvailableSize(list_handle_t list)
{
return ((uint32_t)list->max - (uint32_t)list->size); /*Gets the number of free places in the list*/
return (list->max - list->size); /*Gets the number of free places in the list*/
}
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/component/lists/fsl_component_generic_list.h
+21 -3
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@@ -1,5 +1,5 @@
/*
* Copyright 2018-2020 NXP
* Copyright 2018-2020, 2022 NXP
* All rights reserved.
*
*
@@ -9,7 +9,13 @@
#ifndef _GENERIC_LIST_H_
#define _GENERIC_LIST_H_
#ifndef SDK_COMPONENT_DEPENDENCY_FSL_COMMON
#define SDK_COMPONENT_DEPENDENCY_FSL_COMMON (1U)
#endif
#if (defined(SDK_COMPONENT_DEPENDENCY_FSL_COMMON) && (SDK_COMPONENT_DEPENDENCY_FSL_COMMON > 0U))
#include "fsl_common.h"
#else
#endif
/*!
* @addtogroup GenericList
* @{
@@ -36,6 +42,7 @@
* Public type definitions
***********************************************************************************/
/*! @brief The list status */
#if (defined(SDK_COMPONENT_DEPENDENCY_FSL_COMMON) && (SDK_COMPONENT_DEPENDENCY_FSL_COMMON > 0U))
typedef enum _list_status
{
kLIST_Ok = kStatus_Success, /*!< Success */
@@ -45,14 +52,25 @@ typedef enum _list_status
kLIST_OrphanElement = MAKE_STATUS(kStatusGroup_LIST, 4), /*!< Orphan Element */
kLIST_NotSupport = MAKE_STATUS(kStatusGroup_LIST, 5), /*!< Not Support */
} list_status_t;
#else
typedef enum _list_status
{
kLIST_Ok = 0, /*!< Success */
kLIST_DuplicateError = 1, /*!< Duplicate Error */
kLIST_Full = 2, /*!< FULL */
kLIST_Empty = 3, /*!< Empty */
kLIST_OrphanElement = 4, /*!< Orphan Element */
kLIST_NotSupport = 5, /*!< Not Support */
} list_status_t;
#endif
/*! @brief The list structure*/
typedef struct list_label
{
struct list_element_tag *head; /*!< list head */
struct list_element_tag *tail; /*!< list tail */
uint16_t size; /*!< list size */
uint16_t max; /*!< list max number of elements */
uint32_t size; /*!< list size */
uint32_t max; /*!< list max number of elements */
} list_label_t, *list_handle_t;
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
/*! @brief The list element*/
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/component/uart/fsl_adapter_uart.h
+36 -25
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@@ -58,14 +58,20 @@
#define HAL_UART_ADAPTER_LOWPOWER (0U)
#endif /* HAL_UART_ADAPTER_LOWPOWER */
/*! @brief Enable or disable uart hardware FIFO mode (1 - enable, 0 - disable) */
#ifndef HAL_UART_ADAPTER_FIFO
#define HAL_UART_ADAPTER_FIFO (0U)
#define HAL_UART_ADAPTER_FIFO (1U)
#endif /* HAL_UART_ADAPTER_FIFO */
#ifndef HAL_UART_DMA_ENABLE
#define HAL_UART_DMA_ENABLE (0U)
#endif /* HAL_UART_DMA_ENABLE */
/*! @brief Enable or disable uart DMA adapter int mode (1 - enable, 0 - disable) */
#ifndef HAL_UART_DMA_INIT_ENABLE
#define HAL_UART_DMA_INIT_ENABLE (1U)
#endif /* HAL_SPI_MASTER_DMA_INIT_ENABLE */
/*! @brief Definition of uart dma adapter software idleline detection timeout value in ms. */
#ifndef HAL_UART_DMA_IDLELINE_TIMEOUT
#define HAL_UART_DMA_IDLELINE_TIMEOUT (1U)
@@ -73,10 +79,10 @@
/*! @brief Definition of uart adapter handle size. */
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
#define HAL_UART_HANDLE_SIZE (92U + HAL_UART_ADAPTER_LOWPOWER * 16U + HAL_UART_DMA_ENABLE * 4)
#define HAL_UART_BLOCK_HANDLE_SIZE (8U + HAL_UART_ADAPTER_LOWPOWER * 16U + HAL_UART_DMA_ENABLE * 4)
#define HAL_UART_HANDLE_SIZE (92U + HAL_UART_ADAPTER_LOWPOWER * 16U + HAL_UART_DMA_ENABLE * 4U)
#define HAL_UART_BLOCK_HANDLE_SIZE (8U + HAL_UART_ADAPTER_LOWPOWER * 16U + HAL_UART_DMA_ENABLE * 4U)
#else
#define HAL_UART_HANDLE_SIZE (8U + HAL_UART_ADAPTER_LOWPOWER * 16U + HAL_UART_DMA_ENABLE * 4)
#define HAL_UART_HANDLE_SIZE (8U + HAL_UART_ADAPTER_LOWPOWER * 16U + HAL_UART_DMA_ENABLE * 4U)
#endif
/*! @brief Definition of uart dma adapter handle size. */
@@ -148,15 +154,6 @@ typedef enum _hal_uart_parity_mode
kHAL_UartParityOdd = 0x3U, /*!< Parity odd enabled */
} hal_uart_parity_mode_t;
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
/*! @brief UART Block Mode. */
typedef enum _hal_uart_block_mode
{
kHAL_UartNonBlockMode = 0x0U, /*!< Uart NonBlock Mode */
kHAL_UartBlockMode = 0x1U, /*!< Uart Block Mode */
} hal_uart_block_mode_t;
#endif /* UART_ADAPTER_NON_BLOCKING_MODE */
/*! @brief UART stop bit count. */
typedef enum _hal_uart_stop_bit_count
{
@@ -178,9 +175,6 @@ typedef struct _hal_uart_config
uint8_t instance; /*!< Instance (0 - UART0, 1 - UART1, ...), detail information please refer to the
SOC corresponding RM.
Invalid instance value will cause initialization failure. */
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
hal_uart_block_mode_t mode; /*!< Uart block mode */
#endif /* UART_ADAPTER_NON_BLOCKING_MODE */
#if (defined(HAL_UART_ADAPTER_FIFO) && (HAL_UART_ADAPTER_FIFO > 0u))
uint8_t txFifoWatermark;
uint8_t rxFifoWatermark;
@@ -200,21 +194,38 @@ typedef enum _hal_uart_dma_status
kStatus_HAL_UartDmaError = (1U << 6U),
} hal_uart_dma_status_t;
typedef struct _dma_mux_configure_t
{
union
{
struct
{
uint8_t dma_mux_instance;
uint32_t rx_request;
uint32_t tx_request;
} dma_dmamux_configure;
};
} dma_mux_configure_t;
typedef struct _dma_channel_mux_configure_t
{
union
{
struct
{
uint32_t dma_rx_channel_mux;
uint32_t dma_tx_channel_mux;
} dma_dmamux_configure;
};
} dma_channel_mux_configure_t;
typedef struct _hal_uart_dma_config_t
{
uint8_t uart_instance;
uint8_t dma_instance;
uint8_t rx_channel;
uint8_t tx_channel;
#if defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT
uint8_t dma_mux_instance;
dma_request_source_t rx_request;
dma_request_source_t tx_request;
#endif
#if defined(FSL_FEATURE_EDMA_HAS_CHANNEL_MUX) && FSL_FEATURE_EDMA_HAS_CHANNEL_MUX
uint32_t dma_rx_channel_mux;
uint32_t dma_tx_channel_mux;
#endif
void *dma_mux_configure;
void *dma_channel_mux_configure;
} hal_uart_dma_config_t;
#endif /* HAL_UART_DMA_ENABLE */
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/device/LPC55S69_cm33_core0.h
+1210 -388
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File diff suppressed because it is too large Load Diff
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/device/LPC55S69_cm33_core0_features.h
+50 -4
View File
@@ -1,13 +1,13 @@
/*
** ###################################################################
** Version: rev. 1.1, 2019-05-16
** Build: b210318
** Build: b220725
**
** Abstract:
** Chip specific module features.
**
** Copyright 2016 Freescale Semiconductor, Inc.
** Copyright 2016-2021 NXP
** Copyright 2016-2022 NXP
** All rights reserved.
**
** SPDX-License-Identifier: BSD-3-Clause
@@ -61,6 +61,8 @@
#define FSL_FEATURE_SOC_LPADC_COUNT (1)
/* @brief MAILBOX availability on the SoC. */
#define FSL_FEATURE_SOC_MAILBOX_COUNT (1)
/* @brief MPU availability on the SoC. */
#define FSL_FEATURE_SOC_MPU_COUNT (1)
/* @brief MRT availability on the SoC. */
#define FSL_FEATURE_SOC_MRT_COUNT (1)
/* @brief OSTIMER availability on the SoC. */
@@ -138,6 +140,20 @@
#define FSL_FEATURE_LPADC_HAS_CFG_CALOFS (0)
/* @brief Has offset trim (register OFSTRIM). */
#define FSL_FEATURE_LPADC_HAS_OFSTRIM (1)
/* @brief Has Trigger status register. */
#define FSL_FEATURE_LPADC_HAS_TSTAT (1)
/* @brief Has power select (bitfield CFG[PWRSEL]). */
#define FSL_FEATURE_LPADC_HAS_CFG_PWRSEL (1)
/* @brief Has alternate channel B scale (bitfield CMDLn[ALTB_CSCALE]). */
#define FSL_FEATURE_LPADC_HAS_CMDL_ALTB_CSCALE (0)
/* @brief Has alternate channel B select enable (bitfield CMDLn[ALTBEN]). */
#define FSL_FEATURE_LPADC_HAS_CMDL_ALTBEN (0)
/* @brief Has alternate channel input (bitfield CMDLn[ALTB_ADCH]). */
#define FSL_FEATURE_LPADC_HAS_CMDL_ALTB_ADCH (0)
/* @brief Has offset calibration mode (bitfield CTRL[CALOFSMODE]). */
#define FSL_FEATURE_LPADC_HAS_CTRL_CALOFSMODE (0)
/* @brief Conversion averaged bitfiled width. */
#define FSL_FEATURE_LPADC_CONVERSIONS_AVERAGED_BITFIELD_WIDTH (3)
/* @brief Has internal temperature sensor. */
#define FSL_FEATURE_LPADC_HAS_INTERNAL_TEMP_SENSOR (1)
/* @brief Temperature sensor parameter A (slope). */
@@ -149,6 +165,15 @@
/* @brief the buffer size of temperature sensor. */
#define FSL_FEATURE_LPADC_TEMP_SENS_BUFFER_SIZE (4U)
/* ANALOGCTRL module features */
/* @brief Has PLL_USB_OUT_BIT_FIELD bitfile in XO32M_CTRL reigster. */
#define FSL_FEATURE_ANACTRL_HAS_NO_ENABLE_PLL_USB_OUT_BIT_FIELD (1)
/* @brief Has XO32M_ADC_CLK_MODE bitfile in DUMMY_CTRL reigster. */
#define FSL_FEATURE_ANACTRL_HAS_XO32M_ADC_CLK_MODE_BIF_FIELD (0)
/* @brief Has auxiliary bias(register AUX_BIAS). */
#define FSL_FEATURE_ANACTRL_HAS_AUX_BIAS_REG (1)
/* CASPER module features */
/* @brief Base address of the CASPER dedicated RAM */
@@ -160,7 +185,18 @@
/* CTIMER module features */
/* No feature definitions */
/* @brief CTIMER has no capture channel. */
#define FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE (0)
/* @brief CTIMER has no capture 2 interrupt. */
#define FSL_FEATURE_CTIMER_HAS_NO_IR_CR2INT (0)
/* @brief CTIMER capture 3 interrupt. */
#define FSL_FEATURE_CTIMER_HAS_IR_CR3INT (1)
/* @brief Has CTIMER CCR_CAP2 (register bits CCR[CAP2RE][CAP2FE][CAP2I]. */
#define FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 (0)
/* @brief Has CTIMER CCR_CAP3 (register bits CCR[CAP3RE][CAP3FE][CAP3I]). */
#define FSL_FEATURE_CTIMER_HAS_CCR_CAP3 (1)
/* @brief CTIMER Has register MSR */
#define FSL_FEATURE_CTIMER_HAS_MSR (1)
/* DMA module features */
@@ -242,6 +278,11 @@
/* @brief I2S has DMIC interconnection */
#define FSL_FEATURE_FLEXCOMM_INSTANCE_I2S_HAS_DMIC_INTERCONNECTIONn(x) (0)
/* GINT module features */
/* @brief The count of th port which are supported in GINT. */
#define FSL_FEATURE_GINT_PORT_COUNT (2)
/* HASHCRYPT module features */
/* @brief the address of alias offset */
@@ -334,6 +375,11 @@
/* @brief Number of connected outputs */
#define FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS (2)
/* SPI module features */
/* @brief SSEL pin count. */
#define FSL_FEATURE_SPI_SSEL_COUNT (4)
/* SYSCON module features */
/* @brief Flash page size in bytes */
@@ -341,7 +387,7 @@
/* @brief Flash sector size in bytes */
#define FSL_FEATURE_SYSCON_FLASH_SECTOR_SIZE_BYTES (32768)
/* @brief Flash size in bytes */
#define FSL_FEATURE_SYSCON_FLASH_SIZE_BYTES (622592)
#define FSL_FEATURE_SYSCON_FLASH_SIZE_BYTES (645120)
/* @brief Has Power Down mode */
#define FSL_FEATURE_SYSCON_HAS_POWERDOWN_MODE (1)
/* @brief CCM_ANALOG availability on the SoC. */
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/device/system_LPC55S69_cm33_core0.c
+4 -4
View File
@@ -11,7 +11,7 @@
**
** Reference manual: LPC55S6x/LPC55S2x/LPC552x User manual(UM11126) Rev.1.3 16 May 2019
** Version: rev. 1.1, 2019-05-16
** Build: b200418
** Build: b220117
**
** Abstract:
** Provides a system configuration function and a global variable that
@@ -19,7 +19,7 @@
** the oscillator (PLL) that is part of the microcontroller device.
**
** Copyright 2016 Freescale Semiconductor, Inc.
** Copyright 2016-2020 NXP
** Copyright 2016-2022 NXP
** All rights reserved.
**
** SPDX-License-Identifier: BSD-3-Clause
@@ -116,7 +116,7 @@ static float findPll0MMult(void)
(float)(uint32_t)(1UL << PLL_SSCG_MD_INT_P));
mMult = (float)mMult_int + mMult_fract;
}
if (mMult == 0.0F)
if (0ULL == ((uint64_t)mMult))
{
mMult = 1.0F;
}
@@ -238,7 +238,7 @@ uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
-- SystemInit()
---------------------------------------------------------------------------- */
__attribute__((weak)) void SystemInit (void) {
__attribute__ ((weak)) void SystemInit (void) {
#if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
SCB->CPACR |= ((3UL << 10*2) | (3UL << 11*2)); /* set CP10, CP11 Full Access in Secure mode */
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/device/system_LPC55S69_cm33_core0.h
+2 -2
View File
@@ -11,7 +11,7 @@
**
** Reference manual: LPC55S6x/LPC55S2x/LPC552x User manual(UM11126) Rev.1.3 16 May 2019
** Version: rev. 1.1, 2019-05-16
** Build: b200418
** Build: b220117
**
** Abstract:
** Provides a system configuration function and a global variable that
@@ -19,7 +19,7 @@
** the oscillator (PLL) that is part of the microcontroller device.
**
** Copyright 2016 Freescale Semiconductor, Inc.
** Copyright 2016-2020 NXP
** Copyright 2016-2022 NXP
** All rights reserved.
**
** SPDX-License-Identifier: BSD-3-Clause
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_clock.c
+21 -10
View File
@@ -1,5 +1,5 @@
/*
* Copyright 2017 - 2020 , NXP
* Copyright 2017 - 2021 , NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -127,7 +127,7 @@ void CLOCK_AttachClk(clock_attach_id_t connection)
sel = GET_ID_ITEM_SEL(item);
if (mux == CM_RTCOSC32KCLKSEL)
{
PMC->RTCOSC32K |= sel;
PMC->RTCOSC32K = (PMC->RTCOSC32K & ~PMC_RTCOSC32K_SEL_MASK) | PMC_RTCOSC32K_SEL(sel);
}
else
{
@@ -388,7 +388,7 @@ void CLOCK_SetFLASHAccessCyclesForFreq(uint32_t iFreq)
/* Set EXT OSC Clk */
/**
* brief Initialize the external osc clock to given frequency.
* Crystal oscillator with an operating frequency of 12 MHz to 32 MHz.
* Crystal oscillator with an operating frequency of 12 MHz to 32 MHz.
* Option for external clock input (bypass mode) for clock frequencies of up to 25 MHz.
* param iFreq : Desired frequency (must be equal to exact rate in Hz)
* return returns success or fail status.
@@ -848,12 +848,14 @@ uint32_t CLOCK_GetFlexCommInputClock(uint32_t id)
/* Get FLEXCOMM Clk */
uint32_t CLOCK_GetFlexCommClkFreq(uint32_t id)
{
uint32_t freq = 0U;
uint32_t temp;
uint32_t freq = 0U;
uint32_t frgMul = 0U;
uint32_t frgDiv = 0U;
freq = CLOCK_GetFlexCommInputClock(id);
temp = SYSCON->FLEXFRGXCTRL[id] & SYSCON_FLEXFRG0CTRL_MULT_MASK;
return freq / (1U + (temp) / ((SYSCON->FLEXFRGXCTRL[id] & SYSCON_FLEXFRG0CTRL_DIV_MASK) + 1U));
freq = CLOCK_GetFlexCommInputClock(id);
frgMul = (SYSCON->FLEXFRGXCTRL[id] & SYSCON_FLEXFRG0CTRL_MULT_MASK) >> 8U;
frgDiv = SYSCON->FLEXFRGXCTRL[id] & SYSCON_FLEXFRG0CTRL_DIV_MASK;
return (uint32_t)(((uint64_t)freq * ((uint64_t)frgDiv + 1ULL)) / (frgMul + frgDiv + 1UL));
}
/* Get HS_LPSI Clk */
@@ -1159,7 +1161,7 @@ static float findPll0MMult(void)
(float)(uint32_t)(1UL << PLL0_SSCG_MD_INT_P));
mMult = (float)mMult_int + mMult_fract;
}
if (mMult == 0.0F)
if (0ULL == ((uint64_t)mMult))
{
mMult = 1.0F;
}
@@ -1882,7 +1884,8 @@ bool CLOCK_EnableUsbfs0DeviceClock(clock_usbfs_src_t src, uint32_t freq)
/* Turn ON FRO HF */
POWER_DisablePD(kPDRUNCFG_PD_FRO192M);
/* Enable FRO 96MHz output */
ANACTRL->FRO192M_CTRL = ANACTRL->FRO192M_CTRL | ANACTRL_FRO192M_CTRL_ENA_96MHZCLK_MASK | ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK;
ANACTRL->FRO192M_CTRL =
ANACTRL->FRO192M_CTRL | ANACTRL_FRO192M_CTRL_ENA_96MHZCLK_MASK | ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK;
/* Select FRO 96 or 48 MHz */
CLOCK_AttachClk(kFRO_HF_to_USB0_CLK);
}
@@ -2093,3 +2096,11 @@ bool CLOCK_EnableUsbhs0HostClock(clock_usbhs_src_t src, uint32_t freq)
return true;
}
/*! @brief Enable the OSTIMER 32k clock.
* @return Nothing
*/
void CLOCK_EnableOstimer32kClock(void)
{
PMC->OSTIMERr |= PMC_OSTIMER_CLOCKENABLE_MASK;
}
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_clock.h
+5
View File
@@ -1492,6 +1492,11 @@ bool CLOCK_EnableUsbhs0DeviceClock(clock_usbhs_src_t src, uint32_t freq);
*/
bool CLOCK_EnableUsbhs0HostClock(clock_usbhs_src_t src, uint32_t freq);
/*! @brief Enable the OSTIMER 32k clock.
* @return Nothing
*/
void CLOCK_EnableOstimer32kClock(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus */
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_common.c
+7 -5
View File
@@ -21,13 +21,14 @@ typedef struct _mem_align_control_block
#define FSL_COMPONENT_ID "platform.drivers.common"
#endif
#if !((defined(__DSC__) && defined(__CW__)))
void *SDK_Malloc(size_t size, size_t alignbytes)
{
mem_align_cb_t *p_cb = NULL;
uint32_t alignedsize;
/* Check overflow. */
alignedsize = SDK_SIZEALIGN(size, alignbytes);
alignedsize = (uint32_t)(unsigned int)SDK_SIZEALIGN(size, alignbytes);
if (alignedsize < size)
{
return NULL;
@@ -38,15 +39,15 @@ void *SDK_Malloc(size_t size, size_t alignbytes)
return NULL;
}
alignedsize += alignbytes + sizeof(mem_align_cb_t);
alignedsize += alignbytes + (uint32_t)sizeof(mem_align_cb_t);
union
{
void *pointer_value;
uint32_t unsigned_value;
uintptr_t unsigned_value;
} p_align_addr, p_addr;
p_addr.pointer_value = malloc(alignedsize);
p_addr.pointer_value = malloc((size_t)alignedsize);
if (p_addr.pointer_value == NULL)
{
@@ -67,7 +68,7 @@ void SDK_Free(void *ptr)
union
{
void *pointer_value;
uint32_t unsigned_value;
uintptr_t unsigned_value;
} p_free;
p_free.pointer_value = ptr;
mem_align_cb_t *p_cb = (mem_align_cb_t *)(p_free.unsigned_value - 4U);
@@ -81,3 +82,4 @@ void SDK_Free(void *ptr)
free(p_free.pointer_value);
}
#endif
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_common.h
+165 -139
View File
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
* Copyright 2016-2021 NXP
* Copyright 2016-2022 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -40,142 +40,163 @@
******************************************************************************/
/*! @brief Construct a status code value from a group and code number. */
#define MAKE_STATUS(group, code) ((((group)*100) + (code)))
#define MAKE_STATUS(group, code) ((((group)*100L) + (code)))
/*! @brief Construct the version number for drivers. */
#define MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix))
/*! @brief Construct the version number for drivers.
*
* The driver version is a 32-bit number, for both 32-bit platforms(such as Cortex M)
* and 16-bit platforms(such as DSC).
*
* @verbatim
| Unused || Major Version || Minor Version || Bug Fix |
31 25 24 17 16 9 8 0
@endverbatim
*/
#define MAKE_VERSION(major, minor, bugfix) (((major)*65536L) + ((minor)*256L) + (bugfix))
/*! @name Driver version */
/*@{*/
/*! @brief common driver version. */
#define FSL_COMMON_DRIVER_VERSION (MAKE_VERSION(2, 3, 0))
#define FSL_COMMON_DRIVER_VERSION (MAKE_VERSION(2, 4, 0))
/*@}*/
/* Debug console type definition. */
#define DEBUG_CONSOLE_DEVICE_TYPE_NONE 0U /*!< No debug console. */
#define DEBUG_CONSOLE_DEVICE_TYPE_UART 1U /*!< Debug console based on UART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_LPUART 2U /*!< Debug console based on LPUART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_LPSCI 3U /*!< Debug console based on LPSCI. */
#define DEBUG_CONSOLE_DEVICE_TYPE_USBCDC 4U /*!< Debug console based on USBCDC. */
#define DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM 5U /*!< Debug console based on FLEXCOMM. */
#define DEBUG_CONSOLE_DEVICE_TYPE_IUART 6U /*!< Debug console based on i.MX UART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_VUSART 7U /*!< Debug console based on LPC_VUSART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_MINI_USART 8U /*!< Debug console based on LPC_USART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_SWO 9U /*!< Debug console based on SWO. */
#define DEBUG_CONSOLE_DEVICE_TYPE_QSCI 10U /*!< Debug console based on QSCI. */
#define DEBUG_CONSOLE_DEVICE_TYPE_NONE 0U /*!< No debug console. */
#define DEBUG_CONSOLE_DEVICE_TYPE_UART 1U /*!< Debug console based on UART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_LPUART 2U /*!< Debug console based on LPUART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_LPSCI 3U /*!< Debug console based on LPSCI. */
#define DEBUG_CONSOLE_DEVICE_TYPE_USBCDC 4U /*!< Debug console based on USBCDC. */
#define DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM 5U /*!< Debug console based on FLEXCOMM. */
#define DEBUG_CONSOLE_DEVICE_TYPE_IUART 6U /*!< Debug console based on i.MX UART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_VUSART 7U /*!< Debug console based on LPC_VUSART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_MINI_USART 8U /*!< Debug console based on LPC_USART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_SWO 9U /*!< Debug console based on SWO. */
#define DEBUG_CONSOLE_DEVICE_TYPE_QSCI 10U /*!< Debug console based on QSCI. */
/*! @brief Status group numbers. */
enum _status_groups
{
kStatusGroup_Generic = 0, /*!< Group number for generic status codes. */
kStatusGroup_FLASH = 1, /*!< Group number for FLASH status codes. */
kStatusGroup_LPSPI = 4, /*!< Group number for LPSPI status codes. */
kStatusGroup_FLEXIO_SPI = 5, /*!< Group number for FLEXIO SPI status codes. */
kStatusGroup_DSPI = 6, /*!< Group number for DSPI status codes. */
kStatusGroup_FLEXIO_UART = 7, /*!< Group number for FLEXIO UART status codes. */
kStatusGroup_FLEXIO_I2C = 8, /*!< Group number for FLEXIO I2C status codes. */
kStatusGroup_LPI2C = 9, /*!< Group number for LPI2C status codes. */
kStatusGroup_UART = 10, /*!< Group number for UART status codes. */
kStatusGroup_I2C = 11, /*!< Group number for UART status codes. */
kStatusGroup_LPSCI = 12, /*!< Group number for LPSCI status codes. */
kStatusGroup_LPUART = 13, /*!< Group number for LPUART status codes. */
kStatusGroup_SPI = 14, /*!< Group number for SPI status code.*/
kStatusGroup_XRDC = 15, /*!< Group number for XRDC status code.*/
kStatusGroup_SEMA42 = 16, /*!< Group number for SEMA42 status code.*/
kStatusGroup_SDHC = 17, /*!< Group number for SDHC status code */
kStatusGroup_SDMMC = 18, /*!< Group number for SDMMC status code */
kStatusGroup_SAI = 19, /*!< Group number for SAI status code */
kStatusGroup_MCG = 20, /*!< Group number for MCG status codes. */
kStatusGroup_SCG = 21, /*!< Group number for SCG status codes. */
kStatusGroup_SDSPI = 22, /*!< Group number for SDSPI status codes. */
kStatusGroup_FLEXIO_I2S = 23, /*!< Group number for FLEXIO I2S status codes */
kStatusGroup_FLEXIO_MCULCD = 24, /*!< Group number for FLEXIO LCD status codes */
kStatusGroup_FLASHIAP = 25, /*!< Group number for FLASHIAP status codes */
kStatusGroup_FLEXCOMM_I2C = 26, /*!< Group number for FLEXCOMM I2C status codes */
kStatusGroup_I2S = 27, /*!< Group number for I2S status codes */
kStatusGroup_IUART = 28, /*!< Group number for IUART status codes */
kStatusGroup_CSI = 29, /*!< Group number for CSI status codes */
kStatusGroup_MIPI_DSI = 30, /*!< Group number for MIPI DSI status codes */
kStatusGroup_SDRAMC = 35, /*!< Group number for SDRAMC status codes. */
kStatusGroup_POWER = 39, /*!< Group number for POWER status codes. */
kStatusGroup_ENET = 40, /*!< Group number for ENET status codes. */
kStatusGroup_PHY = 41, /*!< Group number for PHY status codes. */
kStatusGroup_TRGMUX = 42, /*!< Group number for TRGMUX status codes. */
kStatusGroup_SMARTCARD = 43, /*!< Group number for SMARTCARD status codes. */
kStatusGroup_LMEM = 44, /*!< Group number for LMEM status codes. */
kStatusGroup_QSPI = 45, /*!< Group number for QSPI status codes. */
kStatusGroup_DMA = 50, /*!< Group number for DMA status codes. */
kStatusGroup_EDMA = 51, /*!< Group number for EDMA status codes. */
kStatusGroup_DMAMGR = 52, /*!< Group number for DMAMGR status codes. */
kStatusGroup_FLEXCAN = 53, /*!< Group number for FlexCAN status codes. */
kStatusGroup_LTC = 54, /*!< Group number for LTC status codes. */
kStatusGroup_FLEXIO_CAMERA = 55, /*!< Group number for FLEXIO CAMERA status codes. */
kStatusGroup_LPC_SPI = 56, /*!< Group number for LPC_SPI status codes. */
kStatusGroup_LPC_USART = 57, /*!< Group number for LPC_USART status codes. */
kStatusGroup_DMIC = 58, /*!< Group number for DMIC status codes. */
kStatusGroup_SDIF = 59, /*!< Group number for SDIF status codes.*/
kStatusGroup_SPIFI = 60, /*!< Group number for SPIFI status codes. */
kStatusGroup_OTP = 61, /*!< Group number for OTP status codes. */
kStatusGroup_MCAN = 62, /*!< Group number for MCAN status codes. */
kStatusGroup_CAAM = 63, /*!< Group number for CAAM status codes. */
kStatusGroup_ECSPI = 64, /*!< Group number for ECSPI status codes. */
kStatusGroup_USDHC = 65, /*!< Group number for USDHC status codes.*/
kStatusGroup_LPC_I2C = 66, /*!< Group number for LPC_I2C status codes.*/
kStatusGroup_DCP = 67, /*!< Group number for DCP status codes.*/
kStatusGroup_MSCAN = 68, /*!< Group number for MSCAN status codes.*/
kStatusGroup_ESAI = 69, /*!< Group number for ESAI status codes. */
kStatusGroup_FLEXSPI = 70, /*!< Group number for FLEXSPI status codes. */
kStatusGroup_MMDC = 71, /*!< Group number for MMDC status codes. */
kStatusGroup_PDM = 72, /*!< Group number for MIC status codes. */
kStatusGroup_SDMA = 73, /*!< Group number for SDMA status codes. */
kStatusGroup_ICS = 74, /*!< Group number for ICS status codes. */
kStatusGroup_SPDIF = 75, /*!< Group number for SPDIF status codes. */
kStatusGroup_LPC_MINISPI = 76, /*!< Group number for LPC_MINISPI status codes. */
kStatusGroup_HASHCRYPT = 77, /*!< Group number for Hashcrypt status codes */
kStatusGroup_LPC_SPI_SSP = 78, /*!< Group number for LPC_SPI_SSP status codes. */
kStatusGroup_I3C = 79, /*!< Group number for I3C status codes */
kStatusGroup_LPC_I2C_1 = 97, /*!< Group number for LPC_I2C_1 status codes. */
kStatusGroup_NOTIFIER = 98, /*!< Group number for NOTIFIER status codes. */
kStatusGroup_DebugConsole = 99, /*!< Group number for debug console status codes. */
kStatusGroup_SEMC = 100, /*!< Group number for SEMC status codes. */
kStatusGroup_Generic = 0, /*!< Group number for generic status codes. */
kStatusGroup_FLASH = 1, /*!< Group number for FLASH status codes. */
kStatusGroup_LPSPI = 4, /*!< Group number for LPSPI status codes. */
kStatusGroup_FLEXIO_SPI = 5, /*!< Group number for FLEXIO SPI status codes. */
kStatusGroup_DSPI = 6, /*!< Group number for DSPI status codes. */
kStatusGroup_FLEXIO_UART = 7, /*!< Group number for FLEXIO UART status codes. */
kStatusGroup_FLEXIO_I2C = 8, /*!< Group number for FLEXIO I2C status codes. */
kStatusGroup_LPI2C = 9, /*!< Group number for LPI2C status codes. */
kStatusGroup_UART = 10, /*!< Group number for UART status codes. */
kStatusGroup_I2C = 11, /*!< Group number for UART status codes. */
kStatusGroup_LPSCI = 12, /*!< Group number for LPSCI status codes. */
kStatusGroup_LPUART = 13, /*!< Group number for LPUART status codes. */
kStatusGroup_SPI = 14, /*!< Group number for SPI status code.*/
kStatusGroup_XRDC = 15, /*!< Group number for XRDC status code.*/
kStatusGroup_SEMA42 = 16, /*!< Group number for SEMA42 status code.*/
kStatusGroup_SDHC = 17, /*!< Group number for SDHC status code */
kStatusGroup_SDMMC = 18, /*!< Group number for SDMMC status code */
kStatusGroup_SAI = 19, /*!< Group number for SAI status code */
kStatusGroup_MCG = 20, /*!< Group number for MCG status codes. */
kStatusGroup_SCG = 21, /*!< Group number for SCG status codes. */
kStatusGroup_SDSPI = 22, /*!< Group number for SDSPI status codes. */
kStatusGroup_FLEXIO_I2S = 23, /*!< Group number for FLEXIO I2S status codes */
kStatusGroup_FLEXIO_MCULCD = 24, /*!< Group number for FLEXIO LCD status codes */
kStatusGroup_FLASHIAP = 25, /*!< Group number for FLASHIAP status codes */
kStatusGroup_FLEXCOMM_I2C = 26, /*!< Group number for FLEXCOMM I2C status codes */
kStatusGroup_I2S = 27, /*!< Group number for I2S status codes */
kStatusGroup_IUART = 28, /*!< Group number for IUART status codes */
kStatusGroup_CSI = 29, /*!< Group number for CSI status codes */
kStatusGroup_MIPI_DSI = 30, /*!< Group number for MIPI DSI status codes */
kStatusGroup_SDRAMC = 35, /*!< Group number for SDRAMC status codes. */
kStatusGroup_POWER = 39, /*!< Group number for POWER status codes. */
kStatusGroup_ENET = 40, /*!< Group number for ENET status codes. */
kStatusGroup_PHY = 41, /*!< Group number for PHY status codes. */
kStatusGroup_TRGMUX = 42, /*!< Group number for TRGMUX status codes. */
kStatusGroup_SMARTCARD = 43, /*!< Group number for SMARTCARD status codes. */
kStatusGroup_LMEM = 44, /*!< Group number for LMEM status codes. */
kStatusGroup_QSPI = 45, /*!< Group number for QSPI status codes. */
kStatusGroup_DMA = 50, /*!< Group number for DMA status codes. */
kStatusGroup_EDMA = 51, /*!< Group number for EDMA status codes. */
kStatusGroup_DMAMGR = 52, /*!< Group number for DMAMGR status codes. */
kStatusGroup_FLEXCAN = 53, /*!< Group number for FlexCAN status codes. */
kStatusGroup_LTC = 54, /*!< Group number for LTC status codes. */
kStatusGroup_FLEXIO_CAMERA = 55, /*!< Group number for FLEXIO CAMERA status codes. */
kStatusGroup_LPC_SPI = 56, /*!< Group number for LPC_SPI status codes. */
kStatusGroup_LPC_USART = 57, /*!< Group number for LPC_USART status codes. */
kStatusGroup_DMIC = 58, /*!< Group number for DMIC status codes. */
kStatusGroup_SDIF = 59, /*!< Group number for SDIF status codes.*/
kStatusGroup_SPIFI = 60, /*!< Group number for SPIFI status codes. */
kStatusGroup_OTP = 61, /*!< Group number for OTP status codes. */
kStatusGroup_MCAN = 62, /*!< Group number for MCAN status codes. */
kStatusGroup_CAAM = 63, /*!< Group number for CAAM status codes. */
kStatusGroup_ECSPI = 64, /*!< Group number for ECSPI status codes. */
kStatusGroup_USDHC = 65, /*!< Group number for USDHC status codes.*/
kStatusGroup_LPC_I2C = 66, /*!< Group number for LPC_I2C status codes.*/
kStatusGroup_DCP = 67, /*!< Group number for DCP status codes.*/
kStatusGroup_MSCAN = 68, /*!< Group number for MSCAN status codes.*/
kStatusGroup_ESAI = 69, /*!< Group number for ESAI status codes. */
kStatusGroup_FLEXSPI = 70, /*!< Group number for FLEXSPI status codes. */
kStatusGroup_MMDC = 71, /*!< Group number for MMDC status codes. */
kStatusGroup_PDM = 72, /*!< Group number for MIC status codes. */
kStatusGroup_SDMA = 73, /*!< Group number for SDMA status codes. */
kStatusGroup_ICS = 74, /*!< Group number for ICS status codes. */
kStatusGroup_SPDIF = 75, /*!< Group number for SPDIF status codes. */
kStatusGroup_LPC_MINISPI = 76, /*!< Group number for LPC_MINISPI status codes. */
kStatusGroup_HASHCRYPT = 77, /*!< Group number for Hashcrypt status codes */
kStatusGroup_LPC_SPI_SSP = 78, /*!< Group number for LPC_SPI_SSP status codes. */
kStatusGroup_I3C = 79, /*!< Group number for I3C status codes */
kStatusGroup_LPC_I2C_1 = 97, /*!< Group number for LPC_I2C_1 status codes. */
kStatusGroup_NOTIFIER = 98, /*!< Group number for NOTIFIER status codes. */
kStatusGroup_DebugConsole = 99, /*!< Group number for debug console status codes. */
kStatusGroup_SEMC = 100, /*!< Group number for SEMC status codes. */
kStatusGroup_ApplicationRangeStart = 101, /*!< Starting number for application groups. */
kStatusGroup_IAP = 102, /*!< Group number for IAP status codes */
kStatusGroup_SFA = 103, /*!< Group number for SFA status codes*/
kStatusGroup_SPC = 104, /*!< Group number for SPC status codes. */
kStatusGroup_PUF = 105, /*!< Group number for PUF status codes. */
kStatusGroup_TOUCH_PANEL = 106, /*!< Group number for touch panel status codes */
kStatusGroup_IAP = 102, /*!< Group number for IAP status codes */
kStatusGroup_SFA = 103, /*!< Group number for SFA status codes*/
kStatusGroup_SPC = 104, /*!< Group number for SPC status codes. */
kStatusGroup_PUF = 105, /*!< Group number for PUF status codes. */
kStatusGroup_TOUCH_PANEL = 106, /*!< Group number for touch panel status codes */
kStatusGroup_VBAT = 107, /*!< Group number for VBAT status codes */
kStatusGroup_HAL_GPIO = 121, /*!< Group number for HAL GPIO status codes. */
kStatusGroup_HAL_UART = 122, /*!< Group number for HAL UART status codes. */
kStatusGroup_HAL_TIMER = 123, /*!< Group number for HAL TIMER status codes. */
kStatusGroup_HAL_SPI = 124, /*!< Group number for HAL SPI status codes. */
kStatusGroup_HAL_I2C = 125, /*!< Group number for HAL I2C status codes. */
kStatusGroup_HAL_FLASH = 126, /*!< Group number for HAL FLASH status codes. */
kStatusGroup_HAL_PWM = 127, /*!< Group number for HAL PWM status codes. */
kStatusGroup_HAL_RNG = 128, /*!< Group number for HAL RNG status codes. */
kStatusGroup_TIMERMANAGER = 135, /*!< Group number for TiMER MANAGER status codes. */
kStatusGroup_SERIALMANAGER = 136, /*!< Group number for SERIAL MANAGER status codes. */
kStatusGroup_LED = 137, /*!< Group number for LED status codes. */
kStatusGroup_BUTTON = 138, /*!< Group number for BUTTON status codes. */
kStatusGroup_EXTERN_EEPROM = 139, /*!< Group number for EXTERN EEPROM status codes. */
kStatusGroup_SHELL = 140, /*!< Group number for SHELL status codes. */
kStatusGroup_MEM_MANAGER = 141, /*!< Group number for MEM MANAGER status codes. */
kStatusGroup_LIST = 142, /*!< Group number for List status codes. */
kStatusGroup_OSA = 143, /*!< Group number for OSA status codes. */
kStatusGroup_COMMON_TASK = 144, /*!< Group number for Common task status codes. */
kStatusGroup_MSG = 145, /*!< Group number for messaging status codes. */
kStatusGroup_SDK_OCOTP = 146, /*!< Group number for OCOTP status codes. */
kStatusGroup_SDK_FLEXSPINOR = 147, /*!< Group number for FLEXSPINOR status codes.*/
kStatusGroup_CODEC = 148, /*!< Group number for codec status codes. */
kStatusGroup_ASRC = 149, /*!< Group number for codec status ASRC. */
kStatusGroup_OTFAD = 150, /*!< Group number for codec status codes. */
kStatusGroup_SDIOSLV = 151, /*!< Group number for SDIOSLV status codes. */
kStatusGroup_MECC = 152, /*!< Group number for MECC status codes. */
kStatusGroup_ENET_QOS = 153, /*!< Group number for ENET_QOS status codes. */
kStatusGroup_LOG = 154, /*!< Group number for LOG status codes. */
kStatusGroup_I3CBUS = 155, /*!< Group number for I3CBUS status codes. */
kStatusGroup_QSCI = 156, /*!< Group number for QSCI status codes. */
kStatusGroup_SNT = 157, /*!< Group number for SNT status codes. */
kStatusGroup_HAL_GPIO = 121, /*!< Group number for HAL GPIO status codes. */
kStatusGroup_HAL_UART = 122, /*!< Group number for HAL UART status codes. */
kStatusGroup_HAL_TIMER = 123, /*!< Group number for HAL TIMER status codes. */
kStatusGroup_HAL_SPI = 124, /*!< Group number for HAL SPI status codes. */
kStatusGroup_HAL_I2C = 125, /*!< Group number for HAL I2C status codes. */
kStatusGroup_HAL_FLASH = 126, /*!< Group number for HAL FLASH status codes. */
kStatusGroup_HAL_PWM = 127, /*!< Group number for HAL PWM status codes. */
kStatusGroup_HAL_RNG = 128, /*!< Group number for HAL RNG status codes. */
kStatusGroup_HAL_I2S = 129, /*!< Group number for HAL I2S status codes. */
kStatusGroup_TIMERMANAGER = 135, /*!< Group number for TiMER MANAGER status codes. */
kStatusGroup_SERIALMANAGER = 136, /*!< Group number for SERIAL MANAGER status codes. */
kStatusGroup_LED = 137, /*!< Group number for LED status codes. */
kStatusGroup_BUTTON = 138, /*!< Group number for BUTTON status codes. */
kStatusGroup_EXTERN_EEPROM = 139, /*!< Group number for EXTERN EEPROM status codes. */
kStatusGroup_SHELL = 140, /*!< Group number for SHELL status codes. */
kStatusGroup_MEM_MANAGER = 141, /*!< Group number for MEM MANAGER status codes. */
kStatusGroup_LIST = 142, /*!< Group number for List status codes. */
kStatusGroup_OSA = 143, /*!< Group number for OSA status codes. */
kStatusGroup_COMMON_TASK = 144, /*!< Group number for Common task status codes. */
kStatusGroup_MSG = 145, /*!< Group number for messaging status codes. */
kStatusGroup_SDK_OCOTP = 146, /*!< Group number for OCOTP status codes. */
kStatusGroup_SDK_FLEXSPINOR = 147, /*!< Group number for FLEXSPINOR status codes.*/
kStatusGroup_CODEC = 148, /*!< Group number for codec status codes. */
kStatusGroup_ASRC = 149, /*!< Group number for codec status ASRC. */
kStatusGroup_OTFAD = 150, /*!< Group number for codec status codes. */
kStatusGroup_SDIOSLV = 151, /*!< Group number for SDIOSLV status codes. */
kStatusGroup_MECC = 152, /*!< Group number for MECC status codes. */
kStatusGroup_ENET_QOS = 153, /*!< Group number for ENET_QOS status codes. */
kStatusGroup_LOG = 154, /*!< Group number for LOG status codes. */
kStatusGroup_I3CBUS = 155, /*!< Group number for I3CBUS status codes. */
kStatusGroup_QSCI = 156, /*!< Group number for QSCI status codes. */
kStatusGroup_SNT = 157, /*!< Group number for SNT status codes. */
kStatusGroup_QUEUEDSPI = 158, /*!< Group number for QSPI status codes. */
kStatusGroup_POWER_MANAGER = 159, /*!< Group number for POWER_MANAGER status codes. */
kStatusGroup_IPED = 160, /*!< Group number for IPED status codes. */
kStatusGroup_CSS_PKC = 161, /*!< Group number for CSS PKC status codes. */
kStatusGroup_HOSTIF = 162, /*!< Group number for HOSTIF status codes. */
kStatusGroup_CLIF = 163, /*!< Group number for CLIF status codes. */
kStatusGroup_BMA = 164, /*!< Group number for BMA status codes. */
kStatusGroup_NETC = 165, /*!< Group number for NETC status codes. */
};
/*! \public
@@ -183,14 +204,17 @@ enum _status_groups
*/
enum
{
kStatus_Success = MAKE_STATUS(kStatusGroup_Generic, 0), /*!< Generic status for Success. */
kStatus_Fail = MAKE_STATUS(kStatusGroup_Generic, 1), /*!< Generic status for Fail. */
kStatus_ReadOnly = MAKE_STATUS(kStatusGroup_Generic, 2), /*!< Generic status for read only failure. */
kStatus_OutOfRange = MAKE_STATUS(kStatusGroup_Generic, 3), /*!< Generic status for out of range access. */
kStatus_InvalidArgument = MAKE_STATUS(kStatusGroup_Generic, 4), /*!< Generic status for invalid argument check. */
kStatus_Timeout = MAKE_STATUS(kStatusGroup_Generic, 5), /*!< Generic status for timeout. */
kStatus_NoTransferInProgress = MAKE_STATUS(kStatusGroup_Generic, 6), /*!< Generic status for no transfer in progress. */
kStatus_Busy = MAKE_STATUS(kStatusGroup_Generic, 7), /*!< Generic status for module is busy. */
kStatus_Success = MAKE_STATUS(kStatusGroup_Generic, 0), /*!< Generic status for Success. */
kStatus_Fail = MAKE_STATUS(kStatusGroup_Generic, 1), /*!< Generic status for Fail. */
kStatus_ReadOnly = MAKE_STATUS(kStatusGroup_Generic, 2), /*!< Generic status for read only failure. */
kStatus_OutOfRange = MAKE_STATUS(kStatusGroup_Generic, 3), /*!< Generic status for out of range access. */
kStatus_InvalidArgument = MAKE_STATUS(kStatusGroup_Generic, 4), /*!< Generic status for invalid argument check. */
kStatus_Timeout = MAKE_STATUS(kStatusGroup_Generic, 5), /*!< Generic status for timeout. */
kStatus_NoTransferInProgress =
MAKE_STATUS(kStatusGroup_Generic, 6), /*!< Generic status for no transfer in progress. */
kStatus_Busy = MAKE_STATUS(kStatusGroup_Generic, 7), /*!< Generic status for module is busy. */
kStatus_NoData =
MAKE_STATUS(kStatusGroup_Generic, 8), /*!< Generic status for no data is found for the operation. */
};
/*! @brief Type used for all status and error return values. */
@@ -233,7 +257,7 @@ typedef int32_t status_t;
*/
/* @{ */
#if defined(__GNUC__) && !defined(__ARMCC_VERSION)
#define SUPPRESS_FALL_THROUGH_WARNING() __attribute__ ((fallthrough))
#define SUPPRESS_FALL_THROUGH_WARNING() __attribute__((fallthrough))
#else
#define SUPPRESS_FALL_THROUGH_WARNING()
#endif
@@ -247,6 +271,7 @@ typedef int32_t status_t;
extern "C" {
#endif
#if !((defined(__DSC__) && defined(__CW__)))
/*!
* @brief Allocate memory with given alignment and aligned size.
*
@@ -264,15 +289,16 @@ void *SDK_Malloc(size_t size, size_t alignbytes);
* @param ptr The memory to be release.
*/
void SDK_Free(void *ptr);
#endif
/*!
* @brief Delay at least for some time.
* Please note that, this API uses while loop for delay, different run-time environments make the time not precise,
* if precise delay count was needed, please implement a new delay function with hardware timer.
*
* @param delayTime_us Delay time in unit of microsecond.
* @param coreClock_Hz Core clock frequency with Hz.
*/
* @brief Delay at least for some time.
* Please note that, this API uses while loop for delay, different run-time environments make the time not precise,
* if precise delay count was needed, please implement a new delay function with hardware timer.
*
* @param delayTime_us Delay time in unit of microsecond.
* @param coreClock_Hz Core clock frequency with Hz.
*/
void SDK_DelayAtLeastUs(uint32_t delayTime_us, uint32_t coreClock_Hz);
#if defined(__cplusplus)
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_common_arm.c
+24 -8
View File
@@ -116,9 +116,9 @@ void DisableDeepSleepIRQ(IRQn_Type interrupt)
#endif /* FSL_FEATURE_POWERLIB_EXTEND */
#endif /* FSL_FEATURE_SOC_SYSCON_COUNT */
#if defined(SDK_DELAY_USE_DWT) && defined(DWT)
#if defined(DWT)
/* Use WDT. */
static void enableCpuCycleCounter(void)
void MSDK_EnableCpuCycleCounter(void)
{
/* Make sure the DWT trace fucntion is enabled. */
if (CoreDebug_DEMCR_TRCENA_Msk != (CoreDebug_DEMCR_TRCENA_Msk & CoreDebug->DEMCR))
@@ -136,11 +136,13 @@ static void enableCpuCycleCounter(void)
}
}
static uint32_t getCpuCycleCount(void)
uint32_t MSDK_GetCpuCycleCount(void)
{
return DWT->CYCCNT;
}
#else /* defined(SDK_DELAY_USE_DWT) && defined(DWT) */
#endif /* defined(DWT) */
#if !(defined(SDK_DELAY_USE_DWT) && defined(DWT))
/* Use software loop. */
#if defined(__CC_ARM) /* This macro is arm v5 specific */
/* clang-format off */
@@ -152,6 +154,20 @@ loop
BNE loop
BX LR
}
#elif defined(__ARM_ARCH_8A__) /* This macro is ARMv8-A specific */
static void DelayLoop(uint32_t count)
{
__ASM volatile(" MOV X0, %0" : : "r"(count));
__ASM volatile(
"loop: \n"
" SUB X0, X0, #1 \n"
" CMP X0, #0 \n"
" BNE loop \n"
:
:
: "r0");
}
/* clang-format on */
#elif defined(__ARMCC_VERSION) || defined(__ICCARM__) || defined(__GNUC__)
/* Cortex-M0 has a smaller instruction set, SUBS isn't supported in thumb-16 mode reported from __GNUC__ compiler,
@@ -198,21 +214,21 @@ void SDK_DelayAtLeastUs(uint32_t delayTime_us, uint32_t coreClock_Hz)
#if defined(SDK_DELAY_USE_DWT) && defined(DWT) /* Use DWT for better accuracy */
enableCpuCycleCounter();
MSDK_EnableCpuCycleCounter();
/* Calculate the count ticks. */
count += getCpuCycleCount();
count += MSDK_GetCpuCycleCount();
if (count > UINT32_MAX)
{
count -= UINT32_MAX;
/* Wait for cyccnt overflow. */
while (count < getCpuCycleCount())
while (count < MSDK_GetCpuCycleCount())
{
}
}
/* Wait for cyccnt reach count value. */
while (count > getCpuCycleCount())
while (count > MSDK_GetCpuCycleCount())
{
}
#else
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_common_arm.h
+258 -91
View File
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
* Copyright 2016-2021 NXP
* Copyright 2016-2022 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -214,69 +214,82 @@ static inline void _SDK_AtomicLocalClearAndSet4Byte(volatile uint32_t *addr, uin
_SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, s_val, s_val = (s_val & ~clearBits) | setBits);
}
#define SDK_ATOMIC_LOCAL_ADD(addr, val) \
((1UL == sizeof(*(addr))) ? _SDK_AtomicLocalAdd1Byte((volatile uint8_t*)(volatile void*)(addr), (val)) : \
((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalAdd2Byte((volatile uint16_t*)(volatile void*)(addr), (val)) : \
_SDK_AtomicLocalAdd4Byte((volatile uint32_t *)(volatile void*)(addr), (val))))
#define SDK_ATOMIC_LOCAL_ADD(addr, val) \
((1UL == sizeof(*(addr))) ? \
_SDK_AtomicLocalAdd1Byte((volatile uint8_t *)(volatile void *)(addr), (uint8_t)(val)) : \
((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalAdd2Byte((volatile uint16_t *)(volatile void *)(addr), (uint16_t)(val)) : \
_SDK_AtomicLocalAdd4Byte((volatile uint32_t *)(volatile void *)(addr), (uint32_t)(val))))
#define SDK_ATOMIC_LOCAL_SET(addr, bits) \
((1UL == sizeof(*(addr))) ? _SDK_AtomicLocalSet1Byte((volatile uint8_t*)(volatile void*)(addr), (bits)) : \
((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalSet2Byte((volatile uint16_t*)(volatile void*)(addr), (bits)) : \
_SDK_AtomicLocalSet4Byte((volatile uint32_t *)(volatile void*)(addr), (bits))))
#define SDK_ATOMIC_LOCAL_SET(addr, bits) \
((1UL == sizeof(*(addr))) ? \
_SDK_AtomicLocalSet1Byte((volatile uint8_t *)(volatile void *)(addr), (uint8_t)(bits)) : \
((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalSet2Byte((volatile uint16_t *)(volatile void *)(addr), (uint16_t)(bits)) : \
_SDK_AtomicLocalSet4Byte((volatile uint32_t *)(volatile void *)(addr), (uint32_t)(bits))))
#define SDK_ATOMIC_LOCAL_CLEAR(addr, bits) \
((1UL == sizeof(*(addr))) ? _SDK_AtomicLocalClear1Byte((volatile uint8_t*)(volatile void*)(addr), (bits)) : \
((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalClear2Byte((volatile uint16_t*)(volatile void*)(addr), (bits)) : \
_SDK_AtomicLocalClear4Byte((volatile uint32_t *)(volatile void*)(addr), (bits))))
#define SDK_ATOMIC_LOCAL_CLEAR(addr, bits) \
((1UL == sizeof(*(addr))) ? \
_SDK_AtomicLocalClear1Byte((volatile uint8_t *)(volatile void *)(addr), (uint8_t)(bits)) : \
((2UL == sizeof(*(addr))) ? \
_SDK_AtomicLocalClear2Byte((volatile uint16_t *)(volatile void *)(addr), (uint16_t)(bits)) : \
_SDK_AtomicLocalClear4Byte((volatile uint32_t *)(volatile void *)(addr), (uint32_t)(bits))))
#define SDK_ATOMIC_LOCAL_TOGGLE(addr, bits) \
((1UL == sizeof(*(addr))) ? _SDK_AtomicLocalToggle1Byte((volatile uint8_t*)(volatile void*)(addr), (bits)) : \
((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalToggle2Byte((volatile uint16_t*)(volatile void*)(addr), (bits)) : \
_SDK_AtomicLocalToggle4Byte((volatile uint32_t *)(volatile void*)(addr), (bits))))
#define SDK_ATOMIC_LOCAL_TOGGLE(addr, bits) \
((1UL == sizeof(*(addr))) ? \
_SDK_AtomicLocalToggle1Byte((volatile uint8_t *)(volatile void *)(addr), (uint8_t)(bits)) : \
((2UL == sizeof(*(addr))) ? \
_SDK_AtomicLocalToggle2Byte((volatile uint16_t *)(volatile void *)(addr), (uint16_t)(bits)) : \
_SDK_AtomicLocalToggle4Byte((volatile uint32_t *)(volatile void *)(addr), (uint32_t)(bits))))
#define SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits) \
((1UL == sizeof(*(addr))) ? _SDK_AtomicLocalClearAndSet1Byte((volatile uint8_t*)(volatile void*)(addr), (clearBits), (setBits)) : \
((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalClearAndSet2Byte((volatile uint16_t*)(volatile void*)(addr), (clearBits), (setBits)) : \
_SDK_AtomicLocalClearAndSet4Byte((volatile uint32_t *)(volatile void*)(addr), (clearBits), (setBits))))
#define SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits) \
((1UL == sizeof(*(addr))) ? \
_SDK_AtomicLocalClearAndSet1Byte((volatile uint8_t *)(volatile void *)(addr), (uint8_t)(clearBits), (uint8_t)(setBits)) : \
((2UL == sizeof(*(addr))) ? \
_SDK_AtomicLocalClearAndSet2Byte((volatile uint16_t *)(volatile void *)(addr), (uint16_t)(clearBits), (uint16_t)(setBits)) : \
_SDK_AtomicLocalClearAndSet4Byte((volatile uint32_t *)(volatile void *)(addr), (uint32_t)(clearBits), (uint32_t)(setBits))))
#else
#define SDK_ATOMIC_LOCAL_ADD(addr, val) \
do { \
uint32_t s_atomicOldInt; \
s_atomicOldInt = DisableGlobalIRQ(); \
*(addr) += (val); \
EnableGlobalIRQ(s_atomicOldInt); \
#define SDK_ATOMIC_LOCAL_ADD(addr, val) \
do \
{ \
uint32_t s_atomicOldInt; \
s_atomicOldInt = DisableGlobalIRQ(); \
*(addr) += (val); \
EnableGlobalIRQ(s_atomicOldInt); \
} while (0)
#define SDK_ATOMIC_LOCAL_SET(addr, bits) \
do { \
uint32_t s_atomicOldInt; \
s_atomicOldInt = DisableGlobalIRQ(); \
*(addr) |= (bits); \
EnableGlobalIRQ(s_atomicOldInt); \
#define SDK_ATOMIC_LOCAL_SET(addr, bits) \
do \
{ \
uint32_t s_atomicOldInt; \
s_atomicOldInt = DisableGlobalIRQ(); \
*(addr) |= (bits); \
EnableGlobalIRQ(s_atomicOldInt); \
} while (0)
#define SDK_ATOMIC_LOCAL_CLEAR(addr, bits) \
do { \
uint32_t s_atomicOldInt; \
s_atomicOldInt = DisableGlobalIRQ(); \
*(addr) &= ~(bits); \
EnableGlobalIRQ(s_atomicOldInt); \
#define SDK_ATOMIC_LOCAL_CLEAR(addr, bits) \
do \
{ \
uint32_t s_atomicOldInt; \
s_atomicOldInt = DisableGlobalIRQ(); \
*(addr) &= ~(bits); \
EnableGlobalIRQ(s_atomicOldInt); \
} while (0)
#define SDK_ATOMIC_LOCAL_TOGGLE(addr, bits) \
do { \
uint32_t s_atomicOldInt; \
s_atomicOldInt = DisableGlobalIRQ(); \
*(addr) ^= (bits); \
EnableGlobalIRQ(s_atomicOldInt); \
#define SDK_ATOMIC_LOCAL_TOGGLE(addr, bits) \
do \
{ \
uint32_t s_atomicOldInt; \
s_atomicOldInt = DisableGlobalIRQ(); \
*(addr) ^= (bits); \
EnableGlobalIRQ(s_atomicOldInt); \
} while (0)
#define SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits) \
do { \
do \
{ \
uint32_t s_atomicOldInt; \
s_atomicOldInt = DisableGlobalIRQ(); \
*(addr) = (*(addr) & ~(clearBits)) | (setBits); \
*(addr) = (*(addr) & ~(clearBits)) | (setBits); \
EnableGlobalIRQ(s_atomicOldInt); \
} while (0)
@@ -288,12 +301,12 @@ static inline void _SDK_AtomicLocalClearAndSet4Byte(volatile uint32_t *addr, uin
/*! Macro to convert a microsecond period to raw count value */
#define USEC_TO_COUNT(us, clockFreqInHz) (uint64_t)(((uint64_t)(us) * (clockFreqInHz)) / 1000000U)
/*! Macro to convert a raw count value to microsecond */
#define COUNT_TO_USEC(count, clockFreqInHz) (uint64_t)((uint64_t)(count) * 1000000U / (clockFreqInHz))
#define COUNT_TO_USEC(count, clockFreqInHz) (uint64_t)((uint64_t)(count)*1000000U / (clockFreqInHz))
/*! Macro to convert a millisecond period to raw count value */
#define MSEC_TO_COUNT(ms, clockFreqInHz) (uint64_t)((uint64_t)(ms) * (clockFreqInHz) / 1000U)
/*! Macro to convert a raw count value to millisecond */
#define COUNT_TO_MSEC(count, clockFreqInHz) (uint64_t)((uint64_t)(count) * 1000U / (clockFreqInHz))
#define COUNT_TO_MSEC(count, clockFreqInHz) (uint64_t)((uint64_t)(count)*1000U / (clockFreqInHz))
/* @} */
/*! @name ISR exit barrier
@@ -322,7 +335,7 @@ static inline void _SDK_AtomicLocalClearAndSet4Byte(volatile uint32_t *addr, uin
*/
_Pragma("diag_suppress=Pm120")
#define SDK_PRAGMA(x) _Pragma(#x)
_Pragma("diag_error=Pm120")
_Pragma("diag_error=Pm120")
/*! Macro to define a variable with alignbytes alignment */
#define SDK_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var
#elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
@@ -351,25 +364,27 @@ _Pragma("diag_error=Pm120")
/*! @name Non-cacheable region definition macros */
/* For initialized non-zero non-cacheable variables, please using "AT_NONCACHEABLE_SECTION_INIT(var) ={xx};" or
* "AT_NONCACHEABLE_SECTION_ALIGN_INIT(var) ={xx};" in your projects to define them, for zero-inited non-cacheable variables,
* please using "AT_NONCACHEABLE_SECTION(var);" or "AT_NONCACHEABLE_SECTION_ALIGN(var);" to define them, these zero-inited variables
* will be initialized to zero in system startup.
* "AT_NONCACHEABLE_SECTION_ALIGN_INIT(var) ={xx};" in your projects to define them, for zero-inited non-cacheable
* variables, please using "AT_NONCACHEABLE_SECTION(var);" or "AT_NONCACHEABLE_SECTION_ALIGN(var);" to define them,
* these zero-inited variables will be initialized to zero in system startup.
*/
/* @{ */
#if ((!(defined(FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION) && FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION)) && defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE))
#if ((!(defined(FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION) && FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION)) && \
defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE))
#if (defined(__ICCARM__))
#define AT_NONCACHEABLE_SECTION(var) var @"NonCacheable"
#define AT_NONCACHEABLE_SECTION(var) var @"NonCacheable"
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var @"NonCacheable"
#define AT_NONCACHEABLE_SECTION_INIT(var) var @"NonCacheable.init"
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var @"NonCacheable.init"
#define AT_NONCACHEABLE_SECTION_INIT(var) var @"NonCacheable.init"
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \
SDK_PRAGMA(data_alignment = alignbytes) var @"NonCacheable.init"
#elif(defined(__CC_ARM) || defined(__ARMCC_VERSION))
#elif (defined(__CC_ARM) || defined(__ARMCC_VERSION))
#define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \
__attribute__((section("NonCacheable.init"))) __attribute__((aligned(alignbytes))) var
#if(defined(__CC_ARM))
#if (defined(__CC_ARM))
#define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable"), zero_init)) var
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
__attribute__((section("NonCacheable"), zero_init)) __attribute__((aligned(alignbytes))) var
@@ -379,7 +394,7 @@ _Pragma("diag_error=Pm120")
__attribute__((section(".bss.NonCacheable"))) __attribute__((aligned(alignbytes))) var
#endif
#elif(defined(__GNUC__))
#elif (defined(__GNUC__))
/* For GCC, when the non-cacheable section is required, please define "__STARTUP_INITIALIZE_NONCACHEDATA"
* in your projects to make sure the non-cacheable section variables will be initialized in system startup.
*/
@@ -395,9 +410,9 @@ _Pragma("diag_error=Pm120")
#else
#define AT_NONCACHEABLE_SECTION(var) var
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) SDK_ALIGN(var, alignbytes)
#define AT_NONCACHEABLE_SECTION_INIT(var) var
#define AT_NONCACHEABLE_SECTION(var) var
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) SDK_ALIGN(var, alignbytes)
#define AT_NONCACHEABLE_SECTION_INIT(var) var
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) SDK_ALIGN(var, alignbytes)
#endif
@@ -408,43 +423,39 @@ _Pragma("diag_error=Pm120")
* @name Time sensitive region
* @{
*/
#if (defined(FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE) && FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE)
#if (defined(__ICCARM__))
#define AT_QUICKACCESS_SECTION_CODE(func) func @"CodeQuickAccess"
#define AT_QUICKACCESS_SECTION_DATA(func) func @"DataQuickAccess"
#elif(defined(__CC_ARM) || defined(__ARMCC_VERSION))
#define AT_QUICKACCESS_SECTION_DATA(var) var @"DataQuickAccess"
#define AT_QUICKACCESS_SECTION_DATA_ALIGN(var, alignbytes) \
SDK_PRAGMA(data_alignment = alignbytes) var @"DataQuickAccess"
#elif (defined(__CC_ARM) || defined(__ARMCC_VERSION))
#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"), __noinline__)) func
#define AT_QUICKACCESS_SECTION_DATA(func) __attribute__((section("DataQuickAccess"))) func
#elif(defined(__GNUC__))
#define AT_QUICKACCESS_SECTION_DATA(var) __attribute__((section("DataQuickAccess"))) var
#define AT_QUICKACCESS_SECTION_DATA_ALIGN(var, alignbytes) \
__attribute__((section("DataQuickAccess"))) __attribute__((aligned(alignbytes))) var
#elif (defined(__GNUC__))
#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"), __noinline__)) func
#define AT_QUICKACCESS_SECTION_DATA(func) __attribute__((section("DataQuickAccess"))) func
#define AT_QUICKACCESS_SECTION_DATA(var) __attribute__((section("DataQuickAccess"))) var
#define AT_QUICKACCESS_SECTION_DATA_ALIGN(var, alignbytes) \
__attribute__((section("DataQuickAccess"))) var __attribute__((aligned(alignbytes)))
#else
#error Toolchain not supported.
#endif /* defined(__ICCARM__) */
#else /* __FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE */
#define AT_QUICKACCESS_SECTION_CODE(func) func
#define AT_QUICKACCESS_SECTION_DATA(func) func
#endif /* __FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE */
/* @} */
/*! @name Ram Function */
#if (defined(__ICCARM__))
#define RAMFUNCTION_SECTION_CODE(func) func @"RamFunction"
#elif(defined(__CC_ARM) || defined(__ARMCC_VERSION))
#elif (defined(__CC_ARM) || defined(__ARMCC_VERSION))
#define RAMFUNCTION_SECTION_CODE(func) __attribute__((section("RamFunction"))) func
#elif(defined(__GNUC__))
#elif (defined(__GNUC__))
#define RAMFUNCTION_SECTION_CODE(func) __attribute__((section("RamFunction"))) func
#else
#error Toolchain not supported.
#endif /* defined(__ICCARM__) */
/* @} */
#if defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
void DefaultISR(void);
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
void DefaultISR(void);
#endif
/*
@@ -557,6 +568,144 @@ static inline status_t DisableIRQ(IRQn_Type interrupt)
return status;
}
/*!
* @brief Enable the IRQ, and also set the interrupt priority.
*
* Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt
* levels. For example, there are NVIC and intmux. Here the interrupts connected
* to NVIC are the LEVEL1 interrupts, because they are routed to the core directly.
* The interrupts connected to intmux are the LEVEL2 interrupts, they are routed
* to NVIC first then routed to core.
*
* This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts
* is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.
*
* @param interrupt The IRQ to Enable.
* @param priNum Priority number set to interrupt controller register.
* @retval kStatus_Success Interrupt priority set successfully
* @retval kStatus_Fail Failed to set the interrupt priority.
*/
static inline status_t EnableIRQWithPriority(IRQn_Type interrupt, uint8_t priNum)
{
status_t status = kStatus_Success;
if (NotAvail_IRQn == interrupt)
{
status = kStatus_Fail;
}
#if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0)
else if ((int32_t)interrupt >= (int32_t)FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS)
{
status = kStatus_Fail;
}
#endif
else
{
#if defined(__GIC_PRIO_BITS)
GIC_SetPriority(interrupt, priNum);
GIC_EnableIRQ(interrupt);
#else
NVIC_SetPriority(interrupt, priNum);
NVIC_EnableIRQ(interrupt);
#endif
}
return status;
}
/*!
* @brief Set the IRQ priority.
*
* Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt
* levels. For example, there are NVIC and intmux. Here the interrupts connected
* to NVIC are the LEVEL1 interrupts, because they are routed to the core directly.
* The interrupts connected to intmux are the LEVEL2 interrupts, they are routed
* to NVIC first then routed to core.
*
* This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts
* is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.
*
* @param interrupt The IRQ to set.
* @param priNum Priority number set to interrupt controller register.
*
* @retval kStatus_Success Interrupt priority set successfully
* @retval kStatus_Fail Failed to set the interrupt priority.
*/
static inline status_t IRQ_SetPriority(IRQn_Type interrupt, uint8_t priNum)
{
status_t status = kStatus_Success;
if (NotAvail_IRQn == interrupt)
{
status = kStatus_Fail;
}
#if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0)
else if ((int32_t)interrupt >= (int32_t)FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS)
{
status = kStatus_Fail;
}
#endif
else
{
#if defined(__GIC_PRIO_BITS)
GIC_SetPriority(interrupt, priNum);
#else
NVIC_SetPriority(interrupt, priNum);
#endif
}
return status;
}
/*!
* @brief Clear the pending IRQ flag.
*
* Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt
* levels. For example, there are NVIC and intmux. Here the interrupts connected
* to NVIC are the LEVEL1 interrupts, because they are routed to the core directly.
* The interrupts connected to intmux are the LEVEL2 interrupts, they are routed
* to NVIC first then routed to core.
*
* This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts
* is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.
*
* @param interrupt The flag which IRQ to clear.
*
* @retval kStatus_Success Interrupt priority set successfully
* @retval kStatus_Fail Failed to set the interrupt priority.
*/
static inline status_t IRQ_ClearPendingIRQ(IRQn_Type interrupt)
{
status_t status = kStatus_Success;
if (NotAvail_IRQn == interrupt)
{
status = kStatus_Fail;
}
#if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0)
else if ((int32_t)interrupt >= (int32_t)FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS)
{
status = kStatus_Fail;
}
#endif
else
{
#if defined(__GIC_PRIO_BITS)
GIC_ClearPendingIRQ(interrupt);
#else
NVIC_ClearPendingIRQ(interrupt);
#endif
}
return status;
}
/*!
* @brief Disable the global IRQ
*
@@ -567,19 +716,18 @@ static inline status_t DisableIRQ(IRQn_Type interrupt)
*/
static inline uint32_t DisableGlobalIRQ(void)
{
uint32_t mask;
#if defined(CPSR_I_Msk)
uint32_t cpsr = __get_CPSR() & CPSR_I_Msk;
__disable_irq();
return cpsr;
mask = __get_CPSR() & CPSR_I_Msk;
#elif defined(DAIF_I_BIT)
mask = __get_DAIF() & DAIF_I_BIT;
#else
uint32_t regPrimask = __get_PRIMASK();
mask = __get_PRIMASK();
#endif
__disable_irq();
return regPrimask;
#endif
return mask;
}
/*!
@@ -596,6 +744,11 @@ static inline void EnableGlobalIRQ(uint32_t primask)
{
#if defined(CPSR_I_Msk)
__set_CPSR((__get_CPSR() & ~CPSR_I_Msk) | primask);
#elif defined(DAIF_I_BIT)
if (0UL == primask)
{
__enable_irq();
}
#else
__set_PRIMASK(primask);
#endif
@@ -651,6 +804,20 @@ void DisableDeepSleepIRQ(IRQn_Type interrupt);
#endif /* FSL_FEATURE_POWERLIB_EXTEND */
#endif /* FSL_FEATURE_SOC_SYSCON_COUNT */
#if defined(DWT)
/*!
* @brief Enable the counter to get CPU cycles.
*/
void MSDK_EnableCpuCycleCounter(void);
/*!
* @brief Get the current CPU cycle count.
*
* @return Current CPU cycle count.
*/
uint32_t MSDK_GetCpuCycleCount(void);
#endif
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_power.c
+1814 -2
View File
File diff suppressed because it is too large Load Diff
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_power.h
-15
View File
@@ -540,13 +540,6 @@ void POWER_EnterSleep(void);
*/
void POWER_SetVoltageForFreq(uint32_t system_freq_hz);
/*!
* @brief Power Library API to return the library version.
*
* @return version number of the power library
*/
uint32_t POWER_GetLibVersion(void);
/**
* @brief Sets board-specific trim values for 16MHz XTAL
* @param pi32_16MfXtalIecLoadpF_x100 Load capacitance, pF x 100. For example, 6pF becomes 600, 1.2pF becomes 120
@@ -587,14 +580,6 @@ extern void POWER_Xtal32khzCapabankTrim(int32_t pi32_32kfXtalIecLoadpF_x100,
*/
extern void POWER_SetXtal16mhzLdo(void);
/**
* @brief Set up 16-MHz XTAL Trimmings
* @param amp Amplitude
* @param gm Transconductance
* @return none
*/
extern void POWER_SetXtal16mhzTrim(uint32_t amp, uint32_t gm);
/**
* @brief Return some key information related to the device reset causes / wake-up sources, for all power modes.
* @param p_reset_cause : the device reset cause, according to the definition of power_device_reset_cause_t type.
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_reset.h
+18 -2
View File
@@ -26,8 +26,8 @@
/*! @name Driver version */
/*@{*/
/*! @brief reset driver version 2.0.2. */
#define FSL_RESET_DRIVER_VERSION (MAKE_VERSION(2, 0, 2))
/*! @brief reset driver version 2.0.3. */
#define FSL_RESET_DRIVER_VERSION (MAKE_VERSION(2, 0, 3))
/*@}*/
/*!
@@ -233,6 +233,22 @@ typedef enum _SYSCON_RSTn
{ \
kOSTIMER0_RST_SHIFT_RSTn \
} /* Reset bits for OSTIMER peripheral */
#define POWERQUAD_RSTS \
{ \
kPOWERQUAD_RST_SHIFT_RSTn \
} /* Reset bits for Powerquad peripheral */
#define CASPER_RSTS \
{ \
kCASPER_RST_SHIFT_RSTn \
} /* Reset bits for Casper peripheral */
#define HASHCRYPT_RSTS \
{ \
kHASHCRYPT_RST_SHIFT_RSTn \
} /* Reset bits for Hashcrypt peripheral */
#define PUF_RSTS \
{ \
kPUF_RST_SHIFT_RSTn \
} /* Reset bits for PUF peripheral */
typedef SYSCON_RSTn_t reset_ip_name_t;
/*******************************************************************************
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_usart.c
+147 -9
View File
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2021 NXP
* Copyright 2016-2022 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -229,6 +229,9 @@ status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t src
/* enable trigger interrupt */
base->FIFOTRIG |= USART_FIFOTRIG_RXLVLENA_MASK;
}
#if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
USART_SetRxTimeoutConfig(base, (usart_rx_timeout_config *)&(config->rxTimeout));
#endif
/* setup configuration and enable USART */
base->CFG = USART_CFG_PARITYSEL(config->parityMode) | USART_CFG_STOPLEN(config->stopBitCount) |
USART_CFG_DATALEN(config->bitCountPerChar) | USART_CFG_LOOP(config->loopback) |
@@ -281,6 +284,9 @@ void USART_Deinit(USART_Type *base)
USART_FIFOINTENCLR_RXLVL_MASK;
base->FIFOCFG &= ~(USART_FIFOCFG_DMATX_MASK | USART_FIFOCFG_DMARX_MASK);
base->CFG &= ~(USART_CFG_ENABLE_MASK);
#if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
base->FIFORXTIMEOUTCFG = 0U;
#endif
}
/*!
@@ -321,7 +327,84 @@ void USART_GetDefaultConfig(usart_config_t *config)
config->enableContinuousSCLK = false;
config->clockPolarity = kUSART_RxSampleOnFallingEdge;
config->enableHardwareFlowControl = false;
#if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
config->rxTimeout.enable = false;
config->rxTimeout.resetCounterOnEmpty = true;
config->rxTimeout.resetCounterOnReceive = true;
config->rxTimeout.counter = 0U;
config->rxTimeout.prescaler = 0U;
#endif
}
#if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
/*!
* brief Calculate the USART instance RX timeout prescaler and counter.
*
* This function for calculate the USART RXFIFO timeout config. This function is used to calculate
* suitable prescaler and counter for target_us.
* Example below shows how to use this API to configure USART.
* code
* usart_config_t config;
* config.rxWatermark = kUSART_RxFifo2;
* config.rxTimeout.enable = true;
* config.rxTimeout.resetCounterOnEmpty = true;
* config.rxTimeout.resetCounterOnReceive = true;
* USART_CalcTimeoutConfig(200, &config.rxTimeout.prescaler, &config.rxTimeout.counter,
* CLOCK_GetFreq(kCLOCK_BusClk));
* endcode
* param target_us Time for rx timeout unit us.
* param rxTimeoutPrescaler The prescaler to be setted after function.
* param rxTimeoutcounter The counter to be setted after function.
* param srcClock_Hz The clockSrc for rx timeout.
*/
void USART_CalcTimeoutConfig(uint32_t target_us,
uint8_t *rxTimeoutPrescaler,
uint32_t *rxTimeoutcounter,
uint32_t srcClock_Hz)
{
uint16_t counter = 0U;
uint32_t perscalar = 0U, calculate_us = 0U, us_diff = 0U, min_diff = 0xffffffffUL;
/* find the suitable value */
for (perscalar = 0U; perscalar < 256U; perscalar++)
{
counter = target_us * (srcClock_Hz / 1000000UL) / (16U * (perscalar + 1U));
calculate_us = 16U * (perscalar + 1U) * counter / (srcClock_Hz / 1000000UL);
us_diff = (calculate_us > target_us) ? (calculate_us - target_us) : (target_us - calculate_us);
if (us_diff == 0U)
{
*rxTimeoutPrescaler = perscalar;
*rxTimeoutcounter = counter;
break;
}
else
{
if (min_diff > us_diff)
{
min_diff = us_diff;
*rxTimeoutPrescaler = perscalar;
*rxTimeoutcounter = counter;
}
}
}
}
/*!
* brief Sets the USART instance RX timeout config.
*
* This function configures the USART RXFIFO timeout config. This function is used to config
* the USART RXFIFO timeout config after the USART module is initialized by the USART_Init.
*
* param base USART peripheral base address.
* param config pointer to receive timeout configuration structure.
*/
void USART_SetRxTimeoutConfig(USART_Type *base, usart_rx_timeout_config *config)
{
base->FIFORXTIMEOUTCFG = 0U;
base->FIFORXTIMEOUTCFG = USART_FIFORXTIMEOUTCFG_RXTIMEOUT_COW(~config->resetCounterOnReceive) |
USART_FIFORXTIMEOUTCFG_RXTIMEOUT_COE(~config->resetCounterOnEmpty) |
USART_FIFORXTIMEOUTCFG_RXTIMEOUT_EN(config->enable) |
USART_FIFORXTIMEOUTCFG_RXTIMEOUT_VALUE(config->counter) |
USART_FIFORXTIMEOUTCFG_RXTIMEOUT_PRESCALER(config->prescaler);
}
#endif
/*!
* brief Sets the USART instance baud rate.
@@ -342,7 +425,7 @@ void USART_GetDefaultConfig(usart_config_t *config)
status_t USART_SetBaudRate(USART_Type *base, uint32_t baudrate_Bps, uint32_t srcClock_Hz)
{
uint32_t best_diff = (uint32_t)-1, best_osrval = 0xf, best_brgval = (uint32_t)-1;
uint32_t osrval, brgval, diff, baudrate;
uint32_t osrval, brgval, diff, baudrate, allowed_error;
/* check arguments */
assert(!((NULL == base) || (0U == baudrate_Bps) || (0U == srcClock_Hz)));
@@ -362,12 +445,21 @@ status_t USART_SetBaudRate(USART_Type *base, uint32_t baudrate_Bps, uint32_t src
}
else
{
/* Actual baud rate must be within 3% of desired baud rate based on the calculated OSR and BRG value */
allowed_error = ((baudrate_Bps / 100U) * 3U);
/*
* Smaller values of OSR can make the sampling position within a data bit less accurate and may
* potentially cause more noise errors or incorrect data.
*/
for (osrval = best_osrval; osrval >= 8U; osrval--)
for (osrval = best_osrval; (osrval >= 4U); osrval--)
{
/* Break if the best baudrate's diff is in the allowed error range and the osrval is below 8,
only use lower osrval if the baudrate cannot be obtained with an osrval of 8 or above. */
if ((osrval <= 8U) && (best_diff <= allowed_error))
{
break;
}
brgval = (((srcClock_Hz * 10U) / ((osrval + 1U) * baudrate_Bps)) - 5U) / 10U;
if (brgval > 0xFFFFU)
{
@@ -387,7 +479,7 @@ status_t USART_SetBaudRate(USART_Type *base, uint32_t baudrate_Bps, uint32_t src
* based on the best calculated OSR and BRG value */
baudrate = srcClock_Hz / ((best_osrval + 1U) * (best_brgval + 1U));
diff = (baudrate_Bps < baudrate) ? (baudrate - baudrate_Bps) : (baudrate_Bps - baudrate);
if (diff > ((baudrate_Bps / 100U) * 3U))
if (diff > allowed_error)
{
return kStatus_USART_BaudrateNotSupport;
}
@@ -708,13 +800,9 @@ status_t USART_TransferCreateHandle(USART_Type *base,
* all data is written to the TX register in the IRQ handler, the USART driver calls the callback
* function and passes the ref kStatus_USART_TxIdle as status parameter.
*
* note The kStatus_USART_TxIdle is passed to the upper layer when all data is written
* to the TX register. However it does not ensure that all data are sent out. Before disabling the TX,
* check the kUSART_TransmissionCompleteFlag to ensure that the TX is finished.
*
* param base USART peripheral base address.
* param handle USART handle pointer.
* param xfer USART transfer structure. See #usart_transfer_t.
* param xfer USART transfer structure. See #usart_transfer_t.
* retval kStatus_Success Successfully start the data transmission.
* retval kStatus_USART_TxBusy Previous transmission still not finished, data not all written to TX register yet.
* retval kStatus_InvalidArgument Invalid argument.
@@ -1039,6 +1127,56 @@ void USART_TransferHandleIRQ(USART_Type *base, usart_handle_t *handle)
handle->callback(base, handle, kStatus_USART_RxError, handle->userData);
}
}
/* TX under run, happens when slave is in synchronous mode and the data is not written in tx register in time. */
if ((base->FIFOSTAT & USART_FIFOSTAT_TXERR_MASK) != 0U)
{
/* Clear tx error state. */
base->FIFOSTAT |= USART_FIFOSTAT_TXERR_MASK;
/* Trigger callback. */
if (handle->callback != NULL)
{
handle->callback(base, handle, kStatus_USART_TxError, handle->userData);
}
}
/* If noise error. */
if ((base->STAT & USART_STAT_RXNOISEINT_MASK) != 0U)
{
/* Clear rx error state. */
base->STAT |= USART_STAT_RXNOISEINT_MASK;
/* clear rxFIFO */
base->FIFOCFG |= USART_FIFOCFG_EMPTYRX_MASK;
/* Trigger callback. */
if (handle->callback != NULL)
{
handle->callback(base, handle, kStatus_USART_NoiseError, handle->userData);
}
}
/* If framing error. */
if ((base->STAT & USART_STAT_FRAMERRINT_MASK) != 0U)
{
/* Clear rx error state. */
base->STAT |= USART_STAT_FRAMERRINT_MASK;
/* clear rxFIFO */
base->FIFOCFG |= USART_FIFOCFG_EMPTYRX_MASK;
/* Trigger callback. */
if (handle->callback != NULL)
{
handle->callback(base, handle, kStatus_USART_FramingError, handle->userData);
}
}
/* If parity error. */
if ((base->STAT & USART_STAT_PARITYERRINT_MASK) != 0U)
{
/* Clear rx error state. */
base->STAT |= USART_STAT_PARITYERRINT_MASK;
/* clear rxFIFO */
base->FIFOCFG |= USART_FIFOCFG_EMPTYRX_MASK;
/* Trigger callback. */
if (handle->callback != NULL)
{
handle->callback(base, handle, kStatus_USART_ParityError, handle->userData);
}
}
while ((receiveEnabled && ((base->FIFOSTAT & USART_FIFOSTAT_RXNOTEMPTY_MASK) != 0U)) ||
(sendEnabled && ((base->FIFOSTAT & USART_FIFOSTAT_TXNOTFULL_MASK) != 0U)))
{
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_usart.h
+124 -19
View File
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2021 NXP
* Copyright 2016-2022NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -22,15 +22,22 @@
/*! @name Driver version */
/*@{*/
/*! @brief USART driver version. */
#define FSL_USART_DRIVER_VERSION (MAKE_VERSION(2, 5, 1))
#define FSL_USART_DRIVER_VERSION (MAKE_VERSION(2, 7, 0))
/*@}*/
#define USART_FIFOTRIG_TXLVL_GET(base) (((base)->FIFOTRIG & USART_FIFOTRIG_TXLVL_MASK) >> USART_FIFOTRIG_TXLVL_SHIFT)
#define USART_FIFOTRIG_RXLVL_GET(base) (((base)->FIFOTRIG & USART_FIFOTRIG_RXLVL_MASK) >> USART_FIFOTRIG_RXLVL_SHIFT)
/*! @brief Retry times for waiting flag. */
/*! @brief Retry times for waiting flag.
*
* Defining to zero means to keep waiting for the flag until it is assert/deassert in blocking transfer,
* otherwise the program will wait until the UART_RETRY_TIMES counts down to 0,
* if the flag still remains unchanged then program will return kStatus_USART_Timeout.
* It is not advised to use this macro in formal application to prevent any hardware error
* because the actual wait period is affected by the compiler and optimization.
*/
#ifndef UART_RETRY_TIMES
#define UART_RETRY_TIMES 0U /* Defining to zero means to keep waiting for the flag until it is assert/deassert. */
#define UART_RETRY_TIMES 0U
#endif
/*! @brief Error codes for the USART driver. */
@@ -48,7 +55,9 @@ enum
kStatus_USART_ParityError = MAKE_STATUS(kStatusGroup_LPC_USART, 12), /*!< USART parity error. */
kStatus_USART_BaudrateNotSupport =
MAKE_STATUS(kStatusGroup_LPC_USART, 13), /*!< Baudrate is not support in current clock source */
#if UART_RETRY_TIMES
kStatus_USART_Timeout = MAKE_STATUS(kStatusGroup_LPC_USART, 14), /*!< USART time out. */
#endif
};
/*! @brief USART synchronous mode. */
@@ -123,6 +132,28 @@ enum _usart_interrupt_enable
kUSART_RxErrorInterruptEnable = (USART_FIFOINTENSET_RXERR_MASK),
kUSART_TxLevelInterruptEnable = (USART_FIFOINTENSET_TXLVL_MASK),
kUSART_RxLevelInterruptEnable = (USART_FIFOINTENSET_RXLVL_MASK),
kUSART_TxIdleInterruptEnable = (USART_INTENSET_TXIDLEEN_MASK << 16U), /*!< Transmitter idle. */
kUSART_CtsChangeInterruptEnable =
(USART_INTENSET_DELTACTSEN_MASK << 16U), /*!< Change in the state of the CTS input. */
kUSART_RxBreakChangeInterruptEnable =
(USART_INTENSET_DELTARXBRKEN_MASK), /*!< Break condition asserted or deasserted. */
kUSART_RxStartInterruptEnable = (USART_INTENSET_STARTEN_MASK), /*!< Rx start bit detected. */
kUSART_FramingErrorInterruptEnable = (USART_INTENSET_FRAMERREN_MASK), /*!< Framing error detected. */
kUSART_ParityErrorInterruptEnable = (USART_INTENSET_PARITYERREN_MASK), /*!< Parity error detected. */
kUSART_NoiseErrorInterruptEnable = (USART_INTENSET_RXNOISEEN_MASK), /*!< Noise error detected. */
kUSART_AutoBaudErrorInterruptEnable = (USART_INTENSET_ABERREN_MASK), /*!< Auto baudrate error detected. */
#if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
kUSART_RxTimeoutInterruptEnable = (USART_FIFOINTENSET_RXTIMEOUT_MASK), /*!< Receive timeout detected. */
#endif
kUSART_AllInterruptEnables =
kUSART_TxErrorInterruptEnable | kUSART_RxErrorInterruptEnable | kUSART_TxLevelInterruptEnable |
kUSART_RxLevelInterruptEnable | kUSART_TxIdleInterruptEnable | kUSART_CtsChangeInterruptEnable |
kUSART_RxBreakChangeInterruptEnable | kUSART_RxStartInterruptEnable | kUSART_FramingErrorInterruptEnable |
kUSART_ParityErrorInterruptEnable | kUSART_NoiseErrorInterruptEnable |
#if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
kUSART_RxTimeoutInterruptEnable |
#endif
kUSART_AutoBaudErrorInterruptEnable,
};
/*!
@@ -132,14 +163,49 @@ enum _usart_interrupt_enable
*/
enum _usart_flags
{
kUSART_TxError = (USART_FIFOSTAT_TXERR_MASK), /*!< TEERR bit, sets if TX buffer is error */
kUSART_RxError = (USART_FIFOSTAT_RXERR_MASK), /*!< RXERR bit, sets if RX buffer is error */
kUSART_TxFifoEmptyFlag = (USART_FIFOSTAT_TXEMPTY_MASK), /*!< TXEMPTY bit, sets if TX buffer is empty */
kUSART_TxFifoNotFullFlag = (USART_FIFOSTAT_TXNOTFULL_MASK), /*!< TXNOTFULL bit, sets if TX buffer is not full */
kUSART_RxFifoNotEmptyFlag = (USART_FIFOSTAT_RXNOTEMPTY_MASK), /*!< RXNOEMPTY bit, sets if RX buffer is not empty */
kUSART_RxFifoFullFlag = (USART_FIFOSTAT_RXFULL_MASK), /*!< RXFULL bit, sets if RX buffer is full */
kUSART_TxError = (USART_FIFOSTAT_TXERR_MASK), /*!< TEERR bit, sets if TX buffer is error */
kUSART_RxError = (USART_FIFOSTAT_RXERR_MASK), /*!< RXERR bit, sets if RX buffer is error */
kUSART_TxFifoEmptyFlag = (USART_FIFOSTAT_TXEMPTY_MASK), /*!< TXEMPTY bit, sets if TX buffer is empty */
kUSART_TxFifoNotFullFlag = (USART_FIFOSTAT_TXNOTFULL_MASK), /*!< TXNOTFULL bit, sets if TX buffer is not full */
kUSART_RxFifoNotEmptyFlag = (USART_FIFOSTAT_RXNOTEMPTY_MASK), /*!< RXNOEMPTY bit, sets if RX buffer is not empty */
kUSART_RxFifoFullFlag = (USART_FIFOSTAT_RXFULL_MASK), /*!< RXFULL bit, sets if RX buffer is full */
kUSART_RxIdleFlag = (USART_STAT_RXIDLE_MASK << 16U), /*!< Receiver idle. */
kUSART_TxIdleFlag = (USART_STAT_TXIDLE_MASK << 16U), /*!< Transmitter idle. */
kUSART_CtsAssertFlag = (USART_STAT_CTS_MASK << 16U), /*!< CTS signal high. */
kUSART_CtsChangeFlag = (USART_STAT_DELTACTS_MASK << 16U), /*!< CTS signal changed interrupt status. */
kUSART_BreakDetectFlag = (USART_STAT_RXBRK_MASK), /*!< Break detected. Self cleared when rx pin goes high again. */
kUSART_BreakDetectChangeFlag = (USART_STAT_DELTARXBRK_MASK), /*!< Break detect change interrupt flag. A change in
the state of receiver break detection. */
kUSART_RxStartFlag = (USART_STAT_START_MASK), /*!< Rx start bit detected interrupt flag. */
kUSART_FramingErrorFlag = (USART_STAT_FRAMERRINT_MASK), /*!< Framing error interrupt flag. */
kUSART_ParityErrorFlag = (USART_STAT_PARITYERRINT_MASK), /*!< parity error interrupt flag. */
kUSART_NoiseErrorFlag = (USART_STAT_RXNOISEINT_MASK), /*!< Noise error interrupt flag. */
kUSART_AutobaudErrorFlag = (USART_STAT_ABERR_MASK), /*!< Auto baudrate error interrupt flag, caused by the baudrate
counter timeout before the end of start bit. */
#if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
kUSART_RxTimeoutFlag = (USART_FIFOSTAT_RXTIMEOUT_MASK), /*!< RXTIMEOUT bit, sets if RX FIFO Timeout. */
#endif
kUSART_AllClearFlags = kUSART_TxError | kUSART_RxError | kUSART_CtsChangeFlag | kUSART_BreakDetectChangeFlag |
kUSART_RxStartFlag | kUSART_FramingErrorFlag | kUSART_ParityErrorFlag |
#if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
kUSART_RxTimeoutFlag |
#endif
kUSART_NoiseErrorFlag | kUSART_AutobaudErrorFlag,
};
#if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
/*! @brief USART receive timeout configuration structure. */
typedef struct _usart_rx_timeout_config
{
bool enable; /*!< Enable RX timeout */
bool resetCounterOnEmpty; /*!< Enable RX timeout counter reset when RX FIFO becames empty. */
bool resetCounterOnReceive; /*!< Enable RX timeout counter reset when RX FIFO receives data from the transmitter
side. */
uint32_t counter; /*!< RX timeout counter*/
uint8_t prescaler; /*!< RX timeout prescaler*/
} usart_rx_timeout_config;
#endif
/*! @brief USART configuration structure. */
typedef struct _usart_config
{
@@ -157,6 +223,9 @@ typedef struct _usart_config
usart_rxfifo_watermark_t rxWatermark; /*!< rxFIFO watermark */
usart_sync_mode_t syncMode; /*!< Transfer mode select - asynchronous, synchronous master, synchronous slave. */
usart_clock_polarity_t clockPolarity; /*!< Selects the clock polarity and sampling edge in synchronous mode. */
#if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
usart_rx_timeout_config rxTimeout; /*!< rx timeout configuration */
#endif
} usart_config_t;
/*! @brief USART transfer structure. */
@@ -247,7 +316,41 @@ uint32_t USART_GetInstance(USART_Type *base);
* @retval kStatus_Success Status USART initialize succeed
*/
status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t srcClock_Hz);
#if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
/*!
* @brief Calculate the USART instance RX timeout prescaler and counter.
*
* This function for calculate the USART RXFIFO timeout config. This function is used to calculate
* suitable prescaler and counter for target_us.
* @code
* usart_config_t config;
* config.rxWatermark = kUSART_RxFifo2;
* config.rxTimeout.enable = true;
* config.rxTimeout.resetCounterOnEmpty = true;
* config.rxTimeout.resetCounterOnReceive = true;
* USART_CalcTimeoutConfig(200U, &config.rxTimeout.prescaler, &config.rxTimeout.counter,
* CLOCK_GetFreq(kCLOCK_BusClk));
* @endcode
* @param target_us Time for rx timeout unit us.
* @param rxTimeoutPrescaler The prescaler to be setted after function.
* @param rxTimeoutcounter The counter to be setted after function.
* @param srcClock_Hz The clockSrc for rx timeout.
*/
void USART_CalcTimeoutConfig(uint32_t target_us,
uint8_t *rxTimeoutPrescaler,
uint32_t *rxTimeoutcounter,
uint32_t srcClock_Hz);
/*!
* @brief Sets the USART instance RX timeout config.
*
* This function configures the USART RXFIFO timeout config. This function is used to config
* the USART RXFIFO timeout config after the USART module is initialized by the USART_Init.
*
* @param base USART peripheral base address.
* @param config pointer to receive timeout configuration structure.
*/
void USART_SetRxTimeoutConfig(USART_Type *base, usart_rx_timeout_config *config);
#endif
/*!
* @brief Deinitializes a USART instance.
*
@@ -389,7 +492,7 @@ static inline void USART_EnableMatchAddress(USART_Type *base, bool match)
*/
static inline uint32_t USART_GetStatusFlags(USART_Type *base)
{
return base->FIFOSTAT;
return (base->FIFOSTAT & 0xFF0000FFUL) | (base->STAT & 0xFFUL) << 16U | (base->STAT & 0xFFFF00UL);
}
/*!
@@ -409,6 +512,9 @@ static inline uint32_t USART_GetStatusFlags(USART_Type *base)
*/
static inline void USART_ClearStatusFlags(USART_Type *base, uint32_t mask)
{
mask &= (uint32_t)kUSART_AllClearFlags;
/* Clear the clearable status in STAT register. */
base->STAT = (mask & 0xFFFF00UL) | ((mask & 0xFF0000UL) >> 16U);
/* Only TXERR, RXERR fields support write. Remaining fields should be set to zero */
base->FIFOSTAT = mask & (USART_FIFOSTAT_TXERR_MASK | USART_FIFOSTAT_RXERR_MASK);
}
@@ -419,7 +525,6 @@ static inline void USART_ClearStatusFlags(USART_Type *base, uint32_t mask)
* @name Interrupts
* @{
*/
/*!
* @brief Enables USART interrupts according to the provided mask.
*
@@ -435,7 +540,9 @@ static inline void USART_ClearStatusFlags(USART_Type *base, uint32_t mask)
*/
static inline void USART_EnableInterrupts(USART_Type *base, uint32_t mask)
{
base->FIFOINTENSET = mask & 0xFUL;
mask &= (uint32_t)kUSART_AllInterruptEnables;
base->INTENSET = (mask & 0x1FF00UL) | ((mask & 0xFF0000UL) >> 16U);
base->FIFOINTENSET = mask & 0xF00000FUL;
}
/*!
@@ -453,6 +560,8 @@ static inline void USART_EnableInterrupts(USART_Type *base, uint32_t mask)
*/
static inline void USART_DisableInterrupts(USART_Type *base, uint32_t mask)
{
mask &= (uint32_t)kUSART_AllInterruptEnables;
base->INTENCLR = (mask & 0x1FF00UL) | ((mask & 0xFF0000UL) >> 16U);
base->FIFOINTENCLR = mask & 0xFUL;
}
@@ -465,7 +574,7 @@ static inline void USART_DisableInterrupts(USART_Type *base, uint32_t mask)
*/
static inline uint32_t USART_GetEnabledInterrupts(USART_Type *base)
{
return base->FIFOINTENSET;
return (base->INTENSET & 0x1FF00UL) | ((base->INTENSET & 0xFFUL) << 16UL) | (base->FIFOINTENSET & 0xFUL);
}
/*!
@@ -711,10 +820,6 @@ status_t USART_TransferCreateHandle(USART_Type *base,
* all data is written to the TX register in the IRQ handler, the USART driver calls the callback
* function and passes the @ref kStatus_USART_TxIdle as status parameter.
*
* @note The kStatus_USART_TxIdle is passed to the upper layer when all data is written
* to the TX register. However it does not ensure that all data are sent out. Before disabling the TX,
* check the kUSART_TransmissionCompleteFlag to ensure that the TX is finished.
*
* @param base USART peripheral base address.
* @param handle USART handle pointer.
* @param xfer USART transfer structure. See #usart_transfer_t.
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/libs/libpower_hardabi.a
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FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/libs/libpower_softabi.a
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FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/source/semihost_hardfault.c
+1 -1
View File
@@ -4,7 +4,7 @@
// to hang application when debugger not connected.
//
// ****************************************************************************
// Copyright 2017-2021 NXP
// Copyright 2017-2023 NXP
// All rights reserved.
//
// NXP Confidential. This software is owned or controlled by NXP and may only be
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/utilities/fsl_assert.c
+16
View File
@@ -46,5 +46,21 @@ void __assert_func(const char *file, int line, const char *func, const char *fai
}
}
#endif /* defined(__REDLIB__) */
#else /* (defined(__CC_ARM) || (defined(__ICCARM__)) || (defined(__ARMCC_VERSION)) */
#if (defined(__DSC__) && defined(__CW__))
void __msl_assertion_failed(char const *failedExpr, char const *file, char const *func, int line)
{
PRINTF("\r\nASSERT ERROR\r\n");
PRINTF(" File : %s\r\n", file);
PRINTF(" Function : %s\r\n", func); /*compiler not support func name yet*/
PRINTF(" Line : %u\r\n", (uint32_t)line);
PRINTF(" failedExpr: %s\r\n", failedExpr);
asm(DEBUGHLT);
}
#endif /* (defined(__DSC__) && defined (__CW__)) */
#endif /* (defined(__CC_ARM) || (defined(__ICCARM__)) || (defined(__ARMCC_VERSION)) */
#endif /* NDEBUG */
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/utilities/fsl_debug_console.c
+176 -626
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File diff suppressed because it is too large Load Diff
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/utilities/fsl_debug_console.h
+47 -11
View File
@@ -1,5 +1,5 @@
/*
* Copyright 2017-2018, 2020 NXP
* Copyright 2017-2018, 2020, 2022 NXP
* All rights reserved.
*
*
@@ -24,8 +24,8 @@
#include "fsl_common.h"
/*
* @addtogroup debugconsole
/*!
* @addtogroup debugconsolelite
* @{
*/
@@ -45,6 +45,8 @@
#if defined(SDK_DEBUGCONSOLE) && !(SDK_DEBUGCONSOLE)
#include <stdio.h>
#else
#include <stdarg.h>
#endif
/*! @brief Definition to printf the float number. */
@@ -74,10 +76,14 @@
* if SDK_DEBUGCONSOLE defined to 2,it represents disable debugconsole function.
*/
#if SDK_DEBUGCONSOLE == DEBUGCONSOLE_DISABLE /* Disable debug console */
#define PRINTF
#define SCANF
#define PUTCHAR
#define GETCHAR
static inline int DbgConsole_Disabled(void)
{
return -1;
}
#define PRINTF(...) DbgConsole_Disabled()
#define SCANF(...) DbgConsole_Disabled()
#define PUTCHAR(...) DbgConsole_Disabled()
#define GETCHAR() DbgConsole_Disabled()
#elif SDK_DEBUGCONSOLE == DEBUGCONSOLE_REDIRECT_TO_SDK /* Select printf, scanf, putchar, getchar of SDK version. */
#define PRINTF DbgConsole_Printf
#define SCANF DbgConsole_Scanf
@@ -90,13 +96,33 @@
#define PUTCHAR putchar
#define GETCHAR getchar
#endif /* SDK_DEBUGCONSOLE */
/*! @} */
/*! @brief serial port type
*
* The serial port type aligned with the definition in serial manager, but please note
* only kSerialPort_Uart can be supported in debug console lite.
*/
#ifndef _SERIAL_PORT_T_
#define _SERIAL_PORT_T_
typedef enum _serial_port_type
{
kSerialPort_None = 0U, /*!< Serial port is none */
kSerialPort_Uart = 1U, /*!< Serial port UART */
kSerialPort_UsbCdc, /*!< Serial port USB CDC */
kSerialPort_Swo, /*!< Serial port SWO */
kSerialPort_Virtual, /*!< Serial port Virtual */
kSerialPort_Rpmsg, /*!< Serial port RPMSG */
kSerialPort_UartDma, /*!< Serial port UART DMA*/
kSerialPort_SpiMaster, /*!< Serial port SPIMASTER*/
kSerialPort_SpiSlave, /*!< Serial port SPISLAVE*/
} serial_port_type_t;
#endif
/*!
* @addtogroup debugconsolelite
* @{
*/
/*******************************************************************************
* Prototypes
******************************************************************************/
@@ -171,7 +197,7 @@ static inline status_t DbgConsole_Deinit(void)
#endif /* ((SDK_DEBUGCONSOLE == DEBUGCONSOLE_REDIRECT_TO_SDK) || defined(SDK_DEBUGCONSOLE_UART)) */
#if SDK_DEBUGCONSOLE
#if (defined(SDK_DEBUGCONSOLE) && (SDK_DEBUGCONSOLE == DEBUGCONSOLE_REDIRECT_TO_SDK))
/*!
* @brief Writes formatted output to the standard output stream.
*
@@ -182,6 +208,17 @@ static inline status_t DbgConsole_Deinit(void)
*/
int DbgConsole_Printf(const char *fmt_s, ...);
/*!
* @brief Writes formatted output to the standard output stream.
*
* Call this function to write a formatted output to the standard output stream.
*
* @param fmt_s Format control string.
* @param formatStringArg Format arguments.
* @return Returns the number of characters printed or a negative value if an error occurs.
*/
int DbgConsole_Vprintf(const char *fmt_s, va_list formatStringArg);
/*!
* @brief Writes a character to stdout.
*
@@ -197,10 +234,10 @@ int DbgConsole_Putchar(int ch);
*
* Call this function to read formatted data from the standard input stream.
*
* @param fmt_ptr Format control string.
* @param fmt_s Format control string.
* @return Returns the number of fields successfully converted and assigned.
*/
int DbgConsole_Scanf(char *fmt_ptr, ...);
int DbgConsole_Scanf(char *fmt_s, ...);
/*!
* @brief Reads a character from standard input.
@@ -220,5 +257,4 @@ int DbgConsole_Getchar(void);
#endif /* __cplusplus */
/*! @} */
#endif /* _FSL_DEBUGCONSOLE_H_ */
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/utilities/fsl_str.c
+1618
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File diff suppressed because it is too large Load Diff
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/utilities/fsl_str.h
+105
View File
@@ -0,0 +1,105 @@
/*
* Copyright 2017 NXP
* All rights reserved.
*
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#ifndef _FSL_STR_H
#define _FSL_STR_H
#include "fsl_common.h"
/*!
* @addtogroup debugconsole
* @{
*/
/*******************************************************************************
* Prototypes
******************************************************************************/
#if (defined(PRINTF_ADVANCED_ENABLE) && (PRINTF_ADVANCED_ENABLE > 0))
/*! @brief Specification modifier flags for printf. */
enum _debugconsole_printf_flag
{
kPRINTF_Minus = 0x01U, /*!< Minus FLag. */
kPRINTF_Plus = 0x02U, /*!< Plus Flag. */
kPRINTF_Space = 0x04U, /*!< Space Flag. */
kPRINTF_Zero = 0x08U, /*!< Zero Flag. */
kPRINTF_Pound = 0x10U, /*!< Pound Flag. */
kPRINTF_LengthChar = 0x20U, /*!< Length: Char Flag. */
kPRINTF_LengthShortInt = 0x40U, /*!< Length: Short Int Flag. */
kPRINTF_LengthLongInt = 0x80U, /*!< Length: Long Int Flag. */
kPRINTF_LengthLongLongInt = 0x100U, /*!< Length: Long Long Int Flag. */
};
#endif /* PRINTF_ADVANCED_ENABLE */
/*! @brief Specification modifier flags for scanf. */
enum _debugconsole_scanf_flag
{
kSCANF_Suppress = 0x2U, /*!< Suppress Flag. */
kSCANF_DestMask = 0x7cU, /*!< Destination Mask. */
kSCANF_DestChar = 0x4U, /*!< Destination Char Flag. */
kSCANF_DestString = 0x8U, /*!< Destination String FLag. */
kSCANF_DestSet = 0x10U, /*!< Destination Set Flag. */
kSCANF_DestInt = 0x20U, /*!< Destination Int Flag. */
kSCANF_DestFloat = 0x30U, /*!< Destination Float Flag. */
kSCANF_LengthMask = 0x1f00U, /*!< Length Mask Flag. */
#if (defined(SCANF_ADVANCED_ENABLE) && (SCANF_ADVANCED_ENABLE > 0))
kSCANF_LengthChar = 0x100U, /*!< Length Char Flag. */
kSCANF_LengthShortInt = 0x200U, /*!< Length ShortInt Flag. */
kSCANF_LengthLongInt = 0x400U, /*!< Length LongInt Flag. */
kSCANF_LengthLongLongInt = 0x800U, /*!< Length LongLongInt Flag. */
#endif /* SCANF_ADVANCED_ENABLE */
#if (defined(SCANF_FLOAT_ENABLE) && (SCANF_FLOAT_ENABLE > 0))
kSCANF_LengthLongLongDouble = 0x1000U, /*!< Length LongLongDuoble Flag. */
#endif /*PRINTF_FLOAT_ENABLE */
kSCANF_TypeSinged = 0x2000U, /*!< TypeSinged Flag. */
};
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */
/*!
* @brief A function pointer which is used when format printf log.
*/
typedef void (*printfCb)(char *buf, int32_t *indicator, char val, int len);
/*!
* @brief This function outputs its parameters according to a formatted string.
*
* @note I/O is performed by calling given function pointer using following
* (*func_ptr)(c);
*
* @param[in] fmt Format string for printf.
* @param[in] ap Arguments to printf.
* @param[in] buf pointer to the buffer
* @param cb print callbck function pointer
*
* @return Number of characters to be print
*/
int StrFormatPrintf(const char *fmt, va_list ap, char *buf, printfCb cb);
/*!
* @brief Converts an input line of ASCII characters based upon a provided
* string format.
*
* @param[in] line_ptr The input line of ASCII data.
* @param[in] format Format first points to the format string.
* @param[in] args_ptr The list of parameters.
*
* @return Number of input items converted and assigned.
* @retval IO_EOF When line_ptr is empty string "".
*/
int StrFormatScanf(const char *line_ptr, char *format, va_list args_ptr);
#if defined(__cplusplus)
}
#endif /* __cplusplus */
/*! @} */
#endif /* _FSL_STR_H */
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/Config/FreeRTOSConfig.h
+2 -2
View File
@@ -43,7 +43,7 @@
* https://www.FreeRTOS.org/a00110.html
*----------------------------------------------------------*/
extern uint32_t SystemCoreClock;
#include "clock_config.h"
/* Cortex M33 port configuration. */
#define configENABLE_MPU 1
@@ -59,7 +59,7 @@ extern uint32_t SystemCoreClock;
#define configUSE_16_BIT_TICKS 0 /* Only for 8 and 16-bit hardware. */
/* Constants that describe the hardware and memory usage. */
#define configCPU_CLOCK_HZ SystemCoreClock
#define configCPU_CLOCK_HZ BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK
#define configMINIMAL_STACK_SIZE ( ( uint16_t ) 128 )
#define configMINIMAL_SECURE_STACK_SIZE ( 1024 )
#define configMAX_TASK_NAME_LEN ( 12 )
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/NonSecure/.cproject
+17 -13
View File
@@ -114,6 +114,7 @@
<option id="gnu.c.compiler.option.preprocessor.undef.symbol.1876509684" name="Undefined symbols (-U)" superClass="gnu.c.compiler.option.preprocessor.undef.symbol" useByScannerDiscovery="false"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.compiler.option.include.paths.88237135" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
<listOptionValue builtIn="false" value="../../Config"/>
<listOptionValue builtIn="false" value="../../Secure"/>
<listOptionValue builtIn="false" value="../../../../NXP_Code"/>
<listOptionValue builtIn="false" value="../../../../NXP_Code/board"/>
<listOptionValue builtIn="false" value="../../../../NXP_Code/source"/>
@@ -126,6 +127,8 @@
<listOptionValue builtIn="false" value="../../../../NXP_Code/component/lists"/>
<listOptionValue builtIn="false" value="../../../../../../Demo/Common/ARMv8M/mpu_demo"/>
<listOptionValue builtIn="false" value="../../../../../../Demo/Common/ARMv8M/tz_demo"/>
<listOptionValue builtIn="false" value="../../../../../../Demo/Common/ARMv8M/reg_tests/GCC/ARM_CM33/non_secure"/>
<listOptionValue builtIn="false" value="../../../../../../Demo/Common/ARMv8M/reg_tests/GCC/ARM_CM33/secure"/>
<listOptionValue builtIn="false" value="../../../../../../Source/include"/>
<listOptionValue builtIn="false" value="../../../../../../Source/portable/GCC/ARM_CM33/secure"/>
<listOptionValue builtIn="false" value="../../../../../../Source/portable/GCC/ARM_CM33/non_secure"/>
@@ -267,7 +270,7 @@
<option id="com.crt.advproject.link.cpp.inimplib.742756957" name="Input Secure Gateway Import Library" superClass="com.crt.advproject.link.cpp.inimplib"/>
</tool>
<tool id="com.crt.advproject.link.exe.debug.1811316497" name="MCU Linker" superClass="com.crt.advproject.link.exe.debug">
<option id="com.crt.advproject.link.gcc.hdrlib.339215003" name="Library" superClass="com.crt.advproject.link.gcc.hdrlib" useByScannerDiscovery="false" value="com.crt.advproject.gcc.link.hdrlib.newlibnano.semihost" valueType="enumerated"/>
<option id="com.crt.advproject.link.gcc.hdrlib.339215003" name="Library" superClass="com.crt.advproject.link.gcc.hdrlib" useByScannerDiscovery="false" value="com.crt.advproject.gcc.link.hdrlib.newlibnano.nohost" valueType="enumerated"/>
<option id="com.crt.advproject.link.fpu.1049328981" name="Floating point" superClass="com.crt.advproject.link.fpu" useByScannerDiscovery="false" value="com.crt.advproject.link.fpu.fpv5sp.hard" valueType="enumerated"/>
<option id="com.crt.advproject.link.thumb.1038394022" name="Thumb mode" superClass="com.crt.advproject.link.thumb" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<option id="com.crt.advproject.link.memory.load.image.1608049889" name="Plain load image" superClass="com.crt.advproject.link.memory.load.image" useByScannerDiscovery="false" value="false;" valueType="string"/>
@@ -283,12 +286,8 @@
<option id="gnu.c.link.option.nostdlibs.2064853265" name="No startup or default libs (-nostdlib)" superClass="gnu.c.link.option.nostdlibs" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<option id="gnu.c.link.option.strip.1473230449" name="Omit all symbol information (-s)" superClass="gnu.c.link.option.strip" useByScannerDiscovery="false"/>
<option id="gnu.c.link.option.noshared.754737421" name="No shared libraries (-static)" superClass="gnu.c.link.option.noshared" useByScannerDiscovery="false"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.link.option.libs.2063466722" name="Libraries (-l)" superClass="gnu.c.link.option.libs" useByScannerDiscovery="false" valueType="libs">
<listOptionValue builtIn="false" value="power_hardabi"/>
</option>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.link.option.paths.826148184" name="Library search path (-L)" superClass="gnu.c.link.option.paths" useByScannerDiscovery="false" valueType="libPaths">
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/NXP_Code/libs}&quot;"/>
</option>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="gnu.c.link.option.libs.2063466722" name="Libraries (-l)" superClass="gnu.c.link.option.libs" useByScannerDiscovery="false" valueType="libs"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="gnu.c.link.option.paths.826148184" name="Library search path (-L)" superClass="gnu.c.link.option.paths" useByScannerDiscovery="false" valueType="libPaths"/>
<option id="gnu.c.link.option.ldflags.625929291" name="Linker flags" superClass="gnu.c.link.option.ldflags" useByScannerDiscovery="false"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.link.option.other.683921352" name="Other options (-Xlinker [option])" superClass="gnu.c.link.option.other" useByScannerDiscovery="false" valueType="stringList">
<listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
@@ -344,11 +343,12 @@
</toolChain>
</folderInfo>
<sourceEntries>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="Config"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="Demos"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="FreeRTOS"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="NXP_Code"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="User"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Config"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Demos"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="FreeRTOS"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="NXP_Code"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="User"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="reg_tests"/>
</sourceEntries>
</configuration>
</storageModule>
@@ -405,6 +405,10 @@
&lt;/infoList&gt;&#13;
&lt;/TargetConfig&gt;</projectStorage>
</storageModule>
<storageModule moduleId="refreshScope"/>
<storageModule moduleId="refreshScope" versionNumber="2">
<configuration configurationName="Debug">
<resource resourceType="PROJECT" workspacePath="/FreeRTOSDemo_ns"/>
</configuration>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
</cproject>
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/NonSecure/.project
+45 -2
View File
@@ -57,6 +57,11 @@
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
<name>reg_tests</name>
<type>2</type>
<locationURI>DEMO_ROOT/Common/ARMv8M/reg_tests</locationURI>
</link>
<link>
<name>Demos/mpu_demo.c</name>
<type>1</type>
@@ -82,10 +87,15 @@
<type>1</type>
<locationURI>PROJECT_LOC/main_ns.c</locationURI>
</link>
<link>
<name>User/res_tests.c</name>
<type>1</type>
<locationURI>PROJECT_LOC/res_tests.c</locationURI>
</link>
</linkedResources>
<filteredResources>
<filter>
<id>1557021723682</id>
<id>1681724631111</id>
<name></name>
<type>6</type>
<matcher>
@@ -94,7 +104,7 @@
</matcher>
</filter>
<filter>
<id>1557021723695</id>
<id>1681724631147</id>
<name></name>
<type>6</type>
<matcher>
@@ -102,6 +112,15 @@
<arguments>1.0-name-matches-false-false-*.h</arguments>
</matcher>
</filter>
<filter>
<id>1681721788469</id>
<name>reg_tests</name>
<type>9</type>
<matcher>
<id>org.eclipse.ui.ide.multiFilter</id>
<arguments>1.0-name-matches-false-false-GCC</arguments>
</matcher>
</filter>
<filter>
<id>1554600764705</id>
<name>FreeRTOS/portable</name>
@@ -138,6 +157,15 @@
<arguments>1.0-name-matches-false-false-Common</arguments>
</matcher>
</filter>
<filter>
<id>1681721804811</id>
<name>reg_tests/GCC</name>
<type>9</type>
<matcher>
<id>org.eclipse.ui.ide.multiFilter</id>
<arguments>1.0-name-matches-false-false-ARM_CM33</arguments>
</matcher>
</filter>
<filter>
<id>1553579192808</id>
<name>FreeRTOS/portable/GCC</name>
@@ -156,6 +184,15 @@
<arguments>1.0-name-matches-false-false-heap_4.c</arguments>
</matcher>
</filter>
<filter>
<id>1681721822064</id>
<name>reg_tests/GCC/ARM_CM33</name>
<type>9</type>
<matcher>
<id>org.eclipse.ui.ide.multiFilter</id>
<arguments>1.0-name-matches-false-false-non_secure</arguments>
</matcher>
</filter>
<filter>
<id>1553579213167</id>
<name>FreeRTOS/portable/GCC/ARM_CM33</name>
@@ -166,4 +203,10 @@
</matcher>
</filter>
</filteredResources>
<variableList>
<variable>
<name>DEMO_ROOT</name>
<value>$%7BPARENT-4-PROJECT_LOC%7D</value>
</variable>
</variableList>
</projectDescription>
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/NonSecure/main_ns.c
+19
View File
@@ -34,10 +34,12 @@
#include "pin_mux.h"
#include "board.h"
#include "clock_config.h"
#include "fsl_power.h"
/* Demo includes. */
#include "tz_demo.h"
#include "mpu_demo.h"
#include "reg_tests.h"
/*-----------------------------------------------------------*/
/**
@@ -45,6 +47,11 @@
*/
static void prvCreateTasks( void );
/**
* @brief Setup hardware.
*/
static void prvSetupHardware( void );
/**
* @brief Application-specific implementation of the SystemInit() weak
* function.
@@ -66,6 +73,9 @@ void MemManage_Handler( void ) __attribute__ ( ( naked ) );
/* Non-Secure main. */
int main( void )
{
/* Setup hardware. */
prvSetupHardware();
/* Create tasks. */
prvCreateTasks();
@@ -90,6 +100,15 @@ static void prvCreateTasks( void )
/* Create tasks for the TZ Demo. */
vStartTZDemo();
/* Create tasks for reg tests. */
vStartRegTests();
}
/*-----------------------------------------------------------*/
static void prvSetupHardware( void )
{
/* Set BOD VBAT level to 1.65V. */
POWER_SetBodVbatLevel( kPOWER_BodVbatLevel1650mv, kPOWER_BodHystLevel50mv, false );
}
/*-----------------------------------------------------------*/
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/NonSecure/reg_tests.c
+446
View File
@@ -0,0 +1,446 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Reg test includes. */
#include "reg_tests.h"
#include "reg_test_asm.h"
#include "secure_reg_test_asm.h"
/* Printf includes. */
#include "nsc_printf.h"
/*
* Functions that implement reg test tasks.
*/
static void prvRegTest1_Task( void * pvParameters );
static void prvRegTest2_Task( void * pvParameters );
static void prvRegTest3_Task( void * pvParameters );
static void prvRegTest4_Task( void * pvParameters );
static void prvRegTest_Secure_Task( void * pvParameters );
static void prvRegTest_NonSecureCallback_Task( void * pvParameters );
/*
* Check task periodically checks that reg tests tasks
* are running fine.
*/
static void prvCheckTask( void * pvParameters );
/*-----------------------------------------------------------*/
/*
* Priority of the check task.
*/
#define CHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
/*
* Frequency of check task.
*/
#define NO_ERROR_CHECK_TASK_PERIOD ( pdMS_TO_TICKS( 5000UL ) )
#define ERROR_CHECK_TASK_PERIOD ( pdMS_TO_TICKS( 200UL ) )
/*
* Parameters passed to reg test tasks.
*/
#define REG_TEST_1_TASK_PARAMETER ( ( void * ) 0x12345678 )
#define REG_TEST_2_TASK_PARAMETER ( ( void * ) 0x87654321 )
#define REG_TEST_3_TASK_PARAMETER ( ( void * ) 0x12348765 )
#define REG_TEST_4_TASK_PARAMETER ( ( void * ) 0x43215678 )
#define REG_TEST_SECURE_TASK_PARAMETER ( ( void * ) 0x1234ABCD )
#define REG_TEST_NON_SECURE_CALLBACK_TASK_PARAMETER ( ( void * ) 0xABCD1234 )
/*-----------------------------------------------------------*/
/*
* The following variables are used to communicate the status of the register
* test tasks to the check task. If the variables keep incrementing, then the
* register test tasks have not discovered any errors. If a variable stops
* incrementing, then an error has been found.
*/
volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;
volatile unsigned long ulRegTest3LoopCounter = 0UL, ulRegTest4LoopCounter = 0UL;
volatile unsigned long ulRegTestSecureLoopCounter = 0UL;
volatile unsigned long ulRegTestNonSecureCallbackLoopCounter = 0UL;
/**
* Counter to keep a count of how may times the check task loop has detected
* error.
*/
volatile unsigned long ulCheckTaskLoops = 0UL;
/*-----------------------------------------------------------*/
void vStartRegTests( void )
{
static StackType_t xRegTest1TaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
static StackType_t xRegTest2TaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
static StackType_t xRegTest3TaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
static StackType_t xRegTest4TaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
static StackType_t xRegTestSecureTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
static StackType_t xRegTestNonSecureCallbackTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
static StackType_t xCheckTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
TaskParameters_t xRegTest1TaskParameters =
{
.pvTaskCode = prvRegTest1_Task,
.pcName = "RegTest1",
.usStackDepth = configMINIMAL_STACK_SIZE,
.pvParameters = REG_TEST_1_TASK_PARAMETER,
.uxPriority = tskIDLE_PRIORITY | portPRIVILEGE_BIT,
.puxStackBuffer = xRegTest1TaskStack,
.xRegions = {
{ 0, 0, 0 },
{ 0, 0, 0 },
{ 0, 0, 0 }
}
};
TaskParameters_t xRegTest2TaskParameters =
{
.pvTaskCode = prvRegTest2_Task,
.pcName = "RegTest2",
.usStackDepth = configMINIMAL_STACK_SIZE,
.pvParameters = REG_TEST_2_TASK_PARAMETER,
.uxPriority = tskIDLE_PRIORITY | portPRIVILEGE_BIT,
.puxStackBuffer = xRegTest2TaskStack,
.xRegions = {
{ 0, 0, 0 },
{ 0, 0, 0 },
{ 0, 0, 0 }
}
};
TaskParameters_t xRegTest3TaskParameters =
{
.pvTaskCode = prvRegTest3_Task,
.pcName = "RegTest3",
.usStackDepth = configMINIMAL_STACK_SIZE,
.pvParameters = REG_TEST_3_TASK_PARAMETER,
.uxPriority = tskIDLE_PRIORITY | portPRIVILEGE_BIT,
.puxStackBuffer = xRegTest3TaskStack,
.xRegions = {
{ 0, 0, 0 },
{ 0, 0, 0 },
{ 0, 0, 0 }
}
};
TaskParameters_t xRegTest4TaskParameters =
{
.pvTaskCode = prvRegTest4_Task,
.pcName = "RegTest4",
.usStackDepth = configMINIMAL_STACK_SIZE,
.pvParameters = REG_TEST_4_TASK_PARAMETER,
.uxPriority = tskIDLE_PRIORITY | portPRIVILEGE_BIT,
.puxStackBuffer = xRegTest4TaskStack,
.xRegions = {
{ 0, 0, 0 },
{ 0, 0, 0 },
{ 0, 0, 0 }
}
};
TaskParameters_t xRegTestSecureTaskParameters =
{
.pvTaskCode = prvRegTest_Secure_Task,
.pcName = "RegTestSecure",
.usStackDepth = configMINIMAL_STACK_SIZE,
.pvParameters = REG_TEST_SECURE_TASK_PARAMETER,
.uxPriority = tskIDLE_PRIORITY | portPRIVILEGE_BIT,
.puxStackBuffer = xRegTestSecureTaskStack,
.xRegions = {
{ 0, 0, 0 },
{ 0, 0, 0 },
{ 0, 0, 0 }
}
};
TaskParameters_t xRegTestNonSecureCallbackTaskParameters =
{
.pvTaskCode = prvRegTest_NonSecureCallback_Task,
.pcName = "RegTestNonSecureCallback",
.usStackDepth = configMINIMAL_STACK_SIZE,
.pvParameters = REG_TEST_NON_SECURE_CALLBACK_TASK_PARAMETER,
.uxPriority = tskIDLE_PRIORITY | portPRIVILEGE_BIT,
.puxStackBuffer = xRegTestNonSecureCallbackTaskStack,
.xRegions = {
{ 0, 0, 0 },
{ 0, 0, 0 },
{ 0, 0, 0 }
}
};
TaskParameters_t xCheckTaskParameters =
{
.pvTaskCode = prvCheckTask,
.pcName = "Check",
.usStackDepth = configMINIMAL_STACK_SIZE,
.pvParameters = NULL,
.uxPriority = ( CHECK_TASK_PRIORITY | portPRIVILEGE_BIT ),
.puxStackBuffer = xCheckTaskStack,
.xRegions = {
{ 0, 0, 0 },
{ 0, 0, 0 },
{ 0, 0, 0 }
}
};
xTaskCreateRestricted( &( xRegTest1TaskParameters ), NULL );
xTaskCreateRestricted( &( xRegTest2TaskParameters ), NULL );
xTaskCreateRestricted( &( xRegTest3TaskParameters ), NULL );
xTaskCreateRestricted( &( xRegTest4TaskParameters ), NULL );
xTaskCreateRestricted( &( xRegTestSecureTaskParameters ), NULL );
xTaskCreateRestricted( &( xRegTestNonSecureCallbackTaskParameters ), NULL );
xTaskCreateRestricted( &( xCheckTaskParameters ), NULL );
}
/*-----------------------------------------------------------*/
static void prvRegTest1_Task( void * pvParameters )
{
/* Although the reg tests are written in assembly, its entry
* point is written in C for convenience of checking that the
* task parameter is being passed in correctly. */
if( pvParameters == REG_TEST_1_TASK_PARAMETER )
{
/* Start the part of the test that is written in assembler. */
vRegTest1Asm_NonSecure();
}
/* The following line will only execute if the task parameter
* is found to be incorrect. The check task will detect that
* the reg test loop counter is not being incremented and flag
* an error. */
vTaskDelete( NULL );
}
/*-----------------------------------------------------------*/
static void prvRegTest2_Task( void * pvParameters )
{
/* Although the reg tests are written in assembly, its entry
* point is written in C for convenience of checking that the
* task parameter is being passed in correctly. */
if( pvParameters == REG_TEST_2_TASK_PARAMETER )
{
/* Start the part of the test that is written in assembler. */
vRegTest2Asm_NonSecure();
}
/* The following line will only execute if the task parameter
* is found to be incorrect. The check task will detect that
* the reg test loop counter is not being incremented and flag
* an error. */
vTaskDelete( NULL );
}
/*-----------------------------------------------------------*/
static void prvRegTest3_Task( void * pvParameters )
{
/* Although the reg tests are written in assembly, its entry
* point is written in C for convenience of checking that the
* task parameter is being passed in correctly. */
if( pvParameters == REG_TEST_3_TASK_PARAMETER )
{
/* Start the part of the test that is written in assembler. */
vRegTest3Asm_NonSecure();
}
/* The following line will only execute if the task parameter
* is found to be incorrect. The check task will detect that
* the reg test loop counter is not being incremented and flag
* an error. */
vTaskDelete( NULL );
}
/*-----------------------------------------------------------*/
static void prvRegTest4_Task( void * pvParameters )
{
/* Although the reg tests are written in assembly, its entry
* point is written in C for convenience of checking that the
* task parameter is being passed in correctly. */
if( pvParameters == REG_TEST_4_TASK_PARAMETER )
{
/* Start the part of the test that is written in assembler. */
vRegTest4Asm_NonSecure();
}
/* The following line will only execute if the task parameter
* is found to be incorrect. The check task will detect that
* the reg test loop counter is not being incremented and flag
* an error. */
vTaskDelete( NULL );
}
/*-----------------------------------------------------------*/
static void prvRegTest_Secure_Task( void * pvParameters )
{
/* This task is going to call secure side functions. */
portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE );
/* Although the reg tests are written in assembly, its entry
* point is written in C for convenience of checking that the
* task parameter is being passed in correctly. */
if( pvParameters == REG_TEST_SECURE_TASK_PARAMETER )
{
for( ;; )
{
/* Call the secure side function. This function populates registers
* with known values, then forces a context switch while on the
* secure side and then verifies that the contents of the registers
* are intact. This ensure that the context restoring mechanism
* works properly when the interrupted task was in the middle of a
* call to a secure side function. */
vRegTestAsm_Secure();
ulRegTestSecureLoopCounter += 1;
}
}
/* The following line will only execute if the task parameter
* is found to be incorrect. The check task will detect that
* the reg test loop counter is not being incremented and flag
* an error. */
vTaskDelete( NULL );
}
/*-----------------------------------------------------------*/
static void prvRegTest_NonSecureCallback_Task( void * pvParameters )
{
/* This task is going to call secure side functions. */
portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE );
/* Although the reg tests are written in assembly, its entry
* point is written in C for convenience of checking that the
* task parameter is being passed in correctly. */
if( pvParameters == REG_TEST_NON_SECURE_CALLBACK_TASK_PARAMETER )
{
for( ;; )
{
/* Call the secure side function. This function calls the provided
* non-secure callback which in-turn populates registers with
* known values, then forces a context switch while on the
* non-secure side and then verifies that the contents of the
* registers are intact. This ensure that the context restoring
* mechanism works properly when the interrupted task was in the
* middle of a non-secure callback from the secure side. */
vRegTest_NonSecureCallback( vRegTestAsm_NonSecureCallback );
ulRegTestNonSecureCallbackLoopCounter += 1;
}
}
/* The following line will only execute if the task parameter
* is found to be incorrect. The check task will detect that
* the reg test loop counter is not being incremented and flag
* an error. */
vTaskDelete( NULL );
}
/*-----------------------------------------------------------*/
static void prvCheckTask( void * pvParameters )
{
TickType_t xDelayPeriod = NO_ERROR_CHECK_TASK_PERIOD;
TickType_t xLastExecutionTime;
unsigned long ulErrorFound = pdFALSE;
static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;
static unsigned long ulLastRegTest3Value = 0, ulLastRegTest4Value = 0;
static unsigned long ulLastRegTestSecureValue = 0, ulLastRegTestNonSecureCallbackValue = 0;
/* This task is going to call secure side functions for
* printing messages. */
portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE );
/* Just to stop compiler warnings. */
( void ) pvParameters;
/* Initialize xLastExecutionTime so the first call to vTaskDelayUntil()
* works correctly. */
xLastExecutionTime = xTaskGetTickCount();
/* Cycle for ever, delaying then checking all the other tasks are still
* operating without error. The onboard LED is toggled on each iteration.
* If an error is detected then the delay period is decreased from
* mainNO_ERROR_CHECK_TASK_PERIOD to mainERROR_CHECK_TASK_PERIOD. This has
* the effect of increasing the rate at which the onboard LED toggles, and
* in so doing gives visual feedback of the system status. */
for( ;; )
{
/* Delay until it is time to execute again. */
vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod );
/* Check that the register test 1 task is still running. */
if( ulLastRegTest1Value == ulRegTest1LoopCounter )
{
ulErrorFound |= 1UL << 0UL;
}
ulLastRegTest1Value = ulRegTest1LoopCounter;
/* Check that the register test 2 task is still running. */
if( ulLastRegTest2Value == ulRegTest2LoopCounter )
{
ulErrorFound |= 1UL << 1UL;
}
ulLastRegTest2Value = ulRegTest2LoopCounter;
/* Check that the register test 3 task is still running. */
if( ulLastRegTest3Value == ulRegTest3LoopCounter )
{
ulErrorFound |= 1UL << 2UL;
}
ulLastRegTest3Value = ulRegTest3LoopCounter;
/* Check that the register test 4 task is still running. */
if( ulLastRegTest4Value == ulRegTest4LoopCounter )
{
ulErrorFound |= 1UL << 3UL;
}
ulLastRegTest4Value = ulRegTest4LoopCounter;
/* Check that the register test secure task is still running. */
if( ulLastRegTestSecureValue == ulRegTestSecureLoopCounter )
{
ulErrorFound |= 1UL << 4UL;
}
ulLastRegTestSecureValue = ulRegTestSecureLoopCounter;
/* Check that the register test non-secure callback task is
* still running. */
if( ulLastRegTestNonSecureCallbackValue == ulRegTestNonSecureCallbackLoopCounter )
{
ulErrorFound |= 1UL << 5UL;
}
ulLastRegTestNonSecureCallbackValue = ulRegTestNonSecureCallbackLoopCounter;
if( ulErrorFound != pdFALSE )
{
/* An error has been detected in one of the tasks. */
xDelayPeriod = ERROR_CHECK_TASK_PERIOD;
NSC_Printf( "ERROR detected!\r\n" );
/* Increment error detection count. */
ulCheckTaskLoops++;
}
else
{
NSC_Printf( "No errors.\r\n" );
}
}
}
/*-----------------------------------------------------------*/
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/NonSecure/reg_tests.h
+35
View File
@@ -0,0 +1,35 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef REG_TESTS_H
#define REG_TESTS_H
/**
* @brief Creates all the tasks for reg tests.
*/
void vStartRegTests( void );
#endif /* REG_TESTS_H */
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/Secure/.cproject
+29 -18
View File
@@ -102,12 +102,12 @@
<listOptionValue builtIn="false" value="MCUXPRESSO_SDK"/>
<listOptionValue builtIn="false" value="CPU_LPC55S69JBD100"/>
<listOptionValue builtIn="false" value="CPU_LPC55S69JBD100_cm33"/>
<listOptionValue builtIn="false" value="SDK_DEBUGCONSOLE=1"/>
<listOptionValue builtIn="false" value="CR_INTEGER_PRINTF"/>
<listOptionValue builtIn="false" value="__MCUXPRESSO"/>
<listOptionValue builtIn="false" value="__USE_CMSIS"/>
<listOptionValue builtIn="false" value="DEBUG"/>
<listOptionValue builtIn="false" value="__NEWLIB__"/>
<listOptionValue builtIn="false" value="SDK_DEBUGCONSOLE=1"/>
</option>
<option id="gnu.c.compiler.option.preprocessor.undef.symbol.904667201" name="Undefined symbols (-U)" superClass="gnu.c.compiler.option.preprocessor.undef.symbol" useByScannerDiscovery="false"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.compiler.option.include.paths.927386374" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
@@ -277,12 +277,8 @@
<option id="gnu.c.link.option.nostdlibs.1676046096" name="No startup or default libs (-nostdlib)" superClass="gnu.c.link.option.nostdlibs" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<option id="gnu.c.link.option.strip.1271951104" name="Omit all symbol information (-s)" superClass="gnu.c.link.option.strip" useByScannerDiscovery="false"/>
<option id="gnu.c.link.option.noshared.257939592" name="No shared libraries (-static)" superClass="gnu.c.link.option.noshared" useByScannerDiscovery="false"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.link.option.libs.919983000" name="Libraries (-l)" superClass="gnu.c.link.option.libs" useByScannerDiscovery="false" valueType="libs">
<listOptionValue builtIn="false" value="power_hardabi_s"/>
</option>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.link.option.paths.2126623716" name="Library search path (-L)" superClass="gnu.c.link.option.paths" useByScannerDiscovery="false" valueType="libPaths">
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/NXP_Code/libs}&quot;"/>
</option>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="gnu.c.link.option.libs.919983000" name="Libraries (-l)" superClass="gnu.c.link.option.libs" useByScannerDiscovery="false" valueType="libs"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="gnu.c.link.option.paths.2126623716" name="Library search path (-L)" superClass="gnu.c.link.option.paths" useByScannerDiscovery="false" valueType="libPaths"/>
<option id="gnu.c.link.option.ldflags.778846229" name="Linker flags" superClass="gnu.c.link.option.ldflags" useByScannerDiscovery="false"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.link.option.other.1387107219" name="Other options (-Xlinker [option])" superClass="gnu.c.link.option.other" useByScannerDiscovery="false" valueType="stringList">
<listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
@@ -308,7 +304,7 @@
<option id="com.crt.advproject.link.crpenable.797389321" name="Enable automatic placement of Code Read Protection field in image" superClass="com.crt.advproject.link.crpenable" useByScannerDiscovery="false"/>
<option id="com.crt.advproject.link.flashconfigenable.908777484" name="Enable automatic placement of Flash Configuration field in image" superClass="com.crt.advproject.link.flashconfigenable" useByScannerDiscovery="false" value="true" valueType="boolean"/>
<option id="com.crt.advproject.link.ecrp.1277431163" name="Enhanced CRP" superClass="com.crt.advproject.link.ecrp" useByScannerDiscovery="false"/>
<option id="com.crt.advproject.link.gcc.hdrlib.2097369956" name="Library" superClass="com.crt.advproject.link.gcc.hdrlib" useByScannerDiscovery="false" value="com.crt.advproject.gcc.link.hdrlib.newlibnano.semihost" valueType="enumerated"/>
<option id="com.crt.advproject.link.gcc.hdrlib.2097369956" name="Library" superClass="com.crt.advproject.link.gcc.hdrlib" useByScannerDiscovery="false" value="com.crt.advproject.gcc.link.hdrlib.newlibnano.nohost" valueType="enumerated"/>
<option id="com.crt.advproject.link.gcc.nanofloat.1164185150" name="Enable printf float " superClass="com.crt.advproject.link.gcc.nanofloat" useByScannerDiscovery="false"/>
<option id="com.crt.advproject.link.gcc.nanofloat.scanf.603353586" name="Enable scanf float " superClass="com.crt.advproject.link.gcc.nanofloat.scanf" useByScannerDiscovery="false"/>
<option id="com.crt.advproject.link.toram.266119221" name="Link application to RAM" superClass="com.crt.advproject.link.toram" useByScannerDiscovery="false"/>
@@ -337,14 +333,25 @@
</tool>
</toolChain>
</folderInfo>
<folderInfo id="com.crt.advproject.config.exe.debug.650465968.1580633237" name="/" resourcePath="reg_tests">
<toolChain id="com.crt.advproject.toolchain.exe.debug.1643158192" name="NXP MCU Tools" superClass="com.crt.advproject.toolchain.exe.debug" unusedChildren="">
<tool id="com.crt.advproject.cpp.exe.debug.1303225074" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.debug.248036726"/>
<tool id="com.crt.advproject.gcc.exe.debug.806639634" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug.1827685058"/>
<tool id="com.crt.advproject.gas.exe.debug.2004350830" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.debug.355931849"/>
<tool id="com.crt.advproject.link.cpp.exe.debug.141362876" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.debug.767850316"/>
<tool id="com.crt.advproject.link.exe.debug.558086384" name="MCU Linker" superClass="com.crt.advproject.link.exe.debug.1425769789"/>
<tool id="com.crt.advproject.tool.debug.debug.404468304" name="MCU Debugger" superClass="com.crt.advproject.tool.debug.debug.1632770985"/>
</toolChain>
</folderInfo>
<sourceEntries>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="Config"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="NSCFunctions"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="NXP_Code"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="SecureContext"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="SecureHeap"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="SecureInit"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="User"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Config"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="NSCFunctions"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="NXP_Code"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="SecureContext"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="SecureHeap"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="SecureInit"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="User"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="reg_tests"/>
</sourceEntries>
</configuration>
</storageModule>
@@ -367,7 +374,7 @@
<storageModule moduleId="com.nxp.mcuxpresso.core.datamodels">
<sdkName>SDK_2.x_LPCXpresso55S69</sdkName>
<sdkExample>FreeRTOSDemo_s</sdkExample>
<sdkVersion>2.10.0</sdkVersion>
<sdkVersion>2.13.1</sdkVersion>
<sdkComponents>platform.drivers.clock.LPC55S69;platform.drivers.power_s.LPC55S69;platform.drivers.common.LPC55S69;utility.debug_console_lite.LPC55S69;platform.utilities.assert_lite.LPC55S69;platform.drivers.lpc_iocon.LPC55S69;platform.drivers.reset.LPC55S69;platform.devices.LPC55S69_CMSIS.LPC55S69;platform.devices.LPC55S69_startup.LPC55S69;platform.drivers.flexcomm_usart.LPC55S69;platform.drivers.flexcomm.LPC55S69;platform.drivers.lpc_gpio.LPC55S69;component.usart_adapter.LPC55S69;component.lists.LPC55S69;CMSIS_Include_core_cm.LPC55S69;platform.utilities.misc_utilities.LPC55S69;platform.devices.LPC55S69_system.LPC55S69;FreeRTOSDemo_s;</sdkComponents>
<boardId>lpcxpresso55s69</boardId>
<package>LPC55S69JBD100</package>
@@ -384,7 +391,7 @@
&lt;name&gt;LPC55S69&lt;/name&gt;&#13;
&lt;family&gt;LPC55S6x&lt;/family&gt;&#13;
&lt;vendor&gt;NXP&lt;/vendor&gt;&#13;
&lt;memory can_program="true" id="Flash" is_ro="true" size="608" type="Flash"/&gt;&#13;
&lt;memory can_program="true" id="Flash" is_ro="true" size="630" type="Flash"/&gt;&#13;
&lt;memory id="RAM" size="304" type="RAM"/&gt;&#13;
&lt;memoryInstance derived_from="Flash" driver="LPC55xx_S.cfx" edited="true" id="PROGRAM_FLASH" location="0x10000000" size="0xfe00"/&gt;&#13;
&lt;memoryInstance derived_from="Flash" edited="true" id="SG_veneer_table" location="0x1000fe00" size="0x200"/&gt;&#13;
@@ -402,6 +409,10 @@
&lt;/infoList&gt;&#13;
&lt;/TargetConfig&gt;</projectStorage>
</storageModule>
<storageModule moduleId="refreshScope"/>
<storageModule moduleId="refreshScope" versionNumber="2">
<configuration configurationName="Debug">
<resource resourceType="PROJECT" workspacePath="/FreeRTOSDemo_s"/>
</configuration>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
</cproject>
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/Secure/.project
+48
View File
@@ -66,6 +66,11 @@
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
<name>reg_tests</name>
<type>2</type>
<locationURI>DEMO_ROOT/Common/ARMv8M/reg_tests</locationURI>
</link>
<link>
<name>NSCFunctions/nsc_functions.c</name>
<type>1</type>
@@ -121,6 +126,16 @@
<type>1</type>
<locationURI>PROJECT_LOC/main_s.c</locationURI>
</link>
<link>
<name>User/nsc_printf.c</name>
<type>1</type>
<locationURI>PROJECT_LOC/nsc_printf.c</locationURI>
</link>
<link>
<name>User/nsc_printf.h</name>
<type>1</type>
<locationURI>PROJECT_LOC/nsc_printf.h</locationURI>
</link>
<link>
<name>User/tzm_config.c</name>
<type>1</type>
@@ -151,5 +166,38 @@
<arguments>1.0-name-matches-false-false-*.h</arguments>
</matcher>
</filter>
<filter>
<id>1681721632460</id>
<name>reg_tests</name>
<type>9</type>
<matcher>
<id>org.eclipse.ui.ide.multiFilter</id>
<arguments>1.0-name-matches-false-false-GCC</arguments>
</matcher>
</filter>
<filter>
<id>1681721650651</id>
<name>reg_tests/GCC</name>
<type>9</type>
<matcher>
<id>org.eclipse.ui.ide.multiFilter</id>
<arguments>1.0-name-matches-false-false-ARM_CM33</arguments>
</matcher>
</filter>
<filter>
<id>1681721666490</id>
<name>reg_tests/GCC/ARM_CM33</name>
<type>9</type>
<matcher>
<id>org.eclipse.ui.ide.multiFilter</id>
<arguments>1.0-name-matches-false-false-secure</arguments>
</matcher>
</filter>
</filteredResources>
<variableList>
<variable>
<name>DEMO_ROOT</name>
<value>$%7BPARENT-4-PROJECT_LOC%7D</value>
</variable>
</variableList>
</projectDescription>
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/Secure/main_s.c
+3 -1
View File
@@ -35,6 +35,7 @@
#include "tzm_config.h"
#include "pin_mux.h"
#include "clock_config.h"
#include "fsl_power.h"
#if ( __ARM_FEATURE_CMSE & 1 ) == 0
#error "Need ARMv8-M security extensions"
@@ -70,7 +71,8 @@ void SystemInitHook( void );
/* Secure main(). */
int main(void)
{
PRINTF( "Booting Secure World.\r\n" );
/* Set BOD VBAT level to 1.65V. */
POWER_SetBodVbatLevel( kPOWER_BodVbatLevel1650mv, kPOWER_BodHystLevel50mv, false );
/* Attach main clock divide to FLEXCOMM0 (debug console). */
CLOCK_AttachClk( BOARD_DEBUG_UART_CLK_ATTACH );
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/Secure/nsc_printf.c
+78
View File
@@ -0,0 +1,78 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/* ARM includes. */
#include <arm_cmse.h>
/* Interface includes. */
#include "nsc_printf.h"
/* FreeRTOS includes. */
#include "secure_port_macros.h"
/* Device includes. */
#include "fsl_debug_console.h"
/*-----------------------------------------------------------*/
/* Maximum length of the string that the non-secure code
* can print. */
#define MAX_ALLOWED_STRING_LENGTH 0x400
/*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void NSC_Printf( char const *str )
{
uint32_t isInvalidSting = 0;
size_t stringLength;
/* Check whether the string is null terminated. */
stringLength = strnlen( str, MAX_ALLOWED_STRING_LENGTH );
if( ( stringLength == MAX_ALLOWED_STRING_LENGTH ) &&
( str[ stringLength ] != '\0') )
{
PRINTF( "[ERROR] [NSC_Printf] String too long or not null terminated!\r\n" );
isInvalidSting = 1;
}
if( isInvalidSting == 0 )
{
/* Check whether the string is located in non-secure memory. */
if( cmse_check_address_range( ( void * ) str,
stringLength,
( CMSE_NONSECURE | CMSE_MPU_READ ) ) == NULL )
{
PRINTF( "[ERROR] [NSC_Printf] String is not located in non-secure memory!\r\n" );
isInvalidSting = 1;
}
}
/* Print the string if it is a valid string. */
if( isInvalidSting == 0 )
{
PRINTF( str );
}
}
/*-----------------------------------------------------------*/
FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/Secure/nsc_printf.h
+37
View File
@@ -0,0 +1,37 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef NSC_PRINTF_H
#define NSC_PRINTF_H
/**
* @brief Non-Secure callable printf function.
*
* @param str The string to print.
*/
void NSC_Printf( char const *str );
#endif /* NSC_PRINTF_H */

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