mirror of
https://github.com/FreeRTOS/FreeRTOS.git
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Add M7/M4 AMP demo.
This commit is contained in:
Richard Barry
@@ -0,0 +1,138 @@
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/*
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* FreeRTOS Kernel V10.0.1
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* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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#ifndef FREERTOS_CONFIG_H
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#define FREERTOS_CONFIG_H
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/*-----------------------------------------------------------
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* Application specific definitions.
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*
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* These definitions should be adjusted for your particular hardware and
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* application requirements.
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*
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* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
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*
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* See http://www.freertos.org/a00110.html.
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*----------------------------------------------------------*/
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/* Ensure stdint is only used by the compiler, and not the assembler. */
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#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
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#include <stdint.h>
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extern uint32_t SystemD2Clock;
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void vGenerateM4ToM7Interrupt( void * xUpdatedMessageBuffer );
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#endif
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#define configUSE_PREEMPTION 1
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#define configUSE_IDLE_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configCPU_CLOCK_HZ ( SystemD2Clock )
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#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
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#define configMAX_PRIORITIES ( 7 )
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#define configMINIMAL_STACK_SIZE ( ( uint16_t ) 128 )
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#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 20 * 1024 ) )
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#define configMAX_TASK_NAME_LEN ( 16 )
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#define configUSE_TRACE_FACILITY 1
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#define configUSE_16_BIT_TICKS 0
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#define configIDLE_SHOULD_YIELD 1
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#define configUSE_MUTEXES 1
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#define configQUEUE_REGISTRY_SIZE 8
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#define configCHECK_FOR_STACK_OVERFLOW 0
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#define configUSE_RECURSIVE_MUTEXES 1
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#define configUSE_MALLOC_FAILED_HOOK 0
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#define configUSE_APPLICATION_TASK_TAG 0
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#define configUSE_COUNTING_SEMAPHORES 1
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#define configGENERATE_RUN_TIME_STATS 0
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/* Co-routine definitions. */
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#define configUSE_CO_ROUTINES 0
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#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
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/* Software timer definitions. */
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#define configUSE_TIMERS 0
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#define configTIMER_TASK_PRIORITY ( 2 )
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#define configTIMER_QUEUE_LENGTH 10
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#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 )
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/* Set the following definitions to 1 to include the API function, or zero
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to exclude the API function. */
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#define INCLUDE_vTaskPrioritySet 1
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#define INCLUDE_uxTaskPriorityGet 1
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#define INCLUDE_vTaskDelete 1
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#define INCLUDE_vTaskCleanUpResources 1
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#define INCLUDE_vTaskSuspend 1
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#define INCLUDE_vTaskDelayUntil 1
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#define INCLUDE_vTaskDelay 1
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#define INCLUDE_xQueueGetMutexHolder 1
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#define INCLUDE_xTaskGetSchedulerState 1
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#define INCLUDE_eTaskGetState 1
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/* Cortex-M specific definitions. */
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#ifdef __NVIC_PRIO_BITS
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/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
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#define configPRIO_BITS __NVIC_PRIO_BITS
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#else
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#define configPRIO_BITS 4 /* 15 priority levels */
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#endif
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/* The lowest interrupt priority that can be used in a call to a "set priority"
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function. */
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#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0xf
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/* The highest interrupt priority that can be used by any interrupt service
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routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
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INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
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PRIORITY THAN THIS! (higher priorities are lower numeric values. */
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#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
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/* Interrupt priorities used by the kernel port layer itself. These are generic
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to all Cortex-M ports, and do not rely on any particular library functions. */
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#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
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See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
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#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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/* Normal assert() semantics without relying on the provision of an assert.h
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header file. */
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#ifndef __IASMARM__
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void vAssertCalled( const char *pcFile, const uint32_t ulLine );
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#endif /* __IASMARM__ */
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#define configASSERT( x ) if( ( x ) == 0 ) { vAssertCalled( __FILE__, __LINE__ ); }
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/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
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standard names. */
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#define vPortSVCHandler SVC_Handler
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#define xPortPendSVHandler PendSV_Handler
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#define xPortSysTickHandler SysTick_Handler
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/* Override the default implementation of sbRECEIVE_COMPLETED so the macro
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creates an interrupt in the M7 core. See the comments at the top of main.c. */
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#define sbRECEIVE_COMPLETED( pxStreamBuffer ) vGenerateM4ToM7Interrupt( pxStreamBuffer )
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#endif /* FREERTOS_CONFIG_H */
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+422
@@ -0,0 +1,422 @@
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/**
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******************************************************************************
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* @file FreeRTOS/FreeRTOS_HwSemaphoreCoreSync/CM4/Inc/stm32h7xx_hal_conf.h
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* @author MCD Application Team
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* @brief HAL configuration file for Cortex-M4.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32H7xx_HAL_CONF_H
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#define __STM32H7xx_HAL_CONF_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/* ########################## Module Selection ############################## */
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/**
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* @brief This is the list of modules to be used in the HAL driver
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*/
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#define HAL_MODULE_ENABLED
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#define HAL_ADC_MODULE_ENABLED
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/* #define HAL_CEC_MODULE_ENABLED */
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/* #define HAL_COMP_MODULE_ENABLED */
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#define HAL_CORTEX_MODULE_ENABLED
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/* #define HAL_CRC_MODULE_ENABLED */
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/* #define HAL_CRYP_MODULE_ENABLED */
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/* #define HAL_DAC_MODULE_ENABLED */
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/* #define HAL_DCMI_MODULE_ENABLED */
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/* #define HAL_DFSDM_MODULE_ENABLED */
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#define HAL_DMA_MODULE_ENABLED
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/* #define HAL_DMA2D_MODULE_ENABLED */
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/* #define HAL_ETH_MODULE_ENABLED */
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/* #define HAL_EXTI_MODULE_ENABLED */
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/* #define HAL_FDCAN_MODULE_ENABLED */
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#define HAL_FLASH_MODULE_ENABLED
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#define HAL_GPIO_MODULE_ENABLED
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/* #define HAL_HASH_MODULE_ENABLED */
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/* #define HAL_HCD_MODULE_ENABLED */
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/* #define HAL_HRTIM_MODULE_ENABLED */
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#define HAL_HSEM_MODULE_ENABLED
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#define HAL_I2C_MODULE_ENABLED
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/* #define HAL_I2S_MODULE_ENABLED */
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/* #define HAL_IRDA_MODULE_ENABLED */
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/* #define HAL_IWDG_MODULE_ENABLED */
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/* #define HAL_JPEG_MODULE_ENABLED */
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/* #define HAL_LPTIM_MODULE_ENABLED */
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/* #define HAL_LTDC_MODULE_ENABLED */
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/* #define HAL_MDIOS_MODULE_ENABLED */
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/* #define HAL_MDMA_MODULE_ENABLED */
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/* #define HAL_MMC_MODULE_ENABLED */
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/* #define HAL_NAND_MODULE_ENABLED */
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/* #define HAL_NOR_MODULE_ENABLED */
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/* #define HAL_OPAMP_MODULE_ENABLED */
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/* #define HAL_PCD_MODULE_ENABLED */
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#define HAL_PWR_MODULE_ENABLED
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/* #define HAL_QSPI_MODULE_ENABLED */
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/* #define HAL_RAMECC_MODULE_ENABLED */
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#define HAL_RCC_MODULE_ENABLED
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/* #define HAL_RNG_MODULE_ENABLED */
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/* #define HAL_RTC_MODULE_ENABLED */
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/* #define HAL_SAI_MODULE_ENABLED */
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/* #define HAL_SD_MODULE_ENABLED */
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/* #define HAL_SDRAM_MODULE_ENABLED */
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/* #define HAL_SMARTCARD_MODULE_ENABLED */
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/* #define HAL_SMBUS_MODULE_ENABLED */
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/* #define HAL_SPDIFRX_MODULE_ENABLED */
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/* #define HAL_SPI_MODULE_ENABLED */
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/* #define HAL_SRAM_MODULE_ENABLED */
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/* #define HAL_SWPMI_MODULE_ENABLED */
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/* #define HAL_TIM_MODULE_ENABLED */
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#define HAL_UART_MODULE_ENABLED
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/* #define HAL_USART_MODULE_ENABLED */
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/* #define HAL_WWDG_MODULE_ENABLED */
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/* ########################## Oscillator Values adaptation ####################*/
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/**
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* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
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* This value is used by the RCC HAL module to compute the system frequency
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* (when HSE is used as system clock source, directly or through the PLL).
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*/
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#if !defined (HSE_VALUE)
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#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
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#endif /* HSE_VALUE */
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#if !defined (HSE_STARTUP_TIMEOUT)
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#define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */
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#endif /* HSE_STARTUP_TIMEOUT */
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/**
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* @brief Internal oscillator (CSI) default value.
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* This value is the default CSI value after Reset.
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*/
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#if !defined (CSI_VALUE)
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#define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
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#endif /* CSI_VALUE */
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/**
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* @brief Internal High Speed oscillator (HSI) value.
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* This value is used by the RCC HAL module to compute the system frequency
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* (when HSI is used as system clock source, directly or through the PLL).
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*/
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#if !defined (HSI_VALUE)
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#define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
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#endif /* HSI_VALUE */
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/**
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* @brief External Low Speed oscillator (LSE) value.
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* This value is used by the UART, RTC HAL module to compute the system frequency
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*/
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#if !defined (LSE_VALUE)
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#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
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#endif /* LSE_VALUE */
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#if !defined (LSE_STARTUP_TIMEOUT)
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#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
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#endif /* LSE_STARTUP_TIMEOUT */
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#if !defined (LSI_VALUE)
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#define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/
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#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
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The real value may vary depending on the variations
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in voltage and temperature.*/
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/**
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* @brief External clock source for I2S peripheral
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* This value is used by the I2S HAL module to compute the I2S clock source
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* frequency, this source is inserted directly through I2S_CKIN pad.
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*/
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#if !defined (EXTERNAL_CLOCK_VALUE)
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#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External clock in Hz*/
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#endif /* EXTERNAL_CLOCK_VALUE */
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/* Tip: To avoid modifying this file each time you need to use different HSE,
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=== you can define the HSE value in your toolchain compiler preprocessor. */
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/* ########################### System Configuration ######################### */
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/**
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* @brief This is the HAL system configuration section
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*/
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#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
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#define TICK_INT_PRIORITY ((uint32_t)0x0F) /*!< tick interrupt priority */
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#define USE_RTOS 0
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#define USE_SD_TRANSCEIVER 1U /*!< use uSD Transceiver */
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/* ########################### Ethernet Configuration ######################### */
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#define ETH_TX_DESC_CNT 4 /* number of Ethernet Tx DMA descriptors */
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#define ETH_RX_DESC_CNT 4 /* number of Ethernet Rx DMA descriptors */
|
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#define ETH_MAC_ADDR0 ((uint8_t)0x02)
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#define ETH_MAC_ADDR1 ((uint8_t)0x00)
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#define ETH_MAC_ADDR2 ((uint8_t)0x00)
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#define ETH_MAC_ADDR3 ((uint8_t)0x00)
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#define ETH_MAC_ADDR4 ((uint8_t)0x00)
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#define ETH_MAC_ADDR5 ((uint8_t)0x00)
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1 */
|
||||
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
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#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_rcc.h"
|
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#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
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#include "stm32h7xx_hal_gpio.h"
|
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#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
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#ifdef HAL_DMA_MODULE_ENABLED
|
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#include "stm32h7xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MDMA_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_mdma.h"
|
||||
#endif /* HAL_MDMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HASH_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_hash.h"
|
||||
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dcmi.h"
|
||||
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dma2d.h"
|
||||
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DFSDM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dfsdm.h"
|
||||
#endif /* HAL_DFSDM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_fdcan.h"
|
||||
#endif /* HAL_FDCAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_cec.h"
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_COMP_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_comp.h"
|
||||
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HRTIM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_hrtim.h"
|
||||
#endif /* HAL_HRTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HSEM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_hsem.h"
|
||||
#endif /* HAL_HSEM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_JPEG_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_jpeg.h"
|
||||
#endif /* HAL_JPEG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MDIOS_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_mdios.h"
|
||||
#endif /* HAL_MDIOS_MODULE_ENABLED */
|
||||
|
||||
|
||||
#ifdef HAL_MMC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_mmc.h"
|
||||
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_lptim.h"
|
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_ltdc.h"
|
||||
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_OPAMP_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_opamp.h"
|
||||
#endif /* HAL_OPAMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_qspi.h"
|
||||
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RAMECC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_ramecc.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SDRAM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_sdram.h"
|
||||
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPDIFRX_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_spdifrx.h"
|
||||
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SWPMI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_swpmi.h"
|
||||
#endif /* HAL_SWPMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_smbus.h"
|
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t *file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32H7xx_HAL_CONF_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,51 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file FreeRTOS/FreeRTOS_AMP_Dual_RTOS/CM4/Inc/stm32h7xx_it.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the headers of the interrupt handlers for Cortex-M4.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32H7xx_IT_H
|
||||
#define __STM32H7xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
void EXTI0_IRQHandler(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32H7xx_IT_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,492 @@
|
||||
/*
|
||||
* FreeRTOS Kernel V10.2.0
|
||||
* Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*
|
||||
* See https://www.freertos.org/STM32H7_Dual_Core_AMP_RTOS_demo.html for usage
|
||||
* instructions (TBD, not available at the time of writing).
|
||||
*
|
||||
* Behavior
|
||||
* --------
|
||||
*
|
||||
* This example stress tests a simple Asymmetric Multi Processing (AMP) core to
|
||||
* core communication mechanism implemented using FreeRTOS message buffers:
|
||||
* https://www.freertos.org/RTOS-stream-message-buffers.html Message buffers
|
||||
* are used to pass an ASCII representation of an incrementing number (so "0",
|
||||
* followed by "1", followed by "2", etc.) from a single 'sending' task that
|
||||
* runs on the Arm Cortex-M7 core (the M7 core) to two "receiving" tasks
|
||||
* running on the Arm Cortex-M4 core (the M4 core). There are two data message
|
||||
* buffers, one for each receiving task. To distinguish between the receiving
|
||||
* tasks one is assigned the task number 0, and the other task number 1.
|
||||
*
|
||||
* The M7 task sits in a loop sending the ascii strings to each M4 task. If a
|
||||
* receiving task receives the next expected value in the sequence it prints its
|
||||
* task number to the UART. If a receiving task receives anything else, or its
|
||||
* attempt to receive data times out, then it hits an assert() that prints an
|
||||
* error message to the UART before stopping all further processing on the M4
|
||||
* core. If the example is running correctly you will see lots of "0"s (from
|
||||
* the receiving task assigned task number 0) and "1"s (from the receiving task
|
||||
* assigned task number 1) streaming from the UART. The time taken to output
|
||||
* characters from the UART is the only thing throttling the speed of the core
|
||||
* to core communication as it causes the message buffers to become full - which
|
||||
* would probably happen anyway as the M7 core is executing at twice the
|
||||
* frequency of the M4 core.
|
||||
*
|
||||
*
|
||||
* Implementation of sbSEND_COMPLETED()
|
||||
* ------------------------------------
|
||||
*
|
||||
* sbSEND_COMPLETED is a macro called by FreeRTOS after data has been sent to a
|
||||
* message buffer in case there was a task blocked on the message buffer waiting
|
||||
* for data to become available - in which case the waiting task would be
|
||||
* unblocked: https://www.freertos.org/RTOS-message-buffer-example.html
|
||||
* However, the default sbSEND_COMPLETED implementation assumes the sending task
|
||||
* (or interrupt) and the receiving task are under the control of the same
|
||||
* instance of the FreeRTOS kernel and run on the same MCU core. In this AMP
|
||||
* example the sending task and the receiving tasks are under the control of two
|
||||
* different instances of the FreeRTOS kernel, and run on different MCU cores,
|
||||
* so the default sbSEND_COMPLETED implementation won't work (each FreeRTOS
|
||||
* kernel instance only knowns about the tasks under its control). AMP
|
||||
* scenarios therefore require the sbSEND_COMPLETED macro (and potentially the
|
||||
* sbRECEIVE_COMPLETED macro, see below) to be overridden, which is done by
|
||||
* simply providing your own implementation in the project's FreeRTOSConfig.h
|
||||
* file. Note this example has a FreeRTOSConfig.h file used by the application
|
||||
* that runs on the M7 core and a separate FreeRTOSConfig.h file used by the
|
||||
* application that runs on the M4 core. The implementation of sbSEND_COMPLETED
|
||||
* used by the M7 core simply triggers an interrupt in the M4 core. The
|
||||
* interrupt's handler (the ISR that was triggered by the M7 core but executes
|
||||
* on the M4 core) must then do the job that would otherwise be done by the
|
||||
* default implementation of sbSEND_COMPLETE - namely unblock a task if the task
|
||||
* was waiting to receive data from the message buffer that now contains data.
|
||||
* There are two data message buffers though, so first ISR must determine which
|
||||
* of the two contains data.
|
||||
*
|
||||
* This demo only has two data message buffers, so it would be reasonable to
|
||||
* have the ISR simply query both to see which contained data, but that solution
|
||||
* would not scale if there are many message buffers, or if the number of
|
||||
* message buffers was unknown. Therefore, to demonstrate a more scalable
|
||||
* solution, this example introduced a third message buffer - a 'control'
|
||||
* message buffer as opposed to a 'data' message buffer. After the task on the
|
||||
* M7 core writes to a data message buffer it writes the handle of the message
|
||||
* buffer that contains data to the control message buffer. The ISR running on
|
||||
* the M4 core then reads from the control message buffer to know which data
|
||||
* message buffer contains data.
|
||||
*
|
||||
* The above described scenario contains many implementation decisions.
|
||||
* Alternative methods of enabling the M4 core to know data message buffer
|
||||
* contains data include:
|
||||
*
|
||||
* 1) Using a different interrupt for each data message buffer.
|
||||
* 2) Passing all data from the M7 core to the M4 core through a single message
|
||||
* buffer, along with additional data that tells the ISR running on the M4
|
||||
* core which task to forward the data to.
|
||||
*
|
||||
*
|
||||
* Implementation of sbRECEIVE_COMPLETED()
|
||||
* ---------------------------------------
|
||||
*
|
||||
* sbRECEIVE_COMPLETED is the complement of sbSEND_COMPLETED. It is a macro
|
||||
* called by FreeRTOS after data has been read from a message buffer in case
|
||||
* there was a task blocked on the message buffer waiting for space to become
|
||||
* available - in which case the waiting task would be unblocked so it can
|
||||
* complete its write to the buffer.
|
||||
*
|
||||
* In this example the M7 task writes to the message buffers faster than the M4
|
||||
* tasks read from them (in part because the M7 is running faster, and in part
|
||||
* because the M4 cores write to the UART), so the buffers become full, and the
|
||||
* M7 task enters the Blocked state to wait for space to become available. As
|
||||
* with the sbSEND_COMPLETED macro, the default implementation of the
|
||||
* sbRECEIVE_COMPLETED macro only works if the sender and receiver are under the
|
||||
* control of the same instance of FreeRTOS and execute on the same core.
|
||||
* Therefore, just as the application that executes on the M7 core overrides
|
||||
* the default implementation of sbSEND_SOMPLETED(), the application that runs
|
||||
* on the M4 core overrides the default implementation of sbRECEIVE_COMPLETED()
|
||||
* to likewise generate an interrupt in the M7 core - so sbRECEIVE_COMPLETED()
|
||||
* executes on the M4 core and generates an interrupt on the M7 core. To keep
|
||||
* things simple the ISR that runs on the M7 core does not use a control
|
||||
* message buffer to know which data message buffer contains space, and instead
|
||||
* simply sends a notification to both data message buffers. Note however that
|
||||
* this overly simplistic implementation is only acceptable because it is
|
||||
* known that there is only one sending task, and that task cannot be blocked on
|
||||
* both message buffers at the same time. Also, sending the notification to the
|
||||
* data message buffer updates the receiving task's direct to task notification
|
||||
* state: https://www.freertos.org/RTOS-task-notifications.html which is only ok
|
||||
* because it is known the task is not using its notification state for any
|
||||
* other purpose.
|
||||
*
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
#include "stdio.h"
|
||||
#include "string.h"
|
||||
|
||||
/* STM32 includes. */
|
||||
#include "stm32h7xx_hal.h"
|
||||
#include "stm32h745i_discovery.h"
|
||||
|
||||
/* FreeRTOS includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "message_buffer.h"
|
||||
|
||||
/* Demo includes. */
|
||||
#include "MessageBufferLocations.h"
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Seen as an infinite block by the ST HAL. */
|
||||
#define mainHAL_MAX_TIMEOUT 0xFFFFFFFFUL
|
||||
|
||||
/* When the cores boot they very crudely wait for each other in a non chip
|
||||
specific way by waiting for the other core to start incrementing a shared
|
||||
variable within an array. mainINDEX_TO_TEST sets the index within the array to
|
||||
the variable this core tests to see if it is incrementing, and
|
||||
mainINDEX_TO_INCREMENT sets the index within the array to the variable this core
|
||||
increments to indicate to the other core that it is at the sync point. Note
|
||||
this is not a foolproof method and it is better to use a hardware specific
|
||||
solution, such as having one core boot the other core when it was ready, or
|
||||
using some kind of shared semaphore or interrupt. */
|
||||
#define mainINDEX_TO_TEST 1
|
||||
#define mainINDEX_TO_INCREMENT 0
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Implements the tasks that receive messages from the M7 core.
|
||||
*/
|
||||
static void prvM4CoreTasks( void *pvParameters );
|
||||
|
||||
/*
|
||||
* The interrupt triggered by the M7 core when there is data available in the
|
||||
* message buffer used for core to core communication.
|
||||
*/
|
||||
void HAL_GPIO_EXTI_Callback( uint16_t GPIO_Pin );
|
||||
|
||||
/*
|
||||
* Just waits to see a variable being incremented by the M7 core to know when
|
||||
* the M7 has created the message buffers used for core to core communication.
|
||||
*/
|
||||
static void prvWaitForOtherCoreToStart( uint32_t ulIndexToTest, uint32_t ulIndexToIncrement );
|
||||
|
||||
/*
|
||||
* Configures the hardware ready to run this demo.
|
||||
*/
|
||||
static void prvSetupHardware( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Handle to the UART used to output strings. */
|
||||
static UART_HandleTypeDef xUARTHandle = { 0 };
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
int main( void )
|
||||
{
|
||||
static const uint8_t pucBootMessage[] = "\r\nM4 started and waiting for the M7 to run.\r\n";
|
||||
static const uint8_t pucCreatingTasksMessage[] = "M4 core proceeding to create demo tasks.\r\n";
|
||||
uint32_t x;
|
||||
|
||||
/*** See the comments at the top of this page ***/
|
||||
|
||||
|
||||
/* Prep the hardware to run this demo. */
|
||||
prvSetupHardware();
|
||||
|
||||
/* The M4 core task prints its status out at various places so you know what
|
||||
it is doing when debugging the M7 core. This messages is just to indicate
|
||||
it has booted and is about to wait for the M7 core. If the M7 is already
|
||||
running then reset the hardware so both cores start at once. */
|
||||
HAL_UART_Transmit( &xUARTHandle, ( uint8_t * ) pucBootMessage, sizeof( pucBootMessage ), mainHAL_MAX_TIMEOUT );
|
||||
prvWaitForOtherCoreToStart( mainINDEX_TO_TEST, mainINDEX_TO_INCREMENT );
|
||||
|
||||
/* By this point the M7 should have initialized the message buffers used to
|
||||
send data from the M7 to the M4 core. The message buffers are statically
|
||||
allocated at a known location so both cores know where they are. See
|
||||
MessageBufferLocations.h. */
|
||||
configASSERT( ( xControlMessageBuffer != NULL ) && ( xDataMessageBuffers[ 0 ] != NULL ) && ( xDataMessageBuffers[ 1 ] != NULL ) );
|
||||
|
||||
/* Everything seems as expected - print a message to say the M4 is about to
|
||||
create the tasks that receive data from the M7 core. */
|
||||
HAL_UART_Transmit( &xUARTHandle, ( uint8_t * ) pucCreatingTasksMessage, sizeof( pucCreatingTasksMessage ), mainHAL_MAX_TIMEOUT );
|
||||
|
||||
for( x = 0; x < mbaNUMBER_OF_CORE_2_TASKS; x++ )
|
||||
{
|
||||
/* Pass the loop counter into the created task using the task's
|
||||
parameter. The task then uses the value as an index into the
|
||||
xDataMessageBuffers arrays. */
|
||||
xTaskCreate( prvM4CoreTasks, /* Function that implements the task. */
|
||||
"AMPM4Core", /* Task name, for debugging only. */
|
||||
configMINIMAL_STACK_SIZE, /* Size of stack to allocate for this task - in words. */
|
||||
( void * ) x, /* Task parameter. */
|
||||
tskIDLE_PRIORITY + 1, /* Task priority. */
|
||||
NULL ); /* Task handle. Not used in this case. */
|
||||
}
|
||||
|
||||
/* Start scheduler */
|
||||
vTaskStartScheduler();
|
||||
|
||||
/* Will not get here if the scheduler starts successfully. If you do end up
|
||||
here then there wasn't enough heap memory available to start either the idle
|
||||
task or the timer/daemon task. https://www.freertos.org/a00111.html */
|
||||
for( ;; );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvM4CoreTasks( void *pvParameters )
|
||||
{
|
||||
static const uint8_t pucTaskStartedMessage[] = "M4 task started.\r\n";
|
||||
BaseType_t xTaskNumber;
|
||||
size_t xReceivedBytes;
|
||||
uint32_t ulNextValue = 0;
|
||||
char cExpectedString[ 15 ];
|
||||
char cReceivedString[ 15 ];
|
||||
char cMessage;
|
||||
const TickType_t xShortBlockTime = pdMS_TO_TICKS( 5 );
|
||||
|
||||
/* This task is created more than once so the task's parameter is used to
|
||||
pass in a task number, which is then used as an index into the message
|
||||
buffer array. */
|
||||
xTaskNumber = ( BaseType_t ) pvParameters;
|
||||
configASSERT( xTaskNumber < mbaNUMBER_OF_CORE_2_TASKS );
|
||||
|
||||
vTaskSuspendAll();
|
||||
{
|
||||
/* Message transmitted to indicate the task has started. */
|
||||
HAL_UART_Transmit( &xUARTHandle, ( uint8_t * ) pucTaskStartedMessage, sizeof( pucTaskStartedMessage ), mainHAL_MAX_TIMEOUT );
|
||||
}
|
||||
xTaskResumeAll();
|
||||
|
||||
/* The tasks print out a letter to indicate that the expected message was
|
||||
received from the other core. */
|
||||
if( xTaskNumber == 0 )
|
||||
{
|
||||
cMessage = '0';
|
||||
}
|
||||
else
|
||||
{
|
||||
cMessage = '1';
|
||||
}
|
||||
|
||||
for( ;; )
|
||||
{
|
||||
/* The M7 core creates and sends to this core an ascii string of an
|
||||
incrementing number. Create the string that is expected to be received
|
||||
this time round the loop. */
|
||||
sprintf( cExpectedString, "%lu", ( unsigned long ) ulNextValue );
|
||||
|
||||
/* Wait to receive the next message from core 1. */
|
||||
memset( cReceivedString, 0x00, sizeof( cReceivedString ) );
|
||||
xReceivedBytes = xMessageBufferReceive( /* Handle of message buffer. */
|
||||
xDataMessageBuffers[ xTaskNumber ],
|
||||
/* Buffer into which received data is placed. */
|
||||
cReceivedString,
|
||||
/* Size of the receive buffer. */
|
||||
sizeof( cReceivedString ),
|
||||
/* Time to wait for data to arrive. */
|
||||
xShortBlockTime );
|
||||
|
||||
/* Check the number of bytes received was as expected. */
|
||||
configASSERT( xReceivedBytes == strlen( cExpectedString ) );
|
||||
|
||||
/* If the received string matches that expected then output the task
|
||||
number to give visible indication that the task is still running. */
|
||||
if( strcmp( cReceivedString, cExpectedString ) == 0 )
|
||||
{
|
||||
/* Also print out the task number to give a visual indication that
|
||||
the M4 core is receiving the expected data. */
|
||||
vTaskSuspendAll();
|
||||
{
|
||||
HAL_UART_Transmit( &xUARTHandle, ( uint8_t * ) &cMessage, sizeof( cMessage ), mainHAL_MAX_TIMEOUT );
|
||||
}
|
||||
xTaskResumeAll();
|
||||
}
|
||||
|
||||
/* Expect the next string in sequence the next time around. */
|
||||
ulNextValue++;
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vGenerateM4ToM7Interrupt( void * xUpdatedMessageBuffer )
|
||||
{
|
||||
MessageBufferHandle_t xUpdatedBuffer = ( MessageBufferHandle_t ) xUpdatedMessageBuffer;
|
||||
const char cMessage[] = "\r\nvGenerateM4ToM7Interrupt\r\n";
|
||||
|
||||
/* Called by the implementation of sbRECEIVE_COMPLETED() in FreeRTOSConfig.h.
|
||||
See the comments at the top of this file. Write the handle of the data
|
||||
message buffer to which data was written to the control message buffer. */
|
||||
#if 0
|
||||
if( xUpdatedBuffer != xControlMessageBuffer )
|
||||
{
|
||||
while( xMessageBufferSend( xControlMessageBuffer, &xUpdatedBuffer, sizeof( xUpdatedBuffer ), mbaDONT_BLOCK ) != sizeof( xUpdatedBuffer ) )
|
||||
{
|
||||
/* Nothing to do here. Note it is very bad to loop in an interrupt
|
||||
service routine. If a loop is really required then defer the
|
||||
routine to a task. */
|
||||
}
|
||||
|
||||
/* Generate interrupt in the M4 core. */
|
||||
HAL_EXTI_D1_EventInputConfig( EXTI_LINE0, EXTI_MODE_IT, DISABLE );
|
||||
HAL_EXTI_D2_EventInputConfig( EXTI_LINE0, EXTI_MODE_IT, ENABLE );
|
||||
HAL_EXTI_GenerateSWInterrupt( EXTI_LINE0 );
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Generate interrupt in the M7 core. */
|
||||
HAL_EXTI_D2_EventInputConfig( EXTI_LINE1, EXTI_MODE_IT, DISABLE );
|
||||
HAL_EXTI_D1_EventInputConfig( EXTI_LINE1, EXTI_MODE_IT, ENABLE );
|
||||
HAL_EXTI_GenerateSWInterrupt( EXTI_LINE1 );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void HAL_GPIO_EXTI_Callback( uint16_t GPIO_Pin )
|
||||
{
|
||||
MessageBufferHandle_t xUpdatedMessageBuffer;
|
||||
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
|
||||
|
||||
/* Avoid compiler warnings about unused parameters. */
|
||||
( void ) GPIO_Pin;
|
||||
|
||||
/* Clear interrupt. */
|
||||
HAL_EXTI_D2_ClearFlag( EXTI_LINE0 );
|
||||
|
||||
configASSERT( ( xControlMessageBuffer != NULL ) && ( xDataMessageBuffers[ 0 ] != NULL ) && ( xDataMessageBuffers[ 1 ] != NULL ) );
|
||||
|
||||
/* In this example there are mbaNUMBER_OF_CORE_2_TASKS receiving tasks that
|
||||
run on the M4 core. It would be possible for the M7 core to use a single
|
||||
message buffer to send to both tasks, but that would require additional data
|
||||
to be sent to the message buffer - namely an identifier to indicate which
|
||||
receiving task a message was intended for along with some arbitration in the
|
||||
ISR. As an alternative, this example uses one message buffer per receiving
|
||||
task and a control message buffer. The M7 core sends data to a receiving
|
||||
task using that task's dedicated message buffer, then sends the handle of
|
||||
the message buffer that it just sent data to to the control task. This
|
||||
interrupt service routine receives the handle from the control task then
|
||||
uses the handle to signal the message buffer that contains the data.
|
||||
|
||||
Receive the handle of the message buffer that contains data from the
|
||||
control message buffer. */
|
||||
while( xMessageBufferReceiveFromISR( xControlMessageBuffer,
|
||||
&xUpdatedMessageBuffer,
|
||||
sizeof( xUpdatedMessageBuffer ),
|
||||
&xHigherPriorityTaskWoken ) == sizeof( xUpdatedMessageBuffer ) )
|
||||
{
|
||||
/* Call the API function that sends a notification to any task that is
|
||||
blocked on the xUpdatedMessageBuffer message buffer waiting for data to
|
||||
arrive. */
|
||||
xMessageBufferSendCompletedFromISR( xUpdatedMessageBuffer, &xHigherPriorityTaskWoken );
|
||||
}
|
||||
|
||||
/* Normal FreeRTOS "yield from interrupt" semantics, where
|
||||
xHigherPriorityTaskWoken is initialzed to pdFALSE and will then get set to
|
||||
pdTRUE if the interrupt unblocks a task that has a priority above that of
|
||||
the currently executing task. */
|
||||
portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvWaitForOtherCoreToStart( uint32_t ulIndexToTest, uint32_t ulIndexToIncrement )
|
||||
{
|
||||
volatile uint32_t ulInitialCount = ulStartSyncCounters[ ulIndexToTest ];
|
||||
|
||||
/* When the cores boot they very crudely wait for each other in a non chip
|
||||
specific way by waiting for the other core to start incrementing a shared
|
||||
variable within an array. mainINDEX_TO_TEST sets the index within the array
|
||||
to the variable this core tests to see if it is incrementing, and
|
||||
mainINDEX_TO_INCREMENT sets the index within the array to the variable this
|
||||
core increments to indicate to the other core that it is at the sync point.
|
||||
Note this is not a foolproof method and it is better to use a hardware
|
||||
specific solution, such as having one core boot the other core when it was
|
||||
ready, or using some kind of shared semaphore or interrupt. */
|
||||
|
||||
for( ;; )
|
||||
{
|
||||
/* Indicate to the M7 core that this core is at the synchronisation
|
||||
point. */
|
||||
ulStartSyncCounters[ ulIndexToIncrement ]++;
|
||||
|
||||
/* Has the counter incremented by the other core changed? */
|
||||
if( ulStartSyncCounters[ ulIndexToTest ] != ulInitialCount )
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* One more increment before exiting to avoid race. */
|
||||
ulStartSyncCounters[ ulIndexToIncrement ]++;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vAssertCalled( const char *pcFile, const uint32_t ulLine )
|
||||
{
|
||||
char pcLine[ 10 ];
|
||||
const uint8_t pucM4AssertFile[] = "M4 Assert hit in file ";
|
||||
const uint8_t pucM4AssertLine[] = "on line number ";
|
||||
|
||||
/* Assert disables interrupts so no other code can run, prints out the
|
||||
location of the offending assert(), then loops doing nothing waiting for
|
||||
the user to inspect or reset. */
|
||||
taskDISABLE_INTERRUPTS();
|
||||
HAL_UART_Transmit( &xUARTHandle, ( uint8_t * ) pucM4AssertFile, sizeof( pucM4AssertFile ), mainHAL_MAX_TIMEOUT );
|
||||
HAL_UART_Transmit( &xUARTHandle, ( uint8_t * ) pcFile, strlen( pcFile ), mainHAL_MAX_TIMEOUT );
|
||||
HAL_UART_Transmit( &xUARTHandle, ( uint8_t * ) pucM4AssertLine, sizeof( pucM4AssertLine ), mainHAL_MAX_TIMEOUT );
|
||||
sprintf( pcLine, "%u\r\n", ulLine );
|
||||
HAL_UART_Transmit( &xUARTHandle, ( uint8_t * ) pcLine, strlen( pcLine ), mainHAL_MAX_TIMEOUT );
|
||||
for( ;; );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupHardware( void )
|
||||
{
|
||||
/* Prevent the HAL's initialisation of SysTick actually starting the systick
|
||||
interrupt as the kernel has not started yet. */
|
||||
taskDISABLE_INTERRUPTS();
|
||||
HAL_Init();
|
||||
BSP_LED_Init( LED2 );
|
||||
|
||||
/* This core uses the UART, so initialise it. */
|
||||
xUARTHandle.Instance = USART3;
|
||||
xUARTHandle.Init.BaudRate = 115200;
|
||||
xUARTHandle.Init.WordLength = UART_WORDLENGTH_8B;
|
||||
xUARTHandle.Init.StopBits = UART_STOPBITS_1;
|
||||
xUARTHandle.Init.Parity = UART_PARITY_NONE;
|
||||
xUARTHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||
xUARTHandle.Init.Mode = UART_MODE_TX_RX;
|
||||
xUARTHandle.Init.ClockPrescaler = UART_PRESCALER_DIV1;
|
||||
xUARTHandle.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||
xUARTHandle.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||
HAL_UART_Init( &xUARTHandle );
|
||||
HAL_UARTEx_SetRxFifoThreshold( &xUARTHandle, UART_RXFIFO_THRESHOLD_1_4 );
|
||||
HAL_UARTEx_EnableFifoMode( &xUARTHandle );
|
||||
|
||||
/* AIEC Common configuration: make CPU1 and CPU2 SWI line1 sensitive to
|
||||
rising edge. */
|
||||
HAL_EXTI_EdgeConfig( EXTI_LINE1, EXTI_RISING_EDGE );
|
||||
|
||||
/* Interrupt used for M7 to M4 notifications. */
|
||||
HAL_NVIC_SetPriority( EXTI0_IRQn, 0xFU, 0U );
|
||||
HAL_NVIC_EnableIRQ( EXTI0_IRQn );
|
||||
}
|
||||
@@ -0,0 +1,152 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file UART/UART_WakeUpFromStopUsingFIFO/CM7/Src/stm32h7xx_hal_msp.c
|
||||
* @author MCD Application Team
|
||||
* @brief HAL MSP module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2018 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7xx_hal.h"
|
||||
#include "stm32h745i_discovery.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* User can use this section to tailor USARTx/UARTx instance used and associated
|
||||
resources */
|
||||
#define USARTx USART3
|
||||
#define USARTx_CLK_ENABLE() __HAL_RCC_USART3_CLK_ENABLE()
|
||||
#define USARTx_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
||||
#define USARTx_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
||||
|
||||
#define RCC_PERIPHCLK_USARTx RCC_PERIPHCLK_USART3
|
||||
#define RCC_USARTxCLKSOURCE_HSI RCC_USART3CLKSOURCE_HSI
|
||||
|
||||
#define USARTx_FORCE_RESET() __HAL_RCC_USART3_FORCE_RESET()
|
||||
#define USARTx_RELEASE_RESET() __HAL_RCC_USART3_RELEASE_RESET()
|
||||
|
||||
#define USARTx_IRQn USART3_IRQn
|
||||
#define USARTx_IRQHandler USART3_IRQHandler
|
||||
|
||||
#define USARTx_TX_PIN GPIO_PIN_10
|
||||
#define USARTx_TX_GPIO_PORT GPIOB
|
||||
#define USARTx_TX_AF GPIO_AF7_USART3
|
||||
#define USARTx_RX_PIN GPIO_PIN_11
|
||||
#define USARTx_RX_GPIO_PORT GPIOB
|
||||
#define USARTx_RX_AF GPIO_AF7_USART3
|
||||
|
||||
|
||||
/** @addtogroup STM32H7xx_HAL_Examples
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_MSP
|
||||
* @brief HAL MSP module.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/** @defgroup HAL_MSP_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief UART MSP Initialization
|
||||
* This function configures the hardware resources used in this example:
|
||||
* - Peripheral's clock enable
|
||||
* - Peripheral's GPIO Configuration
|
||||
* @param huart: UART handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef *huart)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
|
||||
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit;
|
||||
|
||||
/*##-1- Enable peripherals and GPIO Clocks #################################*/
|
||||
/* Enable GPIO TX/RX clock */
|
||||
USARTx_TX_GPIO_CLK_ENABLE();
|
||||
USARTx_RX_GPIO_CLK_ENABLE();
|
||||
|
||||
/* Select HSI as source of USARTx clocks */
|
||||
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USARTx;
|
||||
RCC_PeriphClkInit.Usart234578ClockSelection = RCC_USARTxCLKSOURCE_HSI;
|
||||
HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit);
|
||||
|
||||
/* Enable USARTx clock */
|
||||
USARTx_CLK_ENABLE();
|
||||
|
||||
/*##-2- Configure peripheral GPIO ##########################################*/
|
||||
/* UART TX GPIO pin configuration */
|
||||
GPIO_InitStruct.Pin = USARTx_TX_PIN;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = USARTx_TX_AF;
|
||||
|
||||
HAL_GPIO_Init(USARTx_TX_GPIO_PORT, &GPIO_InitStruct);
|
||||
|
||||
/* UART RX GPIO pin configuration */
|
||||
GPIO_InitStruct.Pin = USARTx_RX_PIN;
|
||||
GPIO_InitStruct.Alternate = USARTx_RX_AF;
|
||||
|
||||
HAL_GPIO_Init(USARTx_RX_GPIO_PORT, &GPIO_InitStruct);
|
||||
|
||||
/* NVIC for USART */
|
||||
HAL_NVIC_SetPriority(USARTx_IRQn, 0, 1);
|
||||
HAL_NVIC_EnableIRQ(USARTx_IRQn);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP De-Initialization
|
||||
* This function frees the hardware resources used in this example:
|
||||
* - Disable the Peripheral's clock
|
||||
* - Revert GPIO and NVIC configuration to their default state
|
||||
* @param huart: UART handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/*##-1- Reset peripherals ##################################################*/
|
||||
USARTx_FORCE_RESET();
|
||||
USARTx_RELEASE_RESET();
|
||||
|
||||
/*##-2- Disable peripherals and GPIO Clocks ################################*/
|
||||
/* Configure UART Tx as alternate function */
|
||||
HAL_GPIO_DeInit(USARTx_TX_GPIO_PORT, USARTx_TX_PIN);
|
||||
/* Configure UART Rx as alternate function */
|
||||
HAL_GPIO_DeInit(USARTx_RX_GPIO_PORT, USARTx_RX_PIN);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,148 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file FreeRTOS/FreeRTOS_AMP_Dual_RTOS/CM4/Src/stm32h7xx_it.c
|
||||
* @author MCD Application Team
|
||||
* @brief Main Interrupt Service Routines for Cortex-M4.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7xx_it.h"
|
||||
#include "stm32h7xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32H7xx_HAL_Examples
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup GPIO_IOToggle
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M4 Processor Exceptions Handlers */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles NMI exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Hard Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory Manage exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Memory Manage exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Bus Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Bus Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Usage Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Usage Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug Monitor exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32H7xx Peripherals Interrupt Handlers */
|
||||
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
|
||||
/* available peripheral interrupt handler's name please refer to the startup */
|
||||
/* file (startup_stm32h7xx.s). */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @brief This function handles EXTI0 interrupt request.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void EXTI0_IRQHandler( void )
|
||||
{
|
||||
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles PPP interrupt request.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
/*void PPP_IRQHandler(void)
|
||||
{
|
||||
}*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,136 @@
|
||||
/*
|
||||
* FreeRTOS Kernel V10.0.1
|
||||
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||
*
|
||||
* See http://www.freertos.org/a00110.html.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/* Ensure stdint is only used by the compiler, and not the assembler. */
|
||||
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
|
||||
#include <stdint.h>
|
||||
extern uint32_t SystemCoreClock;
|
||||
void vGenerateM7ToM4Interrupt( void * xUpdatedMessageBuffer );
|
||||
#endif
|
||||
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configCPU_CLOCK_HZ ( SystemCoreClock )
|
||||
#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
|
||||
#define configMAX_PRIORITIES ( 7 )
|
||||
#define configMINIMAL_STACK_SIZE ( ( uint16_t ) 128 )
|
||||
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 20 * 1024 ) )
|
||||
#define configMAX_TASK_NAME_LEN ( 16 )
|
||||
#define configUSE_TRACE_FACILITY 1
|
||||
#define configUSE_16_BIT_TICKS 0
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configQUEUE_REGISTRY_SIZE 8
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 0
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_MALLOC_FAILED_HOOK 0
|
||||
#define configUSE_APPLICATION_TASK_TAG 0
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
|
||||
#define configSUPPORT_STATIC_ALLOCATION 1
|
||||
/* Co-routine definitions. */
|
||||
#define configUSE_CO_ROUTINES 0
|
||||
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
|
||||
|
||||
/* Software timer definitions. */
|
||||
#define configUSE_TIMERS 0
|
||||
#define configTIMER_TASK_PRIORITY ( 2 )
|
||||
#define configTIMER_QUEUE_LENGTH 10
|
||||
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 )
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
to exclude the API function. */
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 1
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_xQueueGetMutexHolder 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 1
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
|
||||
/* Cortex-M specific definitions. */
|
||||
#ifdef __NVIC_PRIO_BITS
|
||||
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
|
||||
#define configPRIO_BITS __NVIC_PRIO_BITS
|
||||
#else
|
||||
#define configPRIO_BITS 4 /* 15 priority levels */
|
||||
#endif
|
||||
|
||||
/* The lowest interrupt priority that can be used in a call to a "set priority"
|
||||
function. */
|
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0xf
|
||||
|
||||
/* The highest interrupt priority that can be used by any interrupt service
|
||||
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
|
||||
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
|
||||
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
|
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
|
||||
|
||||
/* Interrupt priorities used by the kernel port layer itself. These are generic
|
||||
to all Cortex-M ports, and do not rely on any particular library functions. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
|
||||
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
|
||||
/* Normal assert() semantics without relying on the provision of an assert.h
|
||||
header file. */
|
||||
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
|
||||
|
||||
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
|
||||
standard names. */
|
||||
#define vPortSVCHandler SVC_Handler
|
||||
#define xPortPendSVHandler PendSV_Handler
|
||||
#define xPortSysTickHandler SysTick_Handler
|
||||
|
||||
/* Override the default implementation of sbSEND_COMPLETED so the macro creates
|
||||
an interrupt in the M4 core. See the comments at the top of main.c. */
|
||||
#define sbSEND_COMPLETED( pxStreamBuffer ) vGenerateM7ToM4Interrupt( pxStreamBuffer )
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
|
||||
+422
@@ -0,0 +1,422 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file FreeRTOS/FreeRTOS_HwSemaphoreCoreSync/CM7/Inc/stm32h7xx_hal_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief HAL configuration file for Cortex-M7.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32H7xx_HAL_CONF_H
|
||||
#define __STM32H7xx_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
#define HAL_MODULE_ENABLED
|
||||
/* #define HAL_ADC_MODULE_ENABLED */
|
||||
/* #define HAL_CEC_MODULE_ENABLED */
|
||||
/* #define HAL_COMP_MODULE_ENABLED */
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
/* #define HAL_CRC_MODULE_ENABLED */
|
||||
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||
/* #define HAL_DAC_MODULE_ENABLED */
|
||||
/* #define HAL_DCMI_MODULE_ENABLED */
|
||||
/* #define HAL_DFSDM_MODULE_ENABLED */
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||
/* #define HAL_ETH_MODULE_ENABLED */
|
||||
/* #define HAL_EXTI_MODULE_ENABLED */
|
||||
/* #define HAL_FDCAN_MODULE_ENABLED */
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
/* #define HAL_HASH_MODULE_ENABLED */
|
||||
/* #define HAL_HCD_MODULE_ENABLED */
|
||||
/* #define HAL_HRTIM_MODULE_ENABLED */
|
||||
#define HAL_HSEM_MODULE_ENABLED
|
||||
#define HAL_I2C_MODULE_ENABLED
|
||||
/* #define HAL_I2S_MODULE_ENABLED */
|
||||
/* #define HAL_IRDA_MODULE_ENABLED */
|
||||
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||
/* #define HAL_JPEG_MODULE_ENABLED */
|
||||
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||
/* #define HAL_LTDC_MODULE_ENABLED */
|
||||
/* #define HAL_MDIOS_MODULE_ENABLED */
|
||||
/* #define HAL_MDMA_MODULE_ENABLED */
|
||||
/* #define HAL_MMC_MODULE_ENABLED */
|
||||
/* #define HAL_NAND_MODULE_ENABLED */
|
||||
/* #define HAL_NOR_MODULE_ENABLED */
|
||||
/* #define HAL_OPAMP_MODULE_ENABLED */
|
||||
/* #define HAL_PCD_MODULE_ENABLED */
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||
/* #define HAL_RAMECC_MODULE_ENABLED */
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
/* #define HAL_RNG_MODULE_ENABLED */
|
||||
/* #define HAL_RTC_MODULE_ENABLED */
|
||||
/* #define HAL_SAI_MODULE_ENABLED */
|
||||
/* #define HAL_SD_MODULE_ENABLED */
|
||||
/* #define HAL_SDRAM_MODULE_ENABLED */
|
||||
/* #define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/* #define HAL_SMBUS_MODULE_ENABLED */
|
||||
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
||||
/* #define HAL_SPI_MODULE_ENABLED */
|
||||
/* #define HAL_SRAM_MODULE_ENABLED */
|
||||
/* #define HAL_SWPMI_MODULE_ENABLED */
|
||||
#define HAL_TIM_MODULE_ENABLED
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
/* #define HAL_USART_MODULE_ENABLED */
|
||||
/* #define HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
/* ########################## Oscillator Values adaptation ####################*/
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal oscillator (CSI) default value.
|
||||
* This value is the default CSI value after Reset.
|
||||
*/
|
||||
#if !defined (CSI_VALUE)
|
||||
#define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* CSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature.*/
|
||||
|
||||
/**
|
||||
* @brief External clock source for I2S peripheral
|
||||
* This value is used by the I2S HAL module to compute the I2S clock source
|
||||
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External clock in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY ((uint32_t)0x0F) /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0
|
||||
#define USE_SD_TRANSCEIVER 1U /*!< use uSD Transceiver */
|
||||
|
||||
/* ########################### Ethernet Configuration ######################### */
|
||||
#define ETH_TX_DESC_CNT 4 /* number of Ethernet Tx DMA descriptors */
|
||||
#define ETH_RX_DESC_CNT 4 /* number of Ethernet Rx DMA descriptors */
|
||||
|
||||
#define ETH_MAC_ADDR0 ((uint8_t)0x02)
|
||||
#define ETH_MAC_ADDR1 ((uint8_t)0x00)
|
||||
#define ETH_MAC_ADDR2 ((uint8_t)0x00)
|
||||
#define ETH_MAC_ADDR3 ((uint8_t)0x00)
|
||||
#define ETH_MAC_ADDR4 ((uint8_t)0x00)
|
||||
#define ETH_MAC_ADDR5 ((uint8_t)0x00)
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1 */
|
||||
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MDMA_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_mdma.h"
|
||||
#endif /* HAL_MDMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HASH_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_hash.h"
|
||||
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dcmi.h"
|
||||
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dma2d.h"
|
||||
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DFSDM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dfsdm.h"
|
||||
#endif /* HAL_DFSDM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_fdcan.h"
|
||||
#endif /* HAL_FDCAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_cec.h"
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_COMP_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_comp.h"
|
||||
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HRTIM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_hrtim.h"
|
||||
#endif /* HAL_HRTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HSEM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_hsem.h"
|
||||
#endif /* HAL_HSEM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_JPEG_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_jpeg.h"
|
||||
#endif /* HAL_JPEG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MDIOS_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_mdios.h"
|
||||
#endif /* HAL_MDIOS_MODULE_ENABLED */
|
||||
|
||||
|
||||
#ifdef HAL_MMC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_mmc.h"
|
||||
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_lptim.h"
|
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_ltdc.h"
|
||||
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_OPAMP_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_opamp.h"
|
||||
#endif /* HAL_OPAMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_qspi.h"
|
||||
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RAMECC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_ramecc.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SDRAM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_sdram.h"
|
||||
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPDIFRX_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_spdifrx.h"
|
||||
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SWPMI_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_swpmi.h"
|
||||
#endif /* HAL_SWPMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_smbus.h"
|
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t *file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32H7xx_HAL_CONF_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,51 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file FreeRTOS/FreeRTOS_AMP_Dual_RTOS/CM7/Inc/stm32h7xx_it.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the headers of the interrupt handlers for Cortex-M7.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32H7xx_IT_H
|
||||
#define __STM32H7xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
void EXTI1_IRQHandler(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32H7xx_IT_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
+152
@@ -0,0 +1,152 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file FreeRTOS/FreeRTOS_AMP_Dual_RTOS/CM7/Src/stm32h7xx_hal_timebase_tim.c
|
||||
* @author MCD Application Team
|
||||
* @brief HAL time base based on the hardware TIM.
|
||||
*
|
||||
* This file overrides the native HAL time base functions (defined as weak)
|
||||
* the TIM time base:
|
||||
* + Intializes the TIM peripheral generate a Period elapsed Event each 1ms
|
||||
* + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7xx_hal.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
TIM_HandleTypeDef TimHandle;
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
void TIM6_DAC_IRQHandler(void);
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief This function configures the TIM6 as a time base source.
|
||||
* The time source is configured to have 1ms time base with a dedicated
|
||||
* Tick interrupt priority.
|
||||
* @note This function is called automatically at the beginning of program after
|
||||
* reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
|
||||
* @param TickPriority: Tick interrupt priority.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority)
|
||||
{
|
||||
RCC_ClkInitTypeDef clkconfig;
|
||||
uint32_t uwTimclock, uwAPB1Prescaler = 0U;
|
||||
uint32_t uwPrescalerValue = 0U;
|
||||
uint32_t pFLatency;
|
||||
|
||||
/*Configure the TIM6 IRQ priority */
|
||||
HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority ,0U);
|
||||
|
||||
/* Enable the TIM6 global Interrupt */
|
||||
HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
|
||||
|
||||
/* Enable TIM6 clock */
|
||||
__HAL_RCC_TIM6_CLK_ENABLE();
|
||||
|
||||
/* Get clock configuration */
|
||||
HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
|
||||
|
||||
/* Get APB1 prescaler */
|
||||
uwAPB1Prescaler = clkconfig.APB1CLKDivider;
|
||||
|
||||
/* Compute TIM6 clock */
|
||||
if (uwAPB1Prescaler == RCC_HCLK_DIV1)
|
||||
{
|
||||
uwTimclock = HAL_RCC_GetPCLK1Freq();
|
||||
}
|
||||
else
|
||||
{
|
||||
uwTimclock = 2*HAL_RCC_GetPCLK1Freq();
|
||||
}
|
||||
|
||||
/* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
|
||||
uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
|
||||
|
||||
/* Initialize TIM6 */
|
||||
TimHandle.Instance = TIM6;
|
||||
|
||||
/* Initialize TIMx peripheral as follow:
|
||||
+ Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
|
||||
+ Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
|
||||
+ ClockDivision = 0
|
||||
+ Counter direction = Up
|
||||
*/
|
||||
TimHandle.Init.Period = (1000000U / 1000U) - 1U;
|
||||
TimHandle.Init.Prescaler = uwPrescalerValue;
|
||||
TimHandle.Init.ClockDivision = 0;
|
||||
TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
if(HAL_TIM_Base_Init(&TimHandle) == HAL_OK)
|
||||
{
|
||||
/* Start the TIM time Base generation in interrupt mode */
|
||||
return HAL_TIM_Base_Start_IT(&TimHandle);
|
||||
}
|
||||
|
||||
/* Return function status */
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Suspend Tick increment.
|
||||
* @note Disable the tick increment by disabling TIM6 update interrupt.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SuspendTick(void)
|
||||
{
|
||||
/* Disable TIM6 update Interrupt */
|
||||
__HAL_TIM_DISABLE_IT(&TimHandle, TIM_IT_UPDATE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Resume Tick increment.
|
||||
* @note Enable the tick increment by Enabling TIM6 update interrupt.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_ResumeTick(void)
|
||||
{
|
||||
/* Enable TIM6 Update interrupt */
|
||||
__HAL_TIM_ENABLE_IT(&TimHandle, TIM_IT_UPDATE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Period elapsed callback in non blocking mode
|
||||
* @note This function is called when TIM6 interrupt took place, inside
|
||||
* HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
|
||||
* a global variable "uwTick" used as application time base.
|
||||
* @param htim : TIM handle
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
|
||||
{
|
||||
HAL_IncTick();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles TIM interrupt request.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void TIM6_DAC_IRQHandler(void)
|
||||
{
|
||||
HAL_TIM_IRQHandler(&TimHandle);
|
||||
}
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,119 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file FreeRTOS/FreeRTOS_AMP_Dual_RTOS/CM7/Src/stm32h7xx_it.c
|
||||
* @author MCD Application Team
|
||||
* @brief Main Interrupt Service Routines.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7xx_it.h"
|
||||
#include "stm32h7xx_hal.h"
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M7 Processor Exceptions Handlers */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles NMI exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Hard Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory Manage exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Memory Manage exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Bus Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Bus Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Usage Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Usage Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug Monitor exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32H7xx Peripherals Interrupt Handlers */
|
||||
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
|
||||
/* available peripheral interrupt handler's name please refer to the startup */
|
||||
/* file (startup_stm32h7xx.s). */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @brief This function handles EXTI0 interrupt request.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void EXTI1_IRQHandler( void )
|
||||
{
|
||||
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
|
||||
}
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,69 @@
|
||||
/*
|
||||
* FreeRTOS Kernel V10.0.0
|
||||
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software. If you wish to use our Amazon
|
||||
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef MESSAGE_BUFFER_AMP_H
|
||||
#define MESSAGE_BUFFER_AMP_H
|
||||
|
||||
/* Enough four 4 8 byte strings, plus the additional 4 bytes per message
|
||||
overhead of message buffers. */
|
||||
#define mbaTASK_MESSAGE_BUFFER_SIZE ( 60 )
|
||||
|
||||
#define mbaCONTROL_MESSAGE_BUFFER_SIZE ( 24 )
|
||||
|
||||
/* The number of instances of prvM4CoreTasks that are created. */
|
||||
#define mbaNUMBER_OF_CORE_2_TASKS 2
|
||||
|
||||
/* A block time of 0 simply means, don't block. */
|
||||
#define mbaDONT_BLOCK 0
|
||||
|
||||
/* Place the message buffers at a fixed location so it is the same for both
|
||||
cores. */
|
||||
#pragma location = 0x38000000
|
||||
MessageBufferHandle_t xControlMessageBuffer;
|
||||
|
||||
#pragma location = 0x38000004
|
||||
MessageBufferHandle_t xDataMessageBuffers[ mbaNUMBER_OF_CORE_2_TASKS ];
|
||||
|
||||
#pragma location = 0x3800000c
|
||||
static volatile uint32_t ulStartSyncCounters[ mbaNUMBER_OF_CORE_2_TASKS ];
|
||||
|
||||
|
||||
/* The variable used to hold the stream buffer structure.*/
|
||||
#pragma location = 0x38000050
|
||||
StaticStreamBuffer_t xControlMessageBufferStruct;
|
||||
#pragma location = 0x380000A0
|
||||
StaticStreamBuffer_t xDataMessageBufferStructs[mbaNUMBER_OF_CORE_2_TASKS];
|
||||
/* Used to dimension the array used to hold the streams.*/
|
||||
/* Defines the memory that will actually hold the streams within the stream buffer.*/
|
||||
#pragma location = 0x38000100
|
||||
static uint8_t ucControlBufferStorage[ mbaCONTROL_MESSAGE_BUFFER_SIZE ];
|
||||
#pragma location = 0x38000200
|
||||
static uint8_t ucDataBufferStorage[mbaNUMBER_OF_CORE_2_TASKS][ mbaTASK_MESSAGE_BUFFER_SIZE ];
|
||||
|
||||
|
||||
#endif /* MESSAGE_BUFFER_AMP_H */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,7 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\Project.ewp</path>
|
||||
</project>
|
||||
<batchBuild />
|
||||
</workspace>
|
||||
+55
@@ -0,0 +1,55 @@
|
||||
<!DOCTYPE html>
|
||||
<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
|
||||
<head>
|
||||
<meta charset="utf-8" />
|
||||
<meta name="generator" content="pandoc" />
|
||||
<meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
|
||||
<title>Release Notes for STM32H745I-DISCO BSP Driver</title>
|
||||
<style type="text/css">
|
||||
code{white-space: pre-wrap;}
|
||||
span.smallcaps{font-variant: small-caps;}
|
||||
span.underline{text-decoration: underline;}
|
||||
div.column{display: inline-block; vertical-align: top; width: 50%;}
|
||||
</style>
|
||||
<link rel="stylesheet" href="../../../_htmresc/mini-st.css" />
|
||||
<!--[if lt IE 9]>
|
||||
<script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
|
||||
<![endif]-->
|
||||
</head>
|
||||
<body>
|
||||
<div class="row">
|
||||
<div class="col-sm-12 col-lg-4">
|
||||
<div class="card fluid">
|
||||
<div class="sectione dark">
|
||||
<center>
|
||||
<h1 id="release-notes-for-stm32h745i-disco-bsp-driver"><strong>Release Notes for STM32H745I-DISCO BSP Driver</strong></h1>
|
||||
<p>Copyright © 2019 STMicroelectronics<br />
|
||||
</p>
|
||||
<a href="https://www.st.com" class="logo"><img src="../../../_htmresc/st_logo.png" alt="ST logo" /></a>
|
||||
</center>
|
||||
</div>
|
||||
</div>
|
||||
<h1 id="license"><strong>License</strong></h1>
|
||||
This software component is licensed by ST under BSD 3-Clause license, the “License”; You may not use this component except in compliance with the License. You may obtain a copy of the License at:
|
||||
<center>
|
||||
<a href="https://opensource.org/licenses/BSD-3-Clause">https://opensource.org/licenses/BSD-3-Clause</a>
|
||||
</center>
|
||||
</div>
|
||||
<div class="col-sm-12 col-lg-8">
|
||||
<h1 id="update-history"><strong>Update History</strong></h1>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section1" checked aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 05-April-2019</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes">Main Changes</h2>
|
||||
<ul>
|
||||
<li>First official release</li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
</div>
|
||||
</div>
|
||||
<footer class="sticky">
|
||||
For complete documentation on STM32 Microcontrollers </mark> , visit: <span style="font-color: blue;"><a href="http://www.st.com/stm32">www.st.com/stm32</a></span>
|
||||
</footer>
|
||||
</body>
|
||||
</html>
|
||||
+649
File diff suppressed because it is too large
Load Diff
+224
@@ -0,0 +1,224 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h745i_discovery.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains definitions for STM32H745I-Discovery LEDs,
|
||||
* push-buttons hardware resources.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32H745I_DISCOVERY_H
|
||||
#define __STM32H745I_DISCOVERY_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7xx_hal.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_LOW_LEVEL STM32H745I_DISCOVERY_LOW_LEVEL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_LOW_LEVEL_Exported_Types Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
LED1 = 0,
|
||||
LED_GREEN = LED1,
|
||||
LED2 = 1,
|
||||
LED_RED = LED2,
|
||||
} Led_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
BUTTON_WAKEUP = 0,
|
||||
} Button_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
BUTTON_MODE_GPIO = 0,
|
||||
BUTTON_MODE_EXTI = 1
|
||||
} ButtonMode_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
PB_SET = 0,
|
||||
PB_RESET = !PB_SET
|
||||
} ButtonValue_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DISCO_OK = 0,
|
||||
DISCO_ERROR = 1
|
||||
} DISCO_Status_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_LOW_LEVEL_Exported_Constants Exported Constants
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Define for STM32H745I_DISCOVERY board
|
||||
*/
|
||||
#if !defined (USE_STM32H745I_DISCO)
|
||||
#define USE_STM32H745I_DISCO
|
||||
#endif
|
||||
|
||||
#define BUTTON_USER BUTTON_WAKEUP
|
||||
|
||||
#define LEDn ((uint32_t)2)
|
||||
|
||||
#define LED1_GPIO_PORT GPIOJ
|
||||
#define LED1_PIN GPIO_PIN_2
|
||||
#define LED2_GPIO_PORT GPIOI
|
||||
#define LED2_PIN GPIO_PIN_13
|
||||
#define LEDx_GPIO_CLK_ENABLE() __HAL_RCC_GPIOI_CLK_ENABLE();__HAL_RCC_GPIOJ_CLK_ENABLE()
|
||||
#define LEDx_GPIO_CLK_DISABLE() __HAL_RCC_GPIOI_CLK_DISABLE();__HAL_RCC_GPIOJ_CLK_DISABLE()
|
||||
|
||||
/**
|
||||
* @brief Definition for LCD Timer used to control the Brightnes
|
||||
*/
|
||||
#define LCD_TIMx TIM8
|
||||
#define LCD_TIMx_CLK_ENABLE() __HAL_RCC_TIM8_CLK_ENABLE()
|
||||
#define LCD_TIMx_CLK_DISABLE() __HAL_RCC_TIM8_CLK_DISABLE()
|
||||
#define LCD_TIMx_CHANNEL TIM_CHANNEL_3
|
||||
#define LCD_TIMx_CHANNEL_AF GPIO_AF3_TIM8
|
||||
#define LCD_TIMX_PERIOD_VALUE ((uint32_t)50000) /* Period Value */
|
||||
#define LCD_TIMX_PRESCALER_VALUE ((uint32_t)4) /* Prescaler Value */
|
||||
|
||||
|
||||
/* Only one User/Wakeup button */
|
||||
#define BUTTONn ((uint8_t)1)
|
||||
|
||||
/**
|
||||
* @brief Wakeup push-button
|
||||
*/
|
||||
#define WAKEUP_BUTTON_PIN GPIO_PIN_13
|
||||
#define WAKEUP_BUTTON_GPIO_PORT GPIOC
|
||||
#define WAKEUP_BUTTON_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
|
||||
#define WAKEUP_BUTTON_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
|
||||
#define WAKEUP_BUTTON_EXTI_IRQn EXTI15_10_IRQn
|
||||
|
||||
/* Define the USER button as an alias of the Wakeup button */
|
||||
#define USER_BUTTON_PIN WAKEUP_BUTTON_PIN
|
||||
#define USER_BUTTON_GPIO_PORT WAKEUP_BUTTON_GPIO_PORT
|
||||
#define USER_BUTTON_GPIO_CLK_ENABLE() WAKEUP_BUTTON_GPIO_CLK_ENABLE()
|
||||
#define USER_BUTTON_GPIO_CLK_DISABLE() WAKEUP_BUTTON_GPIO_CLK_DISABLE()
|
||||
#define USER_BUTTON_EXTI_IRQn WAKEUP_BUTTON_EXTI_IRQn
|
||||
|
||||
#define BUTTON_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
|
||||
|
||||
/**
|
||||
* @brief TS_INT signal from TouchScreen when it is configured in interrupt mode
|
||||
*/
|
||||
#define TS_INT_PIN ((uint32_t)GPIO_PIN_2)
|
||||
#define TS_INT_GPIO_PORT ((GPIO_TypeDef*)GPIOG)
|
||||
#define TS_INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
|
||||
#define TS_INT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOG_CLK_DISABLE()
|
||||
#define TS_INT_EXTI_IRQn EXTI2_IRQn
|
||||
|
||||
/**
|
||||
* @brief TouchScreen FT5336 Slave I2C address
|
||||
*/
|
||||
#define TS_I2C_ADDRESS ((uint16_t)0x70)
|
||||
|
||||
/**
|
||||
* @brief Audio I2C Slave address
|
||||
*/
|
||||
#define AUDIO_I2C_ADDRESS ((uint16_t)0x34)
|
||||
|
||||
/**
|
||||
* @brief User can use this section to tailor I2C4/I2C4 instance used and associated
|
||||
* resources (audio codec).
|
||||
* Definition for I2C4 clock resources
|
||||
*/
|
||||
#define DISCOVERY_I2Cx I2C4
|
||||
#define DISCOVERY_I2Cx_CLK_ENABLE() __HAL_RCC_I2C4_CLK_ENABLE()
|
||||
#define DISCOVERY_I2Cx_SCL_SDA_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
|
||||
|
||||
#define DISCOVERY_I2Cx_FORCE_RESET() __HAL_RCC_I2C4_FORCE_RESET()
|
||||
#define DISCOVERY_I2Cx_RELEASE_RESET() __HAL_RCC_I2C4_RELEASE_RESET()
|
||||
|
||||
/** @brief Definition for I2C4 Pins
|
||||
*/
|
||||
#define DISCOVERY_I2Cx_SCL_PIN GPIO_PIN_12 /*!< PD12 */
|
||||
#define DISCOVERY_I2Cx_SDA_PIN GPIO_PIN_13 /*!< PD13 */
|
||||
#define DISCOVERY_I2Cx_SCL_SDA_AF GPIO_AF4_I2C4
|
||||
#define DISCOVERY_I2Cx_SCL_SDA_GPIO_PORT GPIOD
|
||||
/** @brief Definition of I2C4 interrupt requests
|
||||
*/
|
||||
#define DISCOVERY_I2Cx_EV_IRQn I2C4_EV_IRQn
|
||||
#define DISCOVERY_I2Cx_ER_IRQn I2C4_ER_IRQn
|
||||
|
||||
/* I2C TIMING Register define when I2C clock source is SYSCLK */
|
||||
/* I2C TIMING is calculated from APB1 source clock = 200 MHz */
|
||||
/* 0x40912732 takes in account the big rising and aims a clock of 100khz */
|
||||
#ifndef DISCOVERY_I2Cx_TIMING
|
||||
#define DISCOVERY_I2Cx_TIMING ((uint32_t)0x40912732)
|
||||
#endif /* DISCOVERY_I2Cx_TIMING */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_LOW_LEVEL_Exported_Functions Exported Functions
|
||||
* @{
|
||||
*/
|
||||
uint32_t BSP_GetVersion(void);
|
||||
void BSP_LED_Init(Led_TypeDef Led);
|
||||
void BSP_LED_DeInit(Led_TypeDef Led);
|
||||
void BSP_LED_On(Led_TypeDef Led);
|
||||
void BSP_LED_Off(Led_TypeDef Led);
|
||||
void BSP_LED_Toggle(Led_TypeDef Led);
|
||||
void BSP_PB_Init(Button_TypeDef Button, ButtonMode_TypeDef Button_Mode);
|
||||
void BSP_PB_DeInit(Button_TypeDef Button);
|
||||
uint32_t BSP_PB_GetState(Button_TypeDef Button);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32H745I_DISCOVERY_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+1602
File diff suppressed because it is too large
Load Diff
+332
@@ -0,0 +1,332 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h745i_discovery_audio.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32h745i_discovery_audio.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32H745I_DISCOVERY_AUDIO_H
|
||||
#define __STM32H745I_DISCOVERY_AUDIO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Include audio component Driver */
|
||||
#include "../Components/wm8994/wm8994.h"
|
||||
#include "stm32h745i_discovery.h"
|
||||
#include <stdlib.h>
|
||||
/* Include PDM to PCM lib header file */
|
||||
#include "pdm2pcm_glo.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY_AUDIO
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_AUDIO_Exported_Types Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Frequency; /* Record Frequency */
|
||||
uint32_t BitResolution; /* Record bit resolution */
|
||||
uint32_t ChannelNbr; /* Record Channel Number */
|
||||
uint16_t *pRecBuf; /* Pointer to record user buffer */
|
||||
uint32_t RecSize; /* Size to record in mono, double size to record in stereo */
|
||||
uint32_t InputDevice; /* Audio Input Device */
|
||||
uint32_t Interface; /* Audio Input Interface */
|
||||
uint32_t MultiBuffMode; /* Multi buffer mode selection */
|
||||
}AUDIOIN_ContextTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_AUDIO_Exported_Constants Exported Constants
|
||||
* @{
|
||||
*/
|
||||
#define BSP_AUDIO_FREQUENCY_96K SAI_AUDIO_FREQUENCY_96K
|
||||
#define BSP_AUDIO_FREQUENCY_48K SAI_AUDIO_FREQUENCY_48K
|
||||
#define BSP_AUDIO_FREQUENCY_44K SAI_AUDIO_FREQUENCY_44K
|
||||
#define BSP_AUDIO_FREQUENCY_32K SAI_AUDIO_FREQUENCY_32K
|
||||
#define BSP_AUDIO_FREQUENCY_22K SAI_AUDIO_FREQUENCY_22K
|
||||
#define BSP_AUDIO_FREQUENCY_16K SAI_AUDIO_FREQUENCY_16K
|
||||
#define BSP_AUDIO_FREQUENCY_11K SAI_AUDIO_FREQUENCY_11K
|
||||
#define BSP_AUDIO_FREQUENCY_8K SAI_AUDIO_FREQUENCY_8K
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
USER SAI defines parameters
|
||||
-----------------------------------------------------------------------------*/
|
||||
/** In W8994 codec the Audio frame contains 4 slots : TDM Mode
|
||||
* TDM format :
|
||||
* +------------------|------------------|--------------------|-------------------+
|
||||
* | CODEC_SLOT0 Left | CODEC_SLOT1 Left | CODEC_SLOT0 Right | CODEC_SLOT1 Right |
|
||||
* +------------------------------------------------------------------------------+
|
||||
*/
|
||||
/* To have 2 separate audio stream in Both headphone and speaker the 4 slot must be activated */
|
||||
#define CODEC_AUDIOFRAME_SLOT_0123 SAI_SLOTACTIVE_0 | SAI_SLOTACTIVE_1 | SAI_SLOTACTIVE_2 | SAI_SLOTACTIVE_3
|
||||
|
||||
/* To have an audio stream in headphone only SAI Slot 0 and Slot 2 must be activated */
|
||||
#define CODEC_AUDIOFRAME_SLOT_02 SAI_SLOTACTIVE_0 | SAI_SLOTACTIVE_2
|
||||
/* To have an audio stream in speaker only SAI Slot 1 and Slot 3 must be activated */
|
||||
#define CODEC_AUDIOFRAME_SLOT_13 SAI_SLOTACTIVE_1 | SAI_SLOTACTIVE_3
|
||||
/* To have an audio stream in SAI PDM input Slot 0 must be activated */
|
||||
#define CODEC_AUDIOFRAME_SLOT_0 SAI_SLOTACTIVE_0
|
||||
/* To have an audio stream in SAI PDM input Slot 1 must be activated */
|
||||
#define CODEC_AUDIOFRAME_SLOT_1 SAI_SLOTACTIVE_1
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
AUDIO OUT CONFIGURATION
|
||||
------------------------------------------------------------------------------*/
|
||||
/* SAI peripheral configuration defines */
|
||||
#define AUDIO_OUT_SAIx SAI2_Block_A
|
||||
#define AUDIO_OUT_SAIx_CLK_ENABLE() __HAL_RCC_SAI2_CLK_ENABLE()
|
||||
#define AUDIO_OUT_SAIx_CLK_DISABLE() __HAL_RCC_SAI2_CLK_DISABLE()
|
||||
#define AUDIO_OUT_SAIx_AF GPIO_AF10_SAI2
|
||||
|
||||
#define AUDIO_OUT_SAIx_MCLK_ENABLE() __HAL_RCC_GPIOI_CLK_ENABLE()
|
||||
#define AUDIO_OUT_SAIx_MCLK_GPIO_PORT GPIOI
|
||||
#define AUDIO_OUT_SAIx_MCLK_PIN GPIO_PIN_4
|
||||
#define AUDIO_OUT_SAIx_SD_FS_CLK_ENABLE() __HAL_RCC_GPIOI_CLK_ENABLE()
|
||||
#define AUDIO_OUT_SAIx_SD_FS_SCK_GPIO_PORT GPIOI
|
||||
#define AUDIO_OUT_SAIx_FS_PIN GPIO_PIN_7
|
||||
#define AUDIO_OUT_SAIx_SCK_PIN GPIO_PIN_5
|
||||
#define AUDIO_OUT_SAIx_SD_PIN GPIO_PIN_6
|
||||
|
||||
/* SAI DMA Stream definitions */
|
||||
#define AUDIO_OUT_SAIx_DMAx_CLK_ENABLE() __HAL_RCC_DMA2_CLK_ENABLE()
|
||||
#define AUDIO_OUT_SAIx_DMAx_STREAM DMA2_Stream1
|
||||
#define AUDIO_OUT_SAIx_DMAx_REQUEST DMA_REQUEST_SAI2_A
|
||||
#define AUDIO_OUT_SAIx_DMAx_IRQ DMA2_Stream1_IRQn
|
||||
#define AUDIO_OUT_SAIx_DMAx_PERIPH_DATA_SIZE DMA_PDATAALIGN_HALFWORD
|
||||
#define AUDIO_OUT_SAIx_DMAx_MEM_DATA_SIZE DMA_MDATAALIGN_HALFWORD
|
||||
#define AUDIO_OUT_SAIx_DMAx_IRQHandler DMA2_Stream1_IRQHandler
|
||||
|
||||
/* Select the interrupt preemption priority and subpriority for the DMA interrupt */
|
||||
#define AUDIO_OUT_IRQ_PREPRIO ((uint32_t)0x0E)
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
AUDIO IN CONFIGURATION
|
||||
------------------------------------------------------------------------------*/
|
||||
/* SAI peripheral configuration defines */
|
||||
#define AUDIO_IN_SAIx SAI2_Block_B
|
||||
#define AUDIO_IN_SAIx_CLK_ENABLE() __HAL_RCC_SAI2_CLK_ENABLE()
|
||||
#define AUDIO_IN_SAIx_CLK_DISABLE() __HAL_RCC_SAI2_CLK_DISABLE()
|
||||
#define AUDIO_IN_SAIx_AF GPIO_AF10_SAI2
|
||||
#define AUDIO_IN_SAIx_SD_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
|
||||
#define AUDIO_IN_SAIx_SD_GPIO_PORT GPIOG
|
||||
#define AUDIO_IN_SAIx_SD_PIN GPIO_PIN_10
|
||||
|
||||
/* SAI DMA Stream definitions */
|
||||
#define AUDIO_IN_SAIx_DMAx_CLK_ENABLE() __HAL_RCC_DMA2_CLK_ENABLE()
|
||||
#define AUDIO_IN_SAIx_DMAx_STREAM DMA2_Stream4
|
||||
#define AUDIO_IN_SAIx_DMAx_REQUEST DMA_REQUEST_SAI2_B
|
||||
#define AUDIO_IN_SAIx_DMAx_IRQ DMA2_Stream4_IRQn
|
||||
#define AUDIO_IN_SAIx_DMAx_PERIPH_DATA_SIZE DMA_PDATAALIGN_HALFWORD
|
||||
#define AUDIO_IN_SAIx_DMAx_MEM_DATA_SIZE DMA_MDATAALIGN_HALFWORD
|
||||
|
||||
#define AUDIO_IN_SAIx_DMAx_IRQHandler DMA2_Stream4_IRQHandler
|
||||
|
||||
/* SAI PDM input definitions */
|
||||
#define AUDIO_IN_SAI_PDMx SAI4_Block_A
|
||||
#define AUDIO_IN_SAI_PDMx_CLK_ENABLE() __HAL_RCC_SAI4_CLK_ENABLE()
|
||||
#define AUDIO_IN_SAI_PDMx_CLK_DISABLE() __HAL_RCC_SAI4_CLK_DISABLE()
|
||||
#define AUDIO_IN_SAI_PDMx_CLK_IN_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
|
||||
#define AUDIO_IN_SAI_PDMx_CLK_IN_PIN GPIO_PIN_5
|
||||
#define AUDIO_IN_SAI_PDMx_CLK_IN_PORT GPIOE
|
||||
#define AUDIO_IN_SAI_PDMx_DATA_IN_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
|
||||
#define AUDIO_IN_SAI_PDMx_DATA_IN_PIN GPIO_PIN_4
|
||||
#define AUDIO_IN_SAI_PDMx_DATA_IN_PORT GPIOE
|
||||
#define AUDIO_IN_SAI_PDMx_DATA_CLK_AF GPIO_AF10_SAI4
|
||||
#define AUDIO_IN_SAI_PDMx_IRQHandler SAI4_IRQHandler
|
||||
#define AUDIO_IN_SAI_PDMx_IRQ SAI4_IRQn
|
||||
|
||||
/* SAI PDM DMA Stream definitions */
|
||||
#define AUDIO_IN_SAI_PDMx_DMAx_CLK_ENABLE() __HAL_RCC_BDMA_CLK_ENABLE()
|
||||
#define AUDIO_IN_SAI_PDMx_DMAx_STREAM BDMA_Channel1
|
||||
#define AUDIO_IN_SAI_PDMx_DMAx_REQUEST BDMA_REQUEST_SAI4_A
|
||||
#define AUDIO_IN_SAI_PDMx_DMAx_IRQ BDMA_Channel1_IRQn
|
||||
#define AUDIO_IN_SAI_PDMx_DMAx_PERIPH_DATA_SIZE DMA_PDATAALIGN_HALFWORD
|
||||
#define AUDIO_IN_SAI_PDMx_DMAx_MEM_DATA_SIZE DMA_MDATAALIGN_HALFWORD
|
||||
#define AUDIO_IN_SAI_PDMx_DMAx_IRQHandler BDMA_Channel1_IRQHandler
|
||||
|
||||
/* Select the interrupt preemption priority and subpriority for the DMA interrupt */
|
||||
#define AUDIO_IN_IRQ_PREPRIO ((uint32_t)0x0F)
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
CONFIGURATION: Audio Driver Configuration parameters
|
||||
------------------------------------------------------------------------------*/
|
||||
|
||||
#define AUDIODATA_SIZE ((uint32_t)2) /* 16-bits audio data size */
|
||||
|
||||
/* Audio status definition */
|
||||
#define AUDIO_OK ((uint8_t)0)
|
||||
#define AUDIO_ERROR ((uint8_t)1)
|
||||
#define AUDIO_TIMEOUT ((uint8_t)2)
|
||||
|
||||
/* Audio In default settings */
|
||||
#define DEFAULT_AUDIO_IN_FREQ BSP_AUDIO_FREQUENCY_16K
|
||||
#define DEFAULT_AUDIO_IN_BIT_RESOLUTION ((uint8_t)16)
|
||||
#define DEFAULT_AUDIO_IN_CHANNEL_NBR ((uint8_t)2)
|
||||
#define DEFAULT_AUDIO_IN_VOLUME ((uint16_t)64)
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
OUTPUT DEVICES definition
|
||||
------------------------------------------------------------------------------*/
|
||||
/* Alias on existing output devices to adapt for 2 headphones output */
|
||||
#define OUTPUT_DEVICE_HEADPHONE1 OUTPUT_DEVICE_HEADPHONE
|
||||
#define OUTPUT_DEVICE_HEADPHONE2 OUTPUT_DEVICE_SPEAKER /* Headphone2 is connected to Speaker output of the wm8994 */
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
INPUT DEVICES definition
|
||||
------------------------------------------------------------------------------*/
|
||||
/* Analog microphone input from 3.5 audio jack connector */
|
||||
#define INPUT_DEVICE_ANALOG_MIC ((uint32_t)0x00000001)
|
||||
/* MP34DT01TR digital microphone on PCB top side */
|
||||
#define INPUT_DEVICE_DIGITAL_MIC1 ((uint32_t)0x00000010)
|
||||
#define INPUT_DEVICE_DIGITAL_MIC2 ((uint32_t)0x00000020)
|
||||
#define INPUT_DEVICE_DIGITAL_MIC ((uint32_t)(INPUT_DEVICE_DIGITAL_MIC1 | INPUT_DEVICE_DIGITAL_MIC2))
|
||||
|
||||
/* Audio In interface for Digital mic */
|
||||
#define AUDIO_IN_INTERFACE_SAI ((uint16_t)0)
|
||||
#define AUDIO_IN_INTERFACE_PDM ((uint16_t)1)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_AUDIO_Exported_Macros Exported Macros
|
||||
* @{
|
||||
*/
|
||||
#define DMA_MAX_SIZE 0xFFFF
|
||||
#define DMA_MAX(x) (((x) <= DMA_MAX_SIZE)? (x):DMA_MAX_SIZE)
|
||||
#define POS_VAL(VAL) (POSITION_VAL(VAL) - 4)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY_AUDIO_OUT_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
uint8_t BSP_AUDIO_OUT_Init(uint16_t OutputDevice, uint8_t Volume, uint32_t AudioFreq);
|
||||
void BSP_AUDIO_OUT_DeInit(void);
|
||||
uint8_t BSP_AUDIO_OUT_Play(uint16_t* pBuffer, uint32_t Size);
|
||||
void BSP_AUDIO_OUT_ChangeBuffer(uint16_t *pData, uint16_t Size);
|
||||
uint8_t BSP_AUDIO_OUT_Pause(void);
|
||||
uint8_t BSP_AUDIO_OUT_Resume(void);
|
||||
uint8_t BSP_AUDIO_OUT_Stop(uint32_t Option);
|
||||
uint8_t BSP_AUDIO_OUT_SetVolume(uint8_t Volume);
|
||||
void BSP_AUDIO_OUT_SetFrequency(uint32_t AudioFreq);
|
||||
void BSP_AUDIO_OUT_SetAudioFrameSlot(uint32_t AudioFrameSlot);
|
||||
uint8_t BSP_AUDIO_OUT_SetMute(uint32_t Cmd);
|
||||
uint8_t BSP_AUDIO_OUT_SetOutputMode(uint8_t Output);
|
||||
|
||||
/* User Callbacks: user has to implement these functions in his code if they are needed. */
|
||||
/* This function is called when the requested data has been completely transferred.*/
|
||||
void BSP_AUDIO_OUT_TransferComplete_CallBack(void);
|
||||
|
||||
/* This function is called when half of the requested buffer has been transferred. */
|
||||
void BSP_AUDIO_OUT_HalfTransfer_CallBack(void);
|
||||
|
||||
/* This function is called when an Interrupt due to transfer error on or peripheral
|
||||
error occurs. */
|
||||
void BSP_AUDIO_OUT_Error_CallBack(void);
|
||||
|
||||
/* These function can be modified in case the current settings (e.g. DMA stream)
|
||||
need to be changed for specific application needs */
|
||||
void BSP_AUDIO_OUT_ClockConfig(SAI_HandleTypeDef *hsai, uint32_t AudioFreq, void *Params);
|
||||
void BSP_AUDIO_OUT_MspInit(SAI_HandleTypeDef *hsai, void *Params);
|
||||
void BSP_AUDIO_OUT_MspDeInit(SAI_HandleTypeDef *hsai, void *Params);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY_AUDIO_IN_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
uint8_t BSP_AUDIO_IN_Init(uint32_t AudioFreq, uint32_t BitRes, uint32_t ChnlNbr);
|
||||
uint8_t BSP_AUDIO_IN_InitEx(uint16_t InputDevice, uint32_t AudioFreq, uint32_t BitRes, uint32_t ChnlNbr);
|
||||
uint8_t BSP_AUDIO_IN_AllocScratch (int32_t *pScratch, uint32_t size);
|
||||
uint8_t BSP_AUDIO_IN_Record(uint16_t *pBuf, uint32_t Size);
|
||||
uint8_t BSP_AUDIO_IN_RecordEx(uint32_t *pBuf, uint32_t Size);
|
||||
uint8_t BSP_AUDIO_IN_SetFrequency(uint32_t AudioFreq);
|
||||
uint8_t BSP_AUDIO_IN_Stop(void);
|
||||
uint8_t BSP_AUDIO_IN_StopEx(uint32_t InputDevice);
|
||||
uint8_t BSP_AUDIO_IN_Pause(void);
|
||||
uint8_t BSP_AUDIO_IN_PauseEx(uint32_t InputDevice);
|
||||
uint8_t BSP_AUDIO_IN_Resume(void);
|
||||
uint8_t BSP_AUDIO_IN_ResumeEx(uint32_t *pBuf, uint32_t InputDevice);
|
||||
uint8_t BSP_AUDIO_IN_SetVolume(uint8_t Volume);
|
||||
void BSP_AUDIO_IN_DeInit(void);
|
||||
uint8_t BSP_AUDIO_IN_PDMToPCM(uint16_t *PDMBuf, uint16_t *PCMBuf);
|
||||
uint8_t BSP_AUDIO_IN_PDMToPCM_Init(uint32_t AudioFreq, uint32_t ChnlNbrIn, uint32_t ChnlNbrOut);
|
||||
void BSP_AUDIO_IN_SelectInterface(uint32_t Interface);
|
||||
uint32_t BSP_AUDIO_IN_GetInterface(void);
|
||||
uint8_t BSP_AUDIO_IN_GetChannelNumber(void);
|
||||
uint8_t BSP_AUDIO_IN_OUT_Init(uint32_t InputDevice, uint32_t OutputDevice, uint32_t AudioFreq, uint32_t BitRes, uint32_t ChnlNbr);
|
||||
|
||||
/* User Callbacks: user has to implement these functions in his code if they are needed. */
|
||||
/* This function should be implemented by the user application.
|
||||
It is called into this driver when the current buffer is filled to prepare the next
|
||||
buffer pointer and its size. */
|
||||
void BSP_AUDIO_IN_TransferComplete_CallBack(void);
|
||||
void BSP_AUDIO_IN_HalfTransfer_CallBack(void);
|
||||
void BSP_AUDIO_IN_TransferComplete_CallBackEx(uint32_t InputDevice);
|
||||
void BSP_AUDIO_IN_HalfTransfer_CallBackEx(uint32_t InputDevice);
|
||||
|
||||
/* This function is called when an Interrupt due to transfer error on or peripheral
|
||||
error occurs. */
|
||||
void BSP_AUDIO_IN_Error_CallBack(void);
|
||||
|
||||
/* These function can be modified in case the current settings (e.g. DMA stream)
|
||||
need to be changed for specific application needs */
|
||||
void BSP_AUDIO_IN_ClockConfig(uint32_t AudioFreq, void *Params);
|
||||
void BSP_AUDIO_IN_MspInit(void);
|
||||
void BSP_AUDIO_IN_MspDeInit(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32H745I_DISCOVERY_AUDIO_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+1668
File diff suppressed because it is too large
Load Diff
+238
@@ -0,0 +1,238 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h745i_discovery_lcd.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32h745i_discovery_lcd.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32H745I_DISCOVERY_LCD_H
|
||||
#define __STM32H745I_DISCOVERY_LCD_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Include LCD component Driver */
|
||||
/* LCD RK043FN48H-CT672B 4,3" 480x272 pixels */
|
||||
#include "../Components/rk043fn48h/rk043fn48h.h"
|
||||
|
||||
/* Include SDRAM Driver */
|
||||
#include "stm32h745i_discovery_sdram.h"
|
||||
|
||||
#include "stm32h745i_discovery.h"
|
||||
#include "../../../Utilities/Fonts/fonts.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY_LCD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_LCD_Exported_Types Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t TextColor;
|
||||
uint32_t BackColor;
|
||||
sFONT *pFont;
|
||||
}LCD_DrawPropTypeDef;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
int16_t X;
|
||||
int16_t Y;
|
||||
}Point, * pPoint;
|
||||
|
||||
/**
|
||||
* @brief Line mode structures definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CENTER_MODE = 0x01, /* Center mode */
|
||||
RIGHT_MODE = 0x02, /* Right mode */
|
||||
LEFT_MODE = 0x03 /* Left mode */
|
||||
}Text_AlignModeTypdef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_LCD_Exported_Constants Exported Constants
|
||||
* @{
|
||||
*/
|
||||
#define MAX_LAYER_NUMBER ((uint32_t)2)
|
||||
|
||||
#define LCD_LayerCfgTypeDef LTDC_LayerCfgTypeDef
|
||||
|
||||
#define LTDC_ACTIVE_LAYER ((uint32_t)1) /* Layer 1 */
|
||||
/**
|
||||
* @brief LCD status structure definition
|
||||
*/
|
||||
#define LCD_OK ((uint8_t)0x00)
|
||||
#define LCD_ERROR ((uint8_t)0x01)
|
||||
#define LCD_TIMEOUT ((uint8_t)0x02)
|
||||
|
||||
/**
|
||||
* @brief LCD FB_StartAddress
|
||||
*/
|
||||
#define LCD_FB_START_ADDRESS ((uint32_t)0xD0000000)
|
||||
|
||||
/**
|
||||
* @brief LCD color
|
||||
*/
|
||||
#define LCD_COLOR_BLUE ((uint32_t)0xFF0000FF)
|
||||
#define LCD_COLOR_GREEN ((uint32_t)0xFF00FF00)
|
||||
#define LCD_COLOR_RED ((uint32_t)0xFFFF0000)
|
||||
#define LCD_COLOR_CYAN ((uint32_t)0xFF00FFFF)
|
||||
#define LCD_COLOR_MAGENTA ((uint32_t)0xFFFF00FF)
|
||||
#define LCD_COLOR_YELLOW ((uint32_t)0xFFFFFF00)
|
||||
#define LCD_COLOR_LIGHTBLUE ((uint32_t)0xFF8080FF)
|
||||
#define LCD_COLOR_LIGHTGREEN ((uint32_t)0xFF80FF80)
|
||||
#define LCD_COLOR_LIGHTRED ((uint32_t)0xFFFF8080)
|
||||
#define LCD_COLOR_LIGHTCYAN ((uint32_t)0xFF80FFFF)
|
||||
#define LCD_COLOR_LIGHTMAGENTA ((uint32_t)0xFFFF80FF)
|
||||
#define LCD_COLOR_LIGHTYELLOW ((uint32_t)0xFFFFFF80)
|
||||
#define LCD_COLOR_DARKBLUE ((uint32_t)0xFF000080)
|
||||
#define LCD_COLOR_DARKGREEN ((uint32_t)0xFF008000)
|
||||
#define LCD_COLOR_DARKRED ((uint32_t)0xFF800000)
|
||||
#define LCD_COLOR_DARKCYAN ((uint32_t)0xFF008080)
|
||||
#define LCD_COLOR_DARKMAGENTA ((uint32_t)0xFF800080)
|
||||
#define LCD_COLOR_DARKYELLOW ((uint32_t)0xFF808000)
|
||||
#define LCD_COLOR_WHITE ((uint32_t)0xFFFFFFFF)
|
||||
#define LCD_COLOR_LIGHTGRAY ((uint32_t)0xFFD3D3D3)
|
||||
#define LCD_COLOR_GRAY ((uint32_t)0xFF808080)
|
||||
#define LCD_COLOR_DARKGRAY ((uint32_t)0xFF404040)
|
||||
#define LCD_COLOR_BLACK ((uint32_t)0xFF000000)
|
||||
#define LCD_COLOR_BROWN ((uint32_t)0xFFA52A2A)
|
||||
#define LCD_COLOR_ORANGE ((uint32_t)0xFFFFA500)
|
||||
#define LCD_COLOR_TRANSPARENT ((uint32_t)0xFF000000)
|
||||
|
||||
/**
|
||||
* @brief LCD default font
|
||||
*/
|
||||
#define LCD_DEFAULT_FONT Font24
|
||||
|
||||
/**
|
||||
* @brief LCD Reload Types
|
||||
*/
|
||||
#define LCD_RELOAD_IMMEDIATE ((uint32_t)LTDC_SRCR_IMR)
|
||||
#define LCD_RELOAD_VERTICAL_BLANKING ((uint32_t)LTDC_SRCR_VBR)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY_LCD_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
uint8_t BSP_LCD_Init(void);
|
||||
uint8_t BSP_LCD_InitEx(uint32_t PclkConfig);
|
||||
|
||||
uint8_t BSP_LCD_DeInit(void);
|
||||
uint32_t BSP_LCD_GetXSize(void);
|
||||
uint32_t BSP_LCD_GetYSize(void);
|
||||
void BSP_LCD_SetXSize(uint32_t imageWidthPixels);
|
||||
void BSP_LCD_SetYSize(uint32_t imageHeightPixels);
|
||||
|
||||
/* Functions using the LTDC controller */
|
||||
void BSP_LCD_LayerDefaultInit(uint16_t LayerIndex, uint32_t FrameBuffer);
|
||||
void BSP_LCD_SetTransparency(uint32_t LayerIndex, uint8_t Transparency);
|
||||
void BSP_LCD_SetTransparency_NoReload(uint32_t LayerIndex, uint8_t Transparency);
|
||||
void BSP_LCD_SetLayerAddress(uint32_t LayerIndex, uint32_t Address);
|
||||
void BSP_LCD_SetLayerAddress_NoReload(uint32_t LayerIndex, uint32_t Address);
|
||||
void BSP_LCD_SetColorKeying(uint32_t LayerIndex, uint32_t RGBValue);
|
||||
void BSP_LCD_SetColorKeying_NoReload(uint32_t LayerIndex, uint32_t RGBValue);
|
||||
void BSP_LCD_ResetColorKeying(uint32_t LayerIndex);
|
||||
void BSP_LCD_ResetColorKeying_NoReload(uint32_t LayerIndex);
|
||||
void BSP_LCD_SetLayerWindow(uint16_t LayerIndex, uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height);
|
||||
void BSP_LCD_SetLayerWindow_NoReload(uint16_t LayerIndex, uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height);
|
||||
void BSP_LCD_SelectLayer(uint32_t LayerIndex);
|
||||
void BSP_LCD_SetLayerVisible(uint32_t LayerIndex, FunctionalState State);
|
||||
void BSP_LCD_SetLayerVisible_NoReload(uint32_t LayerIndex, FunctionalState State);
|
||||
void BSP_LCD_Relaod(uint32_t ReloadType);
|
||||
|
||||
void BSP_LCD_SetTextColor(uint32_t Color);
|
||||
uint32_t BSP_LCD_GetTextColor(void);
|
||||
void BSP_LCD_SetBackColor(uint32_t Color);
|
||||
uint32_t BSP_LCD_GetBackColor(void);
|
||||
void BSP_LCD_SetFont(sFONT *fonts);
|
||||
sFONT *BSP_LCD_GetFont(void);
|
||||
|
||||
uint32_t BSP_LCD_ReadPixel(uint16_t Xpos, uint16_t Ypos);
|
||||
void BSP_LCD_DrawPixel(uint16_t Xpos, uint16_t Ypos, uint32_t pixel);
|
||||
void BSP_LCD_Clear(uint32_t Color);
|
||||
void BSP_LCD_ClearStringLine(uint32_t Line);
|
||||
void BSP_LCD_DisplayStringAtLine(uint16_t Line, uint8_t *ptr);
|
||||
void BSP_LCD_DisplayStringAt(uint16_t Xpos, uint16_t Ypos, uint8_t *Text, Text_AlignModeTypdef Mode);
|
||||
void BSP_LCD_DisplayChar(uint16_t Xpos, uint16_t Ypos, uint8_t Ascii);
|
||||
|
||||
void BSP_LCD_DrawHLine(uint16_t Xpos, uint16_t Ypos, uint16_t Length);
|
||||
void BSP_LCD_DrawVLine(uint16_t Xpos, uint16_t Ypos, uint16_t Length);
|
||||
void BSP_LCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2);
|
||||
void BSP_LCD_DrawRect(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height);
|
||||
void BSP_LCD_DrawCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius);
|
||||
void BSP_LCD_DrawPolygon(pPoint Points, uint16_t PointCount);
|
||||
void BSP_LCD_DrawEllipse(int Xpos, int Ypos, int XRadius, int YRadius);
|
||||
void BSP_LCD_DrawBitmap(uint32_t Xpos, uint32_t Ypos, uint8_t *pbmp);
|
||||
|
||||
void BSP_LCD_FillRect(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height);
|
||||
void BSP_LCD_FillCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius);
|
||||
void BSP_LCD_FillPolygon(pPoint Points, uint16_t PointCount);
|
||||
void BSP_LCD_FillEllipse(int Xpos, int Ypos, int XRadius, int YRadius);
|
||||
|
||||
void BSP_LCD_DisplayOff(void);
|
||||
void BSP_LCD_DisplayOn(void);
|
||||
|
||||
void BSP_LCD_SetBrightness(uint8_t BrightnessValue);
|
||||
|
||||
/* These functions can be modified in case the current settings
|
||||
need to be changed for specific application needs */
|
||||
void BSP_LCD_MspInit(LTDC_HandleTypeDef *hltdc, void *Params);
|
||||
void BSP_LCD_MspDeInit(LTDC_HandleTypeDef *hltdc, void *Params);
|
||||
void BSP_LCD_ClockConfig(LTDC_HandleTypeDef *hltdc, void *Params);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32H745I_DISCOVERY_LCD_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+418
@@ -0,0 +1,418 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h745i_discovery_mmc.c
|
||||
* @author MCD Application Team
|
||||
* @brief This file includes the EMMC driver mounted on STM32H745I-DISCOVERY
|
||||
* board.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* File Info : -----------------------------------------------------------------
|
||||
User NOTES
|
||||
1. How To use this driver:
|
||||
--------------------------
|
||||
- This driver is used to drive the EMMC mounted on STM32H745I-DISCOVERY
|
||||
board.
|
||||
- This driver does not need a specific component driver for the EMMC device
|
||||
to be included with.
|
||||
|
||||
2. Driver description:
|
||||
---------------------
|
||||
+ Initialization steps:
|
||||
o Initialize the external EMMC memory using the BSP_MMC_Init() function. This
|
||||
function includes the MSP layer hardware resources initialization and the
|
||||
SDIO interface configuration to interface with the external EMMC. It
|
||||
also includes the EMMC initialization sequence.
|
||||
o The function BSP_MMC_GetCardInfo() is used to get the MMC information
|
||||
which is stored in the structure "HAL_MMC_CardInfoTypedef".
|
||||
|
||||
+ Micro MMC card operations
|
||||
o The micro MMC card can be accessed with read/write block(s) operations once
|
||||
it is ready for access. The access can be performed whether using the polling
|
||||
mode by calling the functions BSP_MMC_ReadBlocks()/BSP_MMC_WriteBlocks(), or by DMA
|
||||
transfer using the functions BSP_MMC_ReadBlocks_DMA()/BSP_MMC_WriteBlocks_DMA()
|
||||
o The DMA transfer complete is used with interrupt mode. Once the MMC transfer
|
||||
is complete, the MMC interrupt is handled using the function BSP_MMC_IRQHandler(),
|
||||
the DMA Tx/Rx transfer complete are handled using the functions
|
||||
MMC_DMA_Tx_IRQHandler()/MMC_DMA_Rx_IRQHandler() that should be defined by user.
|
||||
The corresponding user callbacks are implemented by the user at application level.
|
||||
o The MMC erase block(s) is performed using the function BSP_MMC_Erase() with specifying
|
||||
the number of blocks to erase.
|
||||
o The MMC runtime status is returned when calling the function BSP_MMC_GetStatus().
|
||||
|
||||
------------------------------------------------------------------------------*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h745i_discovery_mmc.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_MMC STM32H745I_DISCOVERY_MMC
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_MMC_Exported_Variables Exported Variables
|
||||
* @{
|
||||
*/
|
||||
MMC_HandleTypeDef uSdHandle;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_MMC_Exported_Functions Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initializes the MMC card device.
|
||||
* @retval MMC status
|
||||
*/
|
||||
uint8_t BSP_MMC_Init(void)
|
||||
{
|
||||
uint8_t mmc_state = MMC_OK;
|
||||
|
||||
/* uMMC device interface configuration */
|
||||
uSdHandle.Instance = SDMMC1;
|
||||
|
||||
/* if CLKDIV = 0 then SDMMC Clock frequency = SDMMC Kernel Clock
|
||||
else SDMMC Clock frequency = SDMMC Kernel Clock / [2 * CLKDIV].
|
||||
*/
|
||||
uSdHandle.Init.ClockDiv = 2;
|
||||
uSdHandle.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
|
||||
uSdHandle.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
|
||||
uSdHandle.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
|
||||
uSdHandle.Init.BusWide = SDMMC_BUS_WIDE_8B;
|
||||
|
||||
/* Msp MMC initialization */
|
||||
BSP_MMC_MspInit(&uSdHandle, NULL);
|
||||
|
||||
/* HAL MMC initialization */
|
||||
if(HAL_MMC_Init(&uSdHandle) != HAL_OK)
|
||||
{
|
||||
mmc_state = MMC_ERROR;
|
||||
}
|
||||
|
||||
return mmc_state;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the MMC card device.
|
||||
* @retval MMC status
|
||||
*/
|
||||
uint8_t BSP_MMC_DeInit(void)
|
||||
{
|
||||
uint8_t mmc_state = MMC_OK;
|
||||
|
||||
uSdHandle.Instance = SDMMC1;
|
||||
|
||||
/* HAL MMC deinitialization */
|
||||
if(HAL_MMC_DeInit(&uSdHandle) != HAL_OK)
|
||||
{
|
||||
mmc_state = MMC_ERROR;
|
||||
}
|
||||
|
||||
/* Msp MMC deinitialization */
|
||||
uSdHandle.Instance = SDMMC1;
|
||||
BSP_MMC_MspDeInit(&uSdHandle, NULL);
|
||||
|
||||
return mmc_state;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads block(s) from a specified address in an MMC card, in polling mode.
|
||||
* @param pData: Pointer to the buffer that will contain the data to transmit
|
||||
* @param ReadAddr: Address from where data is to be read
|
||||
* @param NumOfBlocks: Number of MMC blocks to read
|
||||
* @param Timeout: Timeout for read operation
|
||||
* @retval MMC status
|
||||
*/
|
||||
uint8_t BSP_MMC_ReadBlocks(uint32_t *pData, uint32_t ReadAddr, uint32_t NumOfBlocks, uint32_t Timeout)
|
||||
{
|
||||
|
||||
if( HAL_MMC_ReadBlocks(&uSdHandle, (uint8_t *)pData, ReadAddr, NumOfBlocks, Timeout) == HAL_OK)
|
||||
{
|
||||
return MMC_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return MMC_ERROR;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes block(s) to a specified address in an MMC card, in polling mode.
|
||||
* @param pData: Pointer to the buffer that will contain the data to transmit
|
||||
* @param WriteAddr: Address from where data is to be written
|
||||
* @param NumOfBlocks: Number of MMC blocks to write
|
||||
* @param Timeout: Timeout for write operation
|
||||
* @retval MMC status
|
||||
*/
|
||||
uint8_t BSP_MMC_WriteBlocks(uint32_t *pData, uint32_t WriteAddr, uint32_t NumOfBlocks, uint32_t Timeout)
|
||||
{
|
||||
|
||||
if( HAL_MMC_WriteBlocks(&uSdHandle, (uint8_t *)pData, WriteAddr, NumOfBlocks, Timeout) == HAL_OK)
|
||||
{
|
||||
return MMC_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return MMC_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads block(s) from a specified address in an MMC card, in DMA mode.
|
||||
* @param pData: Pointer to the buffer that will contain the data to transmit
|
||||
* @param ReadAddr: Address from where data is to be read
|
||||
* @param NumOfBlocks: Number of MMC blocks to read
|
||||
* @retval MMC status
|
||||
*/
|
||||
uint8_t BSP_MMC_ReadBlocks_DMA(uint32_t *pData, uint32_t ReadAddr, uint32_t NumOfBlocks)
|
||||
{
|
||||
|
||||
if( HAL_MMC_ReadBlocks_DMA(&uSdHandle, (uint8_t *)pData, ReadAddr, NumOfBlocks) == HAL_OK)
|
||||
{
|
||||
return MMC_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return MMC_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes block(s) to a specified address in an MMC card, in DMA mode.
|
||||
* @param pData: Pointer to the buffer that will contain the data to transmit
|
||||
* @param WriteAddr: Address from where data is to be written
|
||||
* @param NumOfBlocks: Number of MMC blocks to write
|
||||
* @retval MMC status
|
||||
*/
|
||||
uint8_t BSP_MMC_WriteBlocks_DMA(uint32_t *pData, uint32_t WriteAddr, uint32_t NumOfBlocks)
|
||||
{
|
||||
|
||||
if( HAL_MMC_WriteBlocks_DMA(&uSdHandle, (uint8_t *)pData, WriteAddr, NumOfBlocks) == HAL_OK)
|
||||
{
|
||||
return MMC_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return MMC_ERROR;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Erases the specified memory area of the given MMC card.
|
||||
* @param StartAddr: Start byte address
|
||||
* @param EndAddr: End byte address
|
||||
* @retval MMC status
|
||||
*/
|
||||
uint8_t BSP_MMC_Erase(uint32_t StartAddr, uint32_t EndAddr)
|
||||
{
|
||||
|
||||
if( HAL_MMC_Erase(&uSdHandle, StartAddr, EndAddr) == HAL_OK)
|
||||
{
|
||||
return MMC_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return MMC_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the MMC MSP.
|
||||
* @param hmmc: MMC handle
|
||||
* @param Params User parameters
|
||||
* @retval None
|
||||
*/
|
||||
__weak void BSP_MMC_MspInit(MMC_HandleTypeDef *hmmc, void *Params)
|
||||
{
|
||||
/* __weak function can be modified by the application */
|
||||
|
||||
GPIO_InitTypeDef gpio_init_structure;
|
||||
|
||||
/* Enable SDIO clock */
|
||||
__HAL_RCC_SDMMC1_CLK_ENABLE();
|
||||
|
||||
/* Enable GPIOs clock */
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
|
||||
|
||||
/* Common GPIO configuration */
|
||||
gpio_init_structure.Mode = GPIO_MODE_AF_PP;
|
||||
gpio_init_structure.Pull = GPIO_PULLUP;
|
||||
gpio_init_structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
gpio_init_structure.Alternate = GPIO_AF12_SDIO1;
|
||||
|
||||
/* SDMMC GPIO CLKIN PB8, D0 PC8, D1 PC9, D2 PC10, D3 PC11, CK PC12, CMD PD2 */
|
||||
/* GPIOC configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12;
|
||||
HAL_GPIO_Init(GPIOC, &gpio_init_structure);
|
||||
|
||||
/* GPIOD configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_2;
|
||||
HAL_GPIO_Init(GPIOD, &gpio_init_structure);
|
||||
|
||||
gpio_init_structure.Pin = GPIO_PIN_8 | GPIO_PIN_9;
|
||||
HAL_GPIO_Init(GPIOB, &gpio_init_structure);
|
||||
|
||||
|
||||
/* NVIC configuration for SDIO interrupts */
|
||||
HAL_NVIC_SetPriority(SDMMC1_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(SDMMC1_IRQn);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the MMC MSP.
|
||||
* @param hmmc: MMC handle
|
||||
* @param Params User parameters
|
||||
* @retval None
|
||||
*/
|
||||
__weak void BSP_MMC_MspDeInit(MMC_HandleTypeDef *hmmc, void *Params)
|
||||
{
|
||||
/* Disable NVIC for SDIO interrupts */
|
||||
HAL_NVIC_DisableIRQ(SDMMC1_IRQn);
|
||||
|
||||
/* DeInit GPIO pins can be done in the application
|
||||
(by surcharging this __weak function) */
|
||||
|
||||
/* Disable SDMMC1 clock */
|
||||
__HAL_RCC_SDMMC1_CLK_DISABLE();
|
||||
|
||||
/* GPIO pins clock and DMA clocks can be shut down in the application
|
||||
by surcharging this __weak function */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Handles MMC card interrupt request.
|
||||
* @retval None
|
||||
*/
|
||||
void BSP_MMC_IRQHandler(void)
|
||||
{
|
||||
HAL_MMC_IRQHandler(&uSdHandle);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Gets the current MMC card data status.
|
||||
* @retval Data transfer state.
|
||||
* This value can be one of the following values:
|
||||
* @arg MMC_TRANSFER_OK: No data transfer is acting
|
||||
* @arg MMC_TRANSFER_BUSY: Data transfer is acting
|
||||
* @arg MMC_TRANSFER_ERROR: Data transfer error
|
||||
*/
|
||||
uint8_t BSP_MMC_GetCardState(void)
|
||||
{
|
||||
return((HAL_MMC_GetCardState(&uSdHandle) == HAL_MMC_CARD_TRANSFER ) ? MMC_TRANSFER_OK : MMC_TRANSFER_BUSY);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Get MMC information about specific MMC card.
|
||||
* @param CardInfo: Pointer to HAL_MMC_CardInfoTypedef structure
|
||||
* @retval None
|
||||
*/
|
||||
void BSP_MMC_GetCardInfo(BSP_MMC_CardInfo *CardInfo)
|
||||
{
|
||||
HAL_MMC_GetCardInfo(&uSdHandle, CardInfo);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief MMC Abort callbacks
|
||||
* @param hmmc: MMC handle
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc)
|
||||
{
|
||||
BSP_MMC_AbortCallback();
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Tx Transfer completed callbacks
|
||||
* @param hmmc: MMC handle
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc)
|
||||
{
|
||||
BSP_MMC_WriteCpltCallback();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Rx Transfer completed callbacks
|
||||
* @param hmmc: MMC handle
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc)
|
||||
{
|
||||
BSP_MMC_ReadCpltCallback();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief BSP MMC Abort callbacks
|
||||
* @retval None
|
||||
*/
|
||||
__weak void BSP_MMC_AbortCallback(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief BSP Tx Transfer completed callbacks
|
||||
* @retval None
|
||||
*/
|
||||
__weak void BSP_MMC_WriteCpltCallback(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief BSP Rx Transfer completed callbacks
|
||||
* @retval None
|
||||
*/
|
||||
__weak void BSP_MMC_ReadCpltCallback(void)
|
||||
{
|
||||
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+132
@@ -0,0 +1,132 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h745i_discovery_mmc.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32h745i_discovery_mmc.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H745I_DISCOVERY_MMC_H
|
||||
#define STM32H745I_DISCOVERY_MMC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7xx_hal.h"
|
||||
#include "stm32h745i_discovery.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY_MMC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_MMC_Exported_Types Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SD Card information structure
|
||||
*/
|
||||
#define BSP_MMC_CardInfo HAL_MMC_CardInfoTypeDef
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_MMC_Exported_Constants Exported Constants
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief SD status structure definition
|
||||
*/
|
||||
#define MMC_OK ((uint8_t)0x00)
|
||||
#define MMC_ERROR ((uint8_t)0x01)
|
||||
#define MMC_ERROR_MMC_NOT_PRESENT ((uint8_t)0x02)
|
||||
|
||||
/**
|
||||
* @brief MMC transfer state definition
|
||||
*/
|
||||
#define MMC_TRANSFER_OK ((uint8_t)0x00)
|
||||
#define MMC_TRANSFER_BUSY ((uint8_t)0x01)
|
||||
|
||||
|
||||
#define MMC_PRESENT ((uint8_t)0x01)
|
||||
#define MMC_NOT_PRESENT ((uint8_t)0x00)
|
||||
|
||||
#define MMC_DATATIMEOUT ((uint32_t)0xFFFFFFFFU)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY_MMC_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
uint8_t BSP_MMC_Init(void);
|
||||
uint8_t BSP_MMC_DeInit(void);
|
||||
uint8_t BSP_MMC_ITConfig(void);
|
||||
|
||||
uint8_t BSP_MMC_ReadBlocks(uint32_t *pData, uint32_t ReadAddr, uint32_t NumOfBlocks, uint32_t Timeout);
|
||||
uint8_t BSP_MMC_WriteBlocks(uint32_t *pData, uint32_t WriteAddr, uint32_t NumOfBlocks, uint32_t Timeout);
|
||||
uint8_t BSP_MMC_ReadBlocks_DMA(uint32_t *pData, uint32_t ReadAddr, uint32_t NumOfBlocks);
|
||||
uint8_t BSP_MMC_WriteBlocks_DMA(uint32_t *pData, uint32_t WriteAddr, uint32_t NumOfBlocks);
|
||||
uint8_t BSP_MMC_Erase(uint32_t StartAddr, uint32_t EndAddr);
|
||||
uint8_t BSP_MMC_GetCardState(void);
|
||||
void BSP_MMC_GetCardInfo(BSP_MMC_CardInfo *CardInfo);
|
||||
uint8_t BSP_MMC_IsDetected(void);
|
||||
void BSP_MMC_IRQHandler(void);
|
||||
|
||||
/* These functions can be modified in case the current settings (e.g. DMA stream)
|
||||
need to be changed for specific application needs */
|
||||
void BSP_MMC_MspInit(MMC_HandleTypeDef *hmmc, void *Params);
|
||||
void BSP_MMC_MspDeInit(MMC_HandleTypeDef *hmmc, void *Params);
|
||||
void BSP_MMC_AbortCallback(void);
|
||||
void BSP_MMC_WriteCpltCallback(void);
|
||||
void BSP_MMC_ReadCpltCallback(void);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32H745I_DISCOVERY_MMC_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+895
File diff suppressed because it is too large
Load Diff
+175
@@ -0,0 +1,175 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h745i_discovery_qspi.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32H745i_discovery_qspi.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32H745I_DISCOVERY_QSPI_H
|
||||
#define __STM32H745I_DISCOVERY_QSPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7xx_hal.h"
|
||||
#include "../Components/mt25tl01g/mt25tl01g.h"
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY_QSPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup STM32H745I_DISCOVERY_QSPI_Exported_Constants Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* QSPI Error codes */
|
||||
#define QSPI_OK ((uint8_t)0x00)
|
||||
#define QSPI_ERROR ((uint8_t)0x01)
|
||||
#define QSPI_BUSY ((uint8_t)0x02)
|
||||
#define QSPI_NOT_SUPPORTED ((uint8_t)0x04)
|
||||
#define QSPI_SUSPENDED ((uint8_t)0x08)
|
||||
|
||||
|
||||
/* Definition for QSPI clock resources */
|
||||
#define QSPI_CLK_ENABLE() __HAL_RCC_QSPI_CLK_ENABLE()
|
||||
#define QSPI_CLK_DISABLE() __HAL_RCC_QSPI_CLK_DISABLE()
|
||||
#define QSPI_CLK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
|
||||
#define QSPI_BK1_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
|
||||
#define QSPI_BK1_D0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
|
||||
#define QSPI_BK1_D1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
|
||||
#define QSPI_BK1_D2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
|
||||
#define QSPI_BK1_D3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
|
||||
#define QSPI_BK2_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
|
||||
#define QSPI_BK2_D0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE()
|
||||
#define QSPI_BK2_D1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE()
|
||||
#define QSPI_BK2_D2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
|
||||
#define QSPI_BK2_D3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
|
||||
|
||||
|
||||
#define QSPI_FORCE_RESET() __HAL_RCC_QSPI_FORCE_RESET()
|
||||
#define QSPI_RELEASE_RESET() __HAL_RCC_QSPI_RELEASE_RESET()
|
||||
|
||||
/* Definition for QSPI Pins */
|
||||
#define QSPI_CLK_PIN GPIO_PIN_10
|
||||
#define QSPI_CLK_GPIO_PORT GPIOF
|
||||
/* Bank 1 */
|
||||
#define QSPI_BK1_CS_PIN GPIO_PIN_6
|
||||
#define QSPI_BK1_CS_GPIO_PORT GPIOG
|
||||
#define QSPI_BK1_D0_PIN GPIO_PIN_11
|
||||
#define QSPI_BK1_D0_GPIO_PORT GPIOD
|
||||
#define QSPI_BK1_D1_PIN GPIO_PIN_9
|
||||
#define QSPI_BK1_D1_GPIO_PORT GPIOF
|
||||
#define QSPI_BK1_D2_PIN GPIO_PIN_7
|
||||
#define QSPI_BK1_D2_GPIO_PORT GPIOF
|
||||
#define QSPI_BK1_D3_PIN GPIO_PIN_6
|
||||
#define QSPI_BK1_D3_GPIO_PORT GPIOF
|
||||
|
||||
/* Bank 2 */
|
||||
#define QSPI_BK2_CS_PIN GPIO_PIN_6
|
||||
#define QSPI_BK2_CS_GPIO_PORT GPIOG
|
||||
#define QSPI_BK2_D0_PIN GPIO_PIN_2
|
||||
#define QSPI_BK2_D0_GPIO_PORT GPIOH
|
||||
#define QSPI_BK2_D1_PIN GPIO_PIN_3
|
||||
#define QSPI_BK2_D1_GPIO_PORT GPIOH
|
||||
#define QSPI_BK2_D2_PIN GPIO_PIN_9
|
||||
#define QSPI_BK2_D2_GPIO_PORT GPIOG
|
||||
#define QSPI_BK2_D3_PIN GPIO_PIN_14
|
||||
#define QSPI_BK2_D3_GPIO_PORT GPIOG
|
||||
|
||||
|
||||
/* MT25TL01G Micron memory */
|
||||
/* Size of the flash */
|
||||
#define QSPI_FLASH_SIZE 26 /* Address bus width to access whole memory space */
|
||||
#define QSPI_PAGE_SIZE 256
|
||||
|
||||
/* QSPI Base Address */
|
||||
#define QSPI_BASE_ADDRESS 0x90000000
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup STM32H745I_DISCOVERY_QSPI_Exported_Types Exported Types
|
||||
* @{
|
||||
*/
|
||||
/* QSPI Info */
|
||||
typedef struct {
|
||||
uint32_t FlashSize; /*!< Size of the flash */
|
||||
uint32_t EraseSectorSize; /*!< Size of sectors for the erase operation */
|
||||
uint32_t EraseSectorsNumber; /*!< Number of sectors for the erase operation */
|
||||
uint32_t ProgPageSize; /*!< Size of pages for the program operation */
|
||||
uint32_t ProgPagesNumber; /*!< Number of pages for the program operation */
|
||||
} QSPI_Info;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup STM32H745I_DISCOVERY_QSPI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
uint8_t BSP_QSPI_Init (void);
|
||||
uint8_t BSP_QSPI_DeInit (void);
|
||||
uint8_t BSP_QSPI_Read (uint8_t* pData, uint32_t ReadAddr, uint32_t Size);
|
||||
uint8_t BSP_QSPI_Write (uint8_t* pData, uint32_t WriteAddr, uint32_t Size);
|
||||
uint8_t BSP_QSPI_Erase_Block(uint32_t BlockAddress);
|
||||
uint8_t BSP_QSPI_Erase_Chip (void);
|
||||
uint8_t BSP_QSPI_GetStatus (void);
|
||||
uint8_t BSP_QSPI_GetInfo (QSPI_Info* pInfo);
|
||||
uint8_t BSP_QSPI_EnableMemoryMappedMode(void);
|
||||
|
||||
/* These functions can be modified in case the current settings
|
||||
need to be changed for specific application needs */
|
||||
void BSP_QSPI_MspInit(QSPI_HandleTypeDef *hqspi, void *Params);
|
||||
void BSP_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi, void *Params);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32H745I_DISCOVERY_QSPI_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+445
@@ -0,0 +1,445 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h745i_discovery_sdram.c
|
||||
* @author MCD Application Team
|
||||
* @brief This file includes the SDRAM driver for the MT48LC4M32B2B5-6A memory
|
||||
* device mounted on STM32H745I_DISCOVERY boards.
|
||||
******************************************************************************
|
||||
@verbatim
|
||||
How To use this driver:
|
||||
-----------------------
|
||||
- This driver is used to drive the MT48LC4M32B2B5-6A SDRAM external memory mounted
|
||||
on STM32H745I_DISCOVERY board.
|
||||
- This driver does not need a specific component driver for the SDRAM device
|
||||
to be included with.
|
||||
|
||||
Driver description:
|
||||
------------------
|
||||
+ Initialization steps:
|
||||
o Initialize the SDRAM external memory using the BSP_SDRAM_Init() function. This
|
||||
function includes the MSP layer hardware resources initialization and the
|
||||
FMC controller configuration to interface with the external SDRAM memory.
|
||||
o It contains the SDRAM initialization sequence to program the SDRAM external
|
||||
device using the function BSP_SDRAM_Initialization_sequence(). Note that this
|
||||
sequence is standard for all SDRAM devices, but can include some differences
|
||||
from a device to another. If it is the case, the right sequence should be
|
||||
implemented separately.
|
||||
|
||||
+ SDRAM read/write operations
|
||||
o SDRAM external memory can be accessed with read/write operations once it is
|
||||
initialized.
|
||||
Read/write operation can be performed with AHB access using the functions
|
||||
BSP_SDRAM_ReadData()/BSP_SDRAM_WriteData(), or by MDMA transfer using the functions
|
||||
BSP_SDRAM_ReadData_DMA()/BSP_SDRAM_WriteData_DMA().
|
||||
o The AHB access is performed with 32-bit width transaction, the MDMA transfer
|
||||
configuration is fixed at single (no burst) word transfer (see the
|
||||
SDRAM_MspInit() static function).
|
||||
o User can implement his own functions for read/write access with his desired
|
||||
configurations.
|
||||
o If interrupt mode is used for MDMA transfer, the function BSP_SDRAM_MDMA_IRQHandler()
|
||||
is called in IRQ handler file, to serve the generated interrupt once the MDMA
|
||||
transfer is complete.
|
||||
o You can send a command to the SDRAM device in runtime using the function
|
||||
BSP_SDRAM_Sendcmd(), and giving the desired command as parameter chosen between
|
||||
the predefined commands of the "FMC_SDRAM_CommandTypeDef" structure.
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h745i_discovery_sdram.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_SDRAM STM32H745I_DISCOVERY_SDRAM
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_SDRAM_Private_Variables Private Variables
|
||||
* @{
|
||||
*/
|
||||
SDRAM_HandleTypeDef sdramHandle;
|
||||
static FMC_SDRAM_TimingTypeDef Timing;
|
||||
static FMC_SDRAM_CommandTypeDef Command;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_SDRAM_Exported_Functions Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initializes the SDRAM device.
|
||||
* @retval SDRAM status
|
||||
*/
|
||||
uint8_t BSP_SDRAM_Init(void)
|
||||
{
|
||||
static uint8_t sdramstatus = SDRAM_OK;
|
||||
/* SDRAM device configuration */
|
||||
sdramHandle.Instance = FMC_SDRAM_DEVICE;
|
||||
|
||||
/* Timing configuration for 100Mhz as SDRAM clock frequency (System clock is up to 200Mhz) */
|
||||
Timing.LoadToActiveDelay = 2;
|
||||
Timing.ExitSelfRefreshDelay = 7;
|
||||
Timing.SelfRefreshTime = 4;
|
||||
Timing.RowCycleDelay = 7;
|
||||
Timing.WriteRecoveryTime = 2;
|
||||
Timing.RPDelay = 2;
|
||||
Timing.RCDDelay = 2;
|
||||
|
||||
sdramHandle.Init.SDBank = FMC_SDRAM_BANK2;
|
||||
sdramHandle.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
|
||||
sdramHandle.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
|
||||
sdramHandle.Init.MemoryDataWidth = SDRAM_MEMORY_WIDTH;
|
||||
sdramHandle.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
|
||||
sdramHandle.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
|
||||
sdramHandle.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
|
||||
sdramHandle.Init.SDClockPeriod = SDCLOCK_PERIOD;
|
||||
sdramHandle.Init.ReadBurst = FMC_SDRAM_RBURST_ENABLE;
|
||||
sdramHandle.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
|
||||
|
||||
/* SDRAM controller initialization */
|
||||
|
||||
BSP_SDRAM_MspInit(&sdramHandle, NULL); /* __weak function can be rewritten by the application */
|
||||
|
||||
if(HAL_SDRAM_Init(&sdramHandle, &Timing) != HAL_OK)
|
||||
{
|
||||
sdramstatus = SDRAM_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* SDRAM initialization sequence */
|
||||
BSP_SDRAM_Initialization_sequence(REFRESH_COUNT);
|
||||
}
|
||||
|
||||
return sdramstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the SDRAM device.
|
||||
* @retval SDRAM status
|
||||
*/
|
||||
uint8_t BSP_SDRAM_DeInit(void)
|
||||
{
|
||||
static uint8_t sdramstatus = SDRAM_OK;
|
||||
/* SDRAM device de-initialization */
|
||||
sdramHandle.Instance = FMC_SDRAM_DEVICE;
|
||||
|
||||
if(HAL_SDRAM_DeInit(&sdramHandle) != HAL_OK)
|
||||
{
|
||||
sdramstatus = SDRAM_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* SDRAM controller de-initialization */
|
||||
BSP_SDRAM_MspDeInit(&sdramHandle, NULL);
|
||||
}
|
||||
|
||||
return sdramstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Programs the SDRAM device.
|
||||
* @param RefreshCount: SDRAM refresh counter value
|
||||
* @retval None
|
||||
*/
|
||||
void BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount)
|
||||
{
|
||||
__IO uint32_t tmpmrd = 0;
|
||||
|
||||
/* Step 1: Configure a clock configuration enable command */
|
||||
Command.CommandMode = FMC_SDRAM_CMD_CLK_ENABLE;
|
||||
Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
|
||||
Command.AutoRefreshNumber = 1;
|
||||
Command.ModeRegisterDefinition = 0;
|
||||
|
||||
/* Send the command */
|
||||
HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
|
||||
|
||||
/* Step 2: Insert 100 us minimum delay */
|
||||
/* Inserted delay is equal to 1 ms due to systick time base unit (ms) */
|
||||
HAL_Delay(1);
|
||||
|
||||
/* Step 3: Configure a PALL (precharge all) command */
|
||||
Command.CommandMode = FMC_SDRAM_CMD_PALL;
|
||||
Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
|
||||
Command.AutoRefreshNumber = 1;
|
||||
Command.ModeRegisterDefinition = 0;
|
||||
|
||||
/* Send the command */
|
||||
HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
|
||||
|
||||
/* Step 4: Configure an Auto Refresh command */
|
||||
Command.CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
|
||||
Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
|
||||
Command.AutoRefreshNumber = 8;
|
||||
Command.ModeRegisterDefinition = 0;
|
||||
|
||||
/* Send the command */
|
||||
HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
|
||||
|
||||
/* Step 5: Program the external memory mode register */
|
||||
tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1 |\
|
||||
SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL |\
|
||||
SDRAM_MODEREG_CAS_LATENCY_3 |\
|
||||
SDRAM_MODEREG_OPERATING_MODE_STANDARD |\
|
||||
SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
|
||||
|
||||
Command.CommandMode = FMC_SDRAM_CMD_LOAD_MODE;
|
||||
Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
|
||||
Command.AutoRefreshNumber = 1;
|
||||
Command.ModeRegisterDefinition = tmpmrd;
|
||||
|
||||
/* Send the command */
|
||||
HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
|
||||
|
||||
/* Step 6: Set the refresh rate counter */
|
||||
/* Set the device refresh rate */
|
||||
HAL_SDRAM_ProgramRefreshRate(&sdramHandle, RefreshCount);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads an amount of data from the SDRAM memory in polling mode.
|
||||
* @param uwStartAddress: Read start address
|
||||
* @param pData: Pointer to data to be read
|
||||
* @param uwDataSize: Size of read data from the memory
|
||||
* @retval SDRAM status
|
||||
*/
|
||||
uint8_t BSP_SDRAM_ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
|
||||
{
|
||||
if(HAL_SDRAM_Read_32b(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
|
||||
{
|
||||
return SDRAM_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
return SDRAM_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads an amount of data from the SDRAM memory in DMA mode.
|
||||
* @param uwStartAddress: Read start address
|
||||
* @param pData: Pointer to data to be read
|
||||
* @param uwDataSize: Size of read data from the memory
|
||||
* @retval SDRAM status
|
||||
*/
|
||||
uint8_t BSP_SDRAM_ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
|
||||
{
|
||||
if(HAL_SDRAM_Read_DMA(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
|
||||
{
|
||||
return SDRAM_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
return SDRAM_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes an amount of data to the SDRAM memory in polling mode.
|
||||
* @param uwStartAddress: Write start address
|
||||
* @param pData: Pointer to data to be written
|
||||
* @param uwDataSize: Size of written data from the memory
|
||||
* @retval SDRAM status
|
||||
*/
|
||||
uint8_t BSP_SDRAM_WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
|
||||
{
|
||||
if(HAL_SDRAM_Write_32b(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
|
||||
{
|
||||
return SDRAM_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
return SDRAM_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes an amount of data to the SDRAM memory in DMA mode.
|
||||
* @param uwStartAddress: Write start address
|
||||
* @param pData: Pointer to data to be written
|
||||
* @param uwDataSize: Size of written data from the memory
|
||||
* @retval SDRAM status
|
||||
*/
|
||||
uint8_t BSP_SDRAM_WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
|
||||
{
|
||||
if(HAL_SDRAM_Write_DMA(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
|
||||
{
|
||||
return SDRAM_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
return SDRAM_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends command to the SDRAM bank.
|
||||
* @param SdramCmd: Pointer to SDRAM command structure
|
||||
* @retval SDRAM status
|
||||
*/
|
||||
uint8_t BSP_SDRAM_Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd)
|
||||
{
|
||||
if(HAL_SDRAM_SendCommand(&sdramHandle, SdramCmd, SDRAM_TIMEOUT) != HAL_OK)
|
||||
{
|
||||
return SDRAM_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
return SDRAM_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes SDRAM MSP.
|
||||
* @param hsdram SDRAM handle
|
||||
* @param Params User parameters
|
||||
* @retval None
|
||||
*/
|
||||
__weak void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram, void *Params)
|
||||
{
|
||||
static MDMA_HandleTypeDef mdma_handle;
|
||||
GPIO_InitTypeDef gpio_init_structure;
|
||||
|
||||
/* Enable FMC clock */
|
||||
__HAL_RCC_FMC_CLK_ENABLE();
|
||||
|
||||
/* Enable chosen MDMAx clock */
|
||||
__MDMAx_CLK_ENABLE();
|
||||
|
||||
/* Enable GPIOs clock */
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
|
||||
/* Common GPIO configuration */
|
||||
gpio_init_structure.Mode = GPIO_MODE_AF_PP;
|
||||
gpio_init_structure.Pull = GPIO_PULLUP;
|
||||
gpio_init_structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
gpio_init_structure.Alternate = GPIO_AF12_FMC;
|
||||
|
||||
/* GPIOD configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_8| GPIO_PIN_9 | GPIO_PIN_10 |\
|
||||
GPIO_PIN_14 | GPIO_PIN_15;
|
||||
|
||||
|
||||
HAL_GPIO_Init(GPIOD, &gpio_init_structure);
|
||||
|
||||
/* GPIOE configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7| GPIO_PIN_8 | GPIO_PIN_9 |\
|
||||
GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
|
||||
GPIO_PIN_15;
|
||||
|
||||
HAL_GPIO_Init(GPIOE, &gpio_init_structure);
|
||||
|
||||
/* GPIOF configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2| GPIO_PIN_3 | GPIO_PIN_4 |\
|
||||
GPIO_PIN_5 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
|
||||
GPIO_PIN_15;
|
||||
|
||||
HAL_GPIO_Init(GPIOF, &gpio_init_structure);
|
||||
|
||||
/* GPIOG configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_8 | GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOG, &gpio_init_structure);
|
||||
|
||||
/* GPIOH configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 ;
|
||||
HAL_GPIO_Init(GPIOH, &gpio_init_structure);
|
||||
|
||||
|
||||
|
||||
/* Configure common MDMA parameters */
|
||||
mdma_handle.Init.Request = MDMA_REQUEST_SW;
|
||||
mdma_handle.Init.TransferTriggerMode = MDMA_BLOCK_TRANSFER;
|
||||
mdma_handle.Init.Priority = MDMA_PRIORITY_HIGH;
|
||||
mdma_handle.Init.Endianness = MDMA_LITTLE_ENDIANNESS_PRESERVE;
|
||||
mdma_handle.Init.SourceInc = MDMA_SRC_INC_WORD;
|
||||
mdma_handle.Init.DestinationInc = MDMA_DEST_INC_WORD;
|
||||
mdma_handle.Init.SourceDataSize = MDMA_SRC_DATASIZE_WORD;
|
||||
mdma_handle.Init.DestDataSize = MDMA_DEST_DATASIZE_WORD;
|
||||
mdma_handle.Init.DataAlignment = MDMA_DATAALIGN_PACKENABLE;
|
||||
mdma_handle.Init.SourceBurst = MDMA_SOURCE_BURST_SINGLE;
|
||||
mdma_handle.Init.DestBurst = MDMA_DEST_BURST_SINGLE;
|
||||
mdma_handle.Init.BufferTransferLength = 128;
|
||||
mdma_handle.Init.SourceBlockAddressOffset = 0;
|
||||
mdma_handle.Init.DestBlockAddressOffset = 0;
|
||||
|
||||
|
||||
mdma_handle.Instance = SDRAM_MDMAx_CHANNEL;
|
||||
|
||||
/* Associate the DMA handle */
|
||||
__HAL_LINKDMA(hsdram, hmdma, mdma_handle);
|
||||
|
||||
/* Deinitialize the stream for new transfer */
|
||||
HAL_MDMA_DeInit(&mdma_handle);
|
||||
|
||||
/* Configure the DMA stream */
|
||||
HAL_MDMA_Init(&mdma_handle);
|
||||
|
||||
/* NVIC configuration for DMA transfer complete interrupt */
|
||||
HAL_NVIC_SetPriority(SDRAM_MDMAx_IRQn, 0x0F, 0);
|
||||
HAL_NVIC_EnableIRQ(SDRAM_MDMAx_IRQn);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes SDRAM MSP.
|
||||
* @param hsdram SDRAM handle
|
||||
* @param Params User parameters
|
||||
* @retval None
|
||||
*/
|
||||
__weak void BSP_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram, void *Params)
|
||||
{
|
||||
static MDMA_HandleTypeDef mdma_handle;
|
||||
|
||||
/* Disable NVIC configuration for DMA interrupt */
|
||||
HAL_NVIC_DisableIRQ(SDRAM_MDMAx_IRQn);
|
||||
|
||||
/* Deinitialize the stream for new transfer */
|
||||
mdma_handle.Instance = SDRAM_MDMAx_CHANNEL;
|
||||
HAL_MDMA_DeInit(&mdma_handle);
|
||||
|
||||
/* GPIO pins clock, FMC clock and MDMA clock can be shut down in the applications
|
||||
by surcharging this __weak function */
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+133
@@ -0,0 +1,133 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h745i_discovery_sdram.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32h745i_discovery_sdram.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32H745I_DISCOVERY_SDRAM_H
|
||||
#define __STM32H745I_DISCOVERY_SDRAM_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7xx_hal.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY_SDRAM
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_SDRAM_Exported_Constants Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SDRAM status structure definition
|
||||
*/
|
||||
#define SDRAM_OK ((uint8_t)0x00)
|
||||
#define SDRAM_ERROR ((uint8_t)0x01)
|
||||
|
||||
#define SDRAM_DEVICE_ADDR ((uint32_t)0xD0000000)
|
||||
#define SDRAM_DEVICE_SIZE ((uint32_t)0x2000000) /* SDRAM device size in MBytes */
|
||||
|
||||
/* #define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_8 */
|
||||
#define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_16
|
||||
/* #define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_32 */
|
||||
|
||||
#define SDCLOCK_PERIOD FMC_SDRAM_CLOCK_PERIOD_2
|
||||
/* #define SDCLOCK_PERIOD FMC_SDRAM_CLOCK_PERIOD_3 */
|
||||
|
||||
#define REFRESH_COUNT ((uint32_t)0x0603) /* SDRAM refresh counter (100Mhz SD clock) */
|
||||
|
||||
#define SDRAM_TIMEOUT ((uint32_t)0xFFFF)
|
||||
|
||||
/* DMA definitions for SDRAM DMA transfer */
|
||||
#define __MDMAx_CLK_ENABLE __HAL_RCC_MDMA_CLK_ENABLE
|
||||
#define __MDMAx_CLK_DISABLE __HAL_RCC_MDMA_CLK_DISABLE
|
||||
#define SDRAM_MDMAx_CHANNEL MDMA_Channel0
|
||||
#define SDRAM_MDMAx_IRQn MDMA_IRQn
|
||||
|
||||
/**
|
||||
* @brief FMC SDRAM Mode definition register defines
|
||||
*/
|
||||
#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000)
|
||||
#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001)
|
||||
#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002)
|
||||
#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004)
|
||||
#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)
|
||||
#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)
|
||||
#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020)
|
||||
#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030)
|
||||
#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000)
|
||||
#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
|
||||
#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_SDRAM_Exported_Functions Exported Functions
|
||||
* @{
|
||||
*/
|
||||
uint8_t BSP_SDRAM_Init(void);
|
||||
uint8_t BSP_SDRAM_DeInit(void);
|
||||
void BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount);
|
||||
uint8_t BSP_SDRAM_ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
|
||||
uint8_t BSP_SDRAM_ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
|
||||
uint8_t BSP_SDRAM_WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
|
||||
uint8_t BSP_SDRAM_WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
|
||||
uint8_t BSP_SDRAM_Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd);
|
||||
|
||||
/* These functions can be modified in case the current settings (e.g. DMA stream)
|
||||
need to be changed for specific application needs */
|
||||
void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram, void *Params);
|
||||
void BSP_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram, void *Params);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32H745I_DISCOVERY_SDRAM_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+417
@@ -0,0 +1,417 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h745i_discovery_ts.c
|
||||
* @author MCD Application Team
|
||||
* @brief This file provides a set of functions needed to manage the Touch
|
||||
* Screen on STM32H745I_DISCOVERY discovery board.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/*
|
||||
@verbatim
|
||||
1. How To use this driver:
|
||||
--------------------------
|
||||
- This driver is used to drive the touch screen module of the STM32H745I_Discovery
|
||||
board on the RK043FN48H-CT672B 480x272 LCD screen with capacitive touch screen.
|
||||
- The FT5336 component driver must be included in project files according to
|
||||
the touch screen driver present on this board.
|
||||
|
||||
2. Driver description:
|
||||
---------------------
|
||||
+ Initialization steps:
|
||||
o Initialize the TS module using the BSP_TS_Init() function. This
|
||||
function includes the MSP layer hardware resources initialization and the
|
||||
communication layer configuration to start the TS use. The LCD size properties
|
||||
(x and y) are passed as parameters.
|
||||
o If TS interrupt mode is desired, you must configure the TS interrupt mode
|
||||
by calling the function BSP_TS_ITConfig(). The TS interrupt mode is generated
|
||||
as an external interrupt whenever a touch is detected.
|
||||
The interrupt mode internally uses the IO functionalities driver driven by
|
||||
the IO expander, to configure the IT line.
|
||||
|
||||
+ Touch screen use
|
||||
o The touch screen state is captured whenever the function BSP_TS_GetState() is
|
||||
used. This function returns information about the last LCD touch occurred
|
||||
in the TS_StateTypeDef structure.
|
||||
o If TS interrupt mode is used, the function BSP_TS_ITGetStatus() is needed to get
|
||||
the interrupt status. To clear the IT pending bits, you should call the
|
||||
function BSP_TS_ITClear().
|
||||
o The IT is handled using the corresponding external interrupt IRQ handler,
|
||||
the user IT callback treatment is implemented on the same external interrupt
|
||||
callback.
|
||||
*/
|
||||
|
||||
/* Dependencies
|
||||
- stm32h745_discovery_lcd.c
|
||||
- ft5336.c
|
||||
EndDependencies */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h745i_discovery.h"
|
||||
#include "stm32h745i_discovery_ts.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_TS STM32H745I_DISCOVERY_TS
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_TS_Private_Variables Private Variables
|
||||
* @{
|
||||
*/
|
||||
static TS_DrvTypeDef *tsDriver;
|
||||
static uint16_t tsXBoundary, tsYBoundary;
|
||||
static uint8_t tsOrientation;
|
||||
static uint8_t I2cAddress;
|
||||
|
||||
/* Table for touchscreen event information display on LCD : table indexed on enum @ref TS_TouchEventTypeDef information */
|
||||
char * ts_event_string_tab[TOUCH_EVENT_NB_MAX] = { "None",
|
||||
"Press down",
|
||||
"Lift up",
|
||||
"Contact"
|
||||
};
|
||||
|
||||
/* Table for touchscreen gesture Id information display on LCD : table indexed on enum @ref TS_GestureIdTypeDef information */
|
||||
char * ts_gesture_id_string_tab[GEST_ID_NB_MAX] = { "None",
|
||||
"Move Up",
|
||||
"Move Right",
|
||||
"Move Down",
|
||||
"Move Left",
|
||||
"Zoom In",
|
||||
"Zoom Out"
|
||||
};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_TS_Private_Function_Prototypes Private Function Prototypes
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_TS_Exported_Functions Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initializes and configures the touch screen functionalities and
|
||||
* configures all necessary hardware resources (GPIOs, I2C, clocks..).
|
||||
* @param ts_SizeX: Maximum X size of the TS area on LCD
|
||||
* @param ts_SizeY: Maximum Y size of the TS area on LCD
|
||||
* @retval TS_OK if all initializations are OK. Other value if error.
|
||||
*/
|
||||
uint8_t BSP_TS_Init(uint16_t ts_SizeX, uint16_t ts_SizeY)
|
||||
{
|
||||
uint8_t status = TS_OK;
|
||||
tsXBoundary = ts_SizeX;
|
||||
tsYBoundary = ts_SizeY;
|
||||
|
||||
/* Read ID and verify if the touch screen driver is ready */
|
||||
ft5336_ts_drv.Init(TS_I2C_ADDRESS);
|
||||
if(ft5336_ts_drv.ReadID(TS_I2C_ADDRESS) == FT5336_ID_VALUE)
|
||||
{
|
||||
/* Initialize the TS driver structure */
|
||||
tsDriver = &ft5336_ts_drv;
|
||||
I2cAddress = TS_I2C_ADDRESS;
|
||||
tsOrientation = TS_SWAP_XY;
|
||||
|
||||
/* Initialize the TS driver */
|
||||
tsDriver->Start(I2cAddress);
|
||||
}
|
||||
else
|
||||
{
|
||||
status = TS_DEVICE_NOT_FOUND;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the TouchScreen.
|
||||
* @retval TS state
|
||||
*/
|
||||
uint8_t BSP_TS_DeInit(void)
|
||||
{
|
||||
/* Actually ts_driver does not provide a DeInit function */
|
||||
return TS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures and enables the touch screen interrupts.
|
||||
* @retval TS_OK if all initializations are OK. Other value if error.
|
||||
*/
|
||||
uint8_t BSP_TS_ITConfig(void)
|
||||
{
|
||||
GPIO_InitTypeDef gpio_init_structure;
|
||||
|
||||
/* Configure Interrupt mode for SD detection pin */
|
||||
gpio_init_structure.Pin = TS_INT_PIN;
|
||||
gpio_init_structure.Pull = GPIO_NOPULL;
|
||||
gpio_init_structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
gpio_init_structure.Mode = GPIO_MODE_IT_RISING;
|
||||
HAL_GPIO_Init(TS_INT_GPIO_PORT, &gpio_init_structure);
|
||||
|
||||
/* Enable and set Touch screen EXTI Interrupt to the lowest priority */
|
||||
HAL_NVIC_SetPriority((IRQn_Type)(TS_INT_EXTI_IRQn), 0x0F, 0x00);
|
||||
HAL_NVIC_EnableIRQ((IRQn_Type)(TS_INT_EXTI_IRQn));
|
||||
|
||||
/* Enable the TS ITs */
|
||||
tsDriver->EnableIT(I2cAddress);
|
||||
|
||||
return TS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Gets the touch screen interrupt status.
|
||||
* @retval TS_OK if all initializations are OK. Other value if error.
|
||||
*/
|
||||
uint8_t BSP_TS_ITGetStatus(void)
|
||||
{
|
||||
/* Return the TS IT status */
|
||||
return (tsDriver->GetITStatus(I2cAddress));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns status and positions of the touch screen.
|
||||
* @param TS_State: Pointer to touch screen current state structure
|
||||
* @retval TS_OK if all initializations are OK. Other value if error.
|
||||
*/
|
||||
uint8_t BSP_TS_GetState(TS_StateTypeDef *TS_State)
|
||||
{
|
||||
static uint32_t _x[TS_MAX_NB_TOUCH] = {0, 0};
|
||||
static uint32_t _y[TS_MAX_NB_TOUCH] = {0, 0};
|
||||
uint8_t ts_status = TS_OK;
|
||||
uint16_t x[TS_MAX_NB_TOUCH];
|
||||
uint16_t y[TS_MAX_NB_TOUCH];
|
||||
uint16_t brute_x[TS_MAX_NB_TOUCH];
|
||||
uint16_t brute_y[TS_MAX_NB_TOUCH];
|
||||
uint16_t x_diff;
|
||||
uint16_t y_diff;
|
||||
uint32_t index;
|
||||
#if (TS_MULTI_TOUCH_SUPPORTED == 1)
|
||||
uint32_t weight = 0;
|
||||
uint32_t area = 0;
|
||||
uint32_t event = 0;
|
||||
#endif /* TS_MULTI_TOUCH_SUPPORTED == 1 */
|
||||
|
||||
/* Check and update the number of touches active detected */
|
||||
TS_State->touchDetected = tsDriver->DetectTouch(I2cAddress);
|
||||
|
||||
if(TS_State->touchDetected)
|
||||
{
|
||||
for(index=0; index < TS_State->touchDetected; index++)
|
||||
{
|
||||
/* Get each touch coordinates */
|
||||
tsDriver->GetXY(I2cAddress, &(brute_x[index]), &(brute_y[index]));
|
||||
|
||||
if(tsOrientation == TS_SWAP_NONE)
|
||||
{
|
||||
x[index] = brute_x[index];
|
||||
y[index] = brute_y[index];
|
||||
}
|
||||
|
||||
if(tsOrientation & TS_SWAP_X)
|
||||
{
|
||||
x[index] = 4096 - brute_x[index];
|
||||
}
|
||||
|
||||
if(tsOrientation & TS_SWAP_Y)
|
||||
{
|
||||
y[index] = 4096 - brute_y[index];
|
||||
}
|
||||
|
||||
if(tsOrientation & TS_SWAP_XY)
|
||||
{
|
||||
y[index] = brute_x[index];
|
||||
x[index] = brute_y[index];
|
||||
}
|
||||
|
||||
x_diff = x[index] > _x[index]? (x[index] - _x[index]): (_x[index] - x[index]);
|
||||
y_diff = y[index] > _y[index]? (y[index] - _y[index]): (_y[index] - y[index]);
|
||||
|
||||
if ((x_diff + y_diff) > 5)
|
||||
{
|
||||
_x[index] = x[index];
|
||||
_y[index] = y[index];
|
||||
}
|
||||
|
||||
if(I2cAddress == FT5336_I2C_SLAVE_ADDRESS)
|
||||
{
|
||||
TS_State->touchX[index] = x[index];
|
||||
TS_State->touchY[index] = y[index];
|
||||
}
|
||||
else
|
||||
{
|
||||
/* 2^12 = 4096 : indexes are expressed on a dynamic of 4096 */
|
||||
TS_State->touchX[index] = (tsXBoundary * _x[index]) >> 12;
|
||||
TS_State->touchY[index] = (tsYBoundary * _y[index]) >> 12;
|
||||
}
|
||||
|
||||
#if (TS_MULTI_TOUCH_SUPPORTED == 1)
|
||||
|
||||
/* Get touch info related to the current touch */
|
||||
ft5336_TS_GetTouchInfo(I2cAddress, index, &weight, &area, &event);
|
||||
|
||||
/* Update TS_State structure */
|
||||
TS_State->touchWeight[index] = weight;
|
||||
TS_State->touchArea[index] = area;
|
||||
|
||||
/* Remap touch event */
|
||||
switch(event)
|
||||
{
|
||||
case FT5336_TOUCH_EVT_FLAG_PRESS_DOWN :
|
||||
TS_State->touchEventId[index] = TOUCH_EVENT_PRESS_DOWN;
|
||||
break;
|
||||
case FT5336_TOUCH_EVT_FLAG_LIFT_UP :
|
||||
TS_State->touchEventId[index] = TOUCH_EVENT_LIFT_UP;
|
||||
break;
|
||||
case FT5336_TOUCH_EVT_FLAG_CONTACT :
|
||||
TS_State->touchEventId[index] = TOUCH_EVENT_CONTACT;
|
||||
break;
|
||||
case FT5336_TOUCH_EVT_FLAG_NO_EVENT :
|
||||
TS_State->touchEventId[index] = TOUCH_EVENT_NO_EVT;
|
||||
break;
|
||||
default :
|
||||
ts_status = TS_ERROR;
|
||||
break;
|
||||
} /* of switch(event) */
|
||||
|
||||
#endif /* TS_MULTI_TOUCH_SUPPORTED == 1 */
|
||||
|
||||
} /* of for(index=0; index < TS_State->touchDetected; index++) */
|
||||
|
||||
#if (TS_MULTI_TOUCH_SUPPORTED == 1)
|
||||
/* Get gesture Id */
|
||||
ts_status = BSP_TS_Get_GestureId(TS_State);
|
||||
#endif /* TS_MULTI_TOUCH_SUPPORTED == 1 */
|
||||
|
||||
} /* end of if(TS_State->touchDetected != 0) */
|
||||
|
||||
return (ts_status);
|
||||
}
|
||||
|
||||
#if (TS_MULTI_TOUCH_SUPPORTED == 1)
|
||||
/**
|
||||
* @brief Update gesture Id following a touch detected.
|
||||
* @param TS_State: Pointer to touch screen current state structure
|
||||
* @retval TS_OK if all initializations are OK. Other value if error.
|
||||
*/
|
||||
uint8_t BSP_TS_Get_GestureId(TS_StateTypeDef *TS_State)
|
||||
{
|
||||
uint32_t gestureId = 0;
|
||||
uint8_t ts_status = TS_OK;
|
||||
|
||||
/* Get gesture Id */
|
||||
ft5336_TS_GetGestureID(I2cAddress, &gestureId);
|
||||
|
||||
/* Remap gesture Id to a TS_GestureIdTypeDef value */
|
||||
switch(gestureId)
|
||||
{
|
||||
case FT5336_GEST_ID_NO_GESTURE :
|
||||
TS_State->gestureId = GEST_ID_NO_GESTURE;
|
||||
break;
|
||||
case FT5336_GEST_ID_MOVE_UP :
|
||||
TS_State->gestureId = GEST_ID_MOVE_UP;
|
||||
break;
|
||||
case FT5336_GEST_ID_MOVE_RIGHT :
|
||||
TS_State->gestureId = GEST_ID_MOVE_RIGHT;
|
||||
break;
|
||||
case FT5336_GEST_ID_MOVE_DOWN :
|
||||
TS_State->gestureId = GEST_ID_MOVE_DOWN;
|
||||
break;
|
||||
case FT5336_GEST_ID_MOVE_LEFT :
|
||||
TS_State->gestureId = GEST_ID_MOVE_LEFT;
|
||||
break;
|
||||
case FT5336_GEST_ID_ZOOM_IN :
|
||||
TS_State->gestureId = GEST_ID_ZOOM_IN;
|
||||
break;
|
||||
case FT5336_GEST_ID_ZOOM_OUT :
|
||||
TS_State->gestureId = GEST_ID_ZOOM_OUT;
|
||||
break;
|
||||
default :
|
||||
ts_status = TS_ERROR;
|
||||
break;
|
||||
} /* of switch(gestureId) */
|
||||
|
||||
return(ts_status);
|
||||
}
|
||||
#endif /* TS_MULTI_TOUCH_SUPPORTED == 1 */
|
||||
|
||||
/**
|
||||
* @brief Clears all touch screen interrupts.
|
||||
*/
|
||||
void BSP_TS_ITClear(void)
|
||||
{
|
||||
/* Clear TS IT pending bits */
|
||||
tsDriver->ClearIT(I2cAddress);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function used to reset all touch data before a new acquisition
|
||||
* of touch information.
|
||||
* @param TS_State: Pointer to touch screen current state structure
|
||||
* @retval TS_OK if OK, TE_ERROR if problem found.
|
||||
*/
|
||||
uint8_t BSP_TS_ResetTouchData(TS_StateTypeDef *TS_State)
|
||||
{
|
||||
uint8_t ts_status = TS_ERROR;
|
||||
uint32_t index;
|
||||
|
||||
if (TS_State != (TS_StateTypeDef *)NULL)
|
||||
{
|
||||
TS_State->gestureId = GEST_ID_NO_GESTURE;
|
||||
TS_State->touchDetected = 0;
|
||||
|
||||
for(index = 0; index < TS_MAX_NB_TOUCH; index++)
|
||||
{
|
||||
TS_State->touchX[index] = 0;
|
||||
TS_State->touchY[index] = 0;
|
||||
TS_State->touchArea[index] = 0;
|
||||
TS_State->touchEventId[index] = TOUCH_EVENT_NO_EVT;
|
||||
TS_State->touchWeight[index] = 0;
|
||||
}
|
||||
|
||||
ts_status = TS_OK;
|
||||
|
||||
} /* of if (TS_State != (TS_StateTypeDef *)NULL) */
|
||||
|
||||
return (ts_status);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+196
@@ -0,0 +1,196 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h745i_discovery_ts.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32h745i_discovery_ts.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32H745I_DISCOVERY_TS_H
|
||||
#define __STM32H745I_DISCOVERY_TS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h745i_discovery.h"
|
||||
/* Include touch screen FT5336 component Driver */
|
||||
#include "../Components/ft5336/ft5336.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY_TS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_TS_Exported_Constants Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief With FT5336 : maximum 5 touches detected simultaneously
|
||||
*/
|
||||
#define TS_MAX_NB_TOUCH ((uint32_t) FT5336_MAX_DETECTABLE_TOUCH)
|
||||
|
||||
#define TS_NO_IRQ_PENDING ((uint8_t) 0)
|
||||
#define TS_IRQ_PENDING ((uint8_t) 1)
|
||||
|
||||
#define TS_SWAP_NONE ((uint8_t) 0x01)
|
||||
#define TS_SWAP_X ((uint8_t) 0x02)
|
||||
#define TS_SWAP_Y ((uint8_t) 0x04)
|
||||
#define TS_SWAP_XY ((uint8_t) 0x08)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_TS_Exported_Types Exported Types
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief TS_StateTypeDef
|
||||
* Define TS State structure
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8_t touchDetected; /*!< Total number of active touches detected at last scan */
|
||||
uint16_t touchX[TS_MAX_NB_TOUCH]; /*!< Touch X[0], X[1] coordinates on 12 bits */
|
||||
uint16_t touchY[TS_MAX_NB_TOUCH]; /*!< Touch Y[0], Y[1] coordinates on 12 bits */
|
||||
|
||||
#if (TS_MULTI_TOUCH_SUPPORTED == 1)
|
||||
uint8_t touchWeight[TS_MAX_NB_TOUCH]; /*!< Touch_Weight[0], Touch_Weight[1] : weight property of touches */
|
||||
uint8_t touchEventId[TS_MAX_NB_TOUCH]; /*!< Touch_EventId[0], Touch_EventId[1] : take value of type @ref TS_TouchEventTypeDef */
|
||||
uint8_t touchArea[TS_MAX_NB_TOUCH]; /*!< Touch_Area[0], Touch_Area[1] : touch area of each touch */
|
||||
uint32_t gestureId; /*!< type of gesture detected : take value of type @ref TS_GestureIdTypeDef */
|
||||
#endif /* TS_MULTI_TOUCH_SUPPORTED == 1 */
|
||||
|
||||
} TS_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_TS_Exported_Constants Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
TS_OK = 0x00, /*!< Touch Ok */
|
||||
TS_ERROR = 0x01, /*!< Touch Error */
|
||||
TS_TIMEOUT = 0x02, /*!< Touch Timeout */
|
||||
TS_DEVICE_NOT_FOUND = 0x03 /*!< Touchscreen device not found */
|
||||
}TS_StatusTypeDef;
|
||||
|
||||
/**
|
||||
* @brief TS_GestureIdTypeDef
|
||||
* Define Possible managed gesture identification values returned by touch screen
|
||||
* driver.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
GEST_ID_NO_GESTURE = 0x00, /*!< Gesture not defined / recognized */
|
||||
GEST_ID_MOVE_UP = 0x01, /*!< Gesture Move Up */
|
||||
GEST_ID_MOVE_RIGHT = 0x02, /*!< Gesture Move Right */
|
||||
GEST_ID_MOVE_DOWN = 0x03, /*!< Gesture Move Down */
|
||||
GEST_ID_MOVE_LEFT = 0x04, /*!< Gesture Move Left */
|
||||
GEST_ID_ZOOM_IN = 0x05, /*!< Gesture Zoom In */
|
||||
GEST_ID_ZOOM_OUT = 0x06, /*!< Gesture Zoom Out */
|
||||
GEST_ID_NB_MAX = 0x07 /*!< max number of gesture id */
|
||||
|
||||
} TS_GestureIdTypeDef;
|
||||
|
||||
/**
|
||||
* @brief TS_TouchEventTypeDef
|
||||
* Define Possible touch events kind as returned values
|
||||
* by touch screen IC Driver.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TOUCH_EVENT_NO_EVT = 0x00, /*!< Touch Event : undetermined */
|
||||
TOUCH_EVENT_PRESS_DOWN = 0x01, /*!< Touch Event Press Down */
|
||||
TOUCH_EVENT_LIFT_UP = 0x02, /*!< Touch Event Lift Up */
|
||||
TOUCH_EVENT_CONTACT = 0x03, /*!< Touch Event Contact */
|
||||
TOUCH_EVENT_NB_MAX = 0x04 /*!< max number of touch events kind */
|
||||
|
||||
} TS_TouchEventTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H745I_DISCOVERY_TS_Imported_Variables Imported Variables
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Table for touchscreen event information display on LCD :
|
||||
* table indexed on enum @ref TS_TouchEventTypeDef information
|
||||
*/
|
||||
extern char * ts_event_string_tab[TOUCH_EVENT_NB_MAX];
|
||||
|
||||
/**
|
||||
* @brief Table for touchscreen gesture Id information display on LCD : table indexed
|
||||
* on enum @ref TS_GestureIdTypeDef information
|
||||
*/
|
||||
extern char * ts_gesture_id_string_tab[GEST_ID_NB_MAX];
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H745I_DISCOVERY_TS_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
uint8_t BSP_TS_Init(uint16_t ts_SizeX, uint16_t ts_SizeY);
|
||||
uint8_t BSP_TS_DeInit(void);
|
||||
uint8_t BSP_TS_GetState(TS_StateTypeDef *TS_State);
|
||||
|
||||
#if (TS_MULTI_TOUCH_SUPPORTED == 1)
|
||||
uint8_t BSP_TS_Get_GestureId(TS_StateTypeDef *TS_State);
|
||||
#endif /* TS_MULTI_TOUCH_SUPPORTED == 1 */
|
||||
|
||||
uint8_t BSP_TS_ITConfig(void);
|
||||
uint8_t BSP_TS_ITGetStatus(void);
|
||||
void BSP_TS_ITClear(void);
|
||||
uint8_t BSP_TS_ResetTouchData(TS_StateTypeDef *TS_State);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32H745I_DISCOVERY_TS_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+26919
File diff suppressed because it is too large
Load Diff
+206
@@ -0,0 +1,206 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7xx.h
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS STM32H7xx Device Peripheral Access Layer Header File.
|
||||
*
|
||||
* The file is the unique include file that the application programmer
|
||||
* is using in the C source code, usually in main.c. This file contains:
|
||||
* - Configuration section that allows to select:
|
||||
* - The STM32H7xx device used in the target application
|
||||
* - To use or not the peripheral’s drivers in application code(i.e.
|
||||
* code will be based on direct access to peripheral’s registers
|
||||
* rather than drivers API), this option is controlled by
|
||||
* "#define USE_HAL_DRIVER"
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32h7xx
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef STM32H7xx_H
|
||||
#define STM32H7xx_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/** @addtogroup Library_configuration_section
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief STM32 Family
|
||||
*/
|
||||
#if !defined (STM32H7)
|
||||
#define STM32H7
|
||||
#endif /* STM32H7 */
|
||||
|
||||
|
||||
/* Uncomment the line below according to the target STM32H7 device used in your
|
||||
application
|
||||
*/
|
||||
|
||||
#if !defined (STM32H743xx) && !defined (STM32H753xx) && !defined (STM32H750xx) && !defined (STM32H742xx) && \
|
||||
!defined (STM32H745xx) && !defined (STM32H755xx) && !defined (STM32H747xx) && !defined (STM32H757xx)
|
||||
/* #define STM32H742xx */ /*!< STM32H742VI, STM32H742ZI, STM32H742AI, STM32H742II, STM32H742BI, STM32H742XI Devices */
|
||||
/* #define STM32H743xx */ /*!< STM32H743VI, STM32H743ZI, STM32H743AI, STM32H743II, STM32H743BI, STM32H743XI Devices */
|
||||
/* #define STM32H753xx */ /*!< STM32H753VI, STM32H753ZI, STM32H753AI, STM32H753II, STM32H753BI, STM32H753XI Devices */
|
||||
/* #define STM32H750xx */ /*!< STM32H750V, STM32H750I, STM32H750X Devices */
|
||||
/* #define STM32H747xx */ /*!< STM32H747ZI, STM32H747AI, STM32H747II, STM32H747BI, STM32H747XI Devices */
|
||||
/* #define STM32H757xx */ /*!< STM32H757ZI, STM32H757AI, STM32H757II, STM32H757BI, STM32H757XI Devices */
|
||||
/* #define STM32H745xx */ /*!< STM32H745ZI, STM32H745II, STM32H745BI, STM32H745XI Devices */
|
||||
/* #define STM32H755xx */ /*!< STM32H755ZI, STM32H755II, STM32H755BI, STM32H755XI Devices */
|
||||
#endif
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||
devices, you can define the device in your toolchain compiler preprocessor.
|
||||
*/
|
||||
|
||||
#if defined(DUAL_CORE) && !defined(CORE_CM4) && !defined(CORE_CM7)
|
||||
#error "Dual core device, please select CORE_CM4 or CORE_CM7"
|
||||
#endif
|
||||
|
||||
#if !defined (USE_HAL_DRIVER)
|
||||
/**
|
||||
* @brief Comment the line below if you will not use the peripherals drivers.
|
||||
In this case, these drivers will not be included and the application code will
|
||||
be based on direct access to peripherals registers
|
||||
*/
|
||||
/*#define USE_HAL_DRIVER */
|
||||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
/**
|
||||
* @brief CMSIS Device version number V1.5.0
|
||||
*/
|
||||
#define __STM32H7xx_CMSIS_DEVICE_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||
#define __STM32H7xx_CMSIS_DEVICE_VERSION_SUB1 (0x05) /*!< [23:16] sub1 version */
|
||||
#define __STM32H7xx_CMSIS_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||
#define __STM32H7xx_CMSIS_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32H7xx_CMSIS_DEVICE_VERSION ((__CMSIS_DEVICE_VERSION_MAIN << 24)\
|
||||
|(__CMSIS_DEVICE_HAL_VERSION_SUB1 << 16)\
|
||||
|(__CMSIS_DEVICE_HAL_VERSION_SUB2 << 8 )\
|
||||
|(__CMSIS_DEVICE_HAL_VERSION_RC))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Device_Included
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(STM32H743xx)
|
||||
#include "stm32h743xx.h"
|
||||
#elif defined(STM32H753xx)
|
||||
#include "stm32h753xx.h"
|
||||
#elif defined(STM32H750xx)
|
||||
#include "stm32h750xx.h"
|
||||
#elif defined(STM32H742xx)
|
||||
#include "stm32h742xx.h"
|
||||
#elif defined(STM32H745xx)
|
||||
#include "stm32h745xx.h"
|
||||
#elif defined(STM32H755xx)
|
||||
#include "stm32h755xx.h"
|
||||
#elif defined(STM32H747xx)
|
||||
#include "stm32h747xx.h"
|
||||
#elif defined(STM32H757xx)
|
||||
#include "stm32h757xx.h"
|
||||
#else
|
||||
#error "Please select first the target STM32H7xx device used in your application (in stm32h7xx.h file)"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Exported_types
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
RESET = 0,
|
||||
SET = !RESET
|
||||
} FlagStatus, ITStatus;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DISABLE = 0,
|
||||
ENABLE = !DISABLE
|
||||
} FunctionalState;
|
||||
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
|
||||
|
||||
typedef enum
|
||||
{
|
||||
ERROR = 0,
|
||||
SUCCESS = !ERROR
|
||||
} ErrorStatus;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup Exported_macros
|
||||
* @{
|
||||
*/
|
||||
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
|
||||
|
||||
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
|
||||
|
||||
#define READ_BIT(REG, BIT) ((REG) & (BIT))
|
||||
|
||||
#define CLEAR_REG(REG) ((REG) = (0x0))
|
||||
|
||||
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
|
||||
|
||||
#define READ_REG(REG) ((REG))
|
||||
|
||||
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
|
||||
|
||||
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined (USE_HAL_DRIVER)
|
||||
#include "stm32h7xx_hal.h"
|
||||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* STM32H7xx_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+105
@@ -0,0 +1,105 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32h7xx.h
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-Mx Device System Source File for STM32H7xx devices.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32h7xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Define to prevent recursive inclusion
|
||||
*/
|
||||
#ifndef SYSTEM_STM32H7XX_H
|
||||
#define SYSTEM_STM32H7XX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Exported_types
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetSysClockFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
extern uint32_t SystemCoreClock; /*!< System Domain1 Clock Frequency */
|
||||
extern uint32_t SystemD2Clock; /*!< System Domain2 Clock Frequency */
|
||||
extern const uint8_t D1CorePrescTable[16] ; /*!< D1CorePrescTable prescalers table values */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern void SystemInit(void);
|
||||
extern void SystemCoreClockUpdate(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* SYSTEM_STM32H7XX_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+210
@@ -0,0 +1,210 @@
|
||||
<!DOCTYPE html>
|
||||
<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
|
||||
<head>
|
||||
<meta charset="utf-8" />
|
||||
<meta name="generator" content="pandoc" />
|
||||
<meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
|
||||
<title>Release Notes for STM32H7xx CMSIS</title>
|
||||
<style type="text/css">
|
||||
code{white-space: pre-wrap;}
|
||||
span.smallcaps{font-variant: small-caps;}
|
||||
span.underline{text-decoration: underline;}
|
||||
div.column{display: inline-block; vertical-align: top; width: 50%;}
|
||||
</style>
|
||||
<link rel="stylesheet" href="../../../../../_htmresc/mini-st.css" />
|
||||
<!--[if lt IE 9]>
|
||||
<script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
|
||||
<![endif]-->
|
||||
</head>
|
||||
<body>
|
||||
<div class="row">
|
||||
<div class="col-sm-12 col-lg-4">
|
||||
<div class="card fluid">
|
||||
<div class="sectione dark">
|
||||
<center>
|
||||
<h1 id="release-notes-for-stm32h7xx-cmsis"><strong>Release Notes for STM32H7xx CMSIS</strong></h1>
|
||||
<p>Copyright © 2017 STMicroelectronics<br />
|
||||
</p>
|
||||
<a href="https://www.st.com" class="logo"><img src="../../../../../_htmresc/st_logo.png" alt="ST logo" /></a>
|
||||
</center>
|
||||
</div>
|
||||
</div>
|
||||
<h1 id="license"><strong>License</strong></h1>
|
||||
This software component is licensed by ST under BSD 3-Clause license, the “License”; You may not use this component except in compliance with the License. You may obtain a copy of the License at:
|
||||
<center>
|
||||
<a href="https://opensource.org/licenses/BSD-3-Clause">https://opensource.org/licenses/BSD-3-Clause</a>
|
||||
</center>
|
||||
</div>
|
||||
<div class="col-sm-12 col-lg-8">
|
||||
<h1 id="update-history"><strong>Update History</strong></h1>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section7" checked aria-hidden="true"> <label for="collapse-section7" aria-hidden="true"><strong>V1.5.0 / 05-April-2019</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes">Main Changes</h2>
|
||||
<ul>
|
||||
<li>General updates to align Bit and registers definition with the STM32H7 reference manual</li>
|
||||
<li>Updates to aligned with STM32H7xx <strong>rev.V</strong> devices</li>
|
||||
<li>Add support of stm32h745xx, stm32h747xx, stm32h755xx, stm32h757xx <strong>Dual Core</strong> devices and STM32H742xx (new single core device):
|
||||
<ul>
|
||||
<li>Add “stm32h745xx.h” , “stm32h747xx.h”, “stm32h755xx.h”, “stm32h757xx.h” and “stm32h742xx.h” files</li>
|
||||
<li>Add startup files “startup_stm32h745xx.s”, “startup_stm32h747xx.s”, “startup_stm32h755xx.s”, “startup_stm32h757xx.s” and “startup_stm32h742xx.s” for EWARM , MDK-ARM and SW4STM32 toolchains</li>
|
||||
<li>Add part numbers list to stm32h7xx.h header file:
|
||||
<ul>
|
||||
<li>STM32H742xx: STM32H742VI, STM32H742ZI, STM32H742AI, STM32H742II, STM32H742BI, STM32H742XI</li>
|
||||
<li>STM32H743xx: STM32H743VI, STM32H743ZI, STM32H743AI, STM32H743II, STM32H743BI, STM32H743XI</li>
|
||||
<li>STM32H753xx: STM32H753VI, STM32H753ZI, STM32H753AI, STM32H753II, STM32H753BI, STM32H753XI</li>
|
||||
<li>STM32H750xx: STM32H750V, STM32H750I, STM32H750X</li>
|
||||
<li>STM32H747xx: STM32H747ZI, STM32H747AI, STM32H747II, STM32H747BI, STM32H747XI</li>
|
||||
<li>STM32H757xx: STM32H757ZI, STM32H757AI, STM32H757II, STM32H757BI, STM32H757XI</li>
|
||||
<li>STM32H745xx: STM32H745ZI, STM32H745II, STM32H745BI, STM32H745XI</li>
|
||||
<li><p>STM32H755xx: STM32H755ZI, STM32H755II, STM32H755BI, STM32H755XI</p></li>
|
||||
<li>Add system_stm32h7xx_singlecore.c : system initialization template source file for single core lines (STM32H743xx, STM32H753xx, STM32H750xx and STM32H742xx)</li>
|
||||
<li>Add system initialization template source file for dual core lines:
|
||||
<ul>
|
||||
<li>system_stm32h7xx_dualcore_boot_cm4_cm7.c: template for the boot case where Cortex-M7 and Cortex-M4 are boot at once</li>
|
||||
<li>system_stm32h7xx_dualcore_bootcm7_cm4gated.c: template for the boot case where Cortex-M7 is booting and Cortex-M4 is gated using FLASH Option Bytes</li>
|
||||
<li>system_stm32h7xx_dualcore_bootcm4_cm7gated.c: template for the boot case where Cortex-M4 is booting and Cortex-M7 is gated using FLASH Option Bytes</li>
|
||||
</ul></li>
|
||||
<li>Add EWARM, MDK-ARM and SW4STM32 <strong>Dual Core</strong> devices linker files</li>
|
||||
<li><p>Add EWARM STM32H742xx devices linker files</p></li>
|
||||
</ul></li>
|
||||
</ul></li>
|
||||
<li><strong>Registers and bit field definitions updates</strong>:
|
||||
<ul>
|
||||
<li>Update SYSCFG_TypeDef structure to add
|
||||
<ul>
|
||||
<li>Add CFGR register: allowing to control connection between double ECC RAMs/Flash errors, PVD errors and CortexM7/M4 lockup to TIM1/8/15/16/17 and HRTIMER Break inputs</li>
|
||||
<li>Add definitions of SYSCFG_CFGR register bit fields</li>
|
||||
<li>PWRCR registers: allowing to control the PWR overdrive enable/disable for Voltage Scaling zero</li>
|
||||
<li>Add SYSCFG_PWRCR register bit fields</li>
|
||||
</ul></li>
|
||||
<li>Update RCC_TypeDef structure according to STM32H7xx <strong>Rev.V</strong> devices:
|
||||
<ul>
|
||||
<li>ICSCR: renamed to HSICFGR, HSI Clock Calibration Register</li>
|
||||
<li>Rename also RCC_ICSCR_XXX bit definitions RCC_HSICFGR_XXX according to the new register HSICFGR</li>
|
||||
<li>CSICFGR: New registers (on <strong>Rev.V</strong> devices), CSI Clock Calibration Register</li>
|
||||
<li>Add dedicated RCC_CSICFGR_XXX bit definitions</li>
|
||||
</ul></li>
|
||||
<li>Keep RCC_Core_TypeDef structure used for Dual Core lines devices only: allowing RCC clock enabling/allocation for each Core(Cortex-M7/M4)
|
||||
<ul>
|
||||
<li>RCC_Core_TypeDef structure and RCC_C1_BASE/RCC_C1 definition removed from STM32H743xx/53xx and STM32H750xx lines</li>
|
||||
</ul></li>
|
||||
<li>Add CRYP_CR_NPBLB bit field definition: upon refresh of the CRYP peripheral on the STM32H7 <strong>Rev.V</strong> devices</li>
|
||||
<li>Update ADC_CR_BOOST bot field definition for STM32H7 <strong>Rev.V</strong> devices: 2 bits instead of 1</li>
|
||||
<li>Remove useless I2C_CR1_SWRST definition: alignment with the reference manual</li>
|
||||
<li>Add SAI_xCR1_NODIV bit field definition upon SAI peripheral update for STM32H7 <strong>Rev.V</strong> devices</li>
|
||||
<li>Rename SPI_TXCRC_RXCRC to SPI_RXCRC_RXCRC: typo fix and alignment with the reference manual</li>
|
||||
<li>Fix QUADSPI_SR_FLEVEL bit field definition: Mask on 6 bits (0x3F mask) instead of 5 bits(0x1F mask) and add definition of QUADSPI_SR_FLEVEL_6</li>
|
||||
<li>Add definition of SYSCFG_EXTICR3_EXTI8_PK, SYSCFG_EXTICR3_EXTI9_PK, SYSCFG_EXTICR3_EXTI10_PK, SYSCFG_EXTICR3_EXTI11_PK and SYSCFG_EXTICR4_EXTI13_PK</li>
|
||||
<li>Add definition of FLASH_LATENCY_DEFAULT: default safe FLASH latency</li>
|
||||
</ul></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true"><strong>V1.3.1 / 31-January-2019</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-1">Main Changes</h2>
|
||||
<ul>
|
||||
<li><strong>Patch Release on top of V1.3.0</strong></li>
|
||||
<li>Add Definition of UID_BASE ( Unique device ID register base address) to the STM32H7xx include files:
|
||||
<ul>
|
||||
<li>stm32h743xx.h, stm32h750xx.h and stm32h753xx.h</li>
|
||||
</ul></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"><strong>V1.4.0 / 30-November-2018</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-2">Main Changes</h2>
|
||||
<ul>
|
||||
<li>STM32H7xx include files:
|
||||
<ul>
|
||||
<li>General updates to align Bit and registers definition with the STM32H7 reference manual</li>
|
||||
<li>Update "_Mask" bits definition using UL suffix for Misra-C 2012 compliance</li>
|
||||
<li>Add definition of <strong>RAMECC_MonitorTypeDef</strong> and <strong>RAMECC_TypeDef</strong> structure</li>
|
||||
<li>Add definition of <strong>RAMECC</strong> peripheral base addresses</li>
|
||||
<li>Add <strong>RAMECC</strong> peripheral registers bit definitions</li>
|
||||
<li>Add IS_RAMECC_MONITOR_ALL_INSTANCE macro</li>
|
||||
<li>Add <strong>EXTI</strong> SWIER3 bit definitions</li>
|
||||
<li>Update <strong>FLASH</strong> sector number to 8 instead of 16 (8 sectors for each bank)</li>
|
||||
<li>Remove extra bit definition : FLASH_CR_SNB_3 to FLASH_CR_SNB_7</li>
|
||||
<li>Update <strong>FLASH</strong> user option bytes bit definition</li>
|
||||
<li>Fix FLASH_BANK_SIZE definition: add parenthesis</li>
|
||||
<li>Remove <strong>PWR</strong> extra bit definition PWR_CR1_RLPSN</li>
|
||||
<li>Add <strong>PWR</strong> bit definition PWR_WKUPEPR_WKUPEN</li>
|
||||
<li>Fix typo in <strong>SDMMC</strong> bit definition: SDMMC_MASK_SDIOITIE_Pos, SDMMC_MASK_SDIOITIE_Msk and SDMMC_MASK_SDIOITIE</li>
|
||||
<li>Add <strong>SDMMC</strong> instance check macro: IS_SDMMC_ALL_INSTANCE</li>
|
||||
<li>Fix typo in <strong>SYSCFG</strong> bit definition: SYSCFG_PMCR_EPIS_SEL_Pos, SYSCFG_PMCR_EPIS_SEL_Msk, SYSCFG_PMCR_EPIS_SEL and SYSCFG_PMCR_EPIS_SEL_0 to SYSCFG_PMCR_EPIS_SEL_2</li>
|
||||
<li>Fix <strong>SYSCFG</strong> bit definitions: SYSCFG_EXTICR1_EXTI0_Msk, to SYSCFG_EXTICR1_EXTI3_Msk, 4 bits instead of 3</li>
|
||||
<li>Fix <strong>SYSCFG</strong> bit definitions: SYSCFG_EXTICR2_EXTI0_Msk, to SYSCFG_EXTICR2_EXTI3_Msk, 4 bits instead of 3</li>
|
||||
<li>Fix <strong>SYSCFG</strong> bit definitions: SYSCFG_EXTICR3_EXTI0_Msk, to SYSCFG_EXTICR3_EXTI3_Msk, 4 bits instead of 3</li>
|
||||
<li>Fix <strong>SYSCFG</strong> bit definitions: SYSCFG_EXTICR4_EXTI0_Msk, to SYSCFG_EXTICR3_EXTI4_Msk, 4 bits instead of 3</li>
|
||||
<li>Fix IS_ADC_COMMON_INSTANCE macro : add parenthesis</li>
|
||||
<li>Fix HSEM_CR_COREID_CURRENT and HSEM_CR_COREID_CURRENT: add parenthesis</li>
|
||||
<li>Update <strong>USART</strong> and <strong>SMARTCARD</strong> bits definition</li>
|
||||
<li>Update <strong>GPIO</strong> registers and bit definition (BSRR register)</li>
|
||||
<li>Add IS_GPIO_AF_INSTANCE macro</li>
|
||||
<li>Update <strong>DAC</strong> bits definition</li>
|
||||
<li>Update <strong>FDCAN</strong> bits definition</li>
|
||||
<li>Update <strong>USB</strong> bits definition (OTEPSPRM register)</li>
|
||||
<li>Fix <strong>CEC</strong> bit definition (RXDR register)</li>
|
||||
<li>Update <strong>TIM</strong> registers and bits definition naming</li>
|
||||
<li>Fix IS_TIM_CCX_INSTANCE macro : add TIM_CHANNEL_4 to TIM_CHANNEL_6</li>
|
||||
<li>Update <strong>SPI</strong> and <strong>I2S</strong> bits definition</li>
|
||||
<li>Update <strong>BDMA</strong> bits definition</li>
|
||||
<li>Update <strong>FMC</strong> bits definition</li>
|
||||
</ul></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.3.0 / 29-June-2018</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-3">Main Changes</h2>
|
||||
<ul>
|
||||
<li>Add support for stm32h750xx value line devices:
|
||||
<ul>
|
||||
<li>Add “stm32h750xx.h” file</li>
|
||||
<li>Add startup files startup_stm32h750xx.s for EWARM, MDK-ARM and SW4STM32</li>
|
||||
</ul></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.2.0 / 29-December-2017</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-4">Main Changes</h2>
|
||||
<ul>
|
||||
<li>Update FDCAN bit definition</li>
|
||||
<li>Update SystemCoreClockUpdate() function in system_stm32h7xx.c file to use direct register access</li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.1.0 / 31-August-2017</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-5">Main Changes</h2>
|
||||
<ul>
|
||||
<li>Update USB OTG bit definition</li>
|
||||
<li>Adjust PLL fractional computation</li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 21-April-2017</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-6">Main Changes</h2>
|
||||
<ul>
|
||||
<li>First official release for <strong>STM32H743xx/753xx</strong> devices</li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
</div>
|
||||
</div>
|
||||
<footer class="sticky">
|
||||
For complete documentation on STM32 Microcontrollers </mark> , visit: <span style="font-color: blue;"><a href="http://www.st.com/stm32">www.st.com/stm32</a></span>
|
||||
</footer>
|
||||
</body>
|
||||
</html>
|
||||
+223
@@ -0,0 +1,223 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_compiler.h
|
||||
* @brief CMSIS compiler generic header file
|
||||
* @version V5.0.1
|
||||
* @date 30. January 2017
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_COMPILER_H
|
||||
#define __CMSIS_COMPILER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* ARM Compiler 4/5
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* ARM Compiler 6 (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#include "cmsis_armclang.h"
|
||||
|
||||
|
||||
/*
|
||||
* GNU Compiler
|
||||
*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* IAR Compiler
|
||||
*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
|
||||
#include <cmsis_iar.h>
|
||||
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __noreturn
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __root
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __weak
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32
|
||||
__packed struct T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __packed
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT __packed struct
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* TI ARM Compiler
|
||||
*/
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32
|
||||
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __attribute__((packed))
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* TASKING Compiler
|
||||
*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32
|
||||
struct __packed__ T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __align(x)
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __packed__
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* COSMIC Compiler
|
||||
*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM _asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
// NO RETURN is automatically detected hence no warning here
|
||||
#define __NO_RETURN
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#warning No compiler specific solution for __USED. __USED is ignored.
|
||||
#define __USED
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __weak
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32
|
||||
@packed struct T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED @packed
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT @packed struct
|
||||
#endif
|
||||
|
||||
|
||||
#else
|
||||
#error Unknown compiler.
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __CMSIS_COMPILER_H */
|
||||
|
||||
+2103
File diff suppressed because it is too large
Load Diff
+2635
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,201 @@
|
||||
Apache License
|
||||
Version 2.0, January 2004
|
||||
http://www.apache.org/licenses/
|
||||
|
||||
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
|
||||
|
||||
1. Definitions.
|
||||
|
||||
"License" shall mean the terms and conditions for use, reproduction,
|
||||
and distribution as defined by Sections 1 through 9 of this document.
|
||||
|
||||
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|
||||
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|
||||
|
||||
"Legal Entity" shall mean the union of the acting entity and all
|
||||
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|
||||
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|
||||
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|
||||
direction or management of such entity, whether by contract or
|
||||
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|
||||
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|
||||
|
||||
"You" (or "Your") shall mean an individual or Legal Entity
|
||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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||||
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|
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END OF TERMS AND CONDITIONS
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||||
APPENDIX: How to apply the Apache License to your work.
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||||
To apply the Apache License to your work, attach the following
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Copyright {yyyy} {name of copyright owner}
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Licensed under the Apache License, Version 2.0 (the "License");
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Unless required by applicable law or agreed to in writing, software
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||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
@@ -0,0 +1,66 @@
|
||||
# CMSIS Version 5
|
||||
|
||||
CMSIS Version 5.0.1 release is now available.
|
||||
|
||||
This GitHub repository development branch reflects our current state of development and is constantly updated.
|
||||
|
||||
The [pre-built documentation](http://arm-software.github.io/CMSIS_5/General/html/index.html) for the 5.0.1 release
|
||||
is available under http://arm-software.github.io/CMSIS_5/General/html/index.html
|
||||
|
||||
Use *Issues* to provide feedback and report problems for CMSIS Version 5. Note that this repository gives our users and partners contiguous access to the CMSIS development. It allows you to review the work and provide feedback or create pull requests for contributions.
|
||||
|
||||
## Implemented Enhancements
|
||||
- Support for ARMv8-M Architecture (Mainline and Baseline) as well as devices Cortex-M23 and Cortex-M33
|
||||
|
||||
- CMSIS-RTOS Version 2 API and RTX reference implementation with several enhancements:
|
||||
- Dynamic object creation, Flag events, C API, additional thread and timer functions
|
||||
|
||||
- CMSIS-RTOS API Secure and Non-Secure support, multi-processor support
|
||||
|
||||
## Futher Planned Enhancements
|
||||
- Improvements for Cortex-A / M hybrid devices (focus on Cortex-M interaction)
|
||||
|
||||
- CMSIS-Pack
|
||||
- Additions for generic example, project templates, multiple download portals
|
||||
- Adoption of IAR Flash Loader technology
|
||||
|
||||
For further details see also the [Slides of the Embedded World CMSIS Partner Meeting](https://github.com/ARM-software/CMSIS_5/blob/master/CMSIS_EW2016.pdf).
|
||||
|
||||
## Directory Structure
|
||||
|
||||
| Directory | Content |
|
||||
| --------------- | ---------------------------------------------- |
|
||||
| CMSIS/Core | CMSIS-Core related files (for release) |
|
||||
| CMSIS/DAP | CMSIS-DAP related files and examples |
|
||||
| CMSIS/Driver | CMSIS-Driver API headers and template files |
|
||||
| CMSIS/DSP | CMSIS-DSP related files |
|
||||
| CMSIS/RTOS | RTOS v1 related files (for Cortex-M) |
|
||||
| CMSIS/RTOS2 | RTOS v2 related files (for Cortex-M & ARMv8-M) |
|
||||
| CMSIS/Pack | CMSIS-Pack examples and tutorials |
|
||||
| CMSIS/DoxyGen | Source of the documentation |
|
||||
| CMSIS/Utilities | Utility programs |
|
||||
|
||||
## Generate CMSIS Pack for Release
|
||||
|
||||
This GitHub development repository contains already pre-build libraries of various libraries (DSP, RTOS, RTOS2).
|
||||
These libraries are validated for release.
|
||||
|
||||
To build a complete CMSIS pack for installation the following additional tools are required:
|
||||
- **doxygen.exe** Version: 1.8.6 (Documentation Generator)
|
||||
- **mscgen.exe** Version: 0.20 (Message Sequence Chart Converter)
|
||||
- **7z.exe (7-Zip)** Version: 16.02 (File Archiver)
|
||||
|
||||
Using these tools, you can generate on a Windows PC:
|
||||
- **CMSIS Software Pack** using the batch file **gen_pack.bat** (located in ./CMSIS/Utilities). This batch file also generates the documentation.
|
||||
|
||||
- **CMSIS Documentation** using the batch file **genDoc.bat** (located in ./CMSIS/Doxygen).
|
||||
|
||||
The file ./CMSIS/DoxyGen/How2Doc.txt describes the rules for creating API documentation.
|
||||
|
||||
## License
|
||||
|
||||
ARM CMSIS is licensed under Apache-2.0.
|
||||
|
||||
## Contributions and Pull Requests
|
||||
|
||||
Contributions are accepted under Apache-2.0. Only submit contributions where you have authored all of the code.
|
||||
+967
File diff suppressed because it is too large
Load Diff
+1825
File diff suppressed because it is too large
Load Diff
+1170
File diff suppressed because it is too large
Load Diff
+461
@@ -0,0 +1,461 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7xx_hal_cortex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of CORTEX HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7xx_HAL_CORTEX_H
|
||||
#define STM32H7xx_HAL_CORTEX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32H7xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CORTEX
|
||||
* @{
|
||||
*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup CORTEX_Exported_Types Cortex Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if (__MPU_PRESENT == 1)
|
||||
/** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition
|
||||
* @brief MPU Region initialization structure
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8_t Enable; /*!< Specifies the status of the region.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Region_Enable */
|
||||
uint8_t Number; /*!< Specifies the number of the region to protect.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Region_Number */
|
||||
uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */
|
||||
uint8_t Size; /*!< Specifies the size of the region to protect.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Region_Size */
|
||||
uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable.
|
||||
This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */
|
||||
uint8_t TypeExtField; /*!< Specifies the TEX field level.
|
||||
This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */
|
||||
uint8_t AccessPermission; /*!< Specifies the region access permission type.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */
|
||||
uint8_t DisableExec; /*!< Specifies the instruction access status.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */
|
||||
uint8_t IsShareable; /*!< Specifies the shareability status of the protected region.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */
|
||||
uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */
|
||||
uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */
|
||||
}MPU_Region_InitTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* __MPU_PRESENT */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group
|
||||
* @{
|
||||
*/
|
||||
#define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bits for pre-emption priority
|
||||
4 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bits for pre-emption priority
|
||||
3 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority
|
||||
2 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority
|
||||
1 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority
|
||||
0 bits for subpriority */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_SysTick_clock_source CORTEX _SysTick clock source
|
||||
* @{
|
||||
*/
|
||||
#define SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000)
|
||||
#define SYSTICK_CLKSOURCE_HCLK ((uint32_t)0x00000004)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if (__MPU_PRESENT == 1)
|
||||
/** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control MPU HFNMI and PRIVILEGED Access control
|
||||
* @{
|
||||
*/
|
||||
#define MPU_HFNMI_PRIVDEF_NONE ((uint32_t)0x00000000)
|
||||
#define MPU_HARDFAULT_NMI ((uint32_t)0x00000002)
|
||||
#define MPU_PRIVILEGED_DEFAULT ((uint32_t)0x00000004)
|
||||
#define MPU_HFNMI_PRIVDEF ((uint32_t)0x00000006)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable
|
||||
* @{
|
||||
*/
|
||||
#define MPU_REGION_ENABLE ((uint8_t)0x01)
|
||||
#define MPU_REGION_DISABLE ((uint8_t)0x00)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access
|
||||
* @{
|
||||
*/
|
||||
#define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00)
|
||||
#define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
|
||||
* @{
|
||||
*/
|
||||
#define MPU_ACCESS_SHAREABLE ((uint8_t)0x01)
|
||||
#define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable
|
||||
* @{
|
||||
*/
|
||||
#define MPU_ACCESS_CACHEABLE ((uint8_t)0x01)
|
||||
#define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable
|
||||
* @{
|
||||
*/
|
||||
#define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01)
|
||||
#define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_TEX_Levels MPU TEX Levels
|
||||
* @{
|
||||
*/
|
||||
#define MPU_TEX_LEVEL0 ((uint8_t)0x00)
|
||||
#define MPU_TEX_LEVEL1 ((uint8_t)0x01)
|
||||
#define MPU_TEX_LEVEL2 ((uint8_t)0x02)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size
|
||||
* @{
|
||||
*/
|
||||
#define MPU_REGION_SIZE_32B ((uint8_t)0x04)
|
||||
#define MPU_REGION_SIZE_64B ((uint8_t)0x05)
|
||||
#define MPU_REGION_SIZE_128B ((uint8_t)0x06)
|
||||
#define MPU_REGION_SIZE_256B ((uint8_t)0x07)
|
||||
#define MPU_REGION_SIZE_512B ((uint8_t)0x08)
|
||||
#define MPU_REGION_SIZE_1KB ((uint8_t)0x09)
|
||||
#define MPU_REGION_SIZE_2KB ((uint8_t)0x0A)
|
||||
#define MPU_REGION_SIZE_4KB ((uint8_t)0x0B)
|
||||
#define MPU_REGION_SIZE_8KB ((uint8_t)0x0C)
|
||||
#define MPU_REGION_SIZE_16KB ((uint8_t)0x0D)
|
||||
#define MPU_REGION_SIZE_32KB ((uint8_t)0x0E)
|
||||
#define MPU_REGION_SIZE_64KB ((uint8_t)0x0F)
|
||||
#define MPU_REGION_SIZE_128KB ((uint8_t)0x10)
|
||||
#define MPU_REGION_SIZE_256KB ((uint8_t)0x11)
|
||||
#define MPU_REGION_SIZE_512KB ((uint8_t)0x12)
|
||||
#define MPU_REGION_SIZE_1MB ((uint8_t)0x13)
|
||||
#define MPU_REGION_SIZE_2MB ((uint8_t)0x14)
|
||||
#define MPU_REGION_SIZE_4MB ((uint8_t)0x15)
|
||||
#define MPU_REGION_SIZE_8MB ((uint8_t)0x16)
|
||||
#define MPU_REGION_SIZE_16MB ((uint8_t)0x17)
|
||||
#define MPU_REGION_SIZE_32MB ((uint8_t)0x18)
|
||||
#define MPU_REGION_SIZE_64MB ((uint8_t)0x19)
|
||||
#define MPU_REGION_SIZE_128MB ((uint8_t)0x1A)
|
||||
#define MPU_REGION_SIZE_256MB ((uint8_t)0x1B)
|
||||
#define MPU_REGION_SIZE_512MB ((uint8_t)0x1C)
|
||||
#define MPU_REGION_SIZE_1GB ((uint8_t)0x1D)
|
||||
#define MPU_REGION_SIZE_2GB ((uint8_t)0x1E)
|
||||
#define MPU_REGION_SIZE_4GB ((uint8_t)0x1F)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes
|
||||
* @{
|
||||
*/
|
||||
#define MPU_REGION_NO_ACCESS ((uint8_t)0x00)
|
||||
#define MPU_REGION_PRIV_RW ((uint8_t)0x01)
|
||||
#define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02)
|
||||
#define MPU_REGION_FULL_ACCESS ((uint8_t)0x03)
|
||||
#define MPU_REGION_PRIV_RO ((uint8_t)0x05)
|
||||
#define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number
|
||||
* @{
|
||||
*/
|
||||
#define MPU_REGION_NUMBER0 ((uint8_t)0x00)
|
||||
#define MPU_REGION_NUMBER1 ((uint8_t)0x01)
|
||||
#define MPU_REGION_NUMBER2 ((uint8_t)0x02)
|
||||
#define MPU_REGION_NUMBER3 ((uint8_t)0x03)
|
||||
#define MPU_REGION_NUMBER4 ((uint8_t)0x04)
|
||||
#define MPU_REGION_NUMBER5 ((uint8_t)0x05)
|
||||
#define MPU_REGION_NUMBER6 ((uint8_t)0x06)
|
||||
#define MPU_REGION_NUMBER7 ((uint8_t)0x07)
|
||||
#if !defined(CORE_CM4)
|
||||
#define MPU_REGION_NUMBER8 ((uint8_t)0x08)
|
||||
#define MPU_REGION_NUMBER9 ((uint8_t)0x09)
|
||||
#define MPU_REGION_NUMBER10 ((uint8_t)0x0A)
|
||||
#define MPU_REGION_NUMBER11 ((uint8_t)0x0B)
|
||||
#define MPU_REGION_NUMBER12 ((uint8_t)0x0C)
|
||||
#define MPU_REGION_NUMBER13 ((uint8_t)0x0D)
|
||||
#define MPU_REGION_NUMBER14 ((uint8_t)0x0E)
|
||||
#define MPU_REGION_NUMBER15 ((uint8_t)0x0F)
|
||||
#endif /* !defined(CORE_CM4) */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* __MPU_PRESENT */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Exported Macros -----------------------------------------------------------*/
|
||||
/** @defgroup CORTEX_Exported_Macros CORTEX Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/** @defgroup CORTEX_CPU_Identifier CORTEX_CPU_Identifier
|
||||
* @{
|
||||
*/
|
||||
#define CM7_CPUID ((uint32_t)0x00000003)
|
||||
|
||||
#if defined(DUAL_CORE)
|
||||
#define CM4_CPUID ((uint32_t)0x00000001)
|
||||
#endif /*DUAL_CORE*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup CORTEX_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CORTEX_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and de-initialization functions *****************************/
|
||||
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
|
||||
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
|
||||
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
|
||||
void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
|
||||
void HAL_NVIC_SystemReset(void);
|
||||
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup CORTEX_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
#if (__MPU_PRESENT == 1)
|
||||
void HAL_MPU_Enable(uint32_t MPU_Control);
|
||||
void HAL_MPU_Disable(void);
|
||||
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
|
||||
#endif /* __MPU_PRESENT */
|
||||
uint32_t HAL_NVIC_GetPriorityGrouping(void);
|
||||
void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
|
||||
uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
|
||||
void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
|
||||
void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
|
||||
uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
|
||||
void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
|
||||
void HAL_SYSTICK_IRQHandler(void);
|
||||
void HAL_SYSTICK_Callback(void);
|
||||
uint32_t HAL_GetCurrentCPUID(void);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup CORTEX_Private_Macros CORTEX Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
|
||||
((GROUP) == NVIC_PRIORITYGROUP_1) || \
|
||||
((GROUP) == NVIC_PRIORITYGROUP_2) || \
|
||||
((GROUP) == NVIC_PRIORITYGROUP_3) || \
|
||||
((GROUP) == NVIC_PRIORITYGROUP_4))
|
||||
|
||||
#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10UL)
|
||||
|
||||
#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10UL)
|
||||
|
||||
#define IS_NVIC_DEVICE_IRQ(IRQ) (((int32_t)IRQ) >= 0x00)
|
||||
|
||||
#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
|
||||
((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
|
||||
|
||||
#if (__MPU_PRESENT == 1)
|
||||
#define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
|
||||
((STATE) == MPU_REGION_DISABLE))
|
||||
|
||||
#define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
|
||||
((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
|
||||
|
||||
#define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \
|
||||
((STATE) == MPU_ACCESS_NOT_SHAREABLE))
|
||||
|
||||
#define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
|
||||
((STATE) == MPU_ACCESS_NOT_CACHEABLE))
|
||||
|
||||
#define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \
|
||||
((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
|
||||
|
||||
#define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \
|
||||
((TYPE) == MPU_TEX_LEVEL1) || \
|
||||
((TYPE) == MPU_TEX_LEVEL2))
|
||||
|
||||
#define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \
|
||||
((TYPE) == MPU_REGION_PRIV_RW) || \
|
||||
((TYPE) == MPU_REGION_PRIV_RW_URO) || \
|
||||
((TYPE) == MPU_REGION_FULL_ACCESS) || \
|
||||
((TYPE) == MPU_REGION_PRIV_RO) || \
|
||||
((TYPE) == MPU_REGION_PRIV_RO_URO))
|
||||
|
||||
#if !defined(CORE_CM4)
|
||||
#define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER1) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER2) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER3) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER4) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER5) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER6) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER7) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER8) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER9) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER10) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER11) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER12) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER13) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER14) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER15))
|
||||
#else
|
||||
#define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER1) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER2) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER3) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER4) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER5) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER6) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER7))
|
||||
#endif /* !defined(CORE_CM4) */
|
||||
|
||||
#define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \
|
||||
((SIZE) == MPU_REGION_SIZE_64B) || \
|
||||
((SIZE) == MPU_REGION_SIZE_128B) || \
|
||||
((SIZE) == MPU_REGION_SIZE_256B) || \
|
||||
((SIZE) == MPU_REGION_SIZE_512B) || \
|
||||
((SIZE) == MPU_REGION_SIZE_1KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_2KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_4KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_8KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_16KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_32KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_64KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_128KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_256KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_512KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_1MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_2MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_4MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_8MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_16MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_32MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_64MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_128MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_256MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_512MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_1GB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_2GB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_4GB))
|
||||
|
||||
#define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF)
|
||||
#endif /* __MPU_PRESENT */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7xx_HAL_CORTEX_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+188
@@ -0,0 +1,188 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7xx_hal_def.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains HAL common defines, enumeration, macros and
|
||||
* structures definitions.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7xx_HAL_DEF
|
||||
#define STM32H7xx_HAL_DEF
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7xx.h"
|
||||
//#include "Legacy/stm32_hal_legacy.h"
|
||||
#include <stddef.h>
|
||||
#include <math.h>
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief HAL Status structures definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_OK = 0x00,
|
||||
HAL_ERROR = 0x01,
|
||||
HAL_BUSY = 0x02,
|
||||
HAL_TIMEOUT = 0x03
|
||||
} HAL_StatusTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL Lock structures definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_UNLOCKED = 0x00,
|
||||
HAL_LOCKED = 0x01
|
||||
} HAL_LockTypeDef;
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
#define HAL_MAX_DELAY 0xFFFFFFFFU
|
||||
|
||||
#define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT))
|
||||
#define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U)
|
||||
|
||||
#define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \
|
||||
do{ \
|
||||
(__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \
|
||||
(__DMA_HANDLE__).Parent = (__HANDLE__); \
|
||||
} while(0)
|
||||
|
||||
#define UNUSED(x) ((void)(x))
|
||||
|
||||
/** @brief Reset the Handle's State field.
|
||||
* @param __HANDLE__: specifies the Peripheral Handle.
|
||||
* @note This macro can be used for the following purpose:
|
||||
* - When the Handle is declared as local variable; before passing it as parameter
|
||||
* to HAL_PPP_Init() for the first time, it is mandatory to use this macro
|
||||
* to set to 0 the Handle's "State" field.
|
||||
* Otherwise, "State" field may have any random value and the first time the function
|
||||
* HAL_PPP_Init() is called, the low level hardware initialization will be missed
|
||||
* (i.e. HAL_PPP_MspInit() will not be executed).
|
||||
* - When there is a need to reconfigure the low level hardware: instead of calling
|
||||
* HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
|
||||
* In this later function, when the Handle's "State" field is set to 0, it will execute the function
|
||||
* HAL_PPP_MspInit() which will reconfigure the low level hardware.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0)
|
||||
|
||||
#if (USE_RTOS == 1)
|
||||
#error " USE_RTOS should be 0 in the current HAL release "
|
||||
#else
|
||||
#define __HAL_LOCK(__HANDLE__) \
|
||||
do{ \
|
||||
if((__HANDLE__)->Lock == HAL_LOCKED) \
|
||||
{ \
|
||||
return HAL_BUSY; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Lock = HAL_LOCKED; \
|
||||
} \
|
||||
}while (0)
|
||||
|
||||
#define __HAL_UNLOCK(__HANDLE__) \
|
||||
do{ \
|
||||
(__HANDLE__)->Lock = HAL_UNLOCKED; \
|
||||
}while (0)
|
||||
#endif /* USE_RTOS */
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#ifndef __weak
|
||||
#define __weak __attribute__((weak))
|
||||
#endif /* __weak */
|
||||
#ifndef __packed
|
||||
#define __packed __attribute__((__packed__))
|
||||
#endif /* __packed */
|
||||
#endif /* __GNUC__ */
|
||||
|
||||
|
||||
/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
|
||||
#if defined (__GNUC__) /* GNU Compiler */
|
||||
#ifndef __ALIGN_END
|
||||
#define __ALIGN_END __attribute__ ((aligned (4)))
|
||||
#endif /* __ALIGN_END */
|
||||
#ifndef __ALIGN_BEGIN
|
||||
#define __ALIGN_BEGIN
|
||||
#endif /* __ALIGN_BEGIN */
|
||||
#else
|
||||
#ifndef __ALIGN_END
|
||||
#define __ALIGN_END
|
||||
#endif /* __ALIGN_END */
|
||||
#ifndef __ALIGN_BEGIN
|
||||
#if defined (__CC_ARM) /* ARM Compiler */
|
||||
#define __ALIGN_BEGIN __align(4)
|
||||
#elif defined (__ICCARM__) /* IAR Compiler */
|
||||
#define __ALIGN_BEGIN
|
||||
#endif /* __CC_ARM */
|
||||
#endif /* __ALIGN_BEGIN */
|
||||
#endif /* __GNUC__ */
|
||||
|
||||
/* Macro to get variable aligned on 32-bytes,needed for cache maintenance purpose */
|
||||
#if defined (__GNUC__) /* GNU Compiler */
|
||||
#define ALIGN_32BYTES(buf) buf __attribute__ ((aligned (32)))
|
||||
#elif defined (__ICCARM__) /* IAR Compiler */
|
||||
#define ALIGN_32BYTES(buf) _Pragma("data_alignment=32") buf
|
||||
#elif defined (__CC_ARM) /* ARM Compiler */
|
||||
#define ALIGN_32BYTES(buf) __align(32) buf
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief __RAM_FUNC definition
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
/* ARM Compiler
|
||||
------------
|
||||
RAM functions are defined using the toolchain options.
|
||||
Functions that are executed in RAM should reside in a separate source module.
|
||||
Using the 'Options for File' dialog you can simply change the 'Code / Const'
|
||||
area of a module to a memory space in physical RAM.
|
||||
Available memory areas are declared in the 'Target' tab of the 'Options for Target'
|
||||
dialog.
|
||||
*/
|
||||
#define __RAM_FUNC
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
/* ICCARM Compiler
|
||||
---------------
|
||||
RAM functions are defined using a specific toolchain keyword "__ramfunc".
|
||||
*/
|
||||
#define __RAM_FUNC __ramfunc
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
/* GNU Compiler
|
||||
------------
|
||||
RAM functions are defined using a specific toolchain attribute
|
||||
"__attribute__((section(".RamFunc")))".
|
||||
*/
|
||||
#define __RAM_FUNC __attribute__((section(".RamFunc")))
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7xx_HAL_DEF */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+1101
File diff suppressed because it is too large
Load Diff
+306
@@ -0,0 +1,306 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7xx_hal_dma_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of DMA HAL extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7xx_HAL_DMA_EX_H
|
||||
#define STM32H7xx_HAL_DMA_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32H7xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup DMAEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup DMAEx_Exported_Types DMAEx Exported Types
|
||||
* @brief DMAEx Exported types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief HAL DMA Memory definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
MEMORY0 = 0x00U, /*!< Memory 0 */
|
||||
MEMORY1 = 0x01U, /*!< Memory 1 */
|
||||
|
||||
}HAL_DMA_MemoryTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL DMAMUX Synchronization configuration structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t SyncSignalID; /*!< Specifies the synchronization signal gating the DMA request in periodic mode.
|
||||
This parameter can be a value of @ref DMAEx_MUX_SyncSignalID_selection */
|
||||
|
||||
uint32_t SyncPolarity; /*!< Specifies the polarity of the signal on which the DMA request is synchronized.
|
||||
This parameter can be a value of @ref DMAEx_MUX_SyncPolarity_selection */
|
||||
|
||||
FunctionalState SyncEnable; /*!< Specifies if the synchronization shall be enabled or disabled
|
||||
This parameter can take the value ENABLE or DISABLE*/
|
||||
|
||||
|
||||
FunctionalState EventEnable; /*!< Specifies if an event shall be generated once the RequestNumber is reached.
|
||||
This parameter can take the value ENABLE or DISABLE */
|
||||
|
||||
uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be authorized after a sync event.
|
||||
This parameters can be in the range 1 to 32 */
|
||||
|
||||
}HAL_DMA_MuxSyncConfigTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief HAL DMAMUX request generator parameters structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t SignalID; /*!< Specifies the ID of the signal used for DMAMUX request generator
|
||||
This parameter can be a value of @ref DMAEx_MUX_SignalGeneratorID_selection */
|
||||
|
||||
uint32_t Polarity; /*!< Specifies the polarity of the signal on which the request is generated.
|
||||
This parameter can be a value of @ref DMAEx_MUX_RequestGeneneratorPolarity_selection */
|
||||
|
||||
uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be generated after a signal event.
|
||||
This parameters can be in the range 1 to 32 */
|
||||
|
||||
}HAL_DMA_MuxRequestGeneratorConfigTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup DMAEx_Exported_Constants DMA Exported Constants
|
||||
* @brief DMAEx Exported constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DMAEx_MUX_SyncSignalID_selection DMAEx MUX SyncSignalID selection
|
||||
* @brief DMAEx MUX SyncSignalID selection
|
||||
* @{
|
||||
*/
|
||||
#define HAL_DMAMUX1_SYNC_DMAMUX1_CH0_EVT 0U /*!< DMAMUX1 synchronization Signal is DMAMUX1 Channel0 Event */
|
||||
#define HAL_DMAMUX1_SYNC_DMAMUX1_CH1_EVT 1U /*!< DMAMUX1 synchronization Signal is DMAMUX1 Channel1 Event */
|
||||
#define HAL_DMAMUX1_SYNC_DMAMUX1_CH2_EVT 2U /*!< DMAMUX1 synchronization Signal is DMAMUX1 Channel2 Event */
|
||||
#define HAL_DMAMUX1_SYNC_LPTIM1_OUT 3U /*!< DMAMUX1 synchronization Signal is LPTIM1 OUT */
|
||||
#define HAL_DMAMUX1_SYNC_LPTIM2_OUT 4U /*!< DMAMUX1 synchronization Signal is LPTIM2 OUT */
|
||||
#define HAL_DMAMUX1_SYNC_LPTIM3_OUT 5U /*!< DMAMUX1 synchronization Signal is LPTIM3 OUT */
|
||||
#define HAL_DMAMUX1_SYNC_EXTI0 6U /*!< DMAMUX1 synchronization Signal is EXTI0 IT */
|
||||
#define HAL_DMAMUX1_SYNC_TIM12_TRGO 7U /*!< DMAMUX1 synchronization Signal is TIM12 TRGO */
|
||||
|
||||
#define HAL_DMAMUX2_SYNC_DMAMUX2_CH0_EVT 0U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel0 Event */
|
||||
#define HAL_DMAMUX2_SYNC_DMAMUX2_CH1_EVT 1U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel1 Event */
|
||||
#define HAL_DMAMUX2_SYNC_DMAMUX2_CH2_EVT 2U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel2 Event */
|
||||
#define HAL_DMAMUX2_SYNC_DMAMUX2_CH3_EVT 3U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel3 Event */
|
||||
#define HAL_DMAMUX2_SYNC_DMAMUX2_CH4_EVT 4U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel4 Event */
|
||||
#define HAL_DMAMUX2_SYNC_DMAMUX2_CH5_EVT 5U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel5 Event */
|
||||
#define HAL_DMAMUX2_SYNC_LPUART1_RX_WKUP 6U /*!< DMAMUX2 synchronization Signal is LPUART1 RX Wakeup */
|
||||
#define HAL_DMAMUX2_SYNC_LPUART1_TX_WKUP 7U /*!< DMAMUX2 synchronization Signal is LPUART1 TX Wakeup */
|
||||
#define HAL_DMAMUX2_SYNC_LPTIM2_OUT 8U /*!< DMAMUX2 synchronization Signal is LPTIM2 output */
|
||||
#define HAL_DMAMUX2_SYNC_LPTIM3_OUT 9U /*!< DMAMUX2 synchronization Signal is LPTIM3 output */
|
||||
#define HAL_DMAMUX2_SYNC_I2C4_WKUP 10U /*!< DMAMUX2 synchronization Signal is I2C4 Wakeup */
|
||||
#define HAL_DMAMUX2_SYNC_SPI6_WKUP 11U /*!< DMAMUX2 synchronization Signal is SPI6 Wakeup */
|
||||
#define HAL_DMAMUX2_SYNC_COMP1_OUT 12U /*!< DMAMUX2 synchronization Signal is Comparator 1 output */
|
||||
#define HAL_DMAMUX2_SYNC_RTC_WKUP 13U /*!< DMAMUX2 synchronization Signal is RTC Wakeup */
|
||||
#define HAL_DMAMUX2_SYNC_EXTI0 14U /*!< DMAMUX2 synchronization Signal is EXTI0 IT */
|
||||
#define HAL_DMAMUX2_SYNC_EXTI2 15U /*!< DMAMUX2 synchronization Signal is EXTI2 IT */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMAEx_MUX_SyncPolarity_selection DMAEx MUX SyncPolarity selection
|
||||
* @brief DMAEx MUX SyncPolarity selection
|
||||
* @{
|
||||
*/
|
||||
#define HAL_DMAMUX_SYNC_NO_EVENT 0x00000000U /*!< block synchronization events */
|
||||
#define HAL_DMAMUX_SYNC_RISING DMAMUX_CxCR_SPOL_0 /*!< synchronize with rising edge events */
|
||||
#define HAL_DMAMUX_SYNC_FALLING DMAMUX_CxCR_SPOL_1 /*!< synchronize with falling edge events */
|
||||
#define HAL_DMAMUX_SYNC_RISING_FALLING DMAMUX_CxCR_SPOL /*!< synchronize with rising and falling edge events */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup DMAEx_MUX_SignalGeneratorID_selection DMAEx MUX SignalGeneratorID selection
|
||||
* @brief DMAEx MUX SignalGeneratorID selection
|
||||
* @{
|
||||
*/
|
||||
#define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT 0U /*!< DMAMUX1 Request generator Signal is DMAMUX1 Channel0 Event */
|
||||
#define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT 1U /*!< DMAMUX1 Request generator Signal is DMAMUX1 Channel1 Event */
|
||||
#define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT 2U /*!< DMAMUX1 Request generator Signal is DMAMUX1 Channel2 Event */
|
||||
#define HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT 3U /*!< DMAMUX1 Request generator Signal is LPTIM1 OUT */
|
||||
#define HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT 4U /*!< DMAMUX1 Request generator Signal is LPTIM2 OUT */
|
||||
#define HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT 5U /*!< DMAMUX1 Request generator Signal is LPTIM3 OUT */
|
||||
#define HAL_DMAMUX1_REQ_GEN_EXTI0 6U /*!< DMAMUX1 Request generator Signal is EXTI0 IT */
|
||||
#define HAL_DMAMUX1_REQ_GEN_TIM12_TRGO 7U /*!< DMAMUX1 Request generator Signal is TIM12 TRGO */
|
||||
|
||||
#define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT 0U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel0 Event */
|
||||
#define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT 1U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel1 Event */
|
||||
#define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT 2U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel2 Event */
|
||||
#define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT 3U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel3 Event */
|
||||
#define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT 4U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel4 Event */
|
||||
#define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT 5U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel5 Event */
|
||||
#define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT 6U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel6 Event */
|
||||
#define HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP 7U /*!< DMAMUX2 Request generator Signal is LPUART1 RX Wakeup */
|
||||
#define HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP 8U /*!< DMAMUX2 Request generator Signal is LPUART1 TX Wakeup */
|
||||
#define HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP 9U /*!< DMAMUX2 Request generator Signal is LPTIM2 Wakeup */
|
||||
#define HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT 10U /*!< DMAMUX2 Request generator Signal is LPTIM2 OUT */
|
||||
#define HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP 11U /*!< DMAMUX2 Request generator Signal is LPTIM3 Wakeup */
|
||||
#define HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT 12U /*!< DMAMUX2 Request generator Signal is LPTIM3 OUT */
|
||||
#define HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP 13U /*!< DMAMUX2 Request generator Signal is LPTIM4 Wakeup */
|
||||
#define HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP 14U /*!< DMAMUX2 Request generator Signal is LPTIM5 Wakeup */
|
||||
#define HAL_DMAMUX2_REQ_GEN_I2C4_WKUP 15U /*!< DMAMUX2 Request generator Signal is I2C4 Wakeup */
|
||||
#define HAL_DMAMUX2_REQ_GEN_SPI6_WKUP 16U /*!< DMAMUX2 Request generator Signal is SPI6 Wakeup */
|
||||
#define HAL_DMAMUX2_REQ_GEN_COMP1_OUT 17U /*!< DMAMUX2 Request generator Signal is Comparator 1 output */
|
||||
#define HAL_DMAMUX2_REQ_GEN_COMP2_OUT 18U /*!< DMAMUX2 Request generator Signal is Comparator 2 output */
|
||||
#define HAL_DMAMUX2_REQ_GEN_RTC_WKUP 19U /*!< DMAMUX2 Request generator Signal is RTC Wakeup */
|
||||
#define HAL_DMAMUX2_REQ_GEN_EXTI0 20U /*!< DMAMUX2 Request generator Signal is EXTI0 */
|
||||
#define HAL_DMAMUX2_REQ_GEN_EXTI2 21U /*!< DMAMUX2 Request generator Signal is EXTI2 */
|
||||
#define HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT 22U /*!< DMAMUX2 Request generator Signal is I2C4 IT Event */
|
||||
#define HAL_DMAMUX2_REQ_GEN_SPI6_IT 23U /*!< DMAMUX2 Request generator Signal is SPI6 IT */
|
||||
#define HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT 24U /*!< DMAMUX2 Request generator Signal is LPUART1 Tx IT */
|
||||
#define HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT 25U /*!< DMAMUX2 Request generator Signal is LPUART1 Rx IT */
|
||||
#define HAL_DMAMUX2_REQ_GEN_ADC3_IT 26U /*!< DMAMUX2 Request generator Signal is ADC3 IT */
|
||||
#define HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT 27U /*!< DMAMUX2 Request generator Signal is ADC3 Analog Watchdog 1 output */
|
||||
#define HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT 28U /*!< DMAMUX2 Request generator Signal is BDMA Channel 0 IT */
|
||||
#define HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT 29U /*!< DMAMUX2 Request generator Signal is BDMA Channel 1 IT */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMAEx_MUX_RequestGeneneratorPolarity_selection DMAEx MUX RequestGeneneratorPolarity selection
|
||||
* @brief DMAEx MUX RequestGeneneratorPolarity selection
|
||||
* @{
|
||||
*/
|
||||
#define HAL_DMAMUX_REQ_GEN_NO_EVENT 0x00000000U /*!< block request generator events */
|
||||
#define HAL_DMAMUX_REQ_GEN_RISING DMAMUX_RGxCR_GPOL_0 /*!< generate request on rising edge events */
|
||||
#define HAL_DMAMUX_REQ_GEN_FALLING DMAMUX_RGxCR_GPOL_1 /*!< generate request on falling edge events */
|
||||
#define HAL_DMAMUX_REQ_GEN_RISING_FALLING DMAMUX_RGxCR_GPOL /*!< generate request on rising and falling edge events */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions
|
||||
* @brief DMAEx Exported functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DMAEx_Exported_Functions_Group1 Extended features functions
|
||||
* @brief Extended features functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* IO operation functions *******************************************************/
|
||||
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
|
||||
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
|
||||
HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory);
|
||||
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig);
|
||||
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma, HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig);
|
||||
HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma);
|
||||
HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma);
|
||||
|
||||
void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup DMAEx_Private_Macros DMA Private Macros
|
||||
* @brief DMAEx private macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_DMA_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_SYNC_TIM12_TRGO)
|
||||
#define IS_BDMA_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX2_SYNC_EXTI2)
|
||||
|
||||
#define IS_DMAMUX_SYNC_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0U) && ((REQUEST_NUMBER) <= 32U))
|
||||
|
||||
#define IS_DMAMUX_SYNC_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_SYNC_NO_EVENT) || \
|
||||
((POLARITY) == HAL_DMAMUX_SYNC_RISING) || \
|
||||
((POLARITY) == HAL_DMAMUX_SYNC_FALLING) || \
|
||||
((POLARITY) == HAL_DMAMUX_SYNC_RISING_FALLING))
|
||||
|
||||
#define IS_DMAMUX_SYNC_STATE(SYNC) (((SYNC) == DISABLE) || ((SYNC) == ENABLE))
|
||||
|
||||
#define IS_DMAMUX_SYNC_EVENT(EVENT) (((EVENT) == DISABLE) || \
|
||||
((EVENT) == ENABLE))
|
||||
|
||||
#define IS_DMA_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_REQ_GEN_TIM12_TRGO)
|
||||
#define IS_BDMA_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT)
|
||||
|
||||
#define IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0U) && ((REQUEST_NUMBER) <= 32U))
|
||||
|
||||
#define IS_DMAMUX_REQUEST_GEN_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_REQ_GEN_NO_EVENT) || \
|
||||
((POLARITY) == HAL_DMAMUX_REQ_GEN_RISING) || \
|
||||
((POLARITY) == HAL_DMAMUX_REQ_GEN_FALLING) || \
|
||||
((POLARITY) == HAL_DMAMUX_REQ_GEN_RISING_FALLING))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/** @defgroup DMAEx_Private_Functions DMAEx Private Functions
|
||||
* @brief DMAEx Private functions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7xx_HAL_DMA_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
+650
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Load Diff
+815
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Load Diff
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Reference in New Issue
Block a user