mirror of
https://github.com/FreeRTOS/FreeRTOS.git
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SAMA5D3 Xplained demo blinky running.
This commit is contained in:
Richard Barry
-218
@@ -1,218 +0,0 @@
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||||
/* ----------------------------------------------------------------------------
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||||
* SAM Software Package License
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||||
* ----------------------------------------------------------------------------
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||||
* Copyright (c) 2012, Atmel Corporation
|
||||
*
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||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
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||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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||||
* ----------------------------------------------------------------------------
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||||
*/
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||||
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//------------------------------------------------------------------------------
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// Definitions
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//------------------------------------------------------------------------------
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#define AIC 0xFFFFF000
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#define AIC_IVR 0x10
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#define AIC_EOICR 0x38
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#define IRQ_STACK_SIZE 8*3*4
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#define ARM_MODE_ABT 0x17
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#define ARM_MODE_FIQ 0x11
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#define ARM_MODE_IRQ 0x12
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#define ARM_MODE_SVC 0x13
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#define ARM_MODE_SYS 0x1F
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#define I_BIT 0x80
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#define F_BIT 0x40
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//------------------------------------------------------------------------------
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// Startup routine
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//------------------------------------------------------------------------------
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.align 4
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.arm
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/* Exception vectors
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*******************/
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.section .vectors, "a", %progbits
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resetVector:
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ldr pc, =resetHandler /* Reset */
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undefVector:
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b undefVector /* Undefined instruction */
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swiVector:
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b swiVector /* Software interrupt */
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prefetchAbortVector:
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b prefetchAbortVector /* Prefetch abort */
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dataAbortVector:
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b dataAbortVector /* Data abort */
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reservedVector:
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b reservedVector /* Reserved for future use */
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irqVector:
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b irqHandler /* Interrupt */
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fiqVector:
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/* Fast interrupt */
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//------------------------------------------------------------------------------
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/// Handles a fast interrupt request by branching to the address defined in the
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/// AIC.
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//------------------------------------------------------------------------------
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fiqHandler:
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b fiqHandler
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//------------------------------------------------------------------------------
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/// Handles incoming interrupt requests by branching to the corresponding
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/// handler, as defined in the AIC. Supports interrupt nesting.
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//------------------------------------------------------------------------------
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irqHandler:
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/* Save interrupt context on the stack to allow nesting */
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SUB lr, lr, #4
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STMFD sp!, {lr}
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MRS lr, SPSR
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STMFD sp!, {r0, lr}
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/* Write in the IVR to support Protect Mode */
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LDR lr, =AIC
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LDR r0, [r14, #AIC_IVR]
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STR lr, [r14, #AIC_IVR]
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/* Branch to interrupt handler in Supervisor mode */
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MSR CPSR_c, #ARM_MODE_SVC
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STMFD sp!, {r1-r3, r4, r12, lr}
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/* Check for 8-byte alignment and save lr plus a */
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/* word to indicate the stack adjustment used (0 or 4) */
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AND r1, sp, #4
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SUB sp, sp, r1
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STMFD sp!, {r1, lr}
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BLX r0
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LDMIA sp!, {r1, lr}
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ADD sp, sp, r1
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LDMIA sp!, {r1-r3, r4, r12, lr}
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MSR CPSR_c, #ARM_MODE_IRQ | I_BIT
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/* Acknowledge interrupt */
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LDR lr, =AIC
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STR lr, [r14, #AIC_EOICR]
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/* Restore interrupt context and branch back to calling code */
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LDMIA sp!, {r0, lr}
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MSR SPSR_cxsf, lr
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LDMIA sp!, {pc}^
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//------------------------------------------------------------------------------
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/// Initializes the chip and branches to the main() function.
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//------------------------------------------------------------------------------
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.section .textEntry
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.global entry
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entry:
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resetHandler:
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CPSIE A
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/* Enable VFP */
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/* - Enable access to CP10 and CP11 in CP15.CACR */
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mrc p15, 0, r0, c1, c0, 2
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orr r0, r0, #0xf00000
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mcr p15, 0, r0, c1, c0, 2
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/* - Enable access to CP10 and CP11 in CP15.NSACR */
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/* - Set FPEXC.EN (B30) */
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fmrx r0, fpexc
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orr r0, r0, #0x40000000
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fmxr fpexc, r0
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||||
/* Useless instruction for referencing the .vectors section */
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ldr r0, =resetVector
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/* Set pc to actual code location (i.e. not in remap zone) */
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ldr pc, =1f
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||||
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||||
/* Initialize the prerelocate segment */
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1:
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ldr r0, =_efixed
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ldr r1, =_sprerelocate
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ldr r2, =_eprerelocate
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1:
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cmp r1, r2
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ldrcc r3, [r0], #4
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strcc r3, [r1], #4
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bcc 1b
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/* Perform low-level initialization of the chip using LowLevelInit() */
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ldr sp, =_sstack
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stmfd sp!, {r0}
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ldr r0, =LowLevelInit
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blx r0
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/* Initialize the postrelocate segment */
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ldmfd sp!, {r0}
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ldr r1, =_spostrelocate
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ldr r2, =_epostrelocate
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1:
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cmp r1, r2
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ldrcc r3, [r0], #4
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strcc r3, [r1], #4
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bcc 1b
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/* Clear the zero segment */
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||||
ldr r0, =_szero
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||||
ldr r1, =_ezero
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mov r2, #0
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1:
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cmp r0, r1
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strcc r2, [r0], #4
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bcc 1b
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||||
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/* Setup stacks
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**************/
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/* IRQ mode */
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msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
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ldr sp, =_sstack
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||||
sub r4, sp, #IRQ_STACK_SIZE
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||||
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||||
/* Supervisor mode (interrupts enabled) */
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||||
msr CPSR_c, #ARM_MODE_SVC | F_BIT
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mov sp, r4
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||||
|
||||
/*Initialize the C library */
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||||
ldr r3, =__libc_init_array
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||||
mov lr, pc
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||||
bx r3
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||||
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||||
/* Branch to main()
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||||
******************/
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ldr r0, =main
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blx r0
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||||
/* Loop indefinitely when program is finished */
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1:
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b 1b
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||||
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||||
@@ -78,29 +78,6 @@
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* See http://www.freertos.org/a00110.html.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* The FreeRTOS Cortex-A port implements a full interrupt nesting model.
|
||||
*
|
||||
* Interrupts that are assigned a priority at or below
|
||||
* configMAX_API_CALL_INTERRUPT_PRIORITY (which counter-intuitively in the ARM
|
||||
* generic interrupt controller [GIC] means a priority that has a numerical
|
||||
* value above configMAX_API_CALL_INTERRUPT_PRIORITY) can call FreeRTOS safe API
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||||
* functions and will nest.
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||||
*
|
||||
* Interrupts that are assigned a priority above
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||||
* configMAX_API_CALL_INTERRUPT_PRIORITY (which in the GIC means a numerical
|
||||
* value below configMAX_API_CALL_INTERRUPT_PRIORITY) cannot call any FreeRTOS
|
||||
* API functions, will nest, and will not be masked by FreeRTOS critical
|
||||
* sections (although it is necessary for interrupts to be globally disabled
|
||||
* extremely briefly as the interrupt mask is updated in the GIC).
|
||||
*
|
||||
* FreeRTOS functions that can be called from an interrupt are those that end in
|
||||
* "FromISR". FreeRTOS maintains a separate interrupt safe API to enable
|
||||
* interrupt entry to be shorter, faster, simpler and smaller.
|
||||
*/
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||||
#define configMAX_API_CALL_INTERRUPT_PRIORITY 25
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||||
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||||
#define configCPU_CLOCK_HZ 100000000UL
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
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||||
#define configUSE_TICKLESS_IDLE 0
|
||||
@@ -158,8 +135,8 @@ used. */
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||||
void vInitialiseRunTimeStats( void );
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||||
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||||
#define configGENERATE_RUN_TIME_STATS 0
|
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// #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() vInitialiseRunTimeStats()
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// #define portGET_RUN_TIME_COUNTER_VALUE() ulGetRunTimeCounterValue()
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||||
//_RB_ #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() vInitialiseRunTimeStats()
|
||||
//_RB_ #define portGET_RUN_TIME_COUNTER_VALUE() ulGetRunTimeCounterValue()
|
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|
||||
/* The size of the global output buffer that is available for use when there
|
||||
are multiple command interpreters running at once (for example, one on a UART
|
||||
@@ -185,18 +162,10 @@ used. */
|
||||
*/
|
||||
void vConfigureTickInterrupt( void );
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||||
#define configSETUP_TICK_INTERRUPT() vConfigureTickInterrupt()
|
||||
|
||||
#define configPIT_PIVR ( *( ( volatile uint32_t * ) 0xFFFFFE38UL ) )
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#define configCLEAR_TICK_INTERRUPT() ( void ) configPIT_PIVR /* Read PIT_PIVR to clear interrupt. */
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#endif /* __IASMARM__ */
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/* The following constants describe the hardware, and are correct for the
|
||||
Atmel SAMA5 MPU. */
|
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#define configINTERRUPT_CONTROLLER_BASE_ADDRESS 0xE8201000
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#define configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET 0x1000
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#define configUNIQUE_INTERRUPT_PRIORITIES 32
|
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|
||||
/* Map the FreeRTOS IRQ and SVC/SWI handlers to the names used in the C startup
|
||||
code (which is where the vector table is defined). */
|
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#define FreeRTOS_IRQ_Handler IRQ_Handler
|
||||
#define FreeRTOS_SWI_Handler SWI_Handler
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|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
|
||||
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@@ -67,6 +67,9 @@
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#include "FreeRTOS.h"
|
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#include "Task.h"
|
||||
|
||||
/* Library includes. */
|
||||
#include "board.h"
|
||||
|
||||
/*
|
||||
* The application must provide a function that configures a peripheral to
|
||||
* create the FreeRTOS tick interrupt, then define configSETUP_TICK_INTERRUPT()
|
||||
@@ -75,23 +78,27 @@
|
||||
*/
|
||||
void vConfigureTickInterrupt( void )
|
||||
{
|
||||
#warning Needs implementing.
|
||||
extern void FreeRTOS_Tick_Handler( void );
|
||||
|
||||
/* NOTE: The PIT interrupt is cleared by the configCLEAR_TICK_INTERRUPT()
|
||||
macro in FreeRTOSConfig.h. */
|
||||
|
||||
/* Enable the PIT clock. */
|
||||
PMC->PMC_PCER0 = 1 << ID_PIT;
|
||||
|
||||
/* Initialize the PIT to the desired frequency - specified in uS. */
|
||||
PIT_Init( 1000000UL / configTICK_RATE_HZ, BOARD_MCK / 1000000 );
|
||||
|
||||
/* Configure interrupt on PIT */
|
||||
#warning This is on the system interrupt and other interrupts may need processing to.
|
||||
IRQ_ConfigureIT( ID_PIT, 0, FreeRTOS_Tick_Handler );
|
||||
IRQ_EnableIT( ID_PIT );
|
||||
PIT_EnableIT();
|
||||
|
||||
/* Enable the pit. */
|
||||
PIT_Enable();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
void vApplicationIRQHandler( uint32_t ulICCIAR );
|
||||
void vApplicationIRQHandler( uint32_t ulICCIAR )
|
||||
{
|
||||
uint32_t ulInterruptID;
|
||||
|
||||
/* Re-enable interrupts. */
|
||||
__asm ( "cpsie i" );
|
||||
|
||||
/* The ID of the interrupt is obtained by bitwise anding the ICCIAR value
|
||||
with 0x3FF. */
|
||||
ulInterruptID = ulICCIAR & 0x3FFUL;
|
||||
|
||||
#warning Needs implementing.
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -76,20 +76,34 @@
|
||||
/* Demo includes. */
|
||||
#include "partest.h"
|
||||
|
||||
/* Library includes. */
|
||||
#include "board.h"
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vParTestInitialise( void )
|
||||
{
|
||||
LED_Configure( 0 );
|
||||
LED_Configure( 1 );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vParTestSetLED( UBaseType_t uxLED, BaseType_t xValue )
|
||||
{
|
||||
if( xValue == pdTRUE )
|
||||
{
|
||||
LED_Set( uxLED );
|
||||
}
|
||||
else
|
||||
{
|
||||
LED_Clear( uxLED );
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
|
||||
{
|
||||
LED_Toggle( uxLED );
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -49,7 +49,7 @@
|
||||
</option>
|
||||
<option>
|
||||
<name>MemFile</name>
|
||||
<state>$TOOLKIT_DIR$\CONFIG\debugger\Atmel\ATSAMA5D35.ddf</state>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>RunToEnable</name>
|
||||
@@ -835,7 +835,7 @@
|
||||
<option>
|
||||
<name>CCJLinkResetList</name>
|
||||
<version>6</version>
|
||||
<state>5</state>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCJLinkInterfaceCmdLine</name>
|
||||
|
||||
@@ -65,7 +65,7 @@
|
||||
</option>
|
||||
<option>
|
||||
<name>OGCoreOrChip</name>
|
||||
<state>1</state>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GRuntimeLibSelect</name>
|
||||
@@ -309,7 +309,7 @@
|
||||
<state>$PROJ_DIR$/AtmelFiles/libchip_sama5d3x/include</state>
|
||||
<state>$PROJ_DIR$/.</state>
|
||||
<state>$PROJ_DIR$\..\..\Source\include</state>
|
||||
<state>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CA9</state>
|
||||
<state>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CA5_No_GIC</state>
|
||||
<state>$PROJ_DIR$\..\Common\include</state>
|
||||
</option>
|
||||
<option>
|
||||
@@ -958,9 +958,6 @@
|
||||
<name>Atmel Files</name>
|
||||
<group>
|
||||
<name>libboard_sama5d3x-ek</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\AtmelFiles\libboard_sama5d3x-ek\source\board_cstartup_iar.s</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\AtmelFiles\libboard_sama5d3x-ek\source\board_lowlevel.c</name>
|
||||
</file>
|
||||
@@ -1002,6 +999,12 @@
|
||||
</file>
|
||||
</group>
|
||||
</group>
|
||||
<group>
|
||||
<name>Blinky Demo</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\blinky_demo\main_blinky.c</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>FreeRTOS Source</name>
|
||||
<group>
|
||||
@@ -1013,10 +1016,16 @@
|
||||
</file>
|
||||
</group>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CA9\port.c</name>
|
||||
<name>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CA5_No_GIC\port.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CA9\portASM.s</name>
|
||||
<name>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CA5_No_GIC\portASM.h</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CA5_No_GIC\portASM.s</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CA5_No_GIC\portmacro.h</name>
|
||||
</file>
|
||||
</group>
|
||||
<file>
|
||||
@@ -1038,6 +1047,9 @@
|
||||
<file>
|
||||
<name>$PROJ_DIR$\atmel_main.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\cstartup_with_FreeRTOS_vectors.s</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\FreeRTOS_tick_config.c</name>
|
||||
</file>
|
||||
@@ -1050,9 +1062,6 @@
|
||||
<file>
|
||||
<name>$PROJ_DIR$\main.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\main_blinky.c</name>
|
||||
</file>
|
||||
</project>
|
||||
|
||||
|
||||
|
||||
@@ -239,7 +239,8 @@ static void _Pit_Handler( void )
|
||||
/**
|
||||
* \brief Handler for Sysc interrupts.
|
||||
*/
|
||||
static void _Sysc_Handler( void )
|
||||
void _Sysc_Handler( void );
|
||||
void _Sysc_Handler( void )
|
||||
{
|
||||
_Pit_Handler( ) ;
|
||||
#ifdef NO_PUSHBUTTON
|
||||
|
||||
+6
-6
@@ -64,10 +64,10 @@
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
* NOTE 1: This project provides three demo applications. A simple blinky
|
||||
* style project, a more comprehensive test and demo application, and an
|
||||
* lwIP example. The mainSELECTED_APPLICATION setting in main.c is used to
|
||||
* select between the three. See the notes on using mainSELECTED_APPLICATION
|
||||
* NOTE 1: This project provides two demo applications. A simple blinky style
|
||||
* project, and a more comprehensive test and demo application. The
|
||||
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select
|
||||
* between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY
|
||||
* in main.c. This file implements the simply blinky style version.
|
||||
*
|
||||
* NOTE 2: This file only contains the source code that is specific to the
|
||||
@@ -126,12 +126,12 @@ the queue empty. */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
/*
|
||||
* Called by main when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1 in
|
||||
* main.c.
|
||||
*/
|
||||
void main_blinky( void );
|
||||
|
||||
|
||||
/*
|
||||
* The tasks as described in the comments at the top of this file.
|
||||
*/
|
||||
+6
-48
@@ -47,7 +47,7 @@
|
||||
//------------------------------------------------------------------------------
|
||||
// Definitions
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//_RB_ These definitions can go.
|
||||
#define AIC 0xFFFFF000
|
||||
#define AIC_IVR 0x10
|
||||
#define AIC_EOICR 0x38
|
||||
@@ -71,10 +71,10 @@
|
||||
SECTION .vectors:CODE:NOROOT(2)
|
||||
|
||||
PUBLIC resetVector
|
||||
PUBLIC irqHandler
|
||||
|
||||
EXTERN FreeRTOS_IRQ_Handler
|
||||
EXTERN Undefined_Handler
|
||||
EXTERN SWI_Handler
|
||||
EXTERN FreeRTOS_SWI_Handler
|
||||
EXTERN Prefetch_Handler
|
||||
EXTERN Abort_Handler
|
||||
EXTERN FIQ_Handler
|
||||
@@ -94,58 +94,16 @@ resetVector:
|
||||
LDR pc, Prefetch_Addr ; Prefetch abort
|
||||
LDR pc, Abort_Addr ; Data abort
|
||||
B . ; RESERVED
|
||||
LDR pc, =irqHandler ; IRQ
|
||||
LDR pc, IRQ_Addr ; IRQ
|
||||
LDR pc, FIQ_Addr ; FIQ
|
||||
|
||||
IRQ_Addr: DCD FreeRTOS_IRQ_Handler
|
||||
Undefined_Addr: DCD Undefined_Handler
|
||||
SWI_Addr: DCD SWI_Handler
|
||||
SWI_Addr: DCD FreeRTOS_SWI_Handler
|
||||
Prefetch_Addr: DCD Prefetch_Handler
|
||||
Abort_Addr: DCD Abort_Handler
|
||||
FIQ_Addr: DCD FIQ_Handler
|
||||
|
||||
/*
|
||||
Handles incoming interrupt requests by branching to the corresponding
|
||||
handler, as defined in the AIC. Supports interrupt nesting.
|
||||
*/
|
||||
irqHandler:
|
||||
/* Save interrupt context on the stack to allow nesting */
|
||||
SUB lr, lr, #4
|
||||
STMFD sp!, {lr}
|
||||
MRS lr, SPSR
|
||||
STMFD sp!, {r0, lr}
|
||||
|
||||
/* Write in the IVR to support Protect Mode */
|
||||
LDR lr, =AIC
|
||||
LDR r0, [r14, #AIC_IVR]
|
||||
STR lr, [r14, #AIC_IVR]
|
||||
|
||||
/* Branch to interrupt handler in Supervisor mode */
|
||||
MSR CPSR_c, #ARM_MODE_SYS
|
||||
STMFD sp!, {r1-r3, r4, r12, lr}
|
||||
|
||||
/* Check for 8-byte alignment and save lr plus a */
|
||||
/* word to indicate the stack adjustment used (0 or 4) */
|
||||
AND r1, sp, #4
|
||||
SUB sp, sp, r1
|
||||
STMFD sp!, {r1, lr}
|
||||
|
||||
BLX r0
|
||||
|
||||
LDMIA sp!, {r1, lr}
|
||||
ADD sp, sp, r1
|
||||
|
||||
LDMIA sp!, {r1-r3, r4, r12, lr}
|
||||
MSR CPSR_c, #ARM_MODE_IRQ | I_BIT
|
||||
|
||||
/* Acknowledge interrupt */
|
||||
LDR lr, =AIC
|
||||
STR lr, [r14, #AIC_EOICR]
|
||||
|
||||
/* Restore interrupt context and branch back to calling code */
|
||||
LDMIA sp!, {r0, lr}
|
||||
MSR SPSR_cxsf, lr
|
||||
LDMIA sp!, {pc}^
|
||||
|
||||
|
||||
/*
|
||||
After a reset, execution starts here, the mode is ARM, supervisor
|
||||
@@ -80,6 +80,8 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#warning Remove unused libary files.
|
||||
|
||||
/* Scheduler include files. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
@@ -90,6 +92,9 @@
|
||||
#include "TimerDemo.h"
|
||||
#include "QueueOverwrite.h"
|
||||
|
||||
/* Library includes. */
|
||||
#include "chip.h"
|
||||
|
||||
/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,
|
||||
or 0 to run the more comprehensive test and demo application. */
|
||||
#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 1
|
||||
@@ -120,10 +125,9 @@ void vApplicationTickHook( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
extern int atmel_main( void );
|
||||
extern void vConfigureTickInterrupt( void );
|
||||
int main( void )
|
||||
{
|
||||
atmel_main();
|
||||
|
||||
{
|
||||
/* Configure the hardware ready to run the demo. */
|
||||
prvSetupHardware();
|
||||
|
||||
@@ -145,6 +149,11 @@ int main( void )
|
||||
|
||||
static void prvSetupHardware( void )
|
||||
{
|
||||
/* Set protect mode in the AIC for easier debugging. */
|
||||
AIC->AIC_DCR != AIC_DCR_PROT;
|
||||
|
||||
/* Configure ports used by LEDs. */
|
||||
vParTestInitialise();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
File diff suppressed because one or more lines are too long
@@ -14,7 +14,7 @@ Watch0=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0
|
||||
Watch1=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0
|
||||
CStepIntDis=_ 0
|
||||
[DebugChecksum]
|
||||
Checksum=1381722156
|
||||
Checksum=-1179185332
|
||||
[Exceptions]
|
||||
StopOnUncaught=_ 0
|
||||
StopOnThrow=_ 0
|
||||
@@ -22,6 +22,8 @@ StopOnThrow=_ 0
|
||||
ShowArgs=0
|
||||
[Disassembly]
|
||||
MixedMode=1
|
||||
[watch_formats]
|
||||
Fmt0={W}1:xTickCount 4 0
|
||||
[Log file]
|
||||
LoggingEnabled=_ 0
|
||||
LogFile=_ ""
|
||||
@@ -41,7 +43,10 @@ Exclusions=
|
||||
mode=0
|
||||
[Breakpoints2]
|
||||
Bp0=_ 0 "EMUL_CODE" "0x0030558C" 0 0 1 "" 0 "" 0
|
||||
Count=1
|
||||
Bp1=_ 0 "EMUL_CODE" "{$PROJ_DIR$\atmel_main.c}.245.5" 0 0 1 "" 0 "" 0
|
||||
Bp2=_ 1 "EMUL_CODE" "{$PROJ_DIR$\cstartup_with_FreeRTOS_vectors.s}.93.1" 0 0 1 "" 0 "" 0
|
||||
Bp3=_ 1 "EMUL_CODE" "{$PROJ_DIR$\cstartup_with_FreeRTOS_vectors.s}.97.1" 0 0 1 "" 0 "" 0
|
||||
Count=4
|
||||
[Aliases]
|
||||
Count=0
|
||||
SuppressDialog=0
|
||||
|
||||
@@ -19,6 +19,6 @@
|
||||
@REM
|
||||
|
||||
|
||||
"C:\DevTools\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\DevTools\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\DevTools\IAR Systems\Embedded Workbench 7.0\arm\bin\armjlink.dll" %1 --plugin "C:\DevTools\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --macro "C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\CORTEX_A5_SAMA5D3x_Xplained_IAR\AtmelFiles\libboard_sama5d3x-ek\resources\ewarm\sama5d3x-ek-sram.mac" --backend -B "--endian=little" "--cpu=Cortex-A5" "--fpu=VFPv4Neon" "-p" "C:\DevTools\IAR Systems\Embedded Workbench 7.0\arm\CONFIG\debugger\Atmel\ATSAMA5D35.ddf" "--drv_verify_download" "--semihosting=none" "--device=ATSAMA5D35" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--drv_catch_exceptions=0x000"
|
||||
"C:\DevTools\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\DevTools\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\DevTools\IAR Systems\Embedded Workbench 7.0\arm\bin\armjlink.dll" %1 --plugin "C:\DevTools\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --macro "C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\CORTEX_A5_SAMA5D3x_Xplained_IAR\AtmelFiles\libboard_sama5d3x-ek\resources\ewarm\sama5d3x-ek-sram.mac" --backend -B "--endian=little" "--cpu=Cortex-A5" "--fpu=VFPv4Neon" "--drv_verify_download" "--semihosting=none" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--drv_catch_exceptions=0x000" "--jlink_reset_strategy=0,0"
|
||||
|
||||
|
||||
|
||||
File diff suppressed because one or more lines are too long
@@ -1,2 +1,2 @@
|
||||
[MainWindow]
|
||||
WindowPlacement=_ 66 66 1326 815 3
|
||||
WindowPlacement=_ 67 68 1327 817 3
|
||||
|
||||
Reference in New Issue
Block a user