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Remove older Renesas BSP files from the RX63N RSK demo in preparation to add in the latest BSP files.

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This commit is contained in:
Richard Barry
2012-04-23 13:39:14 +00:00
parent 88bff5d198
commit 1bd702777d
8 changed files with 0 additions and 1095 deletions
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Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/dbsct.c
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/***********************************************************************/
/* */
/* FILE :dbsct.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Setting of B,R Section */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX
*
* File Name : dbsct.c
*
* Abstract : Setting of B,R Section.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include "typedefine.h"
#pragma unpack
#pragma section C C$DSEC
extern const struct {
_UBYTE *rom_s; /* Start address of the initialized data section in ROM */
_UBYTE *rom_e; /* End address of the initialized data section in ROM */
_UBYTE *ram_s; /* Start address of the initialized data section in RAM */
} _DTBL[] = {
{ __sectop("D"), __secend("D"), __sectop("R") },
{ __sectop("D_2"), __secend("D_2"), __sectop("R_2") },
{ __sectop("D_1"), __secend("D_1"), __sectop("R_1") }
};
#pragma section C C$BSEC
extern const struct {
_UBYTE *b_s; /* Start address of non-initialized data section */
_UBYTE *b_e; /* End address of non-initialized data section */
} _BTBL[] = {
{ __sectop("B"), __secend("B") },
{ __sectop("B_2"), __secend("B_2") },
{ __sectop("B_1"), __secend("B_1") }
};
#pragma section
/*
** CTBL prevents excessive output of L1100 messages when linking.
** Even if CTBL is deleted, the operation of the program does not change.
*/
_UBYTE * const _CTBL[] = {
__sectop("C_1"), __sectop("C_2"), __sectop("C"),
__sectop("W_1"), __sectop("W_2"), __sectop("W")
};
#pragma packoption
Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/hwsetup.c
-293
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Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/intprg.c
-53
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/***********************************************************************/
/* */
/* FILE :intprg.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Interrupt Program */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : intprg.c
*
* Abstract : Interrupt Program.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include <machine.h>
#include "vect.h"
#pragma section IntPRG
// Exception(Supervisor Instruction)
void Excep_SuperVisorInst(void){/* brk(); */}
// Exception(Undefined Instruction)
void Excep_UndefinedInst(void){/* brk(); */}
// Exception(Floating Point)
void Excep_FloatingPoint(void){/* brk(); */}
// NMI
void NonMaskableInterrupt(void){/* brk(); */}
// Dummy
void Dummy(void){/* brk(); */}
// BRK
void Excep_BRK(void){ wait(); }
Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/lowlvl.src
-120
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; Comment out the orginal code
.IF 0
;------------------------------------------------------------------------
; |
; FILE :lowlvl.src |
; DATE :Wed, Jun 16, 2010 |
; DESCRIPTION :Program of Low level |
; CPU TYPE :Other |
; |
; This file is generated by Renesas Project Generator (Ver.4.50). |
; NOTE:THIS IS A TYPICAL EXAMPLE. |
; |
;------------------------------------------------------------------------
.GLB _charput
.GLB _charget
SIM_IO .EQU 0h
.SECTION P,CODE
;-----------------------------------------------------------------------
; _charput:
;-----------------------------------------------------------------------
_charput:
MOV.L #IO_BUF,R2
MOV.B R1,[R2]
MOV.L #1220000h,R1
MOV.L #PARM,R3
MOV.L R2,[R3]
MOV.L R3,R2
MOV.L #SIM_IO,R3
JSR R3
RTS
;-----------------------------------------------------------------------
; _charget:
;-----------------------------------------------------------------------
_charget:
MOV.L #1210000h,R1
MOV.L #IO_BUF,R2
MOV.L #PARM,R3
MOV.L R2,[R3]
MOV.L R3,R2
MOV.L #SIM_IO,R3
JSR R3
MOV.L #IO_BUF,R2
MOVU.B [R2],R1
RTS
;-----------------------------------------------------------------------
; I/O Buffer
;-----------------------------------------------------------------------
.SECTION B,DATA,ALIGN=4
PARM: .BLKL 1
.SECTION B_1,DATA
IO_BUF: .BLKB 1
; .END ; Commented out for conditional assembly
; Code below is for debug console
.ELSE
;-----------------------------------------------------------------------
;
; FILE :lowlvl.src
; DATE :Wed, Jul 01, 2009
; DESCRIPTION :Program of Low level
; CPU TYPE :RX
;
;-----------------------------------------------------------------------
.GLB _charput
.GLB _charget
FC2E0 .EQU 00084080h
FE2C0 .EQU 00084090h
DBGSTAT .EQU 000840C0h
RXFL0EN .EQU 00001000h
TXFL0EN .EQU 00000100h
.SECTION P,CODE
;-----------------------------------------------------------------------
; _charput:
;-----------------------------------------------------------------------
_charput:
.STACK _charput = 00000000h
__C2ESTART: MOV.L #TXFL0EN,R3
MOV.L #DBGSTAT,R4
__TXLOOP: MOV.L [R4],R5
AND R3,R5
BNZ __TXLOOP
__WRITEFC2E0: MOV.L #FC2E0,R2
MOV.L R1,[R2]
__CHARPUTEXIT: RTS
;-----------------------------------------------------------------------
; _charget:
;-----------------------------------------------------------------------
_charget:
.STACK _charget = 00000000h
__E2CSTART: MOV.L #RXFL0EN,R3
MOV.L #DBGSTAT,R4
__RXLOOP: MOV.L [R4],R5
AND R3,R5
BZ __RXLOOP
__READFE2C0: MOV.L #FE2C0,R2
MOV.L [R2],R1
__CHARGETEXIT: RTS
;-----------------------------------------------------------------------
; End of conditional code
.ENDIF
.END
Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/lowsrc.c
-329
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Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/resetprg.c
-142
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/***********************************************************************/
/* */
/* FILE :resetprg.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Reset Program */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : resetprg.c
*
* Abstract : Reset Program.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
/* Types used in this file. */
#include "typedefine.h"
/* Defines machine level functions used in this file */
#include <machine.h>
/* Defines MCU configuration functions used in this file */
#include <_h_c_lib.h>
/* Hardware definitions" */
#include "iodefine.h"
/* Defines the size of the stack which configured in this file */
#include "stacksct.h"
#define PSW_init 0x00010000
#define FPSW_init 0x00000100
extern void HardwareSetup( void );
#pragma section ResetPRG
#pragma entry PowerON_Reset_PC
/* It is ok to use stack variables here because "#pragma entry" is used, so the
stack is setup in the compiler generated prologue. */
void PowerON_Reset_PC(void)
{
volatile unsigned int i;
set_intb(__sectop("C$VECT"));
set_fpsw(FPSW_init);
/* MCU boots using the LOCO, so turn the speed up before setting up the C
run-time environment.
Clock Description Frequency
----------------------------------------
Input Clock Frequency............ 12 MHz
PLL frequency (x16).............. 192 MHz
Internal Clock Frequency......... 96 MHz
Peripheral Clock Frequency....... 48 MHz
USB Clock Frequency.............. 48 MHz
External Bus Clock Frequency..... 24 MHz */
/* Protect off. */
SYSTEM.PRCR.WORD = 0xA50B;
/* Uncomment if not using sub-clock */
//SYSTEM.SOSCCR.BYTE = 0x01; /* stop sub-clock */
SYSTEM.SOSCCR.BYTE = 0x00; /* Enable sub-clock for RTC */
/* Wait 131,072 cycles * 12 MHz = 10.9 ms */
SYSTEM.MOSCWTCR.BYTE = 0x0D;
/* PLL wait is 4,194,304 cycles (default) * 192 MHz (12 MHz * 16) = 20.1 ms*/
SYSTEM.PLLWTCR.BYTE = 0x04;
/* x16 @PLL */
SYSTEM.PLLCR.WORD = 0x0F00;
/* EXTAL ON */
SYSTEM.MOSCCR.BYTE = 0x00;
/* PLL ON */
SYSTEM.PLLCR2.BYTE = 0x00;
for(i = 0;i< 0x168;i++)
{
/* Wait over 12ms */
nop() ;
}
/* Setup system clocks
SCKCR - System Clock Control Register
b31:b28 FCK[3:0] 0x02 = Flash clock: PLL/4 = (192 / 4) = 48 MHz
b27:b24 ICK[3:0] 0x01 = System clock: PLL/2 = (192 / 2) = 96 MHz
b23 PSTOP1 0x00 = BCLK pin output is enabled
b19:b16 BCK[3:0] 0x03 = BCLK: PLL/8 = 24 MHz
b11:b8 PCKB[3:0] 0x02 = Peripheral clock B: PLL/4 = 48 MHz
*/
SYSTEM.SCKCR.LONG = 0x21031222; /* ICK=PLL/2,BCK,FCK,PCK=PLL/4 */
/* Setup IEBUS and USB clocks
SCKCR2 - System Clock Control Register 2
b7:b4 UCK[3:0] 0x03 = USB clock is PLL/4 = 48 MHz
b3:b0 IEBCK[3:0] 0x01 = IE Bus clock is PLL/2 = 96 MHz
*/
SYSTEM.SCKCR2.WORD = 0x0031;
/* ICLK, PCLKB, FCLK, BCLK, IECLK, and USBCLK all come from PLL circuit */
SYSTEM.SCKCR3.WORD = 0x0400;
/* Protect on. */
SYSTEM.PRCR.WORD = 0xA500;
/* Initialize C runtime environment */
_INITSCT();
/* Setup the hardware for the RSK. */
HardwareSetup();
nop();
/* Set Ubit and Ibit for PSW. */
set_psw(PSW_init);
/* Call the application code. */
main();
/* Main should not return. */
brk();
}
Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/sbrk.c
-28
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#include <stddef.h>
#include <stdio.h>
#define HEAPSIZE 0x400
signed char *sbrk( size_t size );
union HEAP_TYPE
{
signed long dummy;
signed char heap[HEAPSIZE];
};
static union HEAP_TYPE heap_area;
/* End address allocated by sbrk */
static signed char *brk = ( signed char * ) &heap_area;
signed char *sbrk( size_t size )
{
signed char *p;
if( brk + size > heap_area.heap + HEAPSIZE )
{
p = ( signed char * ) - 1;
}
else
{
p = brk;
brk += size;
}
return p;
}
Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/vecttbl.c
-64
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/***********************************************************************/
/* */
/* FILE :vecttbl.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Initialize of Vector Table */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : vecttbl.c
*
* Abstract : Initialize of Vector Table.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include "vect.h"
#pragma section C FIXEDVECT
void* const Fixed_Vectors[] = {
//;0xffffffd0 Exception(Supervisor Instruction)
(void*) Excep_SuperVisorInst,
//;0xffffffd4 Reserved
Dummy,
//;0xffffffd8 Reserved
Dummy,
//;0xffffffdc Exception(Undefined Instruction)
(void*) Excep_UndefinedInst,
//;0xffffffe0 Reserved
Dummy,
//;0xffffffe4 Exception(Floating Point)
(void*) Excep_FloatingPoint,
//;0xffffffe8 Reserved
Dummy,
//;0xffffffec Reserved
Dummy,
//;0xfffffff0 Reserved
Dummy,
//;0xfffffff4 Reserved
Dummy,
//;0xfffffff8 NMI
(void*) NonMaskableInterrupt,
//;0xfffffffc RESET
//;<<VECTOR DATA START (POWER ON RESET)>>
//;Power On Reset PC
PowerON_Reset_PC
//;<<VECTOR DATA END (POWER ON RESET)>>
};