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This commit is contained in:
Richard Barry
2006-06-08 09:16:29 +00:00
parent 946da76519
commit 05023971cb
389 changed files with 11479 additions and 464 deletions
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Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h
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/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_AT91FR40008_GCC/Makefile
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# FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
# FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
#
# This file is part of the FreeRTOS.org distribution.
#
Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_AT91FR40008_GCC/main.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_AT91FR40008_GCC/serial/serial.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_AT91SAM7S64_IAR/main.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_LPC2106_GCC/Makefile
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@@ -1,4 +1,4 @@
# FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
# FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
#
# This file is part of the FreeRTOS.org distribution.
#
Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_LPC2106_GCC/main.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_LPC2106_GCC/serial/serial.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_LPC2106_GCC/serial/serialISR.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_LPC2129_IAR/main.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_LPC2129_IAR/serial/serial.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_LPC2129_Keil/FreeRTOSConfig.h
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_LPC2129_Keil/ParTest/ParTest.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_LPC2129_Keil/main.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_LPC2129_Keil/serial/serial.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_LPC2129_Keil/serial/serialISR.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_STR71x_IAR/ParTest/ParTest.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_STR71x_IAR/main.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/ARM7_STR71x_IAR/serial/serial.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/AVR_ATMega323_IAR/FreeRTOSConfig.h
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/AVR_ATMega323_IAR/ParTest/ParTest.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/AVR_ATMega323_IAR/main.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/AVR_ATMega323_IAR/serial/serial.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/AVR_ATMega323_WinAVR/FreeRTOSConfig.h
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/AVR_ATMega323_WinAVR/ParTest/ParTest.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/AVR_ATMega323_WinAVR/main.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/AVR_ATMega323_WinAVR/serial/serial.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_GCC/Demo1/main.c
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_GCC/Demo2/main.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_GCC/main.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_KEIL/Demo1/FreeRTOSConfig.h
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_KEIL/Demo1/main.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_KEIL/Demo2/FreeRTOSConfig.h
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_KEIL/Demo2/main.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_KEIL/FreeRTOSConfig.h
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_KEIL/ParTest/ParTest.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_KEIL/main.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_Rowley/Demo1/main.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_Rowley/Demo1/vectors.s
+8 -4
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@@ -25,7 +25,11 @@
_vectors:
.word __stack_end__
.word reset_handler
#ifdef STARTUP_FROM_RESET
.word _start
#else
.word reset_wait
#endif /* STARTUP_FROM_RESET */
.word NmiISR
.word FaultISR
.word 0 // Populate if using MemManage (MPU)
@@ -110,6 +114,6 @@ DEFAULT_ISR_HANDLER Analog_Comparator_2_ISR
DEFAULT_ISR_HANDLER System_Control_ISR
DEFAULT_ISR_HANDLER FLASH_Control_ISR
#ifndef STARTUP_FROM_RESET
DEFAULT_ISR_HANDLER reset_wait
#endif /* STARTUP_FROM_RESET */
Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_Rowley/Demo2/main.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_Rowley/Demo2/vectors.s
+8 -4
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@@ -25,7 +25,11 @@
_vectors:
.word __stack_end__
.word reset_handler
#ifdef STARTUP_FROM_RESET
.word _start
#else
.word reset_wait
#endif /* STARTUP_FROM_RESET */
.word NmiISR
.word FaultISR
.word 0 // Populate if using MemManage (MPU)
@@ -110,6 +114,6 @@ DEFAULT_ISR_HANDLER Analog_Comparator_2_ISR
DEFAULT_ISR_HANDLER System_Control_ISR
DEFAULT_ISR_HANDLER FLASH_Control_ISR
#ifndef STARTUP_FROM_RESET
DEFAULT_ISR_HANDLER reset_wait
#endif /* STARTUP_FROM_RESET */
Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_Rowley/Demo3/main.c
+1 -1
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@@ -1,5 +1,5 @@
/*
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
Demo/CORTEX_LM3S102_Rowley/Demo3/vectors.s
+8 -4
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@@ -26,7 +26,11 @@
_vectors:
.word __stack_end__
.word reset_handler
#ifdef STARTUP_FROM_RESET
.word _start
#else
.word reset_wait
#endif /* STARTUP_FROM_RESET */
.word NmiISR
.word FaultISR
.word 0 // Populate if using MemManage (MPU)
@@ -111,6 +115,6 @@ DEFAULT_ISR_HANDLER Analog_Comparator_2_ISR
DEFAULT_ISR_HANDLER System_Control_ISR
DEFAULT_ISR_HANDLER FLASH_Control_ISR
#ifndef STARTUP_FROM_RESET
DEFAULT_ISR_HANDLER reset_wait
#endif /* STARTUP_FROM_RESET */
Demo/CORTEX_LM3S102_Rowley/RTOSDemo.hzp
+14 -8
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@@ -1,7 +1,7 @@
<!DOCTYPE CrossStudio_Project_File>
<solution version="1" Name="RTOSDemo" >
<project Name="Demo1" >
<configuration arm_library_instruction_set="Thumb" Target="LM3S101" property_groups_file_path="$(StudioDir)/targets/Luminary_LM3S/propertyGroups.xml" linker_memory_map_file="$(StudioDir)/targets/Luminary_LM3S/LM3S101_MemoryMap.xml" gcc_entry_point="reset_handler" build_remove_unused_symbols="Yes" arm_linker_fiq_stack_size="0" arm_architecture="v7M" project_directory="" arm_linker_irq_stack_size="0" link_include_startup_code="No" arm_target_flash_loader_type="LIBMEM RPC Loader" arm_instruction_set="Thumb" project_type="Executable" linker_printf_width_precision_supported="No" arm_linker_stack_size="128" Name="Common" arm_target_debug_interface_type="ADIv5" arm_linker_heap_size="128" />
<configuration arm_library_instruction_set="Thumb" Target="LM3S101" property_groups_file_path="$(StudioDir)/targets/Luminary_LM3S/propertyGroups.xml" linker_memory_map_file="$(StudioDir)/targets/Luminary_LM3S/LM3S101_MemoryMap.xml" gcc_entry_point="_start" build_remove_unused_symbols="Yes" arm_linker_fiq_stack_size="0" arm_architecture="v7M" linker_section_placement_file="$(StudioDir)/targets/Luminary_LM3S/flash_placement.xml" project_directory="" arm_linker_irq_stack_size="0" link_include_startup_code="No" arm_target_flash_loader_type="LIBMEM RPC Loader" arm_instruction_set="Thumb" project_type="Executable" linker_printf_width_precision_supported="No" arm_linker_stack_size="200" Name="Common" arm_target_debug_interface_type="ADIv5" arm_linker_heap_size="128" />
<configuration arm_target_flash_loader_file_path="$(StudioDir)/targets/Luminary_LM3S/Release/Loader.elf" linker_section_placement_file="$(StudioDir)/targets/flash_placement.xml" target_reset_script="FLASHReset()" Name="Flash" Placement="Flash" />
<configuration linker_section_placement_file="$(StudioDir)/targets/sram_placement.xml" Name="RAM" Placement="RAM" />
<folder Name="Source Files" >
@@ -17,7 +17,7 @@
<file file_name="../../Source/list.c" Name="list.c" />
<file file_name="../../Source/queue.c" Name="queue.c" />
<file file_name="../../Source/portable/GCC/ARM_CM3/port.c" Name="port.c" >
<configuration gcc_optimization_level="Level 2" Name="Flash Release" />
<configuration gcc_optimization_level="Level 1" Name="Flash Release" />
</file>
<file file_name="../../Source/portable/MemMang/heap_1.c" Name="heap_1.c" />
</folder>
@@ -32,11 +32,12 @@
</file>
<file file_name="Demo1/vectors.s" Name="vectors.s" />
</folder>
<configuration build_remove_unused_symbols="Yes" build_quietly="No" c_preprocessor_definitions="GCC_ARMCM3_LM3S102" linker_additional_files="$(ProjectDir)/hw_include/libdriver.a" c_user_include_directories="$(ProjectDir)/demo1;$(ProjectDir)/../common/include;$(ProjectDir)/hw_include" link_include_standard_libraries="Yes" gcc_optimization_level="Level 2" build_debug_information="Yes" arm_linker_stack_size="200" Name="Flash Release" c_system_include_directories="$(StudioDir)/include;$(ProjectDir)/../../source/include;$(ProjectDir)/../../source/portable/gcc/ARM_CM3" arm_use_gcc_libraries="No" linker_output_format="None" arm_linker_heap_size="0" />
<configuration linker_memory_map_file="$(StudioDir)/targets/Luminary_LM3S/LM3S101_MemoryMap.xml" gcc_entry_point="_start" build_remove_unused_symbols="Yes" build_quietly="No" c_preprocessor_definitions="" linker_section_placement_file="$(StudioDir)/targets/Luminary_LM3S/flash_placement.xml" linker_additional_files="$(ProjectDir)/hw_include/libdriver.a" c_user_include_directories="" link_include_standard_libraries="Yes" gcc_optimization_level="Level 2" build_debug_information="Yes" arm_linker_stack_size="200" Name="Flash Release" c_system_include_directories="" arm_use_gcc_libraries="No" arm_core_type="Cortex-M3" linker_output_format="None" arm_linker_heap_size="0" />
<configuration linker_section_placement_file="$(StudioDir)/targets/Luminary_LM3S/flash_placement.xml" linker_additional_files="$(ProjectDir)/hw_include/libdriver.a" Name="Flash Debug" arm_linker_heap_size="0" />
</project>
<configuration inherited_configurations="Flash;Release" Name="Flash Release" />
<configuration inherited_configurations="Flash;Release" c_preprocessor_definitions="" Name="Flash Release" />
<configuration c_preprocessor_definitions="__FLASH_BUILD" hidden="Yes" Name="Flash" />
<configuration c_preprocessor_definitions="NDEBUG" link_include_startup_code="No" gcc_optimization_level="Level 1" build_debug_information="No" hidden="Yes" Name="Release" />
<configuration c_preprocessor_definitions="NDEBUG;STARTUP_FROM_RESET" arm_architecture="v7M" link_include_startup_code="No" gcc_optimization_level="Level 1" build_debug_information="No" linker_printf_width_precision_supported="No" hidden="Yes" Name="Release" arm_core_type="Cortex-M3" />
<project Name="Demo2" >
<configuration arm_library_instruction_set="Thumb" Target="LM3S101" property_groups_file_path="$(StudioDir)/targets/Luminary_LM3S/propertyGroups.xml" linker_memory_map_file="$(StudioDir)/targets/Luminary_LM3S/LM3S101_MemoryMap.xml" gcc_entry_point="reset_handler" build_remove_unused_symbols="Yes" arm_linker_fiq_stack_size="0" arm_architecture="v7M" project_directory="" arm_linker_irq_stack_size="0" link_include_startup_code="No" arm_target_flash_loader_type="LIBMEM RPC Loader" arm_instruction_set="Thumb" project_type="Executable" linker_printf_width_precision_supported="No" arm_linker_stack_size="128" Name="Common" arm_target_debug_interface_type="ADIv5" arm_linker_heap_size="128" />
<configuration arm_target_flash_loader_file_path="$(StudioDir)/targets/Luminary_LM3S/Release/Loader.elf" linker_section_placement_file="$(StudioDir)/targets/flash_placement.xml" target_reset_script="FLASHReset()" Name="Flash" Placement="Flash" />
@@ -54,7 +55,7 @@
<file file_name="../../Source/list.c" Name="list.c" />
<file file_name="../../Source/queue.c" Name="queue.c" />
<file file_name="../../Source/portable/GCC/ARM_CM3/port.c" Name="port.c" >
<configuration gcc_optimization_level="Level 2" Name="Flash Release" />
<configuration gcc_optimization_level="Level 1" Name="Flash Release" />
</file>
<file file_name="../../Source/portable/MemMang/heap_1.c" Name="heap_1.c" />
</folder>
@@ -69,7 +70,8 @@
</file>
<file file_name="Demo2/vectors.s" Name="vectors.s" />
</folder>
<configuration build_remove_unused_symbols="Yes" build_quietly="No" c_preprocessor_definitions="GCC_ARMCM3_LM3S102" linker_additional_files="$(ProjectDir)/hw_include/libdriver.a" c_user_include_directories="$(ProjectDir)/demo2;$(ProjectDir)/../common/include;$(ProjectDir)/hw_include" link_include_standard_libraries="Yes" gcc_optimization_level="Level 2" build_debug_information="Yes" arm_linker_stack_size="200" Name="Flash Release" c_system_include_directories="$(StudioDir)/include;$(ProjectDir)/../../source/include;$(ProjectDir)/../../source/portable/gcc/ARM_CM3" arm_use_gcc_libraries="No" linker_output_format="None" arm_linker_heap_size="0" />
<configuration gcc_entry_point="_start" build_remove_unused_symbols="Yes" build_quietly="No" c_preprocessor_definitions="GCC_ARMCM3_LM3S102" linker_section_placement_file="$(StudioDir)/targets/Luminary_LM3S/flash_placement.xml" linker_additional_files="$(ProjectDir)/hw_include/libdriver.a" c_user_include_directories="$(ProjectDir)/demo2;$(ProjectDir)/../common/include;$(ProjectDir)/hw_include" link_include_standard_libraries="Yes" gcc_optimization_level="Level 2" build_debug_information="Yes" arm_linker_stack_size="200" Name="Flash Release" c_system_include_directories="$(StudioDir)/include;$(ProjectDir)/../../source/include;$(ProjectDir)/../../source/portable/gcc/ARM_CM3" arm_use_gcc_libraries="No" linker_output_format="None" arm_linker_heap_size="0" />
<configuration gcc_entry_point="_start" linker_section_placement_file="$(StudioDir)/targets/Luminary_LM3S/flash_placement.xml" linker_additional_files="$(ProjectDir)/hw_include/libdriver.a" arm_linker_stack_size="200" Name="Flash Debug" arm_linker_heap_size="0" />
</project>
<project Name="Demo3" >
<configuration arm_library_instruction_set="Thumb" Target="LM3S101" property_groups_file_path="$(StudioDir)/targets/Luminary_LM3S/propertyGroups.xml" linker_memory_map_file="$(StudioDir)/targets/Luminary_LM3S/LM3S101_MemoryMap.xml" gcc_entry_point="reset_handler" build_remove_unused_symbols="Yes" arm_linker_fiq_stack_size="0" arm_architecture="v7M" project_directory="" arm_linker_irq_stack_size="0" link_include_startup_code="No" arm_target_flash_loader_type="LIBMEM RPC Loader" arm_instruction_set="Thumb" project_type="Executable" linker_printf_width_precision_supported="No" arm_linker_stack_size="128" Name="Common" arm_target_debug_interface_type="ADIv5" arm_linker_heap_size="128" />
@@ -99,6 +101,10 @@
</file>
<file file_name="Demo3/vectors.s" Name="vectors.s" />
</folder>
<configuration build_remove_unused_symbols="Yes" build_quietly="No" c_preprocessor_definitions="GCC_ARMCM3_LM3S102" linker_additional_files="$(ProjectDir)/hw_include/libdriver.a" c_user_include_directories="$(ProjectDir)/demo3;$(ProjectDir)/../common/include;$(ProjectDir)/hw_include" link_include_standard_libraries="Yes" gcc_optimization_level="Level 1" build_debug_information="Yes" arm_linker_stack_size="200" Name="Flash Release" c_system_include_directories="$(StudioDir)/include;$(ProjectDir)/../../source/include;$(ProjectDir)/../../source/portable/gcc/ARM_CM3" arm_use_gcc_libraries="No" linker_output_format="None" arm_linker_heap_size="0" />
<configuration gcc_entry_point="_start" build_remove_unused_symbols="Yes" build_quietly="No" c_preprocessor_definitions="GCC_ARMCM3_LM3S102" linker_section_placement_file="$(StudioDir)/targets/Luminary_LM3S/flash_placement.xml" linker_additional_files="$(ProjectDir)/hw_include/libdriver.a" c_user_include_directories="$(ProjectDir)/demo3;$(ProjectDir)/../common/include;$(ProjectDir)/hw_include" link_include_standard_libraries="Yes" gcc_optimization_level="Level 2" build_debug_information="Yes" arm_linker_stack_size="200" Name="Flash Release" c_system_include_directories="$(StudioDir)/include;$(ProjectDir)/../../source/include;$(ProjectDir)/../../source/portable/gcc/ARM_CM3" arm_use_gcc_libraries="No" linker_output_format="None" arm_linker_heap_size="0" />
<configuration gcc_entry_point="_start" linker_section_placement_file="$(StudioDir)/targets/Luminary_LM3S/flash_placement.xml" linker_additional_files="$(ProjectDir)/hw_include/libdriver.a" arm_linker_stack_size="200" Name="Flash Debug" arm_linker_heap_size="0" />
</project>
<configuration build_remove_unused_symbols="Yes" arm_architecture="v7M" linker_printf_width_precision_supported="No" hidden="Yes" Name="debug" arm_core_type="Cortex-M3" />
<configuration inherited_configurations="debug;Flash" gcc_optimization_level="Level 1" Name="Flash Debug" />
<configuration linker_memory_map_file="$(StudioDir)/targets/Luminary_LM3S/LM3S101_MemoryMap.xml" c_preprocessor_definitions="GCC_ARMCM3_LM3S102" arm_linker_fiq_stack_size="0" linker_section_placement_file="$(StudioDir)/targets/Luminary_LM3S/flash_placement.xml" linker_additional_files="$(ProjectDir)/hw_include/libdriver.a" c_user_include_directories="$(ProjectDir)/demo1;$(ProjectDir)/../common/include;$(ProjectDir)/hw_include" arm_linker_irq_stack_size="0" link_symbol_definitions="" arm_linker_stack_size="200" Name="Common" c_system_include_directories="$(StudioDir)/include;$(ProjectDir)/../../source/include;$(ProjectDir)/../../source/portable/gcc/ARM_CM3" />
</solution>
Demo/CORTEX_LM3S102_Rowley/RTOSDemo.hzs
+10 -21
View File
@@ -23,7 +23,7 @@
</Breakpoints>
<ExecutionCountWindow/>
<Memory1>
<MemoryWindow autoEvaluate="0" addressText="0xe000e014" numColumns="8" sizeText="4" dataSize="1" radix="16" addressSpace="" />
<MemoryWindow autoEvaluate="0" addressText="0x20000000" numColumns="8" sizeText="2048" dataSize="1" radix="16" addressSpace="" />
</Memory1>
<Memory2>
<MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
@@ -38,11 +38,10 @@
<ProjectSessionItem path="RTOSDemo" name="unnamed" />
<ProjectSessionItem path="RTOSDemo;Demo1" name="unnamed" />
<ProjectSessionItem path="RTOSDemo;Demo1;Source Files" name="unnamed" />
<ProjectSessionItem path="RTOSDemo;Demo1;Source Files;RTOS Source" name="unnamed" />
<ProjectSessionItem path="RTOSDemo;Demo1;Source Files;Demo Source" name="unnamed" />
<ProjectSessionItem path="RTOSDemo;Demo1;System Files" name="unnamed" />
<ProjectSessionItem path="RTOSDemo;Demo2" name="unnamed" />
<ProjectSessionItem path="RTOSDemo;Demo3" name="unnamed" />
<ProjectSessionItem path="RTOSDemo;Demo3;Source Files" name="unnamed" />
<ProjectSessionItem path="RTOSDemo;Demo3;Source Files;Demo Source" name="unnamed" />
<ProjectSessionItem path="RTOSDemo;Demo3;System Files" name="unnamed" />
</Project>
<Register1>
<RegisterWindow unsignedDisplays="" asciiDisplays="" octalDisplays="" openGroups="CPU - Current Mode" visibleGroups="CPU - Current Mode" decimalDisplays="" binaryDisplays="" />
@@ -62,10 +61,10 @@
</TraceWindow>
<Watch1>
<Watches active="1" >
<Watchpoint evalMode="0" linenumber="0" evalType="1" radix="-1" name="pxTopOfStack" expression="pxTopOfStack" filename="" />
<Watchpoint evalMode="1" linenumber="0" evalType="1" radix="-1" name="ulglob" expression="ulglob" filename="" />
<Watchpoint linenumber="0" radix="-1" name="uxCriticalNesting" expression="uxCriticalNesting" filename="" />
<Watchpoint evalMode="1" linenumber="0" evalType="1" radix="-1" name="xHandle" expression="xHandle" filename="" />
<Watchpoint linenumber="0" radix="-1" name="xTickCount" expression="xTickCount" filename="" />
<Watchpoint evalMode="1" linenumber="0" evalType="1" radix="-1" name="pxCurrentTCB" expression="pxCurrentTCB" filename="" />
<Watchpoint linenumber="0" radix="16" name="ul" expression="ul" filename="" />
</Watches>
</Watch1>
<Watch2>
@@ -77,18 +76,8 @@
<Watch4>
<Watches active="0" />
</Watch4>
<Files>
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" x="1" debugPath="C:\E\Dev\FreeRTOS\Source\portable\GCC\ARM_CM3\port.c" y="102" useHTMLEdit="0" path="C:\E\Dev\FreeRTOS\Source\portable\GCC\ARM_CM3\port.c" left="0" selected="1" name="unnamed" top="257" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" x="0" debugPath="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\Demo3\main.c" y="117" useHTMLEdit="0" path="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\Demo3\main.c" left="0" selected="0" name="unnamed" top="82" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" x="0" debugPath="C:\E\Dev\FreeRTOS\Source\croutine.c" y="275" useHTMLEdit="0" path="C:\E\Dev\FreeRTOS\Source\croutine.c" left="0" selected="0" name="unnamed" top="258" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" x="0" debugPath="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\Demo3\vectors.s" y="79" useHTMLEdit="0" path="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\Demo3\vectors.s" left="0" selected="0" name="unnamed" top="44" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" x="0" debugPath="C:\E\Dev\FreeRTOS\Source\tasks.c" y="1181" useHTMLEdit="0" path="C:\E\Dev\FreeRTOS\Source\tasks.c" left="0" selected="0" name="unnamed" top="1166" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" x="51" debugPath="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\demo3\FreeRTOSConfig.h" y="49" useHTMLEdit="0" path="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\demo3\FreeRTOSConfig.h" left="0" selected="0" name="unnamed" top="24" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" x="24" debugPath="C:\E\Dev\FreeRTOS\Source\portable\GCC\ARM_CM3\portmacro.h" y="66" useHTMLEdit="0" path="C:\E\Dev\FreeRTOS\Source\portable\GCC\ARM_CM3\portmacro.h" left="0" selected="0" name="unnamed" top="56" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" x="13" debugPath="C:\E\Dev\FreeRTOS\source\include\croutine.h" y="294" useHTMLEdit="0" path="C:\E\Dev\FreeRTOS\source\include\croutine.h" left="0" selected="0" name="unnamed" top="271" />
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" x="35" debugPath="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\Demo3\ParTest.c" y="49" useHTMLEdit="0" path="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\Demo3\ParTest.c" left="0" selected="0" name="unnamed" top="28" />
</Files>
<ARMCrossStudioWindow activeProject="Demo3" autoConnectTarget="/CrossFire LM3S102" debugSearchFileMap="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\hw_include\src\gpio.c
<Files/>
<ARMCrossStudioWindow activeProject="Demo1" autoConnectTarget="/USB CrossConnect for ARM" debugSearchFileMap="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\hw_include\src\gpio.c
C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley_\hw_include\src\gpio.c
C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\hw_include\src\interrupt.c
C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley_\hw_include\src\interrupt.c
@@ -97,5 +86,5 @@ C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley_\hw_include\src\ssi.c
C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\hw_include\src\sysctl.c
C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\hw_include\src\uart.c
C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley_\hw_include\src\uart.c" fileDialogInitialDirectory="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\Demo3" fileDialogDefaultFilter="*.asm;*.s;*.inc" autoConnectCapabilities="1919" debugSearchPath="" buildConfiguration="Flash Release" />
C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley_\hw_include\src\uart.c" fileDialogInitialDirectory="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S102_Rowley\Demo3" fileDialogDefaultFilter="*.asm;*.s;*.inc" autoConnectCapabilities="1919" debugSearchPath="" buildConfiguration="Flash Debug" />
</session>
Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h
+76
View File
@@ -0,0 +1,76 @@
/*
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 1
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 20000000 )
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 70 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 3000 ) )
#define configMAX_TASK_NAME_LEN ( 3 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 0
#define configUSE_CO_ROUTINES 1
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 2 )
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 0
#define INCLUDE_uxTaskPriorityGet 0
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 0
#define INCLUDE_vTaskDelayUntil 0
#define INCLUDE_vTaskDelay 1
#endif /* FREERTOS_CONFIG_H */
Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c
+112
View File
@@ -0,0 +1,112 @@
/*
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/*-----------------------------------------------------------
* Simple parallel port IO routines.
*-----------------------------------------------------------*/
/*
*/
#include "FreeRTOS.h"
#include "Task.h"
#include "partest.h"
#include "pdc.h"
#define partstPINS (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 Z | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7)
#define partstALL_OUTPUTS_OFF ( ( unsigned portCHAR ) 0x00 )
#define partstMAX_OUTPUT_LED ( ( unsigned portCHAR ) 8 )
static volatile unsigned portCHAR ucOutputValue = partstALL_OUTPUTS_OFF;
void vParTestInitialise( void )
{
PDCInit();
PDCWrite( PDC_LED, ucOutputValue );
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
unsigned portCHAR ucBit = ( unsigned portCHAR ) 1;
vTaskSuspendAll();
{
if( uxLED < partstMAX_OUTPUT_LED )
{
ucBit = ( ( unsigned portCHAR ) 1 ) << uxLED;
if( xValue == pdFALSE )
{
ucBit ^= ( unsigned portCHAR ) 0xff;
ucOutputValue &= ucBit;
}
else
{
ucOutputValue |= ucBit;
}
PDCWrite( PDC_LED, ucOutputValue );
}
}
xTaskResumeAll();
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
unsigned portCHAR ucBit;
vTaskSuspendAll();
{
if( uxLED < partstMAX_OUTPUT_LED )
{
ucBit = ( ( unsigned portCHAR ) 1 ) << uxLED;
if( ucOutputValue & ucBit )
{
ucOutputValue &= ~ucBit;
}
else
{
ucOutputValue |= ucBit;
}
PDCWrite( PDC_LED, ucOutputValue );
}
}
xTaskResumeAll();
}
Demo/CORTEX_LM3S316_IAR/RTOSDemo.dep
+535
View File
File diff suppressed because it is too large Load Diff
Demo/CORTEX_LM3S316_IAR/RTOSDemo.ewd
+509
View File
File diff suppressed because it is too large Load Diff
Demo/CORTEX_LM3S316_IAR/RTOSDemo.ewp
+891
View File
File diff suppressed because it is too large Load Diff
Demo/CORTEX_LM3S316_IAR/RTOSDemo.eww
+10
View File
@@ -0,0 +1,10 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\RTOSDemo.ewp</path>
</project>
<batchBuild/>
</workspace>
Demo/CORTEX_LM3S316_IAR/commstest.c
+294
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File diff suppressed because it is too large Load Diff
Demo/CORTEX_LM3S316_IAR/commstest.h
+54
View File
@@ -0,0 +1,54 @@
/*
FreeRTOS.org V4.0.3 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
#ifndef COMMS_TEST_H
#define COMMS_TEST_H
/*
* Initialisation routine for the UART.
*/
void vSerialInit( void );
/*
* The task that receives the characters from UART 0.
*/
void vCommsRxTask( void * pvParameters );
/*
* The co-routine that periodically initiates the transmission of the string on
* the UART.
*/
void vSerialTxCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex );
unsigned portBASE_TYPE uxGetCommsStatus( void );
#endif
Demo/CORTEX_LM3S316_IAR/hw_include/DriverLib.h
+22
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@@ -0,0 +1,22 @@
#ifndef INCLUDE_DRIVER_LIB_H
#define INCLUDE_DRIVER_LIB_H
#include "hw_ints.h"
#include "hw_uart.h"
#include "hw_memmap.h"
#include "hw_types.h"
#include "hw_nvic.h"
#include "hw_ssi.h"
#include "hw_i2c.h"
#include "hw_adc.h"
#include "gpio.h"
#include "interrupt.h"
#include "sysctl.h"
#include "uart.h"
#include "ssi.h"
#include "pdc.h"
#include "i2c.h"
#include "adc.h"
#endif
Demo/CORTEX_LM3S316_IAR/hw_include/EULA.txt
+126
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@@ -0,0 +1,126 @@
IMPORTANT. Read the following LMI Software License Agreement ("Agreement")
completely.
LUMINARY MICRO SOFTWARE LICENSE AGREEMENT
This is a legal agreement between you (either as an individual or as an
authorized representative of your employer) and Luminary Micro, Inc. ("LMI").
It concerns your rights to use this file and any accompanying written materials
(the "Software"). In consideration for LMI allowing you to access the
Software, you are agreeing to be bound by the terms of this Agreement. If you
do not agree to all of the terms of this Agreement, do not download or use the
Software. If you change your mind later, stop using the Software and delete
all copies of the Software in your possession or control. Any copies of the
Software that you have already distributed, where permitted, and do not destroy
will continue to be governed by this Agreement. Your prior use will also
continue to be governed by this Agreement.
1. LICENSE GRANT. LMI grants to you, free of charge, the non-exclusive,
non-transferable right (1) to use the Software, (2) to reproduce the Software,
(3) to prepare derivative works of the Software, (4) to distribute the Software
and derivative works thereof in source (human-readable) form and object
(machine-readable) form, and (5) to sublicense to others the right to use the
distributed Software. If you violate any of the terms or restrictions of this
Agreement, LMI may immediately terminate this Agreement, and require that you
stop using and delete all copies of the Software in your possession or control.
2. COPYRIGHT. The Software is licensed to you, not sold. LMI owns the
Software, and United States copyright laws and international treaty provisions
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3. SUPPORT. LMI is NOT obligated to provide any support, upgrades or new
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and provide suggestions regarding the Software. LMI has no obligation
whatsoever to respond in any way to such a problem report or suggestion. LMI
may make changes to the Software at any time, without any obligation to notify
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4. INDEMNITY. You agree to fully defend and indemnify LMI from any and
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5. HIGH RISK ACTIVITIES. You acknowledge that the Software is not fault
tolerant and is not designed, manufactured or intended by LMI for incorporation
into products intended for use or resale in on-line control equipment in
hazardous, dangerous to life or potentially life-threatening environments
requiring fail-safe performance, such as in the operation of nuclear
facilities, aircraft navigation or communication systems, air traffic control,
direct life support machines or weapons systems, in which the failure of
products could lead directly to death, personal injury or severe physical or
environmental damage ("High Risk Activities"). You specifically represent and
warrant that you will not use the Software or any derivative work of the
Software for High Risk Activities.
6. PRODUCT LABELING. You are not authorized to use any LMI trademarks,
brand names, or logos.
7. COMPLIANCE WITH LAWS; EXPORT RESTRICTIONS. You must use the Software
in accordance with all applicable U.S. laws, regulations and statutes. You
agree that neither you nor your licensees (if any) intend to or will, directly
or indirectly, export or transmit the Software to any country in violation of
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8. GOVERNMENT USE. Use of the Software and any corresponding
documentation, if any, is provided with RESTRICTED RIGHTS. Use, duplication or
disclosure by the Government is subject to restrictions as set forth in
subparagraph (c)(1)(ii) of The Rights in Technical Data and Computer Software
clause at DFARS 252.227-7013 or subparagraphs (c)(l) and (2) of the Commercial
Computer Software--Restricted Rights at 48 CFR 52.227-19, as applicable.
Manufacturer is Luminary Micro, Inc., 2499 S. Capital of Texas Hwy Ste A-100,
Austin, Texas 78746.
9. DISCLAIMER OF WARRANTY. TO THE MAXIMUM EXTENT PERMITTED BY LAW, LMI
EXPRESSLY DISCLAIMS ANY WARRANTY FOR THE SOFTWARE. THE SOFTWARE IS PROVIDED
"AS IS", WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING,
WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
PARTICULAR PURPOSE, OR NON-INFRINGEMENT. YOU ASSUME THE ENTIRE RISK ARISING
OUT OF THE USE OR PERFORMANCE OF THE SOFTWARE, OR ANY SYSTEMS YOU DESIGN USING
THE SOFTWARE (IF ANY). NOTHING IN THIS AGREEMENT MAY BE CONSTRUED AS A
WARRANTY OR REPRESENTATION BY LMI THAT THE SOFTWARE OR ANY DERIVATIVE WORK
DEVELOPED WITH OR INCORPORATING THE SOFTWARE WILL BE FREE FROM INFRINGEMENT OF
THE INTELLECTUAL PROPERTY RIGHTS OF THIRD PARTIES.
10. LIMITATION OF LIABILITY. IN NO EVENT WILL LMI BE LIABLE, WHETHER IN
CONTRACT, TORT, OR OTHERWISE, FOR ANY INCIDENTAL, SPECIAL, INDIRECT,
CONSEQUENTIAL OR PUNITIVE DAMAGES, INCLUDING, BUT NOT LIMITED TO, DAMAGES FOR
ANY LOSS OF USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL LOSS, OR LOST PROFITS,
SAVINGS, OR REVENUES TO THE FULL EXTENT SUCH MAY BE DISCLAIMED BY LAW.
11. CHOICE OF LAW; VENUE; LIMITATIONS. You agree that the statutes and
laws of the United States and the State of Texas, USA, without regard to
conflicts of laws principles, will apply to all matters relating to this
Agreement or the Software, and you agree that any litigation will be subject to
the exclusive jurisdiction of the state or federal courts in Austin, Travis
County, Texas, USA. You agree that regardless of any statute or law to the
contrary, any claim or cause of action arising out of or related to this
Agreement or the Software must be filed within one (1) year after such claim or
cause of action arose or be forever barred.
12. ENTIRE AGREEMENT. This Agreement constitutes the entire agreement
between you and LMI regarding the subject matter of this Agreement, and
supersedes all prior communications, negotiations, understandings, agreements
or representations, either written or oral, if any. This Agreement may only be
amended in written form, executed by you and LMI.
13. SEVERABILITY. If any provision of this Agreement is held for any
reason to be invalid or unenforceable, then the remaining provisions of this
Agreement will be unimpaired and, unless a modification or replacement of the
invalid or unenforceable provision is further held to deprive you or LMI of a
material benefit, in which case the Agreement will immediately terminate, the
invalid or unenforceable provision will be replaced with a provision that is
valid and enforceable and that comes closest to the intention underlying the
invalid or unenforceable provision.
14. NO WAIVER. The waiver by LMI of any breach of any provision of this
Agreement will not operate or be construed as a waiver of any other or a
subsequent breach of the same or a different provision.
Demo/CORTEX_LM3S316_IAR/hw_include/RTOSDemo_lnk.xcl
+192
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@@ -0,0 +1,192 @@
// Generated : 06/01/06 20:29:52
//**********************************************************************
// XLINK template command file to be used with the ICCARM C/C++ Compiler
//
// Usage: xlink -f lnkarm <your_object_file(s)>
// -s <program start label> <C/C++ runtime library>
//
// $Revision: 1.3 $
//
//**********************************************************************
//*************************************************************************
// In this file it is assumed that the system has the following
// memory layout:
//
// Exception vectors [0x000000--0x00001F] RAM or ROM
// ROMSTART--ROMEND [0x008000--0x0FFFFF] ROM (or other non-volatile memory)
// RAMSTART--RAMEND [0x100000--0x7FFFFF] RAM (or other read/write memory)
//
// -------------
// Code segments - may be placed anywhere in memory.
// -------------
//
// INTVEC -- Exception vector table.
// SWITAB -- Software interrupt vector table.
// ICODE -- Startup (cstartup) and exception code.
// DIFUNCT -- Dynamic initialization vectors used by C++.
// CODE -- Compiler generated code.
// CODE_I -- Compiler generated code declared __ramfunc (executes in RAM)
// CODE_ID -- Initializer for CODE_I (ROM).
//
// -------------
// Data segments - may be placed anywhere in memory.
// -------------
//
// CSTACK -- The stack used by C/C++ programs (system and user mode).
// IRQ_STACK -- The stack used by IRQ service routines.
// SVC_STACK -- The stack used in supervisor mode
// (Define other exception stacks as needed for
// FIQ, ABT, UND).
// HEAP -- The heap used by malloc and free in C and new and
// delete in C++.
// INITTAB -- Table containing addresses and sizes of segments that
// need to be initialized at startup (by cstartup).
// CHECKSUM -- The linker places checksum byte(s) in this segment,
// when the -J linker command line option is used.
// DATA_y -- Data objects.
//
// Where _y can be one of:
//
// _AN -- Holds uninitialized located objects, i.e. objects with
// an absolute location given by the @ operator or the
// #pragma location directive. Since these segments
// contain objects which already have a fixed address,
// they should not be mentioned in this linker command
// file.
// _C -- Constants (ROM).
// _I -- Initialized data (RAM).
// _ID -- The original content of _I (copied to _I by cstartup) (ROM).
// _N -- Uninitialized data (RAM).
// _Z -- Zero initialized data (RAM).
//
// Note: Be sure to use end values for the defined address ranges.
// Otherwise, the linker may allocate space outside the
// intended memory range.
//*************************************************************************
//************************************************
// Inform the linker about the CPU family used.
//************************************************
-carm
//*************************************************************************
// Segment placement - General information
//
// All numbers in the segment placement command lines below are interpreted
// as hexadecimal unless they are immediately preceded by a '.', which
// denotes decimal notation.
//
// When specifying the segment placement using the -P instead of the -Z
// option, the linker is free to split each segment into its segment parts
// and randomly place these parts within the given ranges in order to
// achieve a more efficient memory usage. One disadvantage, however, is
// that it is not possible to find the start or end address (using
// the assembler operators .sfb./.sfe.) of a segment which has been split
// and reformed.
//
// When generating an output file which is to be used for programming
// external ROM/Flash devices, the -M linker option is very useful
// (see xlink.pdf for details).
//*************************************************************************
//*************************************************************************
// Read-only segments mapped to ROM.
//*************************************************************************
//************************************************
// Address range for reset and exception
// vectors (INTVEC).
// The vector area is 32 bytes,
// an additional 32 bytes is allocated for the
// constant table used by ldr PC in cstartup.s79.
//************************************************
-Z(CODE)INTVEC=0-3F
//************************************************
// Startup code and exception routines (ICODE).
//************************************************
-Z(CODE)ICODE,DIFUNCT=8000-FFFFF
-Z(CODE)SWITAB=8000-FFFFF
//************************************************
// Code segments may be placed anywhere.
//************************************************
-Z(CODE)CODE=8000-FFFFF
//************************************************
// Original ROM location for __ramfunc code copied
// to and executed from RAM.
//************************************************
-Z(CONST)CODE_ID=8000-FFFFF
//************************************************
// Various constants and initializers.
//************************************************
-Z(CONST)INITTAB,DATA_ID,DATA_C=8000-FFFFF
-Z(CONST)CHECKSUM=8000-FFFFF
//*************************************************************************
// Read/write segments mapped to RAM.
//*************************************************************************
//************************************************
// Data segments.
//************************************************
-Z(DATA)DATA_I,DATA_Z,DATA_N=100000-7FFFFF
//************************************************
// __ramfunc code copied to and executed from RAM.
//************************************************
-Z(DATA)CODE_I=100000-7FFFFF
//************************************************
// ICCARM produces code for __ramfunc functions in
// CODE_I segments. The -Q XLINK command line
// option redirects XLINK to emit the code in the
// CODE_ID segment instead, but to keep symbol and
// debug information associated with the CODE_I
// segment, where the code will execute.
//************************************************
-QCODE_I=CODE_ID
//*************************************************************************
// Stack and heap segments.
//*************************************************************************
-Z(DATA)CSTACK+200=100000-7FFFFF
-Z(DATA)IRQ_STACK+100=100000-7FFFFF
-Z(DATA)HEAP+8000=100000-7FFFFF
//**********************************************************************
// Output user defined segments
//**********************************************************************
//*************************************************************************
// ELF/DWARF support.
//
// Uncomment the line "-Felf" below to generate ELF/DWARF output.
// Available format specifiers are:
//
// "-yn": Suppress DWARF debug output
// "-yp": Multiple ELF program sections
// "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
//
// "-Felf" and the format specifiers can also be supplied directly as
// command line options, or selected from the Xlink Output tab in the
// IAR Embedded Workbench.
//*************************************************************************
// -Felf
Demo/CORTEX_LM3S316_IAR/hw_include/adc.h
+120
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@@ -0,0 +1,120 @@
//*****************************************************************************
//
// adc.h - ADC headers for using the ADC driver functions.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __ADC_H__
#define __ADC_H__
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Values that can be passed to ADCSequenceConfigure as the ulTrigger
// parameter.
//
//*****************************************************************************
#define ADC_TRIGGER_PROCESSOR 0x00000000 // Processor event
#define ADC_TRIGGER_COMP0 0x00000001 // Analog comparator 0 event
#define ADC_TRIGGER_COMP1 0x00000002 // Analog comparator 1 event
#define ADC_TRIGGER_COMP2 0x00000003 // Analog comparator 2 event
#define ADC_TRIGGER_EXTERNAL 0x00000004 // External event
#define ADC_TRIGGER_TIMER 0x00000005 // Timer event
#define ADC_TRIGGER_PWM0 0x00000006 // PWM0 event
#define ADC_TRIGGER_PWM1 0x00000007 // PWM1 event
#define ADC_TRIGGER_PWM2 0x00000008 // PWM2 event
#define ADC_TRIGGER_ALWAYS 0x0000000F // Always event
//*****************************************************************************
//
// Values that can be passed to ADCSequenceStepConfigure as the ulConfig
// parameter.
//
//*****************************************************************************
#define ADC_CTL_TS 0x00000080 // Temperature sensor select
#define ADC_CTL_IE 0x00000040 // Interrupt enable
#define ADC_CTL_END 0x00000020 // Sequence end select
#define ADC_CTL_D 0x00000010 // Differential select
#define ADC_CTL_CH0 0x00000000 // Input channel 0
#define ADC_CTL_CH1 0x00000001 // Input channel 1
#define ADC_CTL_CH2 0x00000002 // Input channel 2
#define ADC_CTL_CH3 0x00000003 // Input channel 3
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
extern void ADCIntRegister(unsigned long ulBase, unsigned long ulSequenceNum,
void (*pfnHandler)(void));
extern void ADCIntUnregister(unsigned long ulBase,
unsigned long ulSequenceNum);
extern void ADCIntDisable(unsigned long ulBase, unsigned long ulSequenceNum);
extern void ADCIntEnable(unsigned long ulBase, unsigned long ulSequenceNum);
extern unsigned long ADCIntStatus(unsigned long ulBase,
unsigned long ulSequenceNum,
tBoolean bMasked);
extern void ADCIntClear(unsigned long ulBase, unsigned long ulSequenceNum);
extern void ADCSequenceEnable(unsigned long ulBase,
unsigned long ulSequenceNum);
extern void ADCSequenceDisable(unsigned long ulBase,
unsigned long ulSequenceNum);
extern void ADCSequenceConfigure(unsigned long ulBase,
unsigned long ulSequenceNum,
unsigned long ulTrigger,
unsigned long ulPriority);
extern void ADCSequenceStepConfigure(unsigned long ulBase,
unsigned long ulSequenceNum,
unsigned long ulStep,
unsigned long ulConfig);
extern long ADCSequenceOverflow(unsigned long ulBase,
unsigned long ulSequenceNum);
extern long ADCSequenceUnderflow(unsigned long ulBase,
unsigned long ulSequenceNum);
extern long ADCSequenceDataGet(unsigned long ulBase,
unsigned long ulSequenceNum,
unsigned long *pulBuffer);
extern void ADCProcessorTrigger(unsigned long ulBase,
unsigned long ulSequenceNum);
extern void ADCSoftwareOversampleConfigure(unsigned long ulBase,
unsigned long ulSequenceNum,
unsigned long ulFactor);
extern void ADCSoftwareOversampleStepConfigure(unsigned long ulBase,
unsigned long ulSequenceNum,
unsigned long ulStep,
unsigned long ulConfig);
extern void ADCSoftwareOversampleDataGet(unsigned long ulBase,
unsigned long ulSequenceNum,
unsigned long *pulBuffer,
unsigned long ulCount);
#ifdef __cplusplus
}
#endif
#endif // __ADC_H__
Demo/CORTEX_LM3S316_IAR/hw_include/asmdefs.h
+130
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@@ -0,0 +1,130 @@
//*****************************************************************************
//
// asmdefs.h - Macros to allow assembly code be portable among toolchains.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __ASMDEFS_H__
#define __ASMDEFS_H__
//*****************************************************************************
//
// The defines required for EW-ARM.
//
//*****************************************************************************
#ifdef ewarm
//
// Section headers.
//
#define __TEXT__ rseg CODE:CODE(2)
#define __DATA__ rseg DATA:DATA(2)
#define __BSS__ rseg DATA:DATA(2)
//
// Assembler nmenonics.
//
#define __ALIGN__ alignrom 4
#define __END__ end
#define __EXPORT__ export
#define __IMPORT__ import
#define __LABEL__
#define __STR__ dcb
#define __THUMB_LABEL__
#define __WORD__ dcd
#endif // ewarm
//*****************************************************************************
//
// The defines required for GCC.
//
//*****************************************************************************
#ifdef gcc
//
// The assembly code preamble required to put the assembler into the correct
// configuration.
//
.syntax unified
.thumb
//
// Section headers.
//
#define __TEXT__ .text
#define __DATA__ .data
#define __BSS__ .bss
//
// Assembler nmenonics.
//
#define __ALIGN__ .balign 4
#define __END__ .end
#define __EXPORT__ .globl
#define __IMPORT__ .extern
#define __LABEL__ :
#define __STR__ .ascii
#define __THUMB_LABEL__ .thumb_func
#define __WORD__ .word
#endif // gcc
//*****************************************************************************
//
// The defines required for RV-MDK.
//
//*****************************************************************************
#ifdef rvmdk
//
// The assembly code preamble required to put the assembler into the correct
// configuration.
//
thumb
require8
preserve8
//
// Section headers.
//
#define __TEXT__ area ||.text||, code, readonly, align=2
#define __DATA__ area ||.data||, data, align=2
#define __BSS__ area ||.bss||, noinit, align=2
//
// Assembler nmenonics.
//
#define __ALIGN__ align 4
#define __END__ end
#define __EXPORT__ export
#define __IMPORT__ import
#define __LABEL__
#define __STR__ dcb
#define __THUMB_LABEL__
#define __WORD__ dcd
#endif // rvmdk
#endif // __ASMDEF_H__
Demo/CORTEX_LM3S316_IAR/hw_include/comp.h
+120
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@@ -0,0 +1,120 @@
//*****************************************************************************
//
// comp.h - Prototypes for the analog comparator driver.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __COMP_H__
#define __COMP_H__
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Values that can be passed to ComparatorConfigure() as the ulConfig
// parameter. For each group (i.e. COMP_TRIG_xxx, COMP_INT_xxx, etc.), one of
// the values may be selected and ORed together will values from the other
// groups.
//
//*****************************************************************************
#define COMP_TRIG_NONE 0x00000000 // No ADC trigger
#define COMP_TRIG_HIGH 0x00000880 // Trigger when high
#define COMP_TRIG_LOW 0x00000800 // Trigger when low
#define COMP_TRIG_FALL 0x00000820 // Trigger on falling edge
#define COMP_TRIG_RISE 0x00000840 // Trigger on rising edge
#define COMP_TRIG_BOTH 0x00000860 // Trigger on both edges
#define COMP_INT_HIGH 0x00000010 // Interrupt when high
#define COMP_INT_LOW 0x00000000 // Interrupt when low
#define COMP_INT_FALL 0x00000004 // Interrupt on falling edge
#define COMP_INT_RISE 0x00000008 // Interrupt on rising edge
#define COMP_INT_BOTH 0x0000000C // Interrupt on both edges
#define COMP_ASRCP_PIN 0x00000000 // Dedicated Comp+ pin
#define COMP_ASRCP_PIN0 0x00000200 // Comp0+ pin
#define COMP_ASRCP_REF 0x00000400 // Internal voltage reference
#define COMP_OUTPUT_NONE 0x00000000 // No comparator output
#define COMP_OUTPUT_NORMAL 0x00000100 // Comparator output normal
#define COMP_OUTPUT_INVERT 0x00000102 // Comparator output inverted
//*****************************************************************************
//
// Values that can be passed to ComparatorSetRef() as the ulRef parameter.
//
//*****************************************************************************
#define COMP_REF_OFF 0x00000000 // Turn off the internal reference
#define COMP_REF_0V 0x00000300 // Internal reference of 0V
#define COMP_REF_0_1375V 0x00000301 // Internal reference of 0.1375V
#define COMP_REF_0_275V 0x00000302 // Internal reference of 0.275V
#define COMP_REF_0_4125V 0x00000303 // Internal reference of 0.4125V
#define COMP_REF_0_55V 0x00000304 // Internal reference of 0.55V
#define COMP_REF_0_6875V 0x00000305 // Internal reference of 0.6875V
#define COMP_REF_0_825V 0x00000306 // Internal reference of 0.825V
#define COMP_REF_0_928125V 0x00000201 // Internal reference of 0.928125V
#define COMP_REF_0_9625V 0x00000307 // Internal reference of 0.9625V
#define COMP_REF_1_03125V 0x00000202 // Internal reference of 1.03125V
#define COMP_REF_1_134375V 0x00000203 // Internal reference of 1.134375V
#define COMP_REF_1_1V 0x00000308 // Internal reference of 1.1V
#define COMP_REF_1_2375V 0x00000309 // Internal reference of 1.2375V
#define COMP_REF_1_340625V 0x00000205 // Internal reference of 1.340625V
#define COMP_REF_1_375V 0x0000030A // Internal reference of 1.375V
#define COMP_REF_1_44375V 0x00000206 // Internal reference of 1.44375V
#define COMP_REF_1_5125V 0x0000030B // Internal reference of 1.5125V
#define COMP_REF_1_546875V 0x00000207 // Internal reference of 1.546875V
#define COMP_REF_1_65V 0x0000030C // Internal reference of 1.65V
#define COMP_REF_1_753125V 0x00000209 // Internal reference of 1.753125V
#define COMP_REF_1_7875V 0x0000030D // Internal reference of 1.7875V
#define COMP_REF_1_85625V 0x0000020A // Internal reference of 1.85625V
#define COMP_REF_1_925V 0x0000030E // Internal reference of 1.925V
#define COMP_REF_1_959375V 0x0000020B // Internal reference of 1.959375V
#define COMP_REF_2_0625V 0x0000030F // Internal reference of 2.0625V
#define COMP_REF_2_165625V 0x0000020D // Internal reference of 2.165625V
#define COMP_REF_2_26875V 0x0000020E // Internal reference of 2.26875V
#define COMP_REF_2_371875V 0x0000020F // Internal reference of 2.371875V
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
extern void ComparatorConfigure(unsigned long ulBase, unsigned long ulComp,
unsigned long ulConfig);
extern void ComparatorRefSet(unsigned long ulBase, unsigned long ulRef);
extern tBoolean ComparatorValueGet(unsigned long ulBase, unsigned long ulComp);
extern void ComparatorIntRegister(unsigned long ulBase, unsigned long ulComp,
void (*pfnHandler)(void));
extern void ComparatorIntUnregister(unsigned long ulBase,
unsigned long ulComp);
extern void ComparatorIntEnable(unsigned long ulBase, unsigned long ulComp);
extern void ComparatorIntDisable(unsigned long ulBase, unsigned long ulComp);
extern tBoolean ComparatorIntStatus(unsigned long ulBase, unsigned long ulComp,
tBoolean bMasked);
extern void ComparatorIntClear(unsigned long ulBase, unsigned long ulComp);
#ifdef __cplusplus
}
#endif
#endif // __COMP_H__
Demo/CORTEX_LM3S316_IAR/hw_include/cpu.h
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//*****************************************************************************
//
// cpu.h - Prototypes for the CPU instruction wrapper functions.
//
// Copyright (c) 2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __CPU_H__
#define __CPU_H__
//*****************************************************************************
//
// Prototypes.
//
//*****************************************************************************
extern void CPUcpsid(void);
extern void CPUcpsie(void);
extern void CPUwfi(void);
#endif // __CPU_H__
Demo/CORTEX_LM3S316_IAR/hw_include/cspy.c
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//*****************************************************************************
//
// cspy.c - Routines for simply ignoring the debugger communciation APIs in
// C-Spy for now.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#include "diag.h"
//*****************************************************************************
//
// Open a handle for stdio functions (both stdin and stdout).
//
//*****************************************************************************
int
DiagOpenStdio(void)
{
return(-1);
}
//*****************************************************************************
//
// Open a host file system file.
//
//*****************************************************************************
int
DiagOpen(const char *pcName, int iMode)
{
return(-1);
}
//*****************************************************************************
//
// Close a host file system file.
//
//*****************************************************************************
int
DiagClose(int iHandle)
{
return(-1);
}
//*****************************************************************************
//
// Write data to a host file system file.
//
//*****************************************************************************
int
DiagWrite(int iHandle, const char *pcBuf, unsigned long ulLen, int iMode)
{
return(-1);
}
//*****************************************************************************
//
// Read data from a host file system file.
//
//*****************************************************************************
int
DiagRead(int iHandle, char *pcBuf, unsigned long ulLen, int iMode)
{
return(-1);
}
//*****************************************************************************
//
// Get the length of a host file system file.
//
//*****************************************************************************
long
DiagFlen(int iHandle)
{
return(-1);
}
//*****************************************************************************
//
// Terminate the application.
//
//*****************************************************************************
void
DiagExit(int iRet)
{
while(1)
{
}
}
//*****************************************************************************
//
// Get the command line arguments from the debugger.
//
//*****************************************************************************
char *
DiagCommandString(char *pcBuf, unsigned long ulLen)
{
return(0);
}
Demo/CORTEX_LM3S316_IAR/hw_include/debug.h
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//*****************************************************************************
//
// debug.h - Macros for assisting debug of the driver library.
//
// Copyright (c) 2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __DEBUG_H__
#define __DEBUG_H__
//*****************************************************************************
//
// Prototype for the function that is called when an invalid argument is passed
// to an API. This is only used when doing a DEBUG build.
//
//*****************************************************************************
extern void __error__(char *pcFilename, unsigned long ulLine);
//*****************************************************************************
//
// The ASSERT macro, which does the actual assertion checking. Typically, this
// will be for procedure arguments.
//
//*****************************************************************************
#ifdef DEBUG
#define ASSERT(expr) { \
if(!(expr)) \
{ \
__error__(__FILE__, __LINE__); \
} \
}
#else
#define ASSERT(expr)
#endif
#endif // __DEBUG_H__
Demo/CORTEX_LM3S316_IAR/hw_include/diag.h
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//*****************************************************************************
//
// diag.h - Prototypes for the diagnostic functions.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __DIAG_H__
#define __DIAG_H__
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Values that can be passed as the iMode parater to DiagOpen, DiagRead, and
// DiagWrite.
//
//*****************************************************************************
#define OPEN_R 0 // read access
#define OPEN_W 4 // write access
#define OPEN_A 8 // append to file
#define OPEN_B 1 // binary access
#define OPEN_PLUS 2 // read and write access
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
extern int DiagOpenStdio(void);
extern int DiagOpen(const char *pcName, int iMode);
extern int DiagClose(int iHandle);
extern int DiagWrite(int iHandle, const char *pcBuf, unsigned long ulLen,
int iMode);
extern int DiagRead(int iHandle, char *pcBuf, unsigned long ulLen, int iMode);
extern long DiagFlen(int iHandle);
extern void DiagExit(int iRet);
extern char *DiagCommandString(char *pcBuf, unsigned long ulLen);
#ifdef __cplusplus
}
#endif
#endif // __DIAG_H__
Demo/CORTEX_LM3S316_IAR/hw_include/driverlib.r79
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Demo/CORTEX_LM3S316_IAR/hw_include/flash.h
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//*****************************************************************************
//
// flash.h - Prototypes for the flash driver.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __FLASH_H__
#define __FLASH_H__
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Values that can be passed to FlashProtectSet(), and returned by
// FlashProtectGet().
//
//*****************************************************************************
typedef enum
{
FlashReadWrite, // Flash can be read and written
FlashReadOnly, // Flash can only be read
FlashExecuteOnly // Flash can only be executed
}
tFlashProtection;
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
extern unsigned long FlashUsecGet(void);
extern void FlashUsecSet(unsigned long ulClocks);
extern long FlashErase(unsigned long ulAddress);
extern long FlashProgram(unsigned long *pulData, unsigned long ulAddress,
unsigned long ulCount);
extern tFlashProtection FlashProtectGet(unsigned long ulAddress);
extern long FlashProtectSet(unsigned long ulAddress,
tFlashProtection eProtect);
extern long FlashProtectSave(void);
extern void FlashIntRegister(void (*pfnHandler)(void));
extern void FlashIntUnregister(void);
extern void FlashIntEnable(unsigned long ulIntFlags);
extern void FlashIntDisable(unsigned long ulIntFlags);
extern unsigned long FlashIntGetStatus(tBoolean bMasked);
extern void FlashIntClear(unsigned long ulIntFlags);
#ifdef __cplusplus
}
#endif
#endif // __FLASH_H__
Demo/CORTEX_LM3S316_IAR/hw_include/gpio.h
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//*****************************************************************************
//
// gpio.h - Defines and Macros for GPIO API.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __GPIO_H__
#define __GPIO_H__
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following values define the bit field for the ucPins argument to several
// of the APIs.
//
//*****************************************************************************
#define GPIO_PIN_0 0x00000001 // GPIO pin 0
#define GPIO_PIN_1 0x00000002 // GPIO pin 1
#define GPIO_PIN_2 0x00000004 // GPIO pin 2
#define GPIO_PIN_3 0x00000008 // GPIO pin 3
#define GPIO_PIN_4 0x00000010 // GPIO pin 4
#define GPIO_PIN_5 0x00000020 // GPIO pin 5
#define GPIO_PIN_6 0x00000040 // GPIO pin 6
#define GPIO_PIN_7 0x00000080 // GPIO pin 7
//*****************************************************************************
//
// Values that can be passed to GPIODirModeSet as the ulPinIO parameter, and
// returned from GPIODirModeGet.
//
//*****************************************************************************
#define GPIO_DIR_MODE_IN 0x00000000 // Pin is a GPIO input
#define GPIO_DIR_MODE_OUT 0x00000001 // Pin is a GPIO output
#define GPIO_DIR_MODE_HW 0x00000002 // Pin is a peripheral function
//*****************************************************************************
//
// Values that can be passed to GPIOIntTypeSet as the ulIntType parameter, and
// returned from GPIOIntTypeGet.
//
//*****************************************************************************
#define GPIO_FALLING_EDGE 0x00000000 // Interrupt on falling edge
#define GPIO_RISING_EDGE 0x00000004 // Interrupt on rising edge
#define GPIO_BOTH_EDGES 0x00000001 // Interrupt on both edges
#define GPIO_LOW_LEVEL 0x00000002 // Interrupt on low level
#define GPIO_HIGH_LEVEL 0x00000007 // Interrupt on high level
//*****************************************************************************
//
// Values that can be passed to GPIOPadConfigSet as the ulStrength parameter,
// and returned by GPIOPadConfigGet in the *pulStrength parameter.
//
//*****************************************************************************
#define GPIO_STRENGTH_2MA 0x00000001 // 2mA drive strength
#define GPIO_STRENGTH_4MA 0x00000002 // 4mA drive strength
#define GPIO_STRENGTH_8MA 0x00000004 // 8mA drive strength
#define GPIO_STRENGTH_8MA_SC 0x0000000C // 8mA drive with slew rate control
//*****************************************************************************
//
// Values that can be passed to GPIOPadConfigSet as the ulPadType parameter,
// and returned by GPIOPadConfigGet in the *pulPadType parameter.
//
//*****************************************************************************
#define GPIO_PIN_TYPE_STD 0x00000008 // Push-pull
#define GPIO_PIN_TYPE_STD_WPU 0x0000000A // Push-pull with weak pull-up
#define GPIO_PIN_TYPE_STD_WPD 0x0000000C // Push-pull with weak pull-down
#define GPIO_PIN_TYPE_OD 0x00000009 // Open-drain
#define GPIO_PIN_TYPE_OD_WPU 0x0000000B // Open-drain with weak pull-up
#define GPIO_PIN_TYPE_OD_WPD 0x0000000D // Open-drain with weak pull-down
#define GPIO_PIN_TYPE_ANALOG 0x00000000 // Analog comparator
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
extern void GPIODirModeSet(unsigned long ulPort, unsigned char ucPins,
unsigned long ulPinIO);
extern unsigned long GPIODirModeGet(unsigned long ulPort, unsigned char ucPin);
extern void GPIOIntTypeSet(unsigned long ulPort, unsigned char ucPins,
unsigned long ulIntType);
extern unsigned long GPIOIntTypeGet(unsigned long ulPort, unsigned char ucPin);
extern void GPIOPadConfigSet(unsigned long ulPort, unsigned char ucPins,
unsigned long ulStrength,
unsigned long ulPadType);
extern void GPIOPadConfigGet(unsigned long ulPort, unsigned char ucPin,
unsigned long *pulStrength,
unsigned long *pulPadType);
extern void GPIOPinIntEnable(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinIntDisable(unsigned long ulPort, unsigned char ucPins);
extern long GPIOPinIntStatus(unsigned long ulPort, tBoolean bMasked);
extern void GPIOPinIntClear(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPortIntRegister(unsigned long ulPort,
void (*pfIntHandler)(void));
extern void GPIOPortIntUnregister(unsigned long ulPort);
extern long GPIOPinRead(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinWrite(unsigned long ulPort, unsigned char ucPins,
unsigned char ucVal);
extern void GPIOPinTypeComparator(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeI2C(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypePWM(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeSSI(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeTimer(unsigned long ulPort, unsigned char ucPins);
extern void GPIOPinTypeUART(unsigned long ulPort, unsigned char ucPins);
#ifdef __cplusplus
}
#endif
#endif // __GPIO_H__
Demo/CORTEX_LM3S316_IAR/hw_include/hw_adc.h
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Demo/CORTEX_LM3S316_IAR/hw_include/hw_comp.h
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//*****************************************************************************
//
// hw_comp.h - Macros used when accessing the comparator hardware.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __HW_COMP_H__
#define __HW_COMP_H__
//*****************************************************************************
//
// The following define the offsets of the comparator registers.
//
//*****************************************************************************
#define COMP_O_MIS 0x00000000 // Interrupt status register
#define COMP_O_RIS 0x00000004 // Raw interrupt status register
#define COMP_O_INTEN 0x00000008 // Interrupt enable register
#define COMP_O_REFCTL 0x00000010 // Reference voltage control reg.
#define COMP_O_ACSTAT0 0x00000020 // Comp0 status register
#define COMP_O_ACCTL0 0x00000024 // Comp0 control register
#define COMP_O_ACSTAT1 0x00000040 // Comp1 status register
#define COMP_O_ACCTL1 0x00000044 // Comp1 control register
#define COMP_O_ACSTAT2 0x00000060 // Comp2 status register
#define COMP_O_ACCTL2 0x00000064 // Comp2 control register
//*****************************************************************************
//
// The following define the bit fields in the COMP_MIS, COMP_RIS, and
// COMP_INTEN registers.
//
//*****************************************************************************
#define COMP_INT_2 0x00000004 // Comp2 interrupt
#define COMP_INT_1 0x00000002 // Comp1 interrupt
#define COMP_INT_0 0x00000001 // Comp0 interrupt
//*****************************************************************************
//
// The following define the bit fields in the COMP_REFCTL register.
//
//*****************************************************************************
#define COMP_REFCTL_EN 0x00000200 // Reference voltage enable
#define COMP_REFCTL_RNG 0x00000100 // Reference voltage range
#define COMP_REFCTL_VREF_MASK 0x0000000F // Reference voltage select mask
#define COMP_REFCTL_VREF_SHIFT 0
//*****************************************************************************
//
// The following define the bit fields in the COMP_ACSTAT0, COMP_ACSTAT1, and
// COMP_ACSTAT2 registers.
//
//*****************************************************************************
#define COMP_ACSTAT_OVAL 0x00000002 // Comparator output value
//*****************************************************************************
//
// The following define the bit fields in the COMP_ACCTL0, COMP_ACCTL1, and
// COMP_ACCTL2 registers.
//
//*****************************************************************************
#define COMP_ACCTL_TMASK 0x00000800 // Trigger enable
#define COMP_ACCTL_ASRCP_MASK 0x00000600 // Vin+ source select mask
#define COMP_ACCTL_ASRCP_PIN 0x00000000 // Dedicated Comp+ pin
#define COMP_ACCTL_ASRCP_PIN0 0x00000200 // Comp0+ pin
#define COMP_ACCTL_ASRCP_REF 0x00000400 // Internal voltage reference
#define COMP_ACCTL_ASRCP_RES 0x00000600 // Reserved
#define COMP_ACCTL_OEN 0x00000100 // Comparator output enable
#define COMP_ACCTL_TSVAL 0x00000080 // Trigger polarity select
#define COMP_ACCTL_TSEN_MASK 0x00000060 // Trigger sense mask
#define COMP_ACCTL_TSEN_LEVEL 0x00000000 // Trigger is level sense
#define COMP_ACCTL_TSEN_FALL 0x00000020 // Trigger is falling edge
#define COMP_ACCTL_TSEN_RISE 0x00000040 // Trigger is rising edge
#define COMP_ACCTL_TSEN_BOTH 0x00000060 // Trigger is both edges
#define COMP_ACCTL_ISLVAL 0x00000010 // Interrupt polarity select
#define COMP_ACCTL_ISEN_MASK 0x0000000C // Interrupt sense mask
#define COMP_ACCTL_ISEN_LEVEL 0x00000000 // Interrupt is level sense
#define COMP_ACCTL_ISEN_FALL 0x00000004 // Interrupt is falling edge
#define COMP_ACCTL_ISEN_RISE 0x00000008 // Interrupt is rising edge
#define COMP_ACCTL_ISEN_BOTH 0x0000000C // Interrupt is both edges
#define COMP_ACCTL_CINV 0x00000002 // Comparator output invert
//*****************************************************************************
//
// The following define the reset values for the comparator registers.
//
//*****************************************************************************
#define COMP_RV_MIS 0x00000000 // Interrupt status register
#define COMP_RV_RIS 0x00000000 // Raw interrupt status register
#define COMP_RV_INTEN 0x00000000 // Interrupt enable register
#define COMP_RV_REFCTL 0x00000000 // Reference voltage control reg.
#define COMP_RV_ACSTAT0 0x00000000 // Comp0 status register
#define COMP_RV_ACCTL0 0x00000000 // Comp0 control register
#define COMP_RV_ACSTAT1 0x00000000 // Comp1 status register
#define COMP_RV_ACCTL1 0x00000000 // Comp1 control register
#define COMP_RV_ACSTAT2 0x00000000 // Comp2 status register
#define COMP_RV_ACCTL2 0x00000000 // Comp2 control register
#endif // __HW_COMP_H__
Demo/CORTEX_LM3S316_IAR/hw_include/hw_flash.h
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//*****************************************************************************
//
// hw_flash.h - Macros used when accessing the flash controller.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __HW_FLASH_H__
#define __HW_FLASH_H__
//*****************************************************************************
//
// The following define the offsets of the FLASH registers.
//
//*****************************************************************************
#define FLASH_FMA 0x400FD000 // Memory address register
#define FLASH_FMD 0x400FD004 // Memory data register
#define FLASH_FMC 0x400FD008 // Memory control register
#define FLASH_FCRIS 0x400FD00c // Raw interrupt status register
#define FLASH_FCIM 0x400FD010 // Interrupt mask register
#define FLASH_FCMISC 0x400FD014 // Interrupt status register
#define FLASH_FMPRE 0x400FE130 // FLASH read protect register
#define FLASH_FMPPE 0x400FE134 // FLASH program protect register
#define FLASH_USECRL 0x400FE140 // uSec reload register
//*****************************************************************************
//
// The following define the bit fields in the FLASH_FMC register.
//
//*****************************************************************************
#define FLASH_FMC_WRKEY_MASK 0xFFFF0000 // FLASH write key mask
#define FLASH_FMC_WRKEY 0xA4420000 // FLASH write key
#define FLASH_FMC_COMT 0x00000008 // Commit user register
#define FLASH_FMC_MERASE 0x00000004 // Mass erase FLASH
#define FLASH_FMC_ERASE 0x00000002 // Erase FLASH page
#define FLASH_FMC_WRITE 0x00000001 // Write FLASH word
//*****************************************************************************
//
// The following define the bit fields in the FLASH_FCRIS register.
//
//*****************************************************************************
#define FLASH_FCRIS_PROGRAM 0x00000002 // Programming status
#define FLASH_FCRIS_ACCESS 0x00000001 // Invalid access status
//*****************************************************************************
//
// The following define the bit fields in the FLASH_FCIM register.
//
//*****************************************************************************
#define FLASH_FCIM_PROGRAM 0x00000002 // Programming mask
#define FLASH_FCIM_ACCESS 0x00000001 // Invalid access mask
//*****************************************************************************
//
// The following define the bit fields in the FLASH_FMIS register.
//
//*****************************************************************************
#define FLASH_FCMISC_PROGRAM 0x00000002 // Programming status
#define FLASH_FCMISC_ACCESS 0x00000001 // Invalid access status
//*****************************************************************************
//
// The following define the bit fields in the FLASH_FMPRE and FLASH_FMPPE
// registers.
//
//*****************************************************************************
#define FLASH_FMP_BLOCK_31 0x80000000 // Enable for block 31
#define FLASH_FMP_BLOCK_30 0x40000000 // Enable for block 30
#define FLASH_FMP_BLOCK_29 0x20000000 // Enable for block 29
#define FLASH_FMP_BLOCK_28 0x10000000 // Enable for block 28
#define FLASH_FMP_BLOCK_27 0x08000000 // Enable for block 27
#define FLASH_FMP_BLOCK_26 0x04000000 // Enable for block 26
#define FLASH_FMP_BLOCK_25 0x02000000 // Enable for block 25
#define FLASH_FMP_BLOCK_24 0x01000000 // Enable for block 24
#define FLASH_FMP_BLOCK_23 0x00800000 // Enable for block 23
#define FLASH_FMP_BLOCK_22 0x00400000 // Enable for block 22
#define FLASH_FMP_BLOCK_21 0x00200000 // Enable for block 21
#define FLASH_FMP_BLOCK_20 0x00100000 // Enable for block 20
#define FLASH_FMP_BLOCK_19 0x00080000 // Enable for block 19
#define FLASH_FMP_BLOCK_18 0x00040000 // Enable for block 18
#define FLASH_FMP_BLOCK_17 0x00020000 // Enable for block 17
#define FLASH_FMP_BLOCK_16 0x00010000 // Enable for block 16
#define FLASH_FMP_BLOCK_15 0x00008000 // Enable for block 15
#define FLASH_FMP_BLOCK_14 0x00004000 // Enable for block 14
#define FLASH_FMP_BLOCK_13 0x00002000 // Enable for block 13
#define FLASH_FMP_BLOCK_12 0x00001000 // Enable for block 12
#define FLASH_FMP_BLOCK_11 0x00000800 // Enable for block 11
#define FLASH_FMP_BLOCK_10 0x00000400 // Enable for block 10
#define FLASH_FMP_BLOCK_9 0x00000200 // Enable for block 9
#define FLASH_FMP_BLOCK_8 0x00000100 // Enable for block 8
#define FLASH_FMP_BLOCK_7 0x00000080 // Enable for block 7
#define FLASH_FMP_BLOCK_6 0x00000040 // Enable for block 6
#define FLASH_FMP_BLOCK_5 0x00000020 // Enable for block 5
#define FLASH_FMP_BLOCK_4 0x00000010 // Enable for block 4
#define FLASH_FMP_BLOCK_3 0x00000008 // Enable for block 3
#define FLASH_FMP_BLOCK_2 0x00000004 // Enable for block 2
#define FLASH_FMP_BLOCK_1 0x00000002 // Enable for block 1
#define FLASH_FMP_BLOCK_0 0x00000001 // Enable for block 0
//*****************************************************************************
//
// The following define the bit fields in the FLASH_USECRL register.
//
//*****************************************************************************
#define FLASH_USECRL_MASK 0x000000FF // Clock per uSec
#define FLASH_USECRL_SHIFT 0
//*****************************************************************************
//
// The erase size is the size of the FLASH block that is erased by an erase
// operation, and the protect size is the size of the FLASH block that is
// protected by each protection register.
//
//*****************************************************************************
#define FLASH_ERASE_SIZE 0x00000400
#define FLASH_PROTECT_SIZE 0x00000800
#endif // __HW_FLASH_H__
Demo/CORTEX_LM3S316_IAR/hw_include/hw_gpio.h
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//*****************************************************************************
//
// hw_gpio.h - Defines and Macros for GPIO hardware.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __HW_GPIO_H__
#define __HW_GPIO_H__
//*****************************************************************************
//
// GPIO Register Offsets.
//
//*****************************************************************************
#define GPIO_O_DATA 0x00000000 // Data register.
#define GPIO_O_DIR 0x00000400 // Data direction register.
#define GPIO_O_IS 0x00000404 // Interrupt sense register.
#define GPIO_O_IBE 0x00000408 // Interrupt both edges register.
#define GPIO_O_IEV 0x0000040C // Intterupt event register.
#define GPIO_O_IM 0x00000410 // Interrupt mask register.
#define GPIO_O_RIS 0x00000414 // Raw interrupt status register.
#define GPIO_O_MIS 0x00000418 // Masked interrupt status reg.
#define GPIO_O_ICR 0x0000041C // Interrupt clear register.
#define GPIO_O_AFSEL 0x00000420 // Mode control select register.
#define GPIO_O_DR2R 0x00000500 // 2ma drive select register.
#define GPIO_O_DR4R 0x00000504 // 4ma drive select register.
#define GPIO_O_DR8R 0x00000508 // 8ma drive select register.
#define GPIO_O_ODR 0x0000050C // Open drain select register.
#define GPIO_O_PUR 0x00000510 // Pull up select register.
#define GPIO_O_PDR 0x00000514 // Pull down select register.
#define GPIO_O_SLR 0x00000518 // Slew rate control enable reg.
#define GPIO_O_DEN 0x0000051C // Digital input enable register.
#define GPIO_O_PeriphID4 0x00000FD0 //
#define GPIO_O_PeriphID5 0x00000FD4 //
#define GPIO_O_PeriphID6 0x00000FD8 //
#define GPIO_O_PeriphID7 0x00000FDC //
#define GPIO_O_PeriphID0 0x00000FE0 //
#define GPIO_O_PeriphID1 0x00000FE4 //
#define GPIO_O_PeriphID2 0x00000FE8 //
#define GPIO_O_PeriphID3 0x00000FEC //
#define GPIO_O_PCellID0 0x00000FF0 //
#define GPIO_O_PCellID1 0x00000FF4 //
#define GPIO_O_PCellID2 0x00000FF8 //
#define GPIO_O_PCellID3 0x00000FFC //
//*****************************************************************************
//
// GPIO Register reset values.
//
//*****************************************************************************
#define GPIO_RV_DATA 0x00000000 // Data register reset value.
#define GPIO_RV_DIR 0x00000000 // Data direction reg RV.
#define GPIO_RV_IS 0x00000000 // Interrupt sense reg RV.
#define GPIO_RV_IBE 0x00000000 // Interrupt both edges reg RV.
#define GPIO_RV_IEV 0x00000000 // Intterupt event reg RV.
#define GPIO_RV_IM 0x00000000 // Interrupt mask reg RV.
#define GPIO_RV_RIS 0x00000000 // Raw interrupt status reg RV.
#define GPIO_RV_MIS 0x00000000 // Masked interrupt status reg RV.
#define GPIO_RV_IC 0x00000000 // Interrupt clear reg RV.
#define GPIO_RV_AFSEL 0x00000000 // Mode control select reg RV.
#define GPIO_RV_DR2R 0x000000FF // 2ma drive select reg RV.
#define GPIO_RV_DR4R 0x00000000 // 4ma drive select reg RV.
#define GPIO_RV_DR8R 0x00000000 // 8ma drive select reg RV.
#define GPIO_RV_ODR 0x00000000 // Open drain select reg RV.
#define GPIO_RV_PUR 0x000000FF // Pull up select reg RV.
#define GPIO_RV_PDR 0x00000000 // Pull down select reg RV.
#define GPIO_RV_SLR 0x00000000 // Slew rate control enable reg RV.
#define GPIO_RV_DEN 0x000000FF // Digital input enable reg RV.
#define GPIO_RV_PeriphID4 0x00000000 //
#define GPIO_RV_PeriphID5 0x00000000 //
#define GPIO_RV_PeriphID6 0x00000000 //
#define GPIO_RV_PeriphID7 0x00000000 //
#define GPIO_RV_PeriphID0 0x00000061 //
#define GPIO_RV_PeriphID1 0x00000010 //
#define GPIO_RV_PeriphID2 0x00000004 //
#define GPIO_RV_PeriphID3 0x00000000 //
#define GPIO_RV_PCellID0 0x0000000D //
#define GPIO_RV_PCellID1 0x000000F0 //
#define GPIO_RV_PCellID2 0x00000005 //
#define GPIO_RV_PCellID3 0x000000B1 //
#endif // __HW_GPIO_H__
Demo/CORTEX_LM3S316_IAR/hw_include/hw_i2c.h
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//*****************************************************************************
//
// hw_i2c.h - Macros used when accessing the I2C master and slave hardware.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __HW_I2C_H__
#define __HW_I2C_H__
//*****************************************************************************
//
// The following define the offsets of the I2C master registers.
//
//*****************************************************************************
#define I2C_MASTER_O_SA 0x00000000 // Slave address register
#define I2C_MASTER_O_CS 0x00000004 // Control and Status register
#define I2C_MASTER_O_DR 0x00000008 // Data register
#define I2C_MASTER_O_TPR 0x0000000C // Timer period register
#define I2C_MASTER_O_IMR 0x00000010 // Interrupt mask register
#define I2C_MASTER_O_RIS 0x00000014 // Raw interrupt status register
#define I2C_MASTER_O_MIS 0x00000018 // Masked interrupt status reg
#define I2C_MASTER_O_MICR 0x0000001c // Interrupt clear register
#define I2C_MASTER_O_CR 0x00000020 // Configuration register
//*****************************************************************************
//
// The following define the offsets of the I2C slave registers.
//
//*****************************************************************************
#define I2C_SLAVE_O_OAR 0x00000000 // Own address register
#define I2C_SLAVE_O_CSR 0x00000004 // Control/Status register
#define I2C_SLAVE_O_DR 0x00000008 // Data register
#define I2C_SLAVE_O_IM 0x0000000C // Interrupt mask register
#define I2C_SLAVE_O_RIS 0x00000010 // Raw interrupt status register
#define I2C_SLAVE_O_MIS 0x00000014 // Masked interrupt status reg
#define I2C_SLAVE_O_SICR 0x00000018 // Interrupt clear register
//*****************************************************************************
//
// The followng define the bit fields in the I2C master slave address register.
//
//*****************************************************************************
#define I2C_MASTER_SA_SA_MASK 0x000000FE // Slave address
#define I2C_MASTER_SA_RS 0x00000001 // Receive/send
#define I2C_MASTER_SA_SA_SHIFT 1
//*****************************************************************************
//
// The following define the bit fields in the I2C Master Control and Status
// register.
//
//*****************************************************************************
#define I2C_MASTER_CS_ACK 0x00000008 // Acknowlegde
#define I2C_MASTER_CS_STOP 0x00000004 // Stop
#define I2C_MASTER_CS_START 0x00000002 // Start
#define I2C_MASTER_CS_RUN 0x00000001 // Run
#define I2C_MASTER_CS_BUS_BUSY 0x00000040 // Bus busy
#define I2C_MASTER_CS_IDLE 0x00000020 // Idle
#define I2C_MASTER_CS_ARB_LOST 0x00000010 // Lost arbitration
#define I2C_MASTER_CS_DATA_ACK 0x00000008 // Data byte not acknowledged
#define I2C_MASTER_CS_ADDR_ACK 0x00000004 // Address byte not acknowledged
#define I2C_MASTER_CS_ERROR 0x00000002 // Error occurred
#define I2C_MASTER_CS_BUSY 0x00000001 // Controller is TX/RX data
#define I2C_MASTER_CS_ERR_MASK 0x0000001C
//*****************************************************************************
//
// The following define values used in determining the contents of the I2C
// Master Timer Period register.
//
//*****************************************************************************
#define I2C_MASTER_TPR_SCL_HP 0x00000004 // SCL high period
#define I2C_MASTER_TPR_SCL_LP 0x00000006 // SCL low period
#define I2C_SCL_STANDARD 100000 // SCL standard frequency
#define I2C_SCL_FAST 400000 // SCL fast frequency
//*****************************************************************************
//
// The following define the bit fields in the I2C Master Interrupt Mask
// register.
//
//*****************************************************************************
#define I2C_MASTER_IMR_IM 0x00000001 // Master interrupt mask
//*****************************************************************************
//
// The following define the bit fields in the I2C Master Raw Interrupt Status
// register.
//
//*****************************************************************************
#define I2C_MASTER_RIS_RIS 0x00000001 // Master raw interrupt status
//*****************************************************************************
//
// The following define the bit fields in the I2C Master Masked Interrupt
// Status register.
//
//*****************************************************************************
#define I2C_MASTER_MIS_MIS 0x00000001 // Master masked interrupt status
//*****************************************************************************
//
// The following define the bit fields in the I2C Master Interrupt Clear
// register.
//
//*****************************************************************************
#define I2C_MASTER_MICR_IC 0x00000001 // Master interrupt clear
//*****************************************************************************
//
// The following define the bit fields in the I2C Master Configuration
// register.
//
//*****************************************************************************
#define I2C_MASTER_CR_SFE 0x00000020 // Slave function enable
#define I2C_MASTER_CR_MFE 0x00000010 // Master function enable
#define I2C_MASTER_CR_LPBK 0x00000001 // Loopback enable
//*****************************************************************************
//
// The following define the bit fields in the I2C Slave Own Address register.
//
//*****************************************************************************
#define I2C_SLAVE_SOAR_OAR_MASK 0x0000007F // Slave address
//*****************************************************************************
//
// The following define the bit fields in the I2C Slave Control/Status
// register.
//
//*****************************************************************************
#define I2C_SLAVE_CSR_DA 0x00000001 // Enable the device
#define I2C_SLAVE_CSR_TREQ 0x00000002 // Transmit request received
#define I2C_SLAVE_CSR_RREQ 0x00000001 // Receive data from I2C master
//*****************************************************************************
//
// The following define the bit fields in the I2C Slave Interrupt Mask
// register.
//
//*****************************************************************************
#define I2C_SLAVE_IMR_IM 0x00000001 // Slave interrupt mask
//*****************************************************************************
//
// The following define the bit fields in the I2C Slave Raw Interrupt Status
// register.
//
//*****************************************************************************
#define I2C_SLAVE_RIS_RIS 0x00000001 // Slave raw interrupt status
//*****************************************************************************
//
// The following define the bit fields in the I2C Slave Masked Interrupt
// Status register.
//
//*****************************************************************************
#define I2C_SLAVE_MIS_MIS 0x00000001 // Slave masked interrupt status
//*****************************************************************************
//
// The following define the bit fields in the I2C Slave Interrupt Clear
// register.
//
//*****************************************************************************
#define I2C_SLAVE_SICR_IC 0x00000001 // Slave interrupt clear
#endif // __HW_I2C_H__
Demo/CORTEX_LM3S316_IAR/hw_include/hw_ints.h
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//*****************************************************************************
//
// hw_ints.h - Macros that define the interrupt assignment on Stellaris.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __HW_INTS_H__
#define __HW_INTS_H__
//*****************************************************************************
//
// The following define the fault assignments.
//
//*****************************************************************************
#define FAULT_NMI 2 // NMI fault
#define FAULT_HARD 3 // Hard fault
#define FAULT_MPU 4 // MPU fault
#define FAULT_BUS 5 // Bus fault
#define FAULT_USAGE 6 // Usage fault
#define FAULT_SVCALL 11 // SVCall
#define FAULT_DEBUG 12 // Debug monitor
#define FAULT_PENDSV 14 // PendSV
#define FAULT_SYSTICK 15 // System Tick
//*****************************************************************************
//
// The following define the interrupt assignments.
//
//*****************************************************************************
#define INT_GPIOA 16 // GPIO Port A
#define INT_GPIOB 17 // GPIO Port B
#define INT_GPIOC 18 // GPIO Port C
#define INT_GPIOD 19 // GPIO Port D
#define INT_GPIOE 20 // GPIO Port E
#define INT_UART0 21 // UART0 Rx and Tx
#define INT_UART1 22 // UART1 Rx and Tx
#define INT_SSI 23 // SSI Rx and Tx
#define INT_I2C 24 // I2C Master and Slave
#define INT_PWM_FAULT 25 // PWM Fault
#define INT_PWM0 26 // PWM Generator 0
#define INT_PWM1 27 // PWM Generator 1
#define INT_PWM2 28 // PWM Generator 2
#define INT_ADC0 30 // ADC Sequence 0
#define INT_ADC1 31 // ADC Sequence 1
#define INT_ADC2 32 // ADC Sequence 2
#define INT_ADC3 33 // ADC Sequence 3
#define INT_WATCHDOG 34 // Watchdog timer
#define INT_TIMER0A 35 // Timer 0 subtimer A
#define INT_TIMER0B 36 // Timer 0 subtimer B
#define INT_TIMER1A 37 // Timer 1 subtimer A
#define INT_TIMER1B 38 // Timer 1 subtimer B
#define INT_TIMER2A 39 // Timer 2 subtimer A
#define INT_TIMER2B 40 // Timer 2 subtimer B
#define INT_COMP0 41 // Analog Comparator 0
#define INT_COMP1 42 // Analog Comparator 1
#define INT_COMP2 43 // Analog Comparator 2
#define INT_SYSCTL 44 // System Control (PLL, OSC, BO)
#define INT_FLASH 45 // FLASH Control
//*****************************************************************************
//
// The total number of interrupts.
//
//*****************************************************************************
#define NUM_INTERRUPTS 46
//*****************************************************************************
//
// The total number of priority levels.
//
//*****************************************************************************
#define NUM_PRIORITY 8
#define NUM_PRIORITY_BITS 3
#endif // __HW_INTS_H__
Demo/CORTEX_LM3S316_IAR/hw_include/hw_memmap.h
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//*****************************************************************************
//
// hw_memmap.h - Macros defining the memory map of Stellaris.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __HW_MEMMAP_H__
#define __HW_MEMMAP_H__
//*****************************************************************************
//
// The following define the base address of the memories and peripherals.
//
//*****************************************************************************
#define FLASH_BASE 0x00000000 // FLASH memory
#define SRAM_BASE 0x20000000 // SRAM memory
#define WATCHDOG_BASE 0x40000000 // Watchdog
#define GPIO_PORTA_BASE 0x40004000 // GPIO Port A
#define GPIO_PORTB_BASE 0x40005000 // GPIO Port B
#define GPIO_PORTC_BASE 0x40006000 // GPIO Port C
#define GPIO_PORTD_BASE 0x40007000 // GPIO Port D
#define SSI_BASE 0x40008000 // SSI
#define UART0_BASE 0x4000C000 // UART0
#define UART1_BASE 0x4000D000 // UART1
#define I2C_MASTER_BASE 0x40020000 // I2C Master
#define I2C_SLAVE_BASE 0x40020800 // I2C Slave
#define GPIO_PORTE_BASE 0x40024000 // GPIO Port E
#define PWM_BASE 0x40028000 // PWM
#define TIMER0_BASE 0x40030000 // Timer0
#define TIMER1_BASE 0x40031000 // Timer1
#define TIMER2_BASE 0x40032000 // Timer2
#define ADC_BASE 0x40038000 // ADC
#define COMP_BASE 0x4003C000 // Analog comparators
#define FLASH_CTRL_BASE 0x400FD000 // FLASH Controller
#define SYSCTL_BASE 0x400FE000 // System Control
#define ITM_BASE 0xE0000000 // Instrumentation Trace Macrocell
#define DWT_BASE 0xE0001000 // Data Watchpoint and Trace
#define FPB_BASE 0xE0002000 // FLASH Patch and Breakpoint
#define NVIC_BASE 0xE000E000 // Nested Vectored Interrupt Ctrl
#define TPIU_BASE 0xE0040000 // Trace Port Interface Unit
#endif // __HW_MEMMAP_H__
Demo/CORTEX_LM3S316_IAR/hw_include/hw_nvic.h
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Demo/CORTEX_LM3S316_IAR/hw_include/hw_pwm.h
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Demo/CORTEX_LM3S316_IAR/hw_include/hw_ssi.h
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//*****************************************************************************
//
// hw_ssi.h - Macros used when accessing the SSI hardware.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __HW_SSI_H__
#define __HW_SSI_H__
//*****************************************************************************
//
// The following define the offsets of the SSI registers.
//
//*****************************************************************************
#define SSI_O_CR0 0x00000000 // Control register 0
#define SSI_O_CR1 0x00000004 // Control register 1
#define SSI_O_DR 0x00000008 // Data register
#define SSI_O_SR 0x0000000C // Status register
#define SSI_O_CPSR 0x00000010 // Clock prescale register
#define SSI_O_IM 0x00000014 // Int mask set and clear register
#define SSI_O_RIS 0x00000018 // Raw interrupt register
#define SSI_O_MIS 0x0000001C // Masked interrupt register
#define SSI_O_ICR 0x00000020 // Interrupt clear register
//*****************************************************************************
//
// The following define the bit fields in the SSI Control register 0.
//
//*****************************************************************************
#define SSI_CR0_SCR 0x0000FF00 // Serial clock rate
#define SSI_CR0_SPH 0x00000080 // SSPCLKOUT phase
#define SSI_CR0_SPO 0x00000040 // SSPCLKOUT polarity
#define SSI_CR0_FRF_MASK 0x00000030 // Frame format mask
#define SSI_CR0_FRF_MOTO 0x00000000 // Motorola SPI frame format
#define SSI_CR0_FRF_TI 0x00000010 // TI sync serial frame format
#define SSI_CR0_FRF_NMW 0x00000020 // National Microwire frame format
#define SSI_CR0_DSS 0x0000000F // Data size select
#define SSI_CR0_DSS_4 0x00000003 // 4 bit data
#define SSI_CR0_DSS_5 0x00000004 // 5 bit data
#define SSI_CR0_DSS_6 0x00000005 // 6 bit data
#define SSI_CR0_DSS_7 0x00000006 // 7 bit data
#define SSI_CR0_DSS_8 0x00000007 // 8 bit data
#define SSI_CR0_DSS_9 0x00000008 // 9 bit data
#define SSI_CR0_DSS_10 0x00000009 // 10 bit data
#define SSI_CR0_DSS_11 0x0000000A // 11 bit data
#define SSI_CR0_DSS_12 0x0000000B // 12 bit data
#define SSI_CR0_DSS_13 0x0000000C // 13 bit data
#define SSI_CR0_DSS_14 0x0000000D // 14 bit data
#define SSI_CR0_DSS_15 0x0000000E // 15 bit data
#define SSI_CR0_DSS_16 0x0000000F // 16 bit data
//*****************************************************************************
//
// The following define the bit fields in the SSI Control register 1.
//
//*****************************************************************************
#define SSI_CR1_SOD 0x00000008 // Slave mode output disable
#define SSI_CR1_MS 0x00000004 // Master or slave mode select
#define SSI_CR1_SSE 0x00000002 // Sync serial port enable
#define SSI_CR1_LBM 0x00000001 // Loopback mode
//*****************************************************************************
//
// The following define the bit fields in the SSI Status register.
//
//*****************************************************************************
#define SSI_SR_BSY 0x00000010 // SSI busy
#define SSI_SR_RFF 0x00000008 // RX FIFO full
#define SSI_SR_RNE 0x00000004 // RX FIFO not empty
#define SSI_SR_TNF 0x00000002 // TX FIFO not full
#define SSI_SR_TFE 0x00000001 // TX FIFO empty
//*****************************************************************************
//
// The following define the bit fields in the SSI clock prescale register.
//
//*****************************************************************************
#define SSI_CPSR_CPSDVSR_MASK 0x000000FF // Clock prescale
//*****************************************************************************
//
// The following define information concerning the SSI Data register.
//
//*****************************************************************************
#define TX_FIFO_SIZE (8) // Number of entries in the TX FIFO
#define RX_FIFO_SIZE (8) // Number of entries in the RX FIFO
//*****************************************************************************
//
// The following define the bit fields in the interrupt mask set and clear,
// raw interrupt, masked interrupt, and interrupt clear registers.
//
//*****************************************************************************
#define SSI_INT_TXFF 0x00000008 // TX FIFO interrupt
#define SSI_INT_RXFF 0x00000004 // RX FIFO interrupt
#define SSI_INT_RXTO 0x00000002 // RX timeout interrupt
#define SSI_INT_RXOR 0x00000001 // RX overrun interrupt
#endif // __HW_SSI_H__
Demo/CORTEX_LM3S316_IAR/hw_include/hw_sysctl.h
+380
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Demo/CORTEX_LM3S316_IAR/hw_include/hw_timer.h
+235
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Demo/CORTEX_LM3S316_IAR/hw_include/hw_types.h
+67
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@@ -0,0 +1,67 @@
//*****************************************************************************
//
// hw_types.h - Common types and macros.
//
// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's Stellaris Family of microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws. All rights are reserved. Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 635 of the Stellaris Driver Library.
//
//*****************************************************************************
#ifndef __HW_TYPES_H__
#define __HW_TYPES_H__
//*****************************************************************************
//
// Define a boolean type, and values for true and false.
//
//*****************************************************************************
typedef unsigned char tBoolean;
#ifndef true
#define true 1
#endif
#ifndef false
#define false 0
#endif
//*****************************************************************************
//
// Macros for hardware access, both direct and via the bit-band region.
//
//*****************************************************************************
#define HWREG(x) \
(*((volatile unsigned long *)(x)))
#define HWREGH(x) \
(*((volatile unsigned short *)(x)))
#define HWREGB(x) \
(*((volatile unsigned char *)(x)))
#define HWREGBITW(x, b) \
HWREG(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
(((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
#define HWREGBITH(x, b) \
HWREGH(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
(((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
#define HWREGBITB(x, b) \
HWREGB(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
(((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
#endif // __HW_TYPES_H__

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