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6 Commits
Author SHA1 Message Date
Akif Ejaz 757db54d6d Add RISC-V32 arch. port layer 
This update adapts the ThreadX low-level kernel routines
for RV32, including:
  - startup and initialization logic
  - context save/restore implementations
  - interrupt control and scheduler entry
  - thread stack build and system return paths
  - timer interrupt handling
  - made it complient as per new risc-v64/gnu
      & threadx style
  - added reademe for risc-v32/gnu port

These changes provide full low-level support needed to run
ThreadX on RISC-V32 targets.

Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
 2026-02-16 17:15:13 +05:00
Jer6y d24da0e2ea riscv : add riscv qemu virt support and fix fs bit error in mstatus 2024-10-25 20:03:11 +08:00
Yuxin Zhou d0dab58250 Release 6.1.8 2021-07-28 07:24:02 +00:00
Scott Larson 1b5816a206 6.1 minor release 2020-09-30 15:42:41 -07:00
PProvost f8e91d4762 Updated cmake system processor 2020-05-29 14:37:35 -06:00
PProvost 40081863d5 Updated readme, etc. 2020-05-13 11:47:56 -06:00