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Added TX_ENABLE_FIQ_SUPPORT to the feature-macro assembly stage (#610)

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#608 assembled the code behind TX_ENABLE_VFP_SUPPORT, TX_LOW_POWER and
TX_ENABLE_EXECUTION_CHANGE_NOTIFY, and missed TX_ENABLE_FIQ_SUPPORT, which guards
assembly in 145 files across the A and R profile ports. All 145 assemble today, so
this adds no fix, only the regression protection the other three already have.

Also recorded why TX_ENABLE_IRQ_NESTING and TX_ENABLE_FIQ_NESTING are not in the
list, since their absence otherwise looks like the same oversight. They guard no
assembly in the trees this script walks: the nesting start and end routines are
separate files compiled unconditionally, and the macros only feed the
TX_PORT_SPECIFIC_BUILD_OPTIONS bitfield in tx_port.h. Adding them would assemble
nothing new while implying coverage that does not exist.

Verified with Arm Toolchain for Embedded 22.1.0: 711 of 711 assembly sources, then
37 of 37 VFP, 145 of 145 FIQ, 8 of 8 TX_LOW_POWER and 218 of 218
TX_ENABLE_EXECUTION_CHANGE_NOTIFY.

Assisted-by: Claude Code (Opus 5) <noreply@anthropic.com>
This commit is contained in:
Frédéric Desbiens
2026-08-13 15:57:18 -04:00
committed by GitHub
parent acdc02b2fc
commit c991c9e6ae
1 changed files with 8 additions and 1 deletions
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scripts/check_clang.sh
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@@ -149,7 +149,14 @@ declare -A PORT_TARGET=(
# and Cortex-M23 execution-profile paths: invalid on Armv6-M and Armv8-M
# Baseline, where the 16-bit POP takes r0-r7 and pc only, and rejected by GNU as
# well as by LLVM. Turning the feature on had never once been tried.
FEATURE_MACROS="TX_ENABLE_VFP_SUPPORT TX_LOW_POWER TX_ENABLE_EXECUTION_CHANGE_NOTIFY"
FEATURE_MACROS="TX_ENABLE_VFP_SUPPORT TX_ENABLE_FIQ_SUPPORT TX_LOW_POWER
TX_ENABLE_EXECUTION_CHANGE_NOTIFY"
# TX_ENABLE_IRQ_NESTING and TX_ENABLE_FIQ_NESTING are deliberately not here.
# They guard no assembly in the trees this script walks: the nesting start and end
# routines are separate files compiled unconditionally, and the macros only feed
# the TX_PORT_SPECIFIC_BUILD_OPTIONS bitfield in tx_port.h. Adding them would
# assemble nothing new and imply coverage that does not exist.
# Extra flags for the VFP paths, per core, needed only where -mcpu alone cannot
# assemble them. Cortex-R4's FPU is an option rather than part of the core, so