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Updated Cortex-R4 Thumb bit immediates (#565)

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Use explicit immediate syntax when testing the Thumb bit in AC6 Cortex-R4 stack build assembly.

Co-authored-by: Codex <codex@openai.com>
This commit is contained in:
Frédéric Desbiens
2026-06-29 16:22:52 -04:00
committed by GitHub
co-authored by Codex
parent 3fcfb4e4c9
commit a33f6efc48
2 changed files with 4 additions and 2 deletions
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ports/cortex_r4/ac6/src/tx_thread_stack_build.S
+2 -1
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@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Codex (GPT-5).
/**************************************************************************/
@@ -143,7 +144,7 @@ _tx_thread_stack_build:
MRS r3, CPSR // Pickup CPSR
BIC r3, r3, #CPSR_MASK // Mask mode bits of CPSR
ORR r3, r3, #SVC_MODE // Build CPSR, SVC mode, interrupts enabled
TST r1, 1 // Test if Thumb bit is set in entry function address
TST r1, #1 // Test if Thumb bit is set in entry function address
ITE NE
ORRNE r3, r3, #THUMB_BIT // Yes, set the Thumb bit
BICEQ r3, r3, #THUMB_BIT // No, clear the Thumb bit