diff --git a/ports/cortex_m0/ac6/inc/tx_port.h b/ports/cortex_m0/ac6/inc/tx_port.h
index 214ca8e8..d6e03627 100644
--- a/ports/cortex_m0/ac6/inc/tx_port.h
+++ b/ports/cortex_m0/ac6/inc/tx_port.h
@@ -9,6 +9,8 @@
  * SPDX-License-Identifier: MIT
  **************************************************************************/
 
+// Some portions generated by Copilot (Opus 5).
+
 
 /**************************************************************************/
 /**************************************************************************/
@@ -322,13 +324,13 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_primask_value();
         __enable_interrupts();
         __restore_interrupts(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m0/gnu/inc/tx_port.h b/ports/cortex_m0/gnu/inc/tx_port.h
index 4e5270de..51f67b65 100644
--- a/ports/cortex_m0/gnu/inc/tx_port.h
+++ b/ports/cortex_m0/gnu/inc/tx_port.h
@@ -10,6 +10,7 @@
  **************************************************************************/
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -324,13 +325,13 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_primask_value();
         __enable_interrupts();
         __restore_interrupts(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m0/iar/inc/tx_port.h b/ports/cortex_m0/iar/inc/tx_port.h
index 035009e7..cabb0402 100644
--- a/ports/cortex_m0/iar/inc/tx_port.h
+++ b/ports/cortex_m0/iar/inc/tx_port.h
@@ -9,6 +9,8 @@
  * SPDX-License-Identifier: MIT
  **************************************************************************/
 
+// Some portions generated by Copilot (Opus 5).
+
 
 /**************************************************************************/
 /**************************************************************************/
@@ -313,13 +315,13 @@ __istate_t interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_IPSR() == 0)
     {
         interrupt_save = __get_interrupt_state();
         __enable_interrupt();
         __set_interrupt_state(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m23/ac6/inc/tx_port.h b/ports/cortex_m23/ac6/inc/tx_port.h
index 97cc1fee..dcd0f354 100644
--- a/ports/cortex_m23/ac6/inc/tx_port.h
+++ b/ports/cortex_m23/ac6/inc/tx_port.h
@@ -10,6 +10,7 @@
  **************************************************************************/
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -378,7 +379,7 @@ unsigned int          was_masked;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_get_ipsr() == 0)
     {
         was_masked = __disable_irq();
diff --git a/ports/cortex_m23/gnu/inc/tx_port.h b/ports/cortex_m23/gnu/inc/tx_port.h
index dac6fbb8..a8ec7db2 100644
--- a/ports/cortex_m23/gnu/inc/tx_port.h
+++ b/ports/cortex_m23/gnu/inc/tx_port.h
@@ -10,6 +10,7 @@
  **************************************************************************/
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -391,13 +392,13 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_get_ipsr() == 0)
     {
         interrupt_save = __get_primask_value();
         __enable_interrupts();
         __restore_interrupts(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m23/iar/inc/tx_port.h b/ports/cortex_m23/iar/inc/tx_port.h
index 38649ac3..50887409 100644
--- a/ports/cortex_m23/iar/inc/tx_port.h
+++ b/ports/cortex_m23/iar/inc/tx_port.h
@@ -9,6 +9,8 @@
  * SPDX-License-Identifier: MIT
  **************************************************************************/
 
+// Some portions generated by Copilot (Opus 5).
+
 
 /**************************************************************************/
 /**************************************************************************/
@@ -399,7 +401,7 @@ __istate_t interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_IPSR() == 0)
     {
         interrupt_save = __get_interrupt_state();
diff --git a/ports/cortex_m3/ac5/inc/tx_port.h b/ports/cortex_m3/ac5/inc/tx_port.h
index 62cae66d..21f2543a 100644
--- a/ports/cortex_m3/ac5/inc/tx_port.h
+++ b/ports/cortex_m3/ac5/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m3/ac6/inc/tx_port.h b/ports/cortex_m3/ac6/inc/tx_port.h
index 7265724e..29e23a47 100644
--- a/ports/cortex_m3/ac6/inc/tx_port.h
+++ b/ports/cortex_m3/ac6/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m3/gnu/inc/tx_port.h b/ports/cortex_m3/gnu/inc/tx_port.h
index d5299cb3..1db71238 100644
--- a/ports/cortex_m3/gnu/inc/tx_port.h
+++ b/ports/cortex_m3/gnu/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m3/iar/inc/tx_port.h b/ports/cortex_m3/iar/inc/tx_port.h
index 5b05c277..f14b730a 100644
--- a/ports/cortex_m3/iar/inc/tx_port.h
+++ b/ports/cortex_m3/iar/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m3/keil/inc/tx_port.h b/ports/cortex_m3/keil/inc/tx_port.h
index 0fc2ea65..13745458 100644
--- a/ports/cortex_m3/keil/inc/tx_port.h
+++ b/ports/cortex_m3/keil/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m33/ac6/inc/tx_port.h b/ports/cortex_m33/ac6/inc/tx_port.h
index 86411a85..98f953e4 100644
--- a/ports/cortex_m33/ac6/inc/tx_port.h
+++ b/ports/cortex_m33/ac6/inc/tx_port.h
@@ -11,6 +11,7 @@
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ UINT interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_tx_ipsr_get() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ UINT interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m33/gnu/inc/tx_port.h b/ports/cortex_m33/gnu/inc/tx_port.h
index dc67c001..828058ea 100644
--- a/ports/cortex_m33/gnu/inc/tx_port.h
+++ b/ports/cortex_m33/gnu/inc/tx_port.h
@@ -11,6 +11,7 @@
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ UINT interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_tx_ipsr_get() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ UINT interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m33/iar/inc/tx_port.h b/ports/cortex_m33/iar/inc/tx_port.h
index 6527b34a..1203e401 100644
--- a/ports/cortex_m33/iar/inc/tx_port.h
+++ b/ports/cortex_m33/iar/inc/tx_port.h
@@ -11,6 +11,7 @@
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ UINT interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_tx_ipsr_get() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ UINT interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m4/ac5/inc/tx_port.h b/ports/cortex_m4/ac5/inc/tx_port.h
index ea89ed1a..2b6361d4 100644
--- a/ports/cortex_m4/ac5/inc/tx_port.h
+++ b/ports/cortex_m4/ac5/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m4/ac6/inc/tx_port.h b/ports/cortex_m4/ac6/inc/tx_port.h
index 3946fec2..1db55ef5 100644
--- a/ports/cortex_m4/ac6/inc/tx_port.h
+++ b/ports/cortex_m4/ac6/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m4/gnu/inc/tx_port.h b/ports/cortex_m4/gnu/inc/tx_port.h
index 98d81669..fe240f62 100644
--- a/ports/cortex_m4/gnu/inc/tx_port.h
+++ b/ports/cortex_m4/gnu/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m4/iar/inc/tx_port.h b/ports/cortex_m4/iar/inc/tx_port.h
index 8acba907..1ca17008 100644
--- a/ports/cortex_m4/iar/inc/tx_port.h
+++ b/ports/cortex_m4/iar/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m4/keil/inc/tx_port.h b/ports/cortex_m4/keil/inc/tx_port.h
index 415d5f50..f54822ff 100644
--- a/ports/cortex_m4/keil/inc/tx_port.h
+++ b/ports/cortex_m4/keil/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m52/ac6/inc/tx_port.h b/ports/cortex_m52/ac6/inc/tx_port.h
index 18f28f0d..db328434 100644
--- a/ports/cortex_m52/ac6/inc/tx_port.h
+++ b/ports/cortex_m52/ac6/inc/tx_port.h
@@ -11,6 +11,7 @@
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ UINT interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_tx_ipsr_get() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ UINT interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m52/gnu/inc/tx_port.h b/ports/cortex_m52/gnu/inc/tx_port.h
index bdba07b2..ca101c68 100644
--- a/ports/cortex_m52/gnu/inc/tx_port.h
+++ b/ports/cortex_m52/gnu/inc/tx_port.h
@@ -11,6 +11,7 @@
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ UINT interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_tx_ipsr_get() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ UINT interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m52/iar/inc/tx_port.h b/ports/cortex_m52/iar/inc/tx_port.h
index 6a3b23a6..493b54c1 100644
--- a/ports/cortex_m52/iar/inc/tx_port.h
+++ b/ports/cortex_m52/iar/inc/tx_port.h
@@ -11,6 +11,7 @@
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ UINT interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_tx_ipsr_get() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ UINT interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m55/ac6/inc/tx_port.h b/ports/cortex_m55/ac6/inc/tx_port.h
index f3cbba3a..63a49e12 100644
--- a/ports/cortex_m55/ac6/inc/tx_port.h
+++ b/ports/cortex_m55/ac6/inc/tx_port.h
@@ -11,6 +11,7 @@
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ UINT interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_tx_ipsr_get() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ UINT interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m55/gnu/inc/tx_port.h b/ports/cortex_m55/gnu/inc/tx_port.h
index 3f91c12d..eb7176f5 100644
--- a/ports/cortex_m55/gnu/inc/tx_port.h
+++ b/ports/cortex_m55/gnu/inc/tx_port.h
@@ -11,6 +11,7 @@
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ UINT interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_tx_ipsr_get() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ UINT interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m55/iar/inc/tx_port.h b/ports/cortex_m55/iar/inc/tx_port.h
index 3ff916b3..8f710506 100644
--- a/ports/cortex_m55/iar/inc/tx_port.h
+++ b/ports/cortex_m55/iar/inc/tx_port.h
@@ -11,6 +11,7 @@
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ UINT interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_tx_ipsr_get() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ UINT interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m7/ac5/inc/tx_port.h b/ports/cortex_m7/ac5/inc/tx_port.h
index 8f84e7fe..320f23d8 100644
--- a/ports/cortex_m7/ac5/inc/tx_port.h
+++ b/ports/cortex_m7/ac5/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m7/ac6/inc/tx_port.h b/ports/cortex_m7/ac6/inc/tx_port.h
index bf2276eb..8a4981de 100644
--- a/ports/cortex_m7/ac6/inc/tx_port.h
+++ b/ports/cortex_m7/ac6/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m7/gnu/inc/tx_port.h b/ports/cortex_m7/gnu/inc/tx_port.h
index b01873cf..c47b27fd 100644
--- a/ports/cortex_m7/gnu/inc/tx_port.h
+++ b/ports/cortex_m7/gnu/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m7/iar/inc/tx_port.h b/ports/cortex_m7/iar/inc/tx_port.h
index a9ebe3c8..bd0c8507 100644
--- a/ports/cortex_m7/iar/inc/tx_port.h
+++ b/ports/cortex_m7/iar/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m85/ac6/inc/tx_port.h b/ports/cortex_m85/ac6/inc/tx_port.h
index 38def972..bc9dff5d 100644
--- a/ports/cortex_m85/ac6/inc/tx_port.h
+++ b/ports/cortex_m85/ac6/inc/tx_port.h
@@ -11,6 +11,7 @@
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ UINT interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_tx_ipsr_get() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ UINT interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m85/gnu/inc/tx_port.h b/ports/cortex_m85/gnu/inc/tx_port.h
index 1f1702df..9a02f940 100644
--- a/ports/cortex_m85/gnu/inc/tx_port.h
+++ b/ports/cortex_m85/gnu/inc/tx_port.h
@@ -11,6 +11,7 @@
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ UINT interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_tx_ipsr_get() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ UINT interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports/cortex_m85/iar/inc/tx_port.h b/ports/cortex_m85/iar/inc/tx_port.h
index 26ab0c75..1f8741cd 100644
--- a/ports/cortex_m85/iar/inc/tx_port.h
+++ b/ports/cortex_m85/iar/inc/tx_port.h
@@ -11,6 +11,7 @@
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ UINT interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_tx_ipsr_get() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ UINT interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports_arch/ARMv7-M/threadx/inc/tx_port.h b/ports_arch/ARMv7-M/threadx/inc/tx_port.h
index b988675f..1b147139 100644
--- a/ports_arch/ARMv7-M/threadx/inc/tx_port.h
+++ b/ports_arch/ARMv7-M/threadx/inc/tx_port.h
@@ -12,6 +12,7 @@
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Copilot (Claude Sonnet 4.6).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ unsigned int interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (__get_ipsr_value() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ unsigned int interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/ports_arch/ARMv8-M/threadx/inc/tx_port.h b/ports_arch/ARMv8-M/threadx/inc/tx_port.h
index 1f088d41..cabf1c20 100644
--- a/ports_arch/ARMv8-M/threadx/inc/tx_port.h
+++ b/ports_arch/ARMv8-M/threadx/inc/tx_port.h
@@ -11,6 +11,7 @@
 
 // Some portions generated by Gemini (Gemini 2.0 Flash).
 // Some portions generated by Claude Code (Opus 5).
+// Some portions generated by Copilot (Opus 5).
 
 
 /**************************************************************************/
@@ -583,7 +584,7 @@ UINT interrupt_save;
 
     /* Set PendSV to invoke ThreadX scheduler.  */
     *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
-    __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+    __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
     if (_tx_ipsr_get() == 0)
     {
         interrupt_save = __get_interrupt_posture();
@@ -593,7 +594,7 @@ UINT interrupt_save;
         __enable_interrupts();
 #endif
         __restore_interrupt(interrupt_save);
-        __asm__ volatile ("isb 0xF " : : : "memory");
+        __asm__ volatile ("isb sy " : : : "memory");
     }
 }
 
diff --git a/scripts/check_ports.sh b/scripts/check_ports.sh
index 1ba13ca0..19b350ca 100755
--- a/scripts/check_ports.sh
+++ b/scripts/check_ports.sh
@@ -261,7 +261,7 @@ say "== Families with no copy script (report only) =="
 if [ "$quiet" -eq 0 ]; then
     for family in ports/cortex_m0 ports/cortex_m0+ ports/cortex_m23; do
         [ -d "$family" ] || continue
-        for probe in "dsb 0xF" "isb 0xF"; do
+        for probe in "dsb sy" "isb sy"; do
             have=""; missing=""
             for header in "$family"/*/inc/tx_port.h; do
                 [ -f "$header" ] || continue