From 515ab8aba1a42a9d85e18288e1a76e579b177831 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Desbiens?= Date: Wed, 9 Sep 2026 09:10:36 -0400 Subject: [PATCH] Added the missing memory barrier so ARMv7-A SMP schedulers no longer miss preemptions (#704) _tx_thread_schedule stores the newly selected thread into _tx_thread_current_ptr[core] and then reloads _tx_thread_execute_ptr[core] to detect a concurrent scheduling decision made by another core. On the other side, _tx_thread_smp_core_interrupt stores the execute pointer and then reads the current pointer to decide whether an inter-core interrupt is required. This is a store-buffer pattern: without a barrier both cores can observe stale values, the interrupt is skipped, and a ready thread with the highest priority is never scheduled. The barrier was added to the ARMv8-A SMP scheduler in 6.2.1, but the ARMv7-A SMP ports were left untouched even though they implement the same protocol. This adds the corresponding DMB to the Cortex-A5, Cortex-A7 and Cortex-A9 SMP schedulers for both the AC5 and GNU toolchains. The GNU variants were verified by assembling them with arm-none-eabi-gcc 13.2.1 for their respective cores. Refs #209 Assisted-by: Copilot (Opus 5) --- ports_smp/cortex_a5_smp/ac5/src/tx_thread_schedule.s | 4 ++++ ports_smp/cortex_a5_smp/gnu/src/tx_thread_schedule.S | 4 ++++ ports_smp/cortex_a7_smp/ac5/src/tx_thread_schedule.s | 4 ++++ ports_smp/cortex_a7_smp/gnu/src/tx_thread_schedule.S | 4 ++++ ports_smp/cortex_a9_smp/ac5/src/tx_thread_schedule.s | 4 ++++ ports_smp/cortex_a9_smp/gnu/src/tx_thread_schedule.S | 4 ++++ 6 files changed, 24 insertions(+) diff --git a/ports_smp/cortex_a5_smp/ac5/src/tx_thread_schedule.s b/ports_smp/cortex_a5_smp/ac5/src/tx_thread_schedule.s index e4c232aa..4be82f13 100644 --- a/ports_smp/cortex_a5_smp/ac5/src/tx_thread_schedule.s +++ b/ports_smp/cortex_a5_smp/ac5/src/tx_thread_schedule.s @@ -1,5 +1,6 @@ ;/*************************************************************************** ; * Copyright (c) 2024 Microsoft Corporation +; * Copyright (c) 2026 Eclipse ThreadX contributors ; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at @@ -8,6 +9,8 @@ ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; +; Some portions generated by Copilot (Opus 5). +; ; ;/**************************************************************************/ ;/**************************************************************************/ @@ -164,6 +167,7 @@ _tx_thread_ready_for_execution LDR r2, =_tx_thread_current_ptr ; Pickup address of current thread ADD r2, r2, r12 ; Build index into the current thread array STR r0, [r2, #0] ; Setup current thread pointer + DMB ; Ensure the current thread pointer write completes ; ; /* In the time between reading the execute pointer and assigning ; it to the current pointer, the execute pointer was changed by diff --git a/ports_smp/cortex_a5_smp/gnu/src/tx_thread_schedule.S b/ports_smp/cortex_a5_smp/gnu/src/tx_thread_schedule.S index 00f254dd..dd34da80 100644 --- a/ports_smp/cortex_a5_smp/gnu/src/tx_thread_schedule.S +++ b/ports_smp/cortex_a5_smp/gnu/src/tx_thread_schedule.S @@ -1,5 +1,6 @@ @/*************************************************************************** @ * Copyright (c) 2024 Microsoft Corporation +@ * Copyright (c) 2026 Eclipse ThreadX contributors @ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @@ -8,6 +9,8 @@ @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ +@ Some portions generated by Copilot (Opus 5). +@ @ @/**************************************************************************/ @/**************************************************************************/ @@ -166,6 +169,7 @@ _tx_thread_ready_for_execution: LDR r2, =_tx_thread_current_ptr @ Pickup address of current thread ADD r2, r2, r12 @ Build index into the current thread array STR r0, [r2, #0] @ Setup current thread pointer + DMB @ Ensure the current thread pointer write completes @ @ /* In the time between reading the execute pointer and assigning @ it to the current pointer, the execute pointer was changed by diff --git a/ports_smp/cortex_a7_smp/ac5/src/tx_thread_schedule.s b/ports_smp/cortex_a7_smp/ac5/src/tx_thread_schedule.s index 1ced36e9..a70110ec 100644 --- a/ports_smp/cortex_a7_smp/ac5/src/tx_thread_schedule.s +++ b/ports_smp/cortex_a7_smp/ac5/src/tx_thread_schedule.s @@ -1,5 +1,6 @@ ;/*************************************************************************** ; * Copyright (c) 2024 Microsoft Corporation +; * Copyright (c) 2026 Eclipse ThreadX contributors ; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at @@ -8,6 +9,8 @@ ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; +; Some portions generated by Copilot (Opus 5). +; ; ;/**************************************************************************/ ;/**************************************************************************/ @@ -163,6 +166,7 @@ _tx_thread_ready_for_execution LDR r2, =_tx_thread_current_ptr ; Pickup address of current thread ADD r2, r2, r12 ; Build index into the current thread array STR r0, [r2, #0] ; Setup current thread pointer + DMB ; Ensure the current thread pointer write completes ; ; /* In the time between reading the execute pointer and assigning ; it to the current pointer, the execute pointer was changed by diff --git a/ports_smp/cortex_a7_smp/gnu/src/tx_thread_schedule.S b/ports_smp/cortex_a7_smp/gnu/src/tx_thread_schedule.S index 88917752..56bbd5eb 100644 --- a/ports_smp/cortex_a7_smp/gnu/src/tx_thread_schedule.S +++ b/ports_smp/cortex_a7_smp/gnu/src/tx_thread_schedule.S @@ -1,5 +1,6 @@ @/*************************************************************************** @ * Copyright (c) 2024 Microsoft Corporation +@ * Copyright (c) 2026 Eclipse ThreadX contributors @ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @@ -8,6 +9,8 @@ @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ +@ Some portions generated by Copilot (Opus 5). +@ @ @/**************************************************************************/ @/**************************************************************************/ @@ -180,6 +183,7 @@ _tx_thread_ready_for_execution: LDR r2, =_tx_thread_current_ptr @ Pickup address of current thread ADD r2, r2, r12 @ Build index into the current thread array STR r0, [r2, #0] @ Setup current thread pointer + DMB @ Ensure the current thread pointer write completes @ @ /* In the time between reading the execute pointer and assigning @ it to the current pointer, the execute pointer was changed by diff --git a/ports_smp/cortex_a9_smp/ac5/src/tx_thread_schedule.s b/ports_smp/cortex_a9_smp/ac5/src/tx_thread_schedule.s index 63e7492c..81f0b284 100644 --- a/ports_smp/cortex_a9_smp/ac5/src/tx_thread_schedule.s +++ b/ports_smp/cortex_a9_smp/ac5/src/tx_thread_schedule.s @@ -1,5 +1,6 @@ ;/*************************************************************************** ; * Copyright (c) 2024 Microsoft Corporation +; * Copyright (c) 2026 Eclipse ThreadX contributors ; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at @@ -8,6 +9,8 @@ ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; +; Some portions generated by Copilot (Opus 5). +; ; ;/**************************************************************************/ ;/**************************************************************************/ @@ -163,6 +166,7 @@ _tx_thread_ready_for_execution LDR r2, =_tx_thread_current_ptr ; Pickup address of current thread ADD r2, r2, r12 ; Build index into the current thread array STR r0, [r2, #0] ; Setup current thread pointer + DMB ; Ensure the current thread pointer write completes ; ; /* In the time between reading the execute pointer and assigning ; it to the current pointer, the execute pointer was changed by diff --git a/ports_smp/cortex_a9_smp/gnu/src/tx_thread_schedule.S b/ports_smp/cortex_a9_smp/gnu/src/tx_thread_schedule.S index 84fec67d..e59be021 100644 --- a/ports_smp/cortex_a9_smp/gnu/src/tx_thread_schedule.S +++ b/ports_smp/cortex_a9_smp/gnu/src/tx_thread_schedule.S @@ -1,5 +1,6 @@ @/*************************************************************************** @ * Copyright (c) 2024 Microsoft Corporation +@ * Copyright (c) 2026 Eclipse ThreadX contributors @ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @@ -8,6 +9,8 @@ @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ +@ Some portions generated by Copilot (Opus 5). +@ @ @/**************************************************************************/ @/**************************************************************************/ @@ -165,6 +168,7 @@ _tx_thread_ready_for_execution: LDR r2, =_tx_thread_current_ptr @ Pickup address of current thread ADD r2, r2, r12 @ Build index into the current thread array STR r0, [r2, #0] @ Setup current thread pointer + DMB @ Ensure the current thread pointer write completes @ @ /* In the time between reading the execute pointer and assigning @ it to the current pointer, the execute pointer was changed by