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Removed the vector table offset register and system stack pointer setup from the Cortex-M low-level initialization (#714)

Browse Source 
_tx_initialize_low_level wrote VTOR and derived _tx_thread_system_stack_ptr from
the reset vector on every Cortex-M port. Programming VTOR is the job of the
low-level startup code that runs before the kernel is entered, and doing it again
inside ThreadX silently overrode a vector table that the application, a
bootloader or a firmware update had already installed. It also forced every
application to export a vector table symbol that the kernel itself never needed.

_tx_thread_system_stack_ptr is never read by any Cortex-M port, so the value
copied out of the reset vector served no purpose.

Both blocks are removed from all Cortex-M ports, together with the now-unused
symbol declarations. The GreenHills files keep the NVIC base address load that
the removed block used to leave in r0 for the SysTick setup that follows.

Applications that relied on ThreadX programming VTOR must now set it in their
startup code. The bundled examples link their vector table at address zero and
run on the reset default.

Fixes #370

Assisted-by: Copilot (Opus 5) <noreply@github.com>
This commit is contained in:
Frédéric Desbiens
2026-09-09 16:28:59 -04:00
committed by GitHub
parent 850a172bac
commit 383dd311cd
71 changed files with 98 additions and 966 deletions
Download Patch File Download Diff File Expand all files Collapse all files
ports/cortex_m0/ac5/example_build/tx_initialize_low_level.s
+2 -22
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
; Some portions generated by Copilot (Opus 5).
;
;
;/**************************************************************************/
@@ -20,7 +22,6 @@
;/**************************************************************************/
;
;
IMPORT _tx_thread_system_stack_ptr
IMPORT _tx_initialize_unused_memory
IMPORT _tx_timer_interrupt
IMPORT __main
@@ -137,12 +138,6 @@ _tx_initialize_low_level
ADDS r1, r1, #4 ;
STR r1, [r0] ; Setup first unused memory pointer
;
; /* Setup Vector Table Offset Register. */
;
LDR r0, =0xE000ED08 ; Build address of NVIC registers
LDR r1, =__tx_vectors ; Pickup address of vector table
STR r1, [r0] ; Set vector table address
;
; /* Enable the cycle count register. */
;
; LDR r0, =0xE0001000 ; Build address of DWT register
@@ -151,21 +146,6 @@ _tx_initialize_low_level
; ORRS r1, r1, r2 ; Set the CYCCNTENA bit
; STR r1, [r0] ; Enable the cycle count register
;
; /* Setup Vector Table Offset Register. */
;
LDR r0, =0xE000E000 ; Build address of NVIC registers
LDR r2, =0xD08 ; Offset to vector base register
ADD r0, r0, r2 ; Build vector base register
LDR r1, =__tx_vectors ; Pickup address of vector table
STR r1, [r0] ; Set vector table address
;
; /* Set system stack pointer from vector value. */
;
LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
LDR r1, =__tx_vectors ; Pickup address of vector table
LDR r1, [r1] ; Pickup reset stack pointer
STR r1, [r0] ; Save system stack pointer
;
; /* Configure SysTick. */
;
LDR r0, =0xE000E000 ; Build address of NVIC registers
ports/cortex_m0/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+2 -16
View File
@@ -1,5 +1,6 @@
@/***************************************************************************
@ * Copyright (c) 2024 Microsoft Corporation
@ * Copyright (c) 2026-present Eclipse ThreadX contributors
@ *
@ * This program and the accompanying materials are made available under the
@ * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
@ *
@ * SPDX-License-Identifier: MIT
@ **************************************************************************/
// Some portions generated by Copilot (Opus 5).
@ // Some portions generated by GitHub Copilot (Claude Sonnet 4.6).
@
@
@@ -21,7 +23,6 @@
@/**************************************************************************/
@
@
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global _tx_thread_context_save
.global _tx_thread_context_restore
@@ -94,21 +95,6 @@ _tx_initialize_low_level:
@ ORRS r1, r1, r2 @ Set the CYCCNTENA bit
@ STR r1, [r0] @ Enable the cycle count register
@
@ /* Setup Vector Table Offset Register. */
@
LDR r0, =0xE000E000 @ Build address of NVIC registers
LDR r2, =0xD08 @ Offset to vector base register
ADD r0, r0, r2 @ Build vector base register
LDR r1, =vector_table @ Pickup address of vector table
STR r1, [r0] @ Set vector table address
@
@ /* Set system stack pointer from vector value. */
@
LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer
LDR r1, =vector_table @ Pickup address of vector table
LDR r1, [r1] @ Pickup reset stack pointer
STR r1, [r0] @ Save system stack pointer
@
@ /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
@
LDR r0, =0xE000E000 @ Build address of NVIC registers
ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S
+2 -17
View File
@@ -1,5 +1,6 @@
@/***************************************************************************
@ * Copyright (c) 2024 Microsoft Corporation
@ * Copyright (c) 2026-present Eclipse ThreadX contributors
@ *
@ * This program and the accompanying materials are made available under the
@ * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
@ *
@ * SPDX-License-Identifier: MIT
@ **************************************************************************/
// Some portions generated by Copilot (Opus 5).
@
@
@/**************************************************************************/
@@ -30,13 +32,11 @@
@#include "tx_timer.h"
@
@
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global __RAM_segment_used_end__
.global _tx_thread_context_save
.global _tx_thread_context_restore
.global _tx_timer_interrupt
.global _vectors
@
@
SYSTEM_CLOCK = 8000000
@@ -105,21 +105,6 @@ _tx_initialize_low_level:
@ ORRS r1, r1, r2 @ Set the CYCCNTENA bit
@ STR r1, [r0] @ Enable the cycle count register
@
@ /* Setup Vector Table Offset Register. */
@
LDR r0, =0xE000E000 @ Build address of NVIC registers
LDR r2, =0xD08 @ Offset to vector base register
ADD r0, r0, r2 @ Build vector base register
LDR r1, =_vectors @ Pickup address of vector table
STR r1, [r0] @ Set vector table address
@
@ /* Set system stack pointer from vector value. */
@
LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer
LDR r1, =_vectors @ Pickup address of vector table
LDR r1, [r1] @ Pickup reset stack pointer
STR r1, [r0] @ Save system stack pointer
@
@ /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
@
LDR r0, =0xE000E000 @ Build address of NVIC registers
ports/cortex_m0/iar/example_build/tx_initialize_low_level.s
+2 -17
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
; Some portions generated by Copilot (Opus 5).
;
;
;/**************************************************************************/
@@ -20,10 +22,8 @@
;/**************************************************************************/
;
;
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __vector_table
EXTERN _tx_execution_isr_enter
EXTERN _tx_execution_isr_exit
;
@@ -100,21 +100,6 @@ _tx_initialize_low_level:
; ORRS r1, r1, r2 ; Set the CYCCNTENA bit
; STR r1, [r0] ; Enable the cycle count register
;
; /* Setup Vector Table Offset Register. */
;
LDR r0, =0xE000E000 ; Build address of NVIC registers
LDR r2, =0xD08 ; Offset to vector base register
ADD r0, r0, r2 ; Build vector base register
LDR r1, =__vector_table ; Pickup address of vector table
STR r1, [r0] ; Set vector table address
;
; /* Set system stack pointer from vector value. */
;
LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
LDR r1, =__vector_table ; Pickup address of vector table
LDR r1, [r1] ; Pickup reset stack pointer
STR r1, [r0] ; Save system stack pointer
;
; /* Configure SysTick. */
;
LDR r0, =0xE000E000 ; Build address of NVIC registers
ports/cortex_m0/keil/example_build/tx_initialize_low_level.s
+2 -22
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
; Some portions generated by Copilot (Opus 5).
;
;
;/**************************************************************************/
@@ -20,7 +22,6 @@
;/**************************************************************************/
;
;
IMPORT _tx_thread_system_stack_ptr
IMPORT _tx_initialize_unused_memory
IMPORT _tx_timer_interrupt
IMPORT __main
@@ -137,12 +138,6 @@ _tx_initialize_low_level
ADDS r1, r1, #4 ;
STR r1, [r0] ; Setup first unused memory pointer
;
; /* Setup Vector Table Offset Register. */
;
LDR r0, =0xE000ED08 ; Build address of NVIC registers
LDR r1, =__tx_vectors ; Pickup address of vector table
STR r1, [r0] ; Set vector table address
;
; /* Enable the cycle count register. */
;
; LDR r0, =0xE0001000 ; Build address of DWT register
@@ -151,21 +146,6 @@ _tx_initialize_low_level
; ORRS r1, r1, r2 ; Set the CYCCNTENA bit
; STR r1, [r0] ; Enable the cycle count register
;
; /* Setup Vector Table Offset Register. */
;
LDR r0, =0xE000E000 ; Build address of NVIC registers
LDR r2, =0xD08 ; Offset to vector base register
ADD r0, r0, r2 ; Build vector base register
LDR r1, =__tx_vectors ; Pickup address of vector table
STR r1, [r0] ; Set vector table address
;
; /* Set system stack pointer from vector value. */
;
LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
LDR r1, =__tx_vectors ; Pickup address of vector table
LDR r1, [r1] ; Pickup reset stack pointer
STR r1, [r0] ; Save system stack pointer
;
; /* Configure SysTick. */
;
LDR r0, =0xE000E000 ; Build address of NVIC registers
ports/cortex_m23/ac6/example_build/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -87,23 +88,12 @@ _tx_initialize_low_level:
ADDS r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
LDR r0, =0xE000ED08 // Build address of NVIC registers
LDR r1, =__Vectors // Pickup address of vector table
STR r1, [r0] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
// LDR r1, [r0] // Pickup the current value
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__Vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
LDR r0, =0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports/cortex_m23/gnu/src/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -87,11 +88,6 @@ _tx_initialize_low_level:
ADDS r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
LDR r0, =0xE000ED08 // Build address of NVIC registers
LDR r1, =_vectors // Pickup address of vector table
STR r1, [r0] // Set vector table address
// /* Enable the cycle count register. */
//
// LDR r0, =0xE0001000 // Build address of DWT register
@@ -99,12 +95,6 @@ _tx_initialize_low_level:
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
LDR r0, =0xE000E000 // Build address of NVIC registers
MOVS r1, #0 // Build value for SysTick reset
ports/cortex_m23/iar/src/tx_initialize_low_level.s
+1 -13
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -20,11 +21,9 @@
/**************************************************************************/
/**************************************************************************/
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __main
EXTERN __vector_table
EXTERN _tx_thread_current_ptr
EXTERN _tx_thread_stack_error_handler
@@ -85,23 +84,12 @@ _tx_initialize_low_level:
LDR r1, =__tx_free_memory_start // Build first free address
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
LDR r0, =0xE000ED08 // Build address of NVIC registers
LDR r1, =__vector_table // Pickup address of vector table
STR r1, [r0] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
// LDR r1, [r0] // Pickup the current value
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
LDR r0, =0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports/cortex_m3/ac5/example_build/tx_initialize_low_level.s
+2 -14
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
; Some portions generated by Copilot (Opus 5).
;
;
;/**************************************************************************/
@@ -20,7 +22,6 @@
;/**************************************************************************/
;
;
IMPORT _tx_thread_system_stack_ptr
IMPORT _tx_initialize_unused_memory
IMPORT _tx_timer_interrupt
IMPORT __main
@@ -139,12 +140,6 @@ _tx_initialize_low_level
ADD r1, r1, #4 ;
STR r1, [r0] ; Setup first unused memory pointer
;
; /* Setup Vector Table Offset Register. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
LDR r1, =__tx_vectors ; Pickup address of vector table
STR r1, [r0, #0xD08] ; Set vector table address
;
; /* Enable the cycle count register. */
;
; LDR r0, =0xE0001000 ; Build address of DWT register
@@ -152,13 +147,6 @@ _tx_initialize_low_level
; ORR r1, r1, #1 ; Set the CYCCNTENA bit
; STR r1, [r0] ; Enable the cycle count register
;
; /* Set system stack pointer from vector value. */
;
LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
LDR r1, =__tx_vectors ; Pickup address of vector table
LDR r1, [r1] ; Pickup reset stack pointer
STR r1, [r0] ; Save system stack pointer
;
; /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
ports/cortex_m3/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+2 -14
View File
@@ -1,5 +1,6 @@
@/***************************************************************************
@ * Copyright (c) 2024 Microsoft Corporation
@ * Copyright (c) 2026-present Eclipse ThreadX contributors
@ *
@ * This program and the accompanying materials are made available under the
@ * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
@ *
@ * SPDX-License-Identifier: MIT
@ **************************************************************************/
// Some portions generated by Copilot (Opus 5).
@
@
@/**************************************************************************/
@@ -20,7 +22,6 @@
@/**************************************************************************/
@
@
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global _tx_timer_interrupt
.global __main
@@ -93,19 +94,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 @
STR r1, [r0] @ Setup first unused memory pointer
@
@ /* Setup Vector Table Offset Register. */
@
MOV r0, #0xE000E000 @ Build address of NVIC registers
LDR r1, =vector_table @ Pickup address of vector table
STR r1, [r0, #0xD08] @ Set vector table address
@
@ /* Set system stack pointer from vector value. */
@
LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer
LDR r1, =vector_table @ Pickup address of vector table
LDR r1, [r1] @ Pickup reset stack pointer
STR r1, [r0] @ Save system stack pointer
@
@ /* Enable the cycle count register. */
@
LDR r0, =0xE0001000 @ Build address of DWT register
ports/cortex_m3/ghs/example_build/tx_initialize_low_level.arm
+3 -14
View File
@@ -1,5 +1,6 @@
/***************************************************************************
* Copyright (c) 2024 Microsoft Corporation
* Copyright (c) 2026-present Eclipse ThreadX contributors
*
* This program and the accompanying materials are made available under the
* terms of the MIT License which is available at
@@ -7,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
; Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -75,13 +77,6 @@ _tx_initialize_low_level:
CPSID i ; Disable interrupts
/* Save the system stack pointer. */
/* _tx_thread_system_stack_ptr = (VOID_PTR) (sp); */
LDR r1,=_tx_thread_system_stack_ptr ; Pickup address of system stack ptr
STR sp, [r1] ; Save system stack
/* Save the first available memory address. */
/* _tx_initialize_unused_memory = (VOID_PTR) __ghsbegin_free_mem; */
@@ -98,15 +93,9 @@ _tx_initialize_low_level:
STR r1, [r0] ; Enable the cycle count register
/* Setup Vector Table Offset Register. */
MOV r0, 0xE000E000 ; Build address of NVIC registers
LDR r1, =__vectors ; Pickup address of vector table
STR r1, [r0, 0xD08] ; Set vector table address
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
MOV r0, 0xE000E000 ; Build address of NVIC registers
MOV r1, 0 ; Build value for SysTick reset
STR r1, [r0, 0x10] ; Reset SysTick Control
STR r1, [r0, 0x18] ; Reset SysTick Counter Value
ports/cortex_m3/gnu/example_build/tx_initialize_low_level.S
+1 -13
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
/**************************************************************************/
@@ -19,12 +20,10 @@
/**************************************************************************/
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global __RAM_segment_used_end__
.global _tx_timer_interrupt
.global __main
.global _vectors
.global __tx_NMIHandler // NMI
.global __tx_BadHandler // HardFault
.global __tx_SVCallHandler // SVCall
@@ -89,17 +88,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =_vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
LDR r1, [r0] // Pickup the current value
ports/cortex_m3/iar/example_build/tx_initialize_low_level.s
+2 -15
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
; Some portions generated by Copilot (Opus 5).
;
;
;/**************************************************************************/
@@ -20,10 +22,8 @@
;/**************************************************************************/
;
;
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __vector_table
EXTERN _tx_execution_isr_enter
EXTERN _tx_execution_isr_exit
;
@@ -97,19 +97,6 @@ _tx_initialize_low_level:
ORR r1, r1, #1 ; Set the CYCCNTENA bit
STR r1, [r0] ; Enable the cycle count register
;
; /* Setup Vector Table Offset Register. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
LDR r1, =__vector_table ; Pickup address of vector table
STR r1, [r0, #0xD08] ; Set vector table address
;
; /* Set system stack pointer from vector value. */
;
LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
LDR r1, =__vector_table ; Pickup address of vector table
LDR r1, [r1] ; Pickup reset stack pointer
STR r1, [r0] ; Save system stack pointer
;
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
ports/cortex_m3/keil/example_build/tx_initialize_low_level.s
+2 -14
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
; Some portions generated by Copilot (Opus 5).
;
;
;/**************************************************************************/
@@ -20,7 +22,6 @@
;/**************************************************************************/
;
;
IMPORT _tx_thread_system_stack_ptr
IMPORT _tx_initialize_unused_memory
IMPORT _tx_timer_interrupt
IMPORT __main
@@ -138,12 +139,6 @@ _tx_initialize_low_level
ADD r1, r1, #4 ;
STR r1, [r0] ; Setup first unused memory pointer
;
; /* Setup Vector Table Offset Register. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
LDR r1, =__tx_vectors ; Pickup address of vector table
STR r1, [r0, #0xD08] ; Set vector table address
;
; /* Enable the cycle count register. */
;
; LDR r0, =0xE0001000 ; Build address of DWT register
@@ -151,13 +146,6 @@ _tx_initialize_low_level
; ORR r1, r1, #1 ; Set the CYCCNTENA bit
; STR r1, [r0] ; Enable the cycle count register
;
; /* Set system stack pointer from vector value. */
;
LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
LDR r1, =__tx_vectors ; Pickup address of vector table
LDR r1, [r1] ; Pickup reset stack pointer
STR r1, [r0] ; Save system stack pointer
;
; /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
ports/cortex_m33/ac6/example_build/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -84,23 +85,12 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__Vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
LDR r1, [r0] // Pickup the current value
ORR r1, r1, #1 // Set the CYCCNTENA bit
STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__Vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports/cortex_m33/ac6/src/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -87,23 +88,12 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__Vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
LDR r1, [r0] // Pickup the current value
ORR r1, r1, #1 // Set the CYCCNTENA bit
STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__Vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports/cortex_m33/gnu/example_build/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -87,23 +88,12 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =_vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
LDR r1, [r0] // Pickup the current value
ORR r1, r1, #1 // Set the CYCCNTENA bit
STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports/cortex_m33/iar/src/tx_initialize_low_level.s
+1 -13
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -24,11 +25,9 @@
#include "tx_user.h"
#endif
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __main
EXTERN __vector_table
EXTERN _tx_thread_current_ptr
EXTERN _tx_thread_stack_error_handler
@@ -89,23 +88,12 @@ _tx_initialize_low_level:
LDR r1, =__tx_free_memory_start // Build first free address
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
// LDR r1, [r0] // Pickup the current value
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports/cortex_m4/ac5/example_build/tx_initialize_low_level.s
+1 -14
View File
@@ -1,4 +1,5 @@
;/**************************************************************************/
; Some portions generated by Copilot (Opus 5).
;/* */
;/* Copyright (c) 2024 Microsoft Corporation. */
;/* */
@@ -16,7 +17,6 @@
;/**************************************************************************/
;
;
IMPORT _tx_thread_system_stack_ptr
IMPORT _tx_initialize_unused_memory
IMPORT _tx_thread_context_save
IMPORT _tx_thread_context_restore
@@ -143,12 +143,6 @@ _tx_initialize_low_level
ADD r1, r1, #4 ;
STR r1, [r0] ; Setup first unused memory pointer
;
; /* Setup Vector Table Offset Register. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
LDR r1, =__tx_vectors ; Pickup address of vector table
STR r1, [r0, #0xD08] ; Set vector table address
;
; /* Enable the cycle count register. */
;
; LDR r0, =0xE0001000 ; Build address of DWT register
@@ -156,13 +150,6 @@ _tx_initialize_low_level
; ORR r1, r1, #1 ; Set the CYCCNTENA bit
; STR r1, [r0] ; Enable the cycle count register
;
; /* Set system stack pointer from vector value. */
;
LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
LDR r1, =__tx_vectors ; Pickup address of vector table
LDR r1, [r1] ; Pickup reset stack pointer
STR r1, [r0] ; Save system stack pointer
;
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
ports/cortex_m4/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+2 -14
View File
@@ -1,5 +1,6 @@
@/***************************************************************************
@ * Copyright (c) 2024 Microsoft Corporation
@ * Copyright (c) 2026-present Eclipse ThreadX contributors
@ *
@ * This program and the accompanying materials are made available under the
@ * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
@ *
@ * SPDX-License-Identifier: MIT
@ **************************************************************************/
// Some portions generated by Copilot (Opus 5).
@
@
@/**************************************************************************/
@@ -20,7 +22,6 @@
@/**************************************************************************/
@
@
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global _tx_timer_interrupt
.global __main
@@ -93,19 +94,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 @
STR r1, [r0] @ Setup first unused memory pointer
@
@ /* Setup Vector Table Offset Register. */
@
MOV r0, #0xE000E000 @ Build address of NVIC registers
LDR r1, =vector_table @ Pickup address of vector table
STR r1, [r0, #0xD08] @ Set vector table address
@
@ /* Set system stack pointer from vector value. */
@
LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer
LDR r1, =vector_table @ Pickup address of vector table
LDR r1, [r1] @ Pickup reset stack pointer
STR r1, [r0] @ Save system stack pointer
@
@ /* Enable the cycle count register. */
@
LDR r0, =0xE0001000 @ Build address of DWT register
ports/cortex_m4/ghs/example_build/tx_initialize_low_level.arm
+3 -14
View File
@@ -1,5 +1,6 @@
/***************************************************************************
* Copyright (c) 2024 Microsoft Corporation
* Copyright (c) 2026-present Eclipse ThreadX contributors
*
* This program and the accompanying materials are made available under the
* terms of the MIT License which is available at
@@ -7,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
; Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -75,13 +77,6 @@ _tx_initialize_low_level:
CPSID i ; Disable interrupts
/* Save the system stack pointer. */
/* _tx_thread_system_stack_ptr = (VOID_PTR) (sp); */
LDR r1,=_tx_thread_system_stack_ptr ; Pickup address of system stack ptr
STR sp, [r1] ; Save system stack
/* Save the first available memory address. */
/* _tx_initialize_unused_memory = (VOID_PTR) __ghsbegin_free_mem; */
@@ -98,15 +93,9 @@ _tx_initialize_low_level:
STR r1, [r0] ; Enable the cycle count register
/* Setup Vector Table Offset Register. */
MOV r0, 0xE000E000 ; Build address of NVIC registers
LDR r1, =__vectors ; Pickup address of vector table
STR r1, [r0, 0xD08] ; Set vector table address
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
MOV r0, 0xE000E000 ; Build address of NVIC registers
MOV r1, 0 ; Build value for SysTick reset
STR r1, [r0, 0x10] ; Reset SysTick Control
STR r1, [r0, 0x18] ; Reset SysTick Counter Value
ports/cortex_m4/gnu/example_build/tx_initialize_low_level.S
+2 -15
View File
@@ -1,5 +1,6 @@
@/***************************************************************************
@ * Copyright (c) 2024 Microsoft Corporation
@ * Copyright (c) 2026-present Eclipse ThreadX contributors
@ *
@ * This program and the accompanying materials are made available under the
@ * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
@ *
@ * SPDX-License-Identifier: MIT
@ **************************************************************************/
// Some portions generated by Copilot (Opus 5).
@
@
@/**************************************************************************/
@@ -20,14 +22,12 @@
@/**************************************************************************/
@
@
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global __RAM_segment_used_end__
.global _tx_timer_interrupt
.global __main
.global __tx_SVCallHandler
.global __tx_PendSVHandler
.global _vectors
.global __tx_NMIHandler @ NMI
.global __tx_BadHandler @ HardFault
.global __tx_SVCallHandler @ SVCall
@@ -95,19 +95,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 @
STR r1, [r0] @ Setup first unused memory pointer
@
@ /* Setup Vector Table Offset Register. */
@
MOV r0, #0xE000E000 @ Build address of NVIC registers
LDR r1, =_vectors @ Pickup address of vector table
STR r1, [r0, #0xD08] @ Set vector table address
@
@ /* Set system stack pointer from vector value. */
@
LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer
LDR r1, =_vectors @ Pickup address of vector table
LDR r1, [r1] @ Pickup reset stack pointer
STR r1, [r0] @ Save system stack pointer
@
@ /* Enable the cycle count register. */
@
LDR r0, =0xE0001000 @ Build address of DWT register
ports/cortex_m4/iar/example_build/tx_initialize_low_level.s
+2 -15
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
; Some portions generated by Copilot (Opus 5).
;
;
;/**************************************************************************/
@@ -20,10 +22,8 @@
;/**************************************************************************/
;
;
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __vector_table
EXTERN _tx_execution_isr_enter
EXTERN _tx_execution_isr_exit
;
@@ -97,19 +97,6 @@ _tx_initialize_low_level:
ORR r1, r1, #1 ; Set the CYCCNTENA bit
STR r1, [r0] ; Enable the cycle count register
;
; /* Setup Vector Table Offset Register. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
LDR r1, =__vector_table ; Pickup address of vector table
STR r1, [r0, #0xD08] ; Set vector table address
;
; /* Set system stack pointer from vector value. */
;
LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
LDR r1, =__vector_table ; Pickup address of vector table
LDR r1, [r1] ; Pickup reset stack pointer
STR r1, [r0] ; Save system stack pointer
;
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
ports/cortex_m4/keil/example_build/tx_initialize_low_level.s
+2 -14
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
; Some portions generated by Copilot (Opus 5).
;
;
;/**************************************************************************/
@@ -30,7 +32,6 @@
;#include "tx_timer.h"
;
;
IMPORT _tx_thread_system_stack_ptr
IMPORT _tx_initialize_unused_memory
IMPORT _tx_thread_context_save
IMPORT _tx_thread_context_restore
@@ -158,12 +159,6 @@ _tx_initialize_low_level
ADD r1, r1, #4 ;
STR r1, [r0] ; Setup first unused memory pointer
;
; /* Setup Vector Table Offset Register. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
LDR r1, =__tx_vectors ; Pickup address of vector table
STR r1, [r0, #0xD08] ; Set vector table address
;
; /* Enable the cycle count register. */
;
; LDR r0, =0xE0001000 ; Build address of DWT register
@@ -171,13 +166,6 @@ _tx_initialize_low_level
; ORR r1, r1, #1 ; Set the CYCCNTENA bit
; STR r1, [r0] ; Enable the cycle count register
;
; /* Set system stack pointer from vector value. */
;
LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
LDR r1, =__tx_vectors ; Pickup address of vector table
LDR r1, [r1] ; Pickup reset stack pointer
STR r1, [r0] ; Save system stack pointer
;
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
ports/cortex_m52/ac6/src/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -87,23 +88,12 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__Vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
LDR r1, [r0] // Pickup the current value
ORR r1, r1, #1 // Set the CYCCNTENA bit
STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__Vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports/cortex_m52/iar/src/tx_initialize_low_level.s
+1 -13
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -24,11 +25,9 @@
#include "tx_user.h"
#endif
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __main
EXTERN __vector_table
EXTERN _tx_thread_current_ptr
EXTERN _tx_thread_stack_error_handler
@@ -89,23 +88,12 @@ _tx_initialize_low_level:
LDR r1, =__tx_free_memory_start // Build first free address
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
// LDR r1, [r0] // Pickup the current value
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports/cortex_m55/ac6/example_build/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -84,23 +85,12 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__Vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
LDR r1, [r0] // Pickup the current value
ORR r1, r1, #1 // Set the CYCCNTENA bit
STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__Vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports/cortex_m55/ac6/src/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -87,23 +88,12 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__Vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
LDR r1, [r0] // Pickup the current value
ORR r1, r1, #1 // Set the CYCCNTENA bit
STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__Vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports/cortex_m55/gnu/example_build/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -87,23 +88,12 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =_vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
LDR r1, [r0] // Pickup the current value
ORR r1, r1, #1 // Set the CYCCNTENA bit
STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports/cortex_m55/iar/src/tx_initialize_low_level.s
+1 -13
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -24,11 +25,9 @@
#include "tx_user.h"
#endif
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __main
EXTERN __vector_table
EXTERN _tx_thread_current_ptr
EXTERN _tx_thread_stack_error_handler
@@ -89,23 +88,12 @@ _tx_initialize_low_level:
LDR r1, =__tx_free_memory_start // Build first free address
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
// LDR r1, [r0] // Pickup the current value
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports/cortex_m7/ac5/example_build/tx_initialize_low_level.s
+2 -14
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
; Some portions generated by Copilot (Opus 5).
;
;
;/**************************************************************************/
@@ -20,7 +22,6 @@
;/**************************************************************************/
;
;
IMPORT _tx_thread_system_stack_ptr
IMPORT _tx_initialize_unused_memory
IMPORT _tx_thread_context_save
IMPORT _tx_thread_context_restore
@@ -148,12 +149,6 @@ _tx_initialize_low_level
ADD r1, r1, #4 ;
STR r1, [r0] ; Setup first unused memory pointer
;
; /* Setup Vector Table Offset Register. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
LDR r1, =__tx_vectors ; Pickup address of vector table
STR r1, [r0, #0xD08] ; Set vector table address
;
; /* Enable the cycle count register. */
;
; LDR r0, =0xE0001000 ; Build address of DWT register
@@ -161,13 +156,6 @@ _tx_initialize_low_level
; ORR r1, r1, #1 ; Set the CYCCNTENA bit
; STR r1, [r0] ; Enable the cycle count register
;
; /* Set system stack pointer from vector value. */
;
LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
LDR r1, =__tx_vectors ; Pickup address of vector table
LDR r1, [r1] ; Pickup reset stack pointer
STR r1, [r0] ; Save system stack pointer
;
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
ports/cortex_m7/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+2 -14
View File
@@ -1,5 +1,6 @@
@/***************************************************************************
@ * Copyright (c) 2024 Microsoft Corporation
@ * Copyright (c) 2026-present Eclipse ThreadX contributors
@ *
@ * This program and the accompanying materials are made available under the
@ * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
@ *
@ * SPDX-License-Identifier: MIT
@ **************************************************************************/
// Some portions generated by Copilot (Opus 5).
@
@
@/**************************************************************************/
@@ -20,7 +22,6 @@
@/**************************************************************************/
@
@
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global _tx_timer_interrupt
.global __main
@@ -93,19 +94,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 @
STR r1, [r0] @ Setup first unused memory pointer
@
@ /* Setup Vector Table Offset Register. */
@
MOV r0, #0xE000E000 @ Build address of NVIC registers
LDR r1, =vector_table @ Pickup address of vector table
STR r1, [r0, #0xD08] @ Set vector table address
@
@ /* Set system stack pointer from vector value. */
@
LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer
LDR r1, =vector_table @ Pickup address of vector table
LDR r1, [r1] @ Pickup reset stack pointer
STR r1, [r0] @ Save system stack pointer
@
@ /* Enable the cycle count register. */
@
LDR r0, =0xE0001000 @ Build address of DWT register
ports/cortex_m7/ghs/example_build/tx_initialize_low_level.arm
+3 -14
View File
@@ -1,5 +1,6 @@
/***************************************************************************
* Copyright (c) 2024 Microsoft Corporation
* Copyright (c) 2026-present Eclipse ThreadX contributors
*
* This program and the accompanying materials are made available under the
* terms of the MIT License which is available at
@@ -7,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
; Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -75,13 +77,6 @@ _tx_initialize_low_level:
CPSID i ; Disable interrupts
/* Save the system stack pointer. */
/* _tx_thread_system_stack_ptr = (VOID_PTR) (sp); */
LDR r1,=_tx_thread_system_stack_ptr ; Pickup address of system stack ptr
STR sp, [r1] ; Save system stack
/* Save the first available memory address. */
/* _tx_initialize_unused_memory = (VOID_PTR) __ghsbegin_free_mem; */
@@ -98,15 +93,9 @@ _tx_initialize_low_level:
STR r1, [r0] ; Enable the cycle count register
/* Setup Vector Table Offset Register. */
MOV r0, 0xE000E000 ; Build address of NVIC registers
LDR r1, =__vectors ; Pickup address of vector table
STR r1, [r0, 0xD08] ; Set vector table address
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
MOV r0, 0xE000E000 ; Build address of NVIC registers
MOV r1, 0 ; Build value for SysTick reset
STR r1, [r0, 0x10] ; Reset SysTick Control
STR r1, [r0, 0x18] ; Reset SysTick Counter Value
ports/cortex_m7/gnu/example_build/tx_initialize_low_level.S
+1 -13
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
/**************************************************************************/
@@ -19,12 +20,10 @@
/**************************************************************************/
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global __RAM_segment_used_end__
.global _tx_timer_interrupt
.global __main
.global _vectors
.global __tx_NMIHandler // NMI
.global __tx_BadHandler // HardFault
.global __tx_SVCallHandler // SVCall
@@ -89,17 +88,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =_vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
LDR r1, [r0] // Pickup the current value
ports/cortex_m7/iar/example_build/tx_initialize_low_level.s
+2 -15
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
; Some portions generated by Copilot (Opus 5).
;
;
;/**************************************************************************/
@@ -20,10 +22,8 @@
;/**************************************************************************/
;
;
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __vector_table
EXTERN _tx_execution_isr_enter
EXTERN _tx_execution_isr_exit
;
@@ -97,19 +97,6 @@ _tx_initialize_low_level:
ORR r1, r1, #1 ; Set the CYCCNTENA bit
STR r1, [r0] ; Enable the cycle count register
;
; /* Setup Vector Table Offset Register. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
LDR r1, =__vector_table ; Pickup address of vector table
STR r1, [r0, #0xD08] ; Set vector table address
;
; /* Set system stack pointer from vector value. */
;
LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
LDR r1, =__vector_table ; Pickup address of vector table
LDR r1, [r1] ; Pickup reset stack pointer
STR r1, [r0] ; Save system stack pointer
;
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
ports/cortex_m85/ac6/src/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -87,23 +88,12 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__Vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
LDR r1, [r0] // Pickup the current value
ORR r1, r1, #1 // Set the CYCCNTENA bit
STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__Vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports/cortex_m85/gnu/example_build/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -87,23 +88,12 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =_vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
LDR r1, [r0] // Pickup the current value
ORR r1, r1, #1 // Set the CYCCNTENA bit
STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports/cortex_m85/iar/src/tx_initialize_low_level.s
+1 -13
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -24,11 +25,9 @@
#include "tx_user.h"
#endif
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __main
EXTERN __vector_table
EXTERN _tx_thread_current_ptr
EXTERN _tx_thread_stack_error_handler
@@ -89,23 +88,12 @@ _tx_initialize_low_level:
LDR r1, =__tx_free_memory_start // Build first free address
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
// LDR r1, [r0] // Pickup the current value
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports_arch/ARMv7-M/threadx/ac5/example_build/tx_initialize_low_level.s
+1 -12
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -20,7 +21,6 @@
/**************************************************************************/
/**************************************************************************/
IMPORT _tx_thread_system_stack_ptr
IMPORT _tx_initialize_unused_memory
IMPORT _tx_thread_context_save
IMPORT _tx_thread_context_restore
@@ -151,17 +151,6 @@ _tx_initialize_low_level
ADD r1, r1, #4 // Add 4 to get to next free word
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__tx_vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__tx_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
#ifndef TX_NO_TIMER
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
ports_arch/ARMv7-M/threadx/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+1 -12
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -20,7 +21,6 @@
/**************************************************************************/
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
#ifndef TX_NO_TIMER
.global _tx_timer_interrupt
@@ -93,17 +93,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
#ifndef TX_NO_TIMER
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
ports_arch/ARMv7-M/threadx/ghs/example_build/tx_initialize_low_level.arm
+3 -14
View File
@@ -1,5 +1,6 @@
/***************************************************************************
* Copyright (c) 2024 Microsoft Corporation
* Copyright (c) 2026-present Eclipse ThreadX contributors
*
* This program and the accompanying materials are made available under the
* terms of the MIT License which is available at
@@ -7,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
; Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -75,13 +77,6 @@ _tx_initialize_low_level:
CPSID i ; Disable interrupts
/* Save the system stack pointer. */
/* _tx_thread_system_stack_ptr = (VOID_PTR) (sp); */
LDR r1,=_tx_thread_system_stack_ptr ; Pickup address of system stack ptr
STR sp, [r1] ; Save system stack
/* Save the first available memory address. */
/* _tx_initialize_unused_memory = (VOID_PTR) __ghsbegin_free_mem; */
@@ -98,15 +93,9 @@ _tx_initialize_low_level:
STR r1, [r0] ; Enable the cycle count register
/* Setup Vector Table Offset Register. */
MOV r0, 0xE000E000 ; Build address of NVIC registers
LDR r1, =__vectors ; Pickup address of vector table
STR r1, [r0, 0xD08] ; Set vector table address
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
MOV r0, 0xE000E000 ; Build address of NVIC registers
MOV r1, 0 ; Build value for SysTick reset
STR r1, [r0, 0x10] ; Reset SysTick Control
STR r1, [r0, 0x18] ; Reset SysTick Counter Value
ports_arch/ARMv7-M/threadx/gnu/example_build/tx_initialize_low_level.S
+1 -13
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -20,12 +21,10 @@
/**************************************************************************/
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global __RAM_segment_used_end__
.global _tx_timer_interrupt
.global __main
.global _vectors
.global __tx_NMIHandler // NMI
.global __tx_BadHandler // HardFault
.global __tx_SVCallHandler // SVCall
@@ -90,17 +89,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =_vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
#ifndef TX_NO_TIMER
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
ports_arch/ARMv7-M/threadx/iar/example_build/tx_initialize_low_level.s
+1 -13
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -20,10 +21,8 @@
/**************************************************************************/
/**************************************************************************/
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __vector_table
EXTERN _tx_execution_isr_enter
EXTERN _tx_execution_isr_exit
@@ -84,17 +83,6 @@ _tx_initialize_low_level:
LDR r2, =_tx_initialize_unused_memory // Build address of unused memory pointer
STR r0, [r2, #0] // Save first free memory address
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
#ifndef TX_NO_TIMER
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
ports_arch/ARMv8-M/threadx/ac6/src/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -87,23 +88,12 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__Vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
LDR r1, [r0] // Pickup the current value
ORR r1, r1, #1 // Set the CYCCNTENA bit
STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__Vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports_arch/ARMv8-M/threadx/iar/src/tx_initialize_low_level.s
+1 -13
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -24,11 +25,9 @@
#include "tx_user.h"
#endif
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __main
EXTERN __vector_table
EXTERN _tx_thread_current_ptr
EXTERN _tx_thread_stack_error_handler
@@ -89,23 +88,12 @@ _tx_initialize_low_level:
LDR r1, =__tx_free_memory_start // Build first free address
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
// LDR r1, [r0] // Pickup the current value
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports_module/cortex_m0+/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+1 -14
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,7 +22,6 @@
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global _tx_timer_interrupt
.global __main
@@ -93,19 +93,6 @@ _tx_initialize_low_level:
ADDS r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
LDR r0, =0xE000ED08 // Build address of NVIC registers
LDR r1, =vector_table // Pickup address of vector table
STR r1, [r0] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S
+1 -15
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,7 +22,6 @@
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global _tx_timer_interrupt
.global __main
@@ -93,20 +93,6 @@ _tx_initialize_low_level:
ADDS r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
LDR r0, =0xE000E000 // Build address of NVIC registers
LDR r1, =vector_table // Pickup address of vector table
LDR r2, =0xD08
STR r1, [r0, r2] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
ports_module/cortex_m0+/gnu/example_build/sample_threadx/tx_initialize_low_level.S
+1 -15
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,12 +22,10 @@
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global __RAM_segment_used_end__
.global _tx_timer_interrupt
.global __main
.global _vectors
.global __tx_NMIHandler // NMI
.global __tx_BadHandler // HardFault
.global __tx_SVCallHandler // SVCall
@@ -95,19 +94,6 @@ _tx_initialize_low_level:
ADDS r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
LDR r0, =0xE000ED08 // Build address of NVIC registers
LDR r1, =_vectors // Pickup address of vector table
STR r1, [r0] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
ports_module/cortex_m0+/gnu/example_build/sample_threadx_module_manager/tx_initialize_low_level.S
+1 -15
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,12 +22,10 @@
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global __RAM_segment_used_end__
.global _tx_timer_interrupt
.global __main
.global _vectors
.global __tx_NMIHandler // NMI
.global __tx_BadHandler // HardFault
.global __tx_SVCallHandler // SVCall
@@ -95,19 +94,6 @@ _tx_initialize_low_level:
ADDS r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
LDR r0, =0xE000ED08 // Build address of NVIC registers
LDR r1, =_vectors // Pickup address of vector table
STR r1, [r0] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
ports_module/cortex_m0+/iar/example_build/tx_initialize_low_level.s
+2 -15
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
; Some portions generated by Copilot (Opus 5).
;
;
;/**************************************************************************/
@@ -30,10 +32,8 @@
;#include "tx_timer.h"
;
;
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __vector_table
EXTERN _tx_execution_isr_enter
EXTERN _tx_execution_isr_exit
;
@@ -99,19 +99,6 @@ _tx_initialize_low_level:
ADDS r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
LDR r0, =0xE000ED08 // Build address of NVIC registers
LDR r1, =__vector_table // Pickup address of vector table
STR r1, [r0] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
ports_module/cortex_m23/ac6/example_build/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -84,23 +85,12 @@ _tx_initialize_low_level:
ADDS r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
LDR r0, =0xE000ED08 // Build address of NVIC registers
LDR r1, =__Vectors // Pickup address of vector table
STR r1, [r0] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
// LDR r1, [r0] // Pickup the current value
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__Vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
LDR r0, =0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports_module/cortex_m23/gnu/module_manager/src/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
// Some portions generated by Claude Code (Opus 5).
@@ -87,11 +88,6 @@ _tx_initialize_low_level:
ADDS r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
LDR r0, =0xE000ED08 // Build address of NVIC registers
LDR r1, =__Vectors // Pickup address of vector table
STR r1, [r0] // Set vector table address
// /* Enable the cycle count register. */
//
// LDR r0, =0xE0001000 // Build address of DWT register
@@ -99,12 +95,6 @@ _tx_initialize_low_level:
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__Vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
LDR r0, =0xE000E000 // Build address of NVIC registers
MOVS r1, #0 // Build value for SysTick reset
ports_module/cortex_m23/iar/example_build/tx_initialize_low_level.s
+1 -13
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -20,11 +21,9 @@
/**************************************************************************/
/**************************************************************************/
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __main
EXTERN __vector_table
EXTERN _tx_thread_current_ptr
EXTERN _tx_thread_stack_error_handler
@@ -85,23 +84,12 @@ _tx_initialize_low_level:
LDR r1, =__tx_free_memory_start // Build first free address
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
LDR r0, =0xE000ED08 // Build address of NVIC registers
LDR r1, =__vector_table // Pickup address of vector table
STR r1, [r0] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
// LDR r1, [r0] // Pickup the current value
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
LDR r0, =0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports_module/cortex_m3/ac5/example_build/tx_initialize_low_level.S
+2 -14
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
; Some portions generated by Copilot (Opus 5).
;
;
;/**************************************************************************/
@@ -30,7 +32,6 @@
;#include "tx_timer.h"
;
;
IMPORT _tx_thread_system_stack_ptr
IMPORT _tx_initialize_unused_memory
IMPORT _tx_thread_context_save
IMPORT _tx_thread_context_restore
@@ -162,12 +163,6 @@ _tx_initialize_low_level
ADD r1, r1, #4 ;
STR r1, [r0] ; Setup first unused memory pointer
;
; /* Setup Vector Table Offset Register. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
LDR r1, =__tx_vectors ; Pickup address of vector table
STR r1, [r0, #0xD08] ; Set vector table address
;
; /* Enable the cycle count register. */
;
; LDR r0, =0xE0001000 ; Build address of DWT register
@@ -175,13 +170,6 @@ _tx_initialize_low_level
; ORR r1, r1, #1 ; Set the CYCCNTENA bit
; STR r1, [r0] ; Enable the cycle count register
;
; /* Set system stack pointer from vector value. */
;
LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
LDR r1, =__tx_vectors ; Pickup address of vector table
LDR r1, [r1] ; Pickup reset stack pointer
STR r1, [r0] ; Save system stack pointer
;
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
ports_module/cortex_m3/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+1 -14
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,7 +22,6 @@
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global _tx_timer_interrupt
.global __main
@@ -93,19 +93,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
ports_module/cortex_m3/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S
+1 -14
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,7 +22,6 @@
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global _tx_timer_interrupt
.global __main
@@ -93,19 +93,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
ports_module/cortex_m3/gnu/example_build/tx_initialize_low_level.S
+1 -13
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,12 +22,10 @@
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global __RAM_segment_used_end__
.global _tx_timer_interrupt
.global __main
.global _vectors
.global __tx_NMIHandler @ NMI
.global __tx_BadHandler @ HardFault
.global __tx_DBGHandler @ Monitor
@@ -90,17 +89,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 @
STR r1, [r0] @ Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 @ Build address of NVIC registers
LDR r1, =_vectors @ Pickup address of vector table
STR r1, [r0, #0xD08] @ Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer
LDR r1, =_vectors @ Pickup address of vector table
LDR r1, [r1] @ Pickup reset stack pointer
STR r1, [r0] @ Save system stack pointer
/* Enable the cycle count register. */
LDR r0, =0xE0001000 @ Build address of DWT register
LDR r1, [r0] @ Pickup the current value
ports_module/cortex_m3/iar/example_build/tx_initialize_low_level.s
+2 -15
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
; Some portions generated by Copilot (Opus 5).
;
;
;/**************************************************************************/
@@ -30,10 +32,8 @@
;#include "tx_timer.h"
;
;
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __vector_table
EXTERN _tx_execution_isr_enter
EXTERN _tx_execution_isr_exit
;
@@ -107,19 +107,6 @@ _tx_initialize_low_level:
ORR r1, r1, #1 ; Set the CYCCNTENA bit
STR r1, [r0] ; Enable the cycle count register
;
; /* Setup Vector Table Offset Register. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
LDR r1, =__vector_table ; Pickup address of vector table
STR r1, [r0, #0xD08] ; Set vector table address
;
; /* Set system stack pointer from vector value. */
;
LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
LDR r1, =__vector_table ; Pickup address of vector table
LDR r1, [r1] ; Pickup reset stack pointer
STR r1, [r0] ; Save system stack pointer
;
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
ports_module/cortex_m33/ac6/example_build/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -84,23 +85,12 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__Vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
LDR r1, [r0] // Pickup the current value
ORR r1, r1, #1 // Set the CYCCNTENA bit
STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__Vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports_module/cortex_m33/gnu/module_manager/src/tx_initialize_low_level.S
+1 -11
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -84,23 +85,12 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =_vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
LDR r1, [r0] // Pickup the current value
ORR r1, r1, #1 // Set the CYCCNTENA bit
STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports_module/cortex_m33/iar/example_build/tx_initialize_low_level.s
+1 -13
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -20,11 +21,9 @@
/**************************************************************************/
/**************************************************************************/
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __main
EXTERN __vector_table
EXTERN _tx_thread_current_ptr
EXTERN _tx_thread_stack_error_handler
@@ -85,23 +84,12 @@ _tx_initialize_low_level:
LDR r1, =__tx_free_memory_start // Build first free address
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
// LDR r1, [r0] // Pickup the current value
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
ports_module/cortex_m4/ac5/example_build/tx_initialize_low_level.S
+1 -14
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -20,7 +21,6 @@
/**************************************************************************/
/**************************************************************************/
IMPORT _tx_thread_system_stack_ptr
IMPORT _tx_initialize_unused_memory
IMPORT _tx_thread_context_save
IMPORT _tx_thread_context_restore
@@ -148,12 +148,6 @@ _tx_initialize_low_level
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__tx_vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
@@ -161,13 +155,6 @@ _tx_initialize_low_level
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__tx_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
ports_module/cortex_m4/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+1 -14
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,7 +22,6 @@
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global _tx_timer_interrupt
.global __main
@@ -93,19 +93,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
ports_module/cortex_m4/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S
+1 -14
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,7 +22,6 @@
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global _tx_timer_interrupt
.global __main
@@ -93,12 +93,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
@@ -106,13 +100,6 @@ _tx_initialize_low_level:
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
ports_module/cortex_m4/gnu/example_build/tx_initialize_low_level.S
+1 -15
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,12 +22,10 @@
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global __RAM_segment_used_end__
.global _tx_timer_interrupt
.global __main
.global _vectors
.global __tx_NMIHandler // NMI
.global __tx_BadHandler // HardFault
.global __tx_DBGHandler // Monitor
@@ -92,12 +91,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =_vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
@@ -105,13 +98,6 @@ _tx_initialize_low_level:
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
ports_module/cortex_m4/iar/example_build/tx_initialize_low_level.s
+1 -15
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,10 +22,8 @@
/**************************************************************************/
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __vector_table
EXTERN _tx_execution_isr_enter
EXTERN _tx_execution_isr_exit
@@ -87,12 +86,6 @@ _tx_initialize_low_level:
LDR r1, =__tx_free_memory_start // Build first free address
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
@@ -100,13 +93,6 @@ _tx_initialize_low_level:
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
ports_module/cortex_m7/ac5/example_build/tx_initialize_low_level.S
+1 -14
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -20,7 +21,6 @@
/**************************************************************************/
/**************************************************************************/
IMPORT _tx_thread_system_stack_ptr
IMPORT _tx_initialize_unused_memory
IMPORT _tx_thread_context_save
IMPORT _tx_thread_context_restore
@@ -148,12 +148,6 @@ _tx_initialize_low_level
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__tx_vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
@@ -161,13 +155,6 @@ _tx_initialize_low_level
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__tx_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
ports_module/cortex_m7/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+1 -14
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,7 +22,6 @@
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global _tx_timer_interrupt
.global __main
@@ -93,19 +93,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Enable the cycle count register. */
LDR r0, =0xE0001000 // Build address of DWT register
ports_module/cortex_m7/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S
+1 -14
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,7 +22,6 @@
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global _tx_timer_interrupt
.global __main
@@ -93,12 +93,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
@@ -106,13 +100,6 @@ _tx_initialize_low_level:
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
ports_module/cortex_m7/gnu/example_build/tx_initialize_low_level.S
+1 -15
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,12 +22,10 @@
/**************************************************************************/
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global __RAM_segment_used_end__
.global _tx_timer_interrupt
.global __main
.global _vectors
.global __tx_NMIHandler // NMI
.global __tx_BadHandler // HardFault
.global __tx_DBGHandler // Monitor
@@ -92,12 +91,6 @@ _tx_initialize_low_level:
ADD r1, r1, #4 //
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =_vectors // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
@@ -105,13 +98,6 @@ _tx_initialize_low_level:
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =_vectors // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
ports_module/cortex_m7/iar/example_build/tx_initialize_low_level.s
+1 -15
View File
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Copilot (Opus 5).
/**************************************************************************/
@@ -21,10 +22,8 @@
/**************************************************************************/
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
EXTERN __vector_table
EXTERN _tx_execution_isr_enter
EXTERN _tx_execution_isr_exit
@@ -87,12 +86,6 @@ _tx_initialize_low_level:
LDR r1, =__tx_free_memory_start // Build first free address
STR r1, [r0] // Setup first unused memory pointer
/* Setup Vector Table Offset Register. */
MOV r0, #0xE000E000 // Build address of NVIC registers
LDR r1, =__vector_table // Pickup address of vector table
STR r1, [r0, #0xD08] // Set vector table address
/* Enable the cycle count register. */
// LDR r0, =0xE0001000 // Build address of DWT register
@@ -100,13 +93,6 @@ _tx_initialize_low_level:
// ORR r1, r1, #1 // Set the CYCCNTENA bit
// STR r1, [r0] // Enable the cycle count register
/* Set system stack pointer from vector value. */
LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer
LDR r1, =__vector_table // Pickup address of vector table
LDR r1, [r1] // Pickup reset stack pointer
STR r1, [r0] // Save system stack pointer
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers