diff --git a/f3_boot/src/main.c b/f3_boot/src/main.c
index 0779fefb..1a6bd8c7 100644
--- a/f3_boot/src/main.c
+++ b/f3_boot/src/main.c
@@ -289,7 +289,25 @@ int main(void) {
MX_RTC_Init();
- if(app_ok() && RTC->BKP0R == 0x00000000) {
+ if(app_ok() && RTC->BKP0R == 0x00000000 && (RCC->CSR & (RCC_CSR_IWDGRSTF | RCC_CSR_WWDGRSTF)) == 0x00000000) {
+ // reset rcc reset flag
+ RCC->CSR |= RCC_CSR_RMVF;
+
+ // enable access
+ IWDG->KR = 0x5555;
+
+ // set prescalser 4
+ IWDG->PR = 0;
+
+ // set reaload 0.2s
+ IWDG->RLR = 0.2 * 40000 / 4;
+
+ // start
+ IWDG->KR = 0xCCCC;
+
+ // reset
+ IWDG->KR = 0xAAAA;
+
// SCB->VTOR = APP_START;
/* Jump to user application */
void (*JumpToApplication)(void);
diff --git a/shared/hal.c b/shared/hal.c
index 5b4e6af1..007547d2 100644
--- a/shared/hal.c
+++ b/shared/hal.c
@@ -910,12 +910,40 @@ void hal_error(uint32_t error_handler) {
hal.error_info.error_handler = error_handler;
hal_stop();
hal.hal_state = MISC_ERROR;
+
+ switch(error_handler){
+ case HardFault:
+ printf("HardFault\n");
+ break;
+
+ case NMI:
+ printf("NMI\n");
+ break;
+
+ case MemManage:
+ printf("MemManage\n");
+ break;
+
+ case BusFault:
+ printf("BusFault\n");
+ break;
+
+ case UsageFault:
+ printf("UsageFault\n");
+ break;
+ }
}
void fault(char *ptr) {
- printf("trigger fault handler\n");
- volatile uint32_t *p = (uint32_t *)0x08010000;
- p[0] = 1;
+ // unaligned multiple load/store
+ //
+ __asm volatile (
+ "movs r0, #1 \t\n"
+ "ldm r0, {r1-r2} \t\n"
+ "bx lr \t\n"
+ );
+ //volatile uint32_t *p = (uint32_t *)0x08010000;
+ //p[0] = 1;
}
COMMAND("fault", fault, "trigger fault");
diff --git a/src/stm32f4xx_it.c b/src/stm32f4xx_it.c
index d629e6d4..757f7507 100644
--- a/src/stm32f4xx_it.c
+++ b/src/stm32f4xx_it.c
@@ -24,6 +24,8 @@
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_it.h"
#include "hal.h"
+#include "hw/hw.h"
+
/** @addtogroup STM32F4_Discovery_Peripheral_Examples
* @{
@@ -44,6 +46,7 @@
/* Cortex-M4 Processor Exceptions Handlers */
/******************************************************************************/
+extern void Wait(uint32_t ms);
/**
* @brief This function handles NMI exception.
* @param None
@@ -51,6 +54,10 @@
*/
void NMI_Handler(void) {
hal_error(NMI);
+ NVIC_DisableIRQ(TIM_SLAVE_IRQ);
+ NVIC_DisableIRQ(DMA2_Stream0_IRQn);
+ NVIC_DisableIRQ(SysTick_IRQn);
+ while(1){}
}
/**
@@ -61,6 +68,10 @@ void NMI_Handler(void) {
void HardFault_Handler(void) {
/* Go to infinite loop when Hard Fault exception occurs */
hal_error(HardFault);
+ NVIC_DisableIRQ(TIM_SLAVE_IRQ);
+ NVIC_DisableIRQ(DMA2_Stream0_IRQn);
+ NVIC_DisableIRQ(SysTick_IRQn);
+ while(1){}
}
/**
@@ -71,6 +82,10 @@ void HardFault_Handler(void) {
void MemManage_Handler(void) {
/* Go to infinite loop when Memory Manage exception occurs */
hal_error(MemManage);
+ NVIC_DisableIRQ(TIM_SLAVE_IRQ);
+ NVIC_DisableIRQ(DMA2_Stream0_IRQn);
+ NVIC_DisableIRQ(SysTick_IRQn);
+ while(1){}
}
/**
@@ -81,6 +96,10 @@ void MemManage_Handler(void) {
void BusFault_Handler(void) {
/* Go to infinite loop when Bus Fault exception occurs */
hal_error(BusFault);
+ NVIC_DisableIRQ(TIM_SLAVE_IRQ);
+ NVIC_DisableIRQ(DMA2_Stream0_IRQn);
+ NVIC_DisableIRQ(SysTick_IRQn);
+ while(1){}
}
/**
@@ -91,6 +110,10 @@ void BusFault_Handler(void) {
void UsageFault_Handler(void) {
/* Go to infinite loop when Usage Fault exception occurs */
hal_error(UsageFault);
+ NVIC_DisableIRQ(TIM_SLAVE_IRQ);
+ NVIC_DisableIRQ(DMA2_Stream0_IRQn);
+ NVIC_DisableIRQ(SysTick_IRQn);
+ while(1){}
}
/**
diff --git a/stm32f303/src/main.c b/stm32f303/src/main.c
index 45308d7a..55514d11 100644
--- a/stm32f303/src/main.c
+++ b/stm32f303/src/main.c
@@ -72,14 +72,14 @@ void SystemClock_Config(void);
void Error_Handler(void);
void TIM8_UP_IRQHandler() {
- GPIOA->BSRR |= GPIO_PIN_9;
__HAL_TIM_CLEAR_IT(&htim8, TIM_IT_UPDATE);
hal_run_rt();
if(__HAL_TIM_GET_FLAG(&htim8, TIM_IT_UPDATE) == SET) {
hal_stop();
hal.hal_state = RT_TOO_LONG;
}
- GPIOA->BSRR |= GPIO_PIN_9 << 16;
+ // reset
+ IWDG->KR = 0xAAAA;
}
void about(char *ptr) {
@@ -130,6 +130,9 @@ int main(void) {
extern void *g_pfnVectors;
SCB->VTOR = (uint32_t)&g_pfnVectors;
+ // reset
+ IWDG->KR = 0xAAAA;
+
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
@@ -355,11 +358,20 @@ int main(void) {
hal_parse("io0.ignore_fault_pin = ls0.ignore_fault_pin");
hal_parse("debug_level 0");
- // hal parse config
- // hal_init_nrt();
- // error foo
+ // reset
+ IWDG->KR = 0xAAAA;
+
hal_start();
+ // reset
+ IWDG->KR = 0xAAAA;
+
+ // enable access
+ IWDG->KR = 0x5555;
+
+ // set reaload 0.0005s
+ IWDG->RLR = 0.0005 * 40000 / 4;
+
while(1) {
hal_run_nrt();
cdc_poll();
diff --git a/stm32f303/src/stm32f3xx_it.c b/stm32f303/src/stm32f3xx_it.c
index c61f11d8..967624ee 100644
--- a/stm32f303/src/stm32f3xx_it.c
+++ b/stm32f303/src/stm32f3xx_it.c
@@ -54,6 +54,8 @@ extern PCD_HandleTypeDef hpcd_USB_FS;
void NMI_Handler(void) {
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
hal_error(NMI);
+ HAL_NVIC_DisableIRQ(TIM8_UP_IRQn);
+ while(1){}
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
@@ -68,6 +70,8 @@ void HardFault_Handler(void) {
/* USER CODE END HardFault_IRQn 0 */
hal_error(HardFault);
+ HAL_NVIC_DisableIRQ(TIM8_UP_IRQn);
+ while(1){}
/* USER CODE BEGIN HardFault_IRQn 1 */
/* USER CODE END HardFault_IRQn 1 */
@@ -81,6 +85,8 @@ void MemManage_Handler(void) {
/* USER CODE END MemoryManagement_IRQn 0 */
hal_error(MemManage);
+ HAL_NVIC_DisableIRQ(TIM8_UP_IRQn);
+ while(1){}
/* USER CODE BEGIN MemoryManagement_IRQn 1 */
/* USER CODE END MemoryManagement_IRQn 1 */
@@ -94,6 +100,8 @@ void BusFault_Handler(void) {
/* USER CODE END BusFault_IRQn 0 */
hal_error(BusFault);
+ HAL_NVIC_DisableIRQ(TIM8_UP_IRQn);
+ while(1){}
/* USER CODE BEGIN BusFault_IRQn 1 */
/* USER CODE END BusFault_IRQn 1 */
@@ -107,6 +115,8 @@ void UsageFault_Handler(void) {
/* USER CODE END UsageFault_IRQn 0 */
hal_error(UsageFault);
+ HAL_NVIC_DisableIRQ(TIM8_UP_IRQn);
+ while(1){}
/* USER CODE BEGIN UsageFault_IRQn 1 */
/* USER CODE END UsageFault_IRQn 1 */